| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 96.77 | 98.11 | 96.01 | 97.44 | 96.61 | 98.30 | 98.17 | 92.76 |
| T3568 | /workspace/coverage/default/14.usbdev_link_suspend.800265360 | Aug 16 05:34:56 PM PDT 24 | Aug 16 05:35:11 PM PDT 24 | 10924505965 ps | ||
| T3569 | /workspace/coverage/default/19.usbdev_in_trans.2140316277 | Aug 16 05:35:46 PM PDT 24 | Aug 16 05:35:48 PM PDT 24 | 179653659 ps | ||
| T3570 | /workspace/coverage/default/49.usbdev_disconnected.1259309089 | Aug 16 05:39:27 PM PDT 24 | Aug 16 05:39:28 PM PDT 24 | 136072565 ps | ||
| T3571 | /workspace/coverage/default/49.usbdev_pkt_buffer.1112111779 | Aug 16 05:39:53 PM PDT 24 | Aug 16 05:40:33 PM PDT 24 | 16845046744 ps | ||
| T3572 | /workspace/coverage/default/49.usbdev_out_stall.531020209 | Aug 16 05:39:26 PM PDT 24 | Aug 16 05:39:27 PM PDT 24 | 191832313 ps | ||
| T3573 | /workspace/coverage/default/324.usbdev_tx_rx_disruption.3421170965 | Aug 16 05:40:37 PM PDT 24 | Aug 16 05:40:39 PM PDT 24 | 558605725 ps | ||
| T3574 | /workspace/coverage/default/42.usbdev_max_inter_pkt_delay.2210295373 | Aug 16 05:39:07 PM PDT 24 | Aug 16 05:40:44 PM PDT 24 | 3508559086 ps | ||
| T3575 | /workspace/coverage/default/2.usbdev_bitstuff_err.59954934 | Aug 16 05:33:02 PM PDT 24 | Aug 16 05:33:03 PM PDT 24 | 182978245 ps | ||
| T3576 | /workspace/coverage/default/6.usbdev_tx_rx_disruption.1507394263 | Aug 16 05:33:57 PM PDT 24 | Aug 16 05:33:59 PM PDT 24 | 562600744 ps | ||
| T3577 | /workspace/coverage/default/41.usbdev_link_suspend.1640898233 | Aug 16 05:38:56 PM PDT 24 | Aug 16 05:39:07 PM PDT 24 | 8556189823 ps | ||
| T3578 | /workspace/coverage/default/66.usbdev_tx_rx_disruption.4269540657 | Aug 16 05:39:27 PM PDT 24 | Aug 16 05:39:29 PM PDT 24 | 599237295 ps | ||
| T3579 | /workspace/coverage/default/6.usbdev_out_trans_nak.870119560 | Aug 16 05:34:01 PM PDT 24 | Aug 16 05:34:02 PM PDT 24 | 178781425 ps | ||
| T3580 | /workspace/coverage/default/20.usbdev_phy_config_pinflip.3578245149 | Aug 16 05:35:43 PM PDT 24 | Aug 16 05:35:45 PM PDT 24 | 310254747 ps | ||
| T3581 | /workspace/coverage/default/439.usbdev_tx_rx_disruption.1564996285 | Aug 16 05:40:50 PM PDT 24 | Aug 16 05:40:52 PM PDT 24 | 462297473 ps | ||
| T3582 | /workspace/coverage/default/6.usbdev_spurious_pids_ignored.605523769 | Aug 16 05:33:55 PM PDT 24 | Aug 16 05:34:10 PM PDT 24 | 1852568558 ps | ||
| T3583 | /workspace/coverage/default/9.usbdev_alert_test.2330477959 | Aug 16 05:34:12 PM PDT 24 | Aug 16 05:34:13 PM PDT 24 | 57711495 ps | ||
| T3584 | /workspace/coverage/default/7.usbdev_out_iso.3633660904 | Aug 16 05:33:56 PM PDT 24 | Aug 16 05:33:58 PM PDT 24 | 181171037 ps | ||
| T3585 | /workspace/coverage/default/22.usbdev_phy_config_usb_ref_disable.2140343140 | Aug 16 05:36:14 PM PDT 24 | Aug 16 05:36:15 PM PDT 24 | 147410743 ps | ||
| T3586 | /workspace/coverage/default/25.usbdev_max_inter_pkt_delay.1786868807 | Aug 16 05:36:46 PM PDT 24 | Aug 16 05:38:01 PM PDT 24 | 2640063060 ps | ||
| T3587 | /workspace/coverage/default/480.usbdev_tx_rx_disruption.3961421656 | Aug 16 05:40:51 PM PDT 24 | Aug 16 05:40:53 PM PDT 24 | 634527973 ps | ||
| T3588 | /workspace/coverage/default/13.usbdev_link_suspend.3542531768 | Aug 16 05:34:49 PM PDT 24 | Aug 16 05:34:55 PM PDT 24 | 3703711911 ps | ||
| T3589 | /workspace/coverage/default/1.usbdev_rand_bus_resets.3631258392 | Aug 16 05:32:51 PM PDT 24 | Aug 16 05:33:29 PM PDT 24 | 3819607133 ps | ||
| T3590 | /workspace/coverage/default/23.usbdev_link_in_err.3927460243 | Aug 16 05:36:17 PM PDT 24 | Aug 16 05:36:18 PM PDT 24 | 169375051 ps | ||
| T3591 | /workspace/coverage/default/269.usbdev_tx_rx_disruption.928464156 | Aug 16 05:40:17 PM PDT 24 | Aug 16 05:40:19 PM PDT 24 | 490897435 ps | ||
| T3592 | /workspace/coverage/default/9.usbdev_out_trans_nak.1240581788 | Aug 16 05:34:08 PM PDT 24 | Aug 16 05:34:09 PM PDT 24 | 181189929 ps | ||
| T3593 | /workspace/coverage/default/31.usbdev_timeout_missing_host_handshake.82219622 | Aug 16 05:37:26 PM PDT 24 | Aug 16 05:37:49 PM PDT 24 | 2549970651 ps | ||
| T3594 | /workspace/coverage/default/35.usbdev_phy_pins_sense.3330182459 | Aug 16 05:38:04 PM PDT 24 | Aug 16 05:38:04 PM PDT 24 | 65567702 ps | ||
| T3595 | /workspace/coverage/default/28.usbdev_tx_rx_disruption.2274092710 | Aug 16 05:36:57 PM PDT 24 | Aug 16 05:36:59 PM PDT 24 | 625610847 ps | ||
| T3596 | /workspace/coverage/default/25.usbdev_fifo_rst.710250429 | Aug 16 05:37:17 PM PDT 24 | Aug 16 05:37:19 PM PDT 24 | 208902879 ps | ||
| T3597 | /workspace/coverage/default/8.usbdev_in_trans.2824927467 | Aug 16 05:34:10 PM PDT 24 | Aug 16 05:34:12 PM PDT 24 | 239069410 ps | ||
| T3598 | /workspace/coverage/default/11.usbdev_invalid_sync.2228194392 | Aug 16 05:34:48 PM PDT 24 | Aug 16 05:35:42 PM PDT 24 | 5516137209 ps | ||
| T3599 | /workspace/coverage/default/17.usbdev_out_stall.1732701705 | Aug 16 05:35:36 PM PDT 24 | Aug 16 05:35:37 PM PDT 24 | 158645740 ps | ||
| T3600 | /workspace/coverage/default/30.usbdev_smoke.1833340145 | Aug 16 05:37:27 PM PDT 24 | Aug 16 05:37:28 PM PDT 24 | 218378977 ps | ||
| T3601 | /workspace/coverage/default/100.usbdev_tx_rx_disruption.3311440600 | Aug 16 05:39:56 PM PDT 24 | Aug 16 05:39:57 PM PDT 24 | 636181951 ps | ||
| T3602 | /workspace/coverage/default/35.usbdev_rx_crc_err.3900700533 | Aug 16 05:38:11 PM PDT 24 | Aug 16 05:38:12 PM PDT 24 | 175642571 ps | ||
| T3603 | /workspace/coverage/default/36.usbdev_invalid_sync.3329478894 | Aug 16 05:38:09 PM PDT 24 | Aug 16 05:40:31 PM PDT 24 | 4774104134 ps | ||
| T3604 | /workspace/coverage/default/351.usbdev_tx_rx_disruption.2281857894 | Aug 16 05:40:22 PM PDT 24 | Aug 16 05:40:24 PM PDT 24 | 629437620 ps | ||
| T3605 | /workspace/coverage/default/26.usbdev_max_inter_pkt_delay.1541140 | Aug 16 05:36:38 PM PDT 24 | Aug 16 05:36:58 PM PDT 24 | 2385254181 ps | ||
| T3606 | /workspace/coverage/default/8.usbdev_pkt_buffer.24739052 | Aug 16 05:33:58 PM PDT 24 | Aug 16 05:34:26 PM PDT 24 | 9245116570 ps | ||
| T3607 | /workspace/coverage/default/341.usbdev_tx_rx_disruption.1730160230 | Aug 16 05:40:42 PM PDT 24 | Aug 16 05:40:44 PM PDT 24 | 539139478 ps | ||
| T3608 | /workspace/coverage/default/29.usbdev_streaming_out.1782398679 | Aug 16 05:37:21 PM PDT 24 | Aug 16 05:37:40 PM PDT 24 | 2547825874 ps | ||
| T3609 | /workspace/coverage/default/41.usbdev_out_stall.3414128265 | Aug 16 05:38:28 PM PDT 24 | Aug 16 05:38:29 PM PDT 24 | 170551793 ps | ||
| T3610 | /workspace/coverage/default/6.usbdev_max_length_out_transaction.2013095020 | Aug 16 05:33:53 PM PDT 24 | Aug 16 05:33:54 PM PDT 24 | 228766517 ps | ||
| T3611 | /workspace/coverage/default/30.usbdev_phy_config_pinflip.1154559763 | Aug 16 05:37:30 PM PDT 24 | Aug 16 05:37:31 PM PDT 24 | 234302825 ps | ||
| T3612 | /workspace/coverage/default/42.usbdev_in_iso.2162478462 | Aug 16 05:38:34 PM PDT 24 | Aug 16 05:38:36 PM PDT 24 | 280669267 ps | ||
| T3613 | /workspace/coverage/default/17.usbdev_out_trans_nak.492855363 | Aug 16 05:35:41 PM PDT 24 | Aug 16 05:35:42 PM PDT 24 | 172101111 ps | ||
| T3614 | /workspace/coverage/default/34.usbdev_aon_wake_disconnect.473903625 | Aug 16 05:37:35 PM PDT 24 | Aug 16 05:37:42 PM PDT 24 | 5207192847 ps | ||
| T3615 | /workspace/coverage/default/21.usbdev_invalid_sync.3005529700 | Aug 16 05:36:01 PM PDT 24 | Aug 16 05:36:28 PM PDT 24 | 2918691520 ps | ||
| T3616 | /workspace/coverage/default/36.usbdev_alert_test.3050949757 | Aug 16 05:38:15 PM PDT 24 | Aug 16 05:38:16 PM PDT 24 | 51624643 ps | ||
| T3617 | /workspace/coverage/default/46.usbdev_in_stall.3405600236 | Aug 16 05:39:09 PM PDT 24 | Aug 16 05:39:10 PM PDT 24 | 150425672 ps | ||
| T3618 | /workspace/coverage/default/24.usbdev_in_iso.3887294912 | Aug 16 05:36:36 PM PDT 24 | Aug 16 05:36:37 PM PDT 24 | 187519903 ps | ||
| T531 | /workspace/coverage/default/2.usbdev_freq_loclk.4264163985 | Aug 16 05:33:04 PM PDT 24 | Aug 16 05:36:30 PM PDT 24 | 119115431512 ps | ||
| T468 | /workspace/coverage/default/160.usbdev_endpoint_types.2824546169 | Aug 16 05:40:15 PM PDT 24 | Aug 16 05:40:16 PM PDT 24 | 451321695 ps | ||
| T3619 | /workspace/coverage/default/12.usbdev_endpoint_types.344842115 | Aug 16 05:34:51 PM PDT 24 | Aug 16 05:34:52 PM PDT 24 | 311712543 ps | ||
| T3620 | /workspace/coverage/default/39.usbdev_phy_config_usb_ref_disable.2815005463 | Aug 16 05:38:27 PM PDT 24 | Aug 16 05:38:28 PM PDT 24 | 141738681 ps | ||
| T3621 | /workspace/coverage/default/11.usbdev_aon_wake_resume.1653177320 | Aug 16 05:34:40 PM PDT 24 | Aug 16 05:35:11 PM PDT 24 | 25946510775 ps | ||
| T3622 | /workspace/coverage/default/4.usbdev_stall_trans.751549131 | Aug 16 05:33:23 PM PDT 24 | Aug 16 05:33:24 PM PDT 24 | 204815805 ps | ||
| T3623 | /workspace/coverage/default/49.usbdev_device_address.3812035514 | Aug 16 05:39:28 PM PDT 24 | Aug 16 05:40:01 PM PDT 24 | 22197717025 ps | ||
| T3624 | /workspace/coverage/default/49.usbdev_link_suspend.3121384267 | Aug 16 05:39:55 PM PDT 24 | Aug 16 05:40:08 PM PDT 24 | 5948538308 ps | ||
| T3625 | /workspace/coverage/default/2.usbdev_setup_priority_over_stall_response.3487451839 | Aug 16 05:33:01 PM PDT 24 | Aug 16 05:33:02 PM PDT 24 | 194847303 ps | ||
| T3626 | /workspace/coverage/default/16.usbdev_out_trans_nak.755074345 | Aug 16 05:35:39 PM PDT 24 | Aug 16 05:35:40 PM PDT 24 | 159710396 ps | ||
| T3627 | /workspace/coverage/default/426.usbdev_tx_rx_disruption.1113515616 | Aug 16 05:40:41 PM PDT 24 | Aug 16 05:40:43 PM PDT 24 | 625617487 ps | ||
| T3628 | /workspace/coverage/default/25.usbdev_out_iso.3656536600 | Aug 16 05:36:39 PM PDT 24 | Aug 16 05:36:40 PM PDT 24 | 154436002 ps | ||
| T3629 | /workspace/coverage/default/3.usbdev_rx_pid_err.664722868 | Aug 16 05:33:11 PM PDT 24 | Aug 16 05:33:12 PM PDT 24 | 185230670 ps | ||
| T3630 | /workspace/coverage/default/32.usbdev_random_length_out_transaction.120428774 | Aug 16 05:37:37 PM PDT 24 | Aug 16 05:37:38 PM PDT 24 | 213096459 ps | ||
| T227 | /workspace/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2881305330 | Aug 16 05:50:05 PM PDT 24 | Aug 16 05:50:06 PM PDT 24 | 169932504 ps | ||
| T230 | /workspace/coverage/cover_reg_top/46.usbdev_intr_test.2365271768 | Aug 16 05:49:17 PM PDT 24 | Aug 16 05:49:18 PM PDT 24 | 46216751 ps | ||
| T268 | /workspace/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2938462459 | Aug 16 05:49:09 PM PDT 24 | Aug 16 05:49:11 PM PDT 24 | 66333454 ps | ||
| T3631 | /workspace/coverage/cover_reg_top/1.usbdev_mem_walk.361999352 | Aug 16 05:48:29 PM PDT 24 | Aug 16 05:48:32 PM PDT 24 | 387981967 ps | ||
| T269 | /workspace/coverage/cover_reg_top/0.usbdev_csr_rw.3219064521 | Aug 16 05:48:29 PM PDT 24 | Aug 16 05:48:30 PM PDT 24 | 58510996 ps | ||
| T228 | /workspace/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.1722194435 | Aug 16 05:48:59 PM PDT 24 | Aug 16 05:49:01 PM PDT 24 | 141480468 ps | ||
| T270 | /workspace/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1256852289 | Aug 16 05:49:07 PM PDT 24 | Aug 16 05:49:09 PM PDT 24 | 287255132 ps | ||
| T310 | /workspace/coverage/cover_reg_top/7.usbdev_csr_rw.1770095319 | Aug 16 05:49:02 PM PDT 24 | Aug 16 05:49:03 PM PDT 24 | 113496003 ps | ||
| T311 | /workspace/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.687614654 | Aug 16 05:49:04 PM PDT 24 | Aug 16 05:49:06 PM PDT 24 | 218769431 ps | ||
| T296 | /workspace/coverage/cover_reg_top/4.usbdev_csr_bit_bash.3422921141 | Aug 16 05:49:43 PM PDT 24 | Aug 16 05:49:48 PM PDT 24 | 159802882 ps | ||
| T297 | /workspace/coverage/cover_reg_top/1.usbdev_csr_bit_bash.390547231 | Aug 16 05:50:00 PM PDT 24 | Aug 16 05:50:07 PM PDT 24 | 443775809 ps | ||
| T312 | /workspace/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1006014089 | Aug 16 05:49:05 PM PDT 24 | Aug 16 05:49:07 PM PDT 24 | 265230121 ps | ||
| T313 | /workspace/coverage/cover_reg_top/12.usbdev_csr_rw.1294324011 | Aug 16 05:48:59 PM PDT 24 | Aug 16 05:49:00 PM PDT 24 | 59343235 ps | ||
| T229 | /workspace/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.655494457 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:04 PM PDT 24 | 89709450 ps | ||
| T265 | /workspace/coverage/cover_reg_top/7.usbdev_tl_errors.526876192 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:04 PM PDT 24 | 69777123 ps | ||
| T231 | /workspace/coverage/cover_reg_top/17.usbdev_intr_test.3637790768 | Aug 16 05:49:08 PM PDT 24 | Aug 16 05:49:09 PM PDT 24 | 50404760 ps | ||
| T233 | /workspace/coverage/cover_reg_top/16.usbdev_intr_test.2338751191 | Aug 16 05:49:02 PM PDT 24 | Aug 16 05:49:03 PM PDT 24 | 30005540 ps | ||
| T234 | /workspace/coverage/cover_reg_top/6.usbdev_intr_test.582695756 | Aug 16 05:50:05 PM PDT 24 | Aug 16 05:50:06 PM PDT 24 | 37344057 ps | ||
| T235 | /workspace/coverage/cover_reg_top/41.usbdev_intr_test.6537068 | Aug 16 05:49:09 PM PDT 24 | Aug 16 05:49:09 PM PDT 24 | 37424988 ps | ||
| T266 | /workspace/coverage/cover_reg_top/1.usbdev_tl_intg_err.2679713272 | Aug 16 05:50:05 PM PDT 24 | Aug 16 05:50:09 PM PDT 24 | 1195707736 ps | ||
| T314 | /workspace/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2427256900 | Aug 16 05:48:59 PM PDT 24 | Aug 16 05:49:01 PM PDT 24 | 142410150 ps | ||
| T232 | /workspace/coverage/cover_reg_top/27.usbdev_intr_test.511003151 | Aug 16 05:49:07 PM PDT 24 | Aug 16 05:49:08 PM PDT 24 | 44728505 ps | ||
| T298 | /workspace/coverage/cover_reg_top/4.usbdev_csr_rw.1165929752 | Aug 16 05:48:52 PM PDT 24 | Aug 16 05:48:54 PM PDT 24 | 83527311 ps | ||
| T267 | /workspace/coverage/cover_reg_top/8.usbdev_tl_errors.1217413100 | Aug 16 05:50:04 PM PDT 24 | Aug 16 05:50:07 PM PDT 24 | 256526525 ps | ||
| T299 | /workspace/coverage/cover_reg_top/0.usbdev_mem_partial_access.1514647531 | Aug 16 05:49:59 PM PDT 24 | Aug 16 05:50:01 PM PDT 24 | 103393520 ps | ||
| T340 | /workspace/coverage/cover_reg_top/32.usbdev_intr_test.1379681421 | Aug 16 05:49:50 PM PDT 24 | Aug 16 05:49:51 PM PDT 24 | 66399469 ps | ||
| T280 | /workspace/coverage/cover_reg_top/19.usbdev_tl_errors.114181347 | Aug 16 05:49:08 PM PDT 24 | Aug 16 05:49:09 PM PDT 24 | 140877097 ps | ||
| T300 | /workspace/coverage/cover_reg_top/1.usbdev_mem_partial_access.2070968404 | Aug 16 05:49:52 PM PDT 24 | Aug 16 05:50:05 PM PDT 24 | 220516818 ps | ||
| T287 | /workspace/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.2185073549 | Aug 16 05:48:27 PM PDT 24 | Aug 16 05:48:29 PM PDT 24 | 104116199 ps | ||
| T341 | /workspace/coverage/cover_reg_top/35.usbdev_intr_test.2324215366 | Aug 16 05:49:18 PM PDT 24 | Aug 16 05:49:19 PM PDT 24 | 99189935 ps | ||
| T275 | /workspace/coverage/cover_reg_top/15.usbdev_tl_intg_err.3962582141 | Aug 16 05:50:11 PM PDT 24 | Aug 16 05:50:16 PM PDT 24 | 1405751452 ps | ||
| T277 | /workspace/coverage/cover_reg_top/15.usbdev_tl_errors.1711807093 | Aug 16 05:49:12 PM PDT 24 | Aug 16 05:49:15 PM PDT 24 | 104737438 ps | ||
| T281 | /workspace/coverage/cover_reg_top/5.usbdev_tl_errors.3539140964 | Aug 16 05:50:05 PM PDT 24 | Aug 16 05:50:09 PM PDT 24 | 283202751 ps | ||
| T3632 | /workspace/coverage/cover_reg_top/2.usbdev_mem_walk.1310891560 | Aug 16 05:49:49 PM PDT 24 | Aug 16 05:49:53 PM PDT 24 | 379608305 ps | ||
| T3633 | /workspace/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.3331508538 | Aug 16 05:49:08 PM PDT 24 | Aug 16 05:49:10 PM PDT 24 | 120356718 ps | ||
| T321 | /workspace/coverage/cover_reg_top/28.usbdev_intr_test.540245287 | Aug 16 05:51:56 PM PDT 24 | Aug 16 05:51:57 PM PDT 24 | 114683451 ps | ||
| T317 | /workspace/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3856310241 | Aug 16 05:50:05 PM PDT 24 | Aug 16 05:50:07 PM PDT 24 | 264482697 ps | ||
| T318 | /workspace/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.395132504 | Aug 16 05:49:37 PM PDT 24 | Aug 16 05:49:39 PM PDT 24 | 175275640 ps | ||
| T3634 | /workspace/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.3950441522 | Aug 16 05:49:06 PM PDT 24 | Aug 16 05:49:07 PM PDT 24 | 175287564 ps | ||
| T283 | /workspace/coverage/cover_reg_top/0.usbdev_tl_errors.1951363074 | Aug 16 05:49:49 PM PDT 24 | Aug 16 05:49:52 PM PDT 24 | 153409037 ps | ||
| T3635 | /workspace/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.973335549 | Aug 16 05:50:05 PM PDT 24 | Aug 16 05:50:08 PM PDT 24 | 83511811 ps | ||
| T301 | /workspace/coverage/cover_reg_top/3.usbdev_mem_partial_access.2564035217 | Aug 16 05:48:51 PM PDT 24 | Aug 16 05:48:52 PM PDT 24 | 52922926 ps | ||
| T3636 | /workspace/coverage/cover_reg_top/4.usbdev_tl_errors.1568555105 | Aug 16 05:50:05 PM PDT 24 | Aug 16 05:50:07 PM PDT 24 | 60953252 ps | ||
| T3637 | /workspace/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.493010450 | Aug 16 05:49:08 PM PDT 24 | Aug 16 05:49:09 PM PDT 24 | 82592276 ps | ||
| T302 | /workspace/coverage/cover_reg_top/14.usbdev_csr_rw.2574689109 | Aug 16 05:49:02 PM PDT 24 | Aug 16 05:49:03 PM PDT 24 | 111846192 ps | ||
| T322 | /workspace/coverage/cover_reg_top/45.usbdev_intr_test.255065800 | Aug 16 05:49:09 PM PDT 24 | Aug 16 05:49:10 PM PDT 24 | 65396135 ps | ||
| T319 | /workspace/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2871448466 | Aug 16 05:48:21 PM PDT 24 | Aug 16 05:48:23 PM PDT 24 | 141218703 ps | ||
| T3638 | /workspace/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.917897790 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:04 PM PDT 24 | 62422035 ps | ||
| T320 | /workspace/coverage/cover_reg_top/17.usbdev_csr_rw.2947323775 | Aug 16 05:49:05 PM PDT 24 | Aug 16 05:49:06 PM PDT 24 | 115643130 ps | ||
| T343 | /workspace/coverage/cover_reg_top/14.usbdev_intr_test.3108665763 | Aug 16 05:49:18 PM PDT 24 | Aug 16 05:49:18 PM PDT 24 | 49409211 ps | ||
| T282 | /workspace/coverage/cover_reg_top/18.usbdev_tl_errors.56176771 | Aug 16 05:50:22 PM PDT 24 | Aug 16 05:50:25 PM PDT 24 | 104298462 ps | ||
| T3639 | /workspace/coverage/cover_reg_top/36.usbdev_intr_test.19878191 | Aug 16 05:49:09 PM PDT 24 | Aug 16 05:49:10 PM PDT 24 | 64052518 ps | ||
| T3640 | /workspace/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.1487903496 | Aug 16 05:49:05 PM PDT 24 | Aug 16 05:49:07 PM PDT 24 | 61423414 ps | ||
| T3641 | /workspace/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.2356648649 | Aug 16 05:49:05 PM PDT 24 | Aug 16 05:49:07 PM PDT 24 | 82616449 ps | ||
| T284 | /workspace/coverage/cover_reg_top/14.usbdev_tl_errors.3464461126 | Aug 16 05:50:11 PM PDT 24 | Aug 16 05:50:14 PM PDT 24 | 103716768 ps | ||
| T3642 | /workspace/coverage/cover_reg_top/1.usbdev_csr_rw.1872631789 | Aug 16 05:48:56 PM PDT 24 | Aug 16 05:48:57 PM PDT 24 | 54487753 ps | ||
| T303 | /workspace/coverage/cover_reg_top/4.usbdev_csr_aliasing.1410450527 | Aug 16 05:50:04 PM PDT 24 | Aug 16 05:50:06 PM PDT 24 | 77864478 ps | ||
| T276 | /workspace/coverage/cover_reg_top/9.usbdev_tl_intg_err.1885738716 | Aug 16 05:49:00 PM PDT 24 | Aug 16 05:49:05 PM PDT 24 | 969829535 ps | ||
| T3643 | /workspace/coverage/cover_reg_top/39.usbdev_intr_test.2319456439 | Aug 16 05:50:10 PM PDT 24 | Aug 16 05:50:11 PM PDT 24 | 40418975 ps | ||
| T3644 | /workspace/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.1024146628 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:05 PM PDT 24 | 125921800 ps | ||
| T304 | /workspace/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2205391518 | Aug 16 05:49:49 PM PDT 24 | Aug 16 05:49:54 PM PDT 24 | 832570450 ps | ||
| T3645 | /workspace/coverage/cover_reg_top/10.usbdev_intr_test.2635605956 | Aug 16 05:50:04 PM PDT 24 | Aug 16 05:50:05 PM PDT 24 | 113519835 ps | ||
| T342 | /workspace/coverage/cover_reg_top/49.usbdev_intr_test.4146538296 | Aug 16 05:51:48 PM PDT 24 | Aug 16 05:51:48 PM PDT 24 | 105216948 ps | ||
| T3646 | /workspace/coverage/cover_reg_top/25.usbdev_intr_test.409463266 | Aug 16 05:49:18 PM PDT 24 | Aug 16 05:49:19 PM PDT 24 | 52636341 ps | ||
| T3647 | /workspace/coverage/cover_reg_top/47.usbdev_intr_test.2656194129 | Aug 16 05:49:16 PM PDT 24 | Aug 16 05:49:17 PM PDT 24 | 44924093 ps | ||
| T306 | /workspace/coverage/cover_reg_top/4.usbdev_mem_partial_access.2117710098 | Aug 16 05:50:05 PM PDT 24 | Aug 16 05:50:07 PM PDT 24 | 102282718 ps | ||
| T3648 | /workspace/coverage/cover_reg_top/6.usbdev_tl_errors.1858835694 | Aug 16 05:50:05 PM PDT 24 | Aug 16 05:50:07 PM PDT 24 | 87392480 ps | ||
| T3649 | /workspace/coverage/cover_reg_top/3.usbdev_csr_aliasing.4200751163 | Aug 16 05:49:46 PM PDT 24 | Aug 16 05:49:48 PM PDT 24 | 172321842 ps | ||
| T305 | /workspace/coverage/cover_reg_top/6.usbdev_csr_rw.3905902505 | Aug 16 05:48:43 PM PDT 24 | Aug 16 05:48:45 PM PDT 24 | 51860767 ps | ||
| T3650 | /workspace/coverage/cover_reg_top/1.usbdev_tl_errors.1690621827 | Aug 16 05:49:53 PM PDT 24 | Aug 16 05:49:55 PM PDT 24 | 171004451 ps | ||
| T3651 | /workspace/coverage/cover_reg_top/40.usbdev_intr_test.1217324611 | Aug 16 05:50:12 PM PDT 24 | Aug 16 05:50:12 PM PDT 24 | 41331022 ps | ||
| T3652 | /workspace/coverage/cover_reg_top/0.usbdev_intr_test.3496295172 | Aug 16 05:48:57 PM PDT 24 | Aug 16 05:48:58 PM PDT 24 | 37472173 ps | ||
| T344 | /workspace/coverage/cover_reg_top/3.usbdev_tl_intg_err.1594966667 | Aug 16 05:49:44 PM PDT 24 | Aug 16 05:49:47 PM PDT 24 | 467487831 ps | ||
| T3653 | /workspace/coverage/cover_reg_top/2.usbdev_csr_hw_reset.1793742248 | Aug 16 05:49:37 PM PDT 24 | Aug 16 05:49:39 PM PDT 24 | 247819300 ps | ||
| T3654 | /workspace/coverage/cover_reg_top/18.usbdev_intr_test.4110461218 | Aug 16 05:49:08 PM PDT 24 | Aug 16 05:49:09 PM PDT 24 | 38055454 ps | ||
| T3655 | /workspace/coverage/cover_reg_top/15.usbdev_intr_test.2644331986 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:04 PM PDT 24 | 35706677 ps | ||
| T3656 | /workspace/coverage/cover_reg_top/2.usbdev_tl_errors.3620338828 | Aug 16 05:49:59 PM PDT 24 | Aug 16 05:50:02 PM PDT 24 | 108528145 ps | ||
| T3657 | /workspace/coverage/cover_reg_top/43.usbdev_intr_test.3751361594 | Aug 16 05:49:05 PM PDT 24 | Aug 16 05:49:06 PM PDT 24 | 55927918 ps | ||
| T3658 | /workspace/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.3477008286 | Aug 16 05:49:52 PM PDT 24 | Aug 16 05:49:54 PM PDT 24 | 119018779 ps | ||
| T3659 | /workspace/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.1428580187 | Aug 16 05:49:37 PM PDT 24 | Aug 16 05:49:40 PM PDT 24 | 176645248 ps | ||
| T3660 | /workspace/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.3612169330 | Aug 16 05:49:58 PM PDT 24 | Aug 16 05:50:00 PM PDT 24 | 163062295 ps | ||
| T3661 | /workspace/coverage/cover_reg_top/3.usbdev_intr_test.2783530638 | Aug 16 05:49:37 PM PDT 24 | Aug 16 05:49:39 PM PDT 24 | 59243464 ps | ||
| T3662 | /workspace/coverage/cover_reg_top/22.usbdev_intr_test.1572547047 | Aug 16 05:49:07 PM PDT 24 | Aug 16 05:49:08 PM PDT 24 | 28916719 ps | ||
| T3663 | /workspace/coverage/cover_reg_top/33.usbdev_intr_test.1464038878 | Aug 16 05:49:06 PM PDT 24 | Aug 16 05:49:07 PM PDT 24 | 59206433 ps | ||
| T347 | /workspace/coverage/cover_reg_top/14.usbdev_tl_intg_err.1960808034 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:05 PM PDT 24 | 314355282 ps | ||
| T3664 | /workspace/coverage/cover_reg_top/0.usbdev_mem_walk.2647909658 | Aug 16 05:49:44 PM PDT 24 | Aug 16 05:49:48 PM PDT 24 | 165347226 ps | ||
| T3665 | /workspace/coverage/cover_reg_top/3.usbdev_csr_rw.2548124768 | Aug 16 05:49:44 PM PDT 24 | Aug 16 05:49:46 PM PDT 24 | 57182930 ps | ||
| T3666 | /workspace/coverage/cover_reg_top/2.usbdev_csr_aliasing.2090303999 | Aug 16 05:49:37 PM PDT 24 | Aug 16 05:49:42 PM PDT 24 | 366811057 ps | ||
| T3667 | /workspace/coverage/cover_reg_top/4.usbdev_csr_hw_reset.969050409 | Aug 16 05:49:07 PM PDT 24 | Aug 16 05:49:08 PM PDT 24 | 77099902 ps | ||
| T3668 | /workspace/coverage/cover_reg_top/26.usbdev_intr_test.975157344 | Aug 16 05:49:14 PM PDT 24 | Aug 16 05:49:15 PM PDT 24 | 41787185 ps | ||
| T3669 | /workspace/coverage/cover_reg_top/19.usbdev_tl_intg_err.1781780128 | Aug 16 05:50:14 PM PDT 24 | Aug 16 05:50:17 PM PDT 24 | 504311527 ps | ||
| T3670 | /workspace/coverage/cover_reg_top/10.usbdev_tl_errors.2402676352 | Aug 16 05:48:58 PM PDT 24 | Aug 16 05:49:00 PM PDT 24 | 152072082 ps | ||
| T3671 | /workspace/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.3225028155 | Aug 16 05:49:10 PM PDT 24 | Aug 16 05:49:11 PM PDT 24 | 148418658 ps | ||
| T3672 | /workspace/coverage/cover_reg_top/3.usbdev_csr_hw_reset.681340664 | Aug 16 05:49:45 PM PDT 24 | Aug 16 05:49:46 PM PDT 24 | 103730870 ps | ||
| T3673 | /workspace/coverage/cover_reg_top/2.usbdev_csr_bit_bash.3766165605 | Aug 16 05:49:50 PM PDT 24 | Aug 16 05:49:55 PM PDT 24 | 749691256 ps | ||
| T3674 | /workspace/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1140980137 | Aug 16 05:48:43 PM PDT 24 | Aug 16 05:48:45 PM PDT 24 | 176695233 ps | ||
| T351 | /workspace/coverage/cover_reg_top/0.usbdev_tl_intg_err.4102072017 | Aug 16 05:49:49 PM PDT 24 | Aug 16 05:49:52 PM PDT 24 | 770281266 ps | ||
| T3675 | /workspace/coverage/cover_reg_top/9.usbdev_csr_rw.3562999369 | Aug 16 05:48:46 PM PDT 24 | Aug 16 05:48:47 PM PDT 24 | 78908555 ps | ||
| T3676 | /workspace/coverage/cover_reg_top/11.usbdev_tl_errors.3420547473 | Aug 16 05:49:07 PM PDT 24 | Aug 16 05:49:10 PM PDT 24 | 117486232 ps | ||
| T3677 | /workspace/coverage/cover_reg_top/11.usbdev_csr_rw.2594371646 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:05 PM PDT 24 | 75938884 ps | ||
| T3678 | /workspace/coverage/cover_reg_top/29.usbdev_intr_test.4294680089 | Aug 16 05:51:35 PM PDT 24 | Aug 16 05:51:36 PM PDT 24 | 37513241 ps | ||
| T3679 | /workspace/coverage/cover_reg_top/0.usbdev_csr_hw_reset.967966987 | Aug 16 05:49:38 PM PDT 24 | Aug 16 05:49:39 PM PDT 24 | 99288950 ps | ||
| T348 | /workspace/coverage/cover_reg_top/6.usbdev_tl_intg_err.685107339 | Aug 16 05:48:31 PM PDT 24 | Aug 16 05:48:34 PM PDT 24 | 425464048 ps | ||
| T3680 | /workspace/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.292463777 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:04 PM PDT 24 | 213134550 ps | ||
| T349 | /workspace/coverage/cover_reg_top/17.usbdev_tl_intg_err.3374550779 | Aug 16 05:49:09 PM PDT 24 | Aug 16 05:49:12 PM PDT 24 | 434595857 ps | ||
| T3681 | /workspace/coverage/cover_reg_top/42.usbdev_intr_test.1879237280 | Aug 16 05:49:16 PM PDT 24 | Aug 16 05:49:16 PM PDT 24 | 41596067 ps | ||
| T3682 | /workspace/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.1624136083 | Aug 16 05:48:58 PM PDT 24 | Aug 16 05:49:00 PM PDT 24 | 131488451 ps | ||
| T3683 | /workspace/coverage/cover_reg_top/23.usbdev_intr_test.200855617 | Aug 16 05:49:06 PM PDT 24 | Aug 16 05:49:07 PM PDT 24 | 33966087 ps | ||
| T345 | /workspace/coverage/cover_reg_top/2.usbdev_tl_intg_err.3847358961 | Aug 16 05:49:37 PM PDT 24 | Aug 16 05:49:44 PM PDT 24 | 1332280584 ps | ||
| T3684 | /workspace/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.3245074965 | Aug 16 05:49:04 PM PDT 24 | Aug 16 05:49:05 PM PDT 24 | 233847232 ps | ||
| T3685 | /workspace/coverage/cover_reg_top/4.usbdev_intr_test.4221163923 | Aug 16 05:49:01 PM PDT 24 | Aug 16 05:49:02 PM PDT 24 | 102830479 ps | ||
| T307 | /workspace/coverage/cover_reg_top/13.usbdev_csr_rw.1278384288 | Aug 16 05:50:04 PM PDT 24 | Aug 16 05:50:05 PM PDT 24 | 80830278 ps | ||
| T3686 | /workspace/coverage/cover_reg_top/9.usbdev_tl_errors.1549421975 | Aug 16 05:49:02 PM PDT 24 | Aug 16 05:49:05 PM PDT 24 | 159135359 ps | ||
| T354 | /workspace/coverage/cover_reg_top/10.usbdev_tl_intg_err.2681001702 | Aug 16 05:49:00 PM PDT 24 | Aug 16 05:49:04 PM PDT 24 | 1253990046 ps | ||
| T3687 | /workspace/coverage/cover_reg_top/2.usbdev_csr_rw.3245314520 | Aug 16 05:49:44 PM PDT 24 | Aug 16 05:49:45 PM PDT 24 | 166566993 ps | ||
| T3688 | /workspace/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1007797782 | Aug 16 05:48:43 PM PDT 24 | Aug 16 05:48:45 PM PDT 24 | 101399767 ps | ||
| T3689 | /workspace/coverage/cover_reg_top/16.usbdev_tl_errors.3696700021 | Aug 16 05:49:06 PM PDT 24 | Aug 16 05:49:09 PM PDT 24 | 112375861 ps | ||
| T3690 | /workspace/coverage/cover_reg_top/12.usbdev_intr_test.2619225762 | Aug 16 05:49:09 PM PDT 24 | Aug 16 05:49:10 PM PDT 24 | 49488343 ps | ||
| T308 | /workspace/coverage/cover_reg_top/16.usbdev_csr_rw.2282345942 | Aug 16 05:49:49 PM PDT 24 | Aug 16 05:49:50 PM PDT 24 | 52204721 ps | ||
| T3691 | /workspace/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1625640781 | Aug 16 05:51:34 PM PDT 24 | Aug 16 05:51:36 PM PDT 24 | 54283985 ps | ||
| T346 | /workspace/coverage/cover_reg_top/5.usbdev_tl_intg_err.2587683307 | Aug 16 05:50:05 PM PDT 24 | Aug 16 05:50:08 PM PDT 24 | 291061206 ps | ||
| T3692 | /workspace/coverage/cover_reg_top/7.usbdev_intr_test.3199372725 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:04 PM PDT 24 | 38265771 ps | ||
| T3693 | /workspace/coverage/cover_reg_top/8.usbdev_tl_intg_err.2358863873 | Aug 16 05:49:22 PM PDT 24 | Aug 16 05:49:28 PM PDT 24 | 1174271132 ps | ||
| T3694 | /workspace/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.1465082006 | Aug 16 05:49:12 PM PDT 24 | Aug 16 05:49:13 PM PDT 24 | 104886635 ps | ||
| T309 | /workspace/coverage/cover_reg_top/15.usbdev_csr_rw.3630948727 | Aug 16 05:50:10 PM PDT 24 | Aug 16 05:50:11 PM PDT 24 | 98333443 ps | ||
| T3695 | /workspace/coverage/cover_reg_top/4.usbdev_mem_walk.187995157 | Aug 16 05:50:04 PM PDT 24 | Aug 16 05:50:06 PM PDT 24 | 414611992 ps | ||
| T3696 | /workspace/coverage/cover_reg_top/18.usbdev_tl_intg_err.2931409465 | Aug 16 05:49:17 PM PDT 24 | Aug 16 05:49:21 PM PDT 24 | 664114017 ps | ||
| T3697 | /workspace/coverage/cover_reg_top/11.usbdev_intr_test.3001079526 | Aug 16 05:49:01 PM PDT 24 | Aug 16 05:49:02 PM PDT 24 | 87333430 ps | ||
| T3698 | /workspace/coverage/cover_reg_top/19.usbdev_csr_rw.1519086365 | Aug 16 05:49:13 PM PDT 24 | Aug 16 05:49:14 PM PDT 24 | 105928304 ps | ||
| T3699 | /workspace/coverage/cover_reg_top/19.usbdev_intr_test.2573669717 | Aug 16 05:49:09 PM PDT 24 | Aug 16 05:49:10 PM PDT 24 | 47090119 ps | ||
| T350 | /workspace/coverage/cover_reg_top/12.usbdev_tl_intg_err.163602402 | Aug 16 05:49:08 PM PDT 24 | Aug 16 05:49:11 PM PDT 24 | 581578623 ps | ||
| T3700 | /workspace/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.2437713281 | Aug 16 05:49:08 PM PDT 24 | Aug 16 05:49:10 PM PDT 24 | 139500812 ps | ||
| T3701 | /workspace/coverage/cover_reg_top/30.usbdev_intr_test.3200789698 | Aug 16 05:49:54 PM PDT 24 | Aug 16 05:49:54 PM PDT 24 | 34541053 ps | ||
| T3702 | /workspace/coverage/cover_reg_top/9.usbdev_intr_test.2760219017 | Aug 16 05:48:57 PM PDT 24 | Aug 16 05:48:57 PM PDT 24 | 50340208 ps | ||
| T3703 | /workspace/coverage/cover_reg_top/18.usbdev_csr_rw.1735776008 | Aug 16 05:49:54 PM PDT 24 | Aug 16 05:49:55 PM PDT 24 | 50736908 ps | ||
| T3704 | /workspace/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.506770552 | Aug 16 05:49:08 PM PDT 24 | Aug 16 05:49:09 PM PDT 24 | 94282135 ps | ||
| T3705 | /workspace/coverage/cover_reg_top/2.usbdev_intr_test.2787412159 | Aug 16 05:48:29 PM PDT 24 | Aug 16 05:48:30 PM PDT 24 | 58831186 ps | ||
| T3706 | /workspace/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1559956943 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:05 PM PDT 24 | 161578965 ps | ||
| T3707 | /workspace/coverage/cover_reg_top/8.usbdev_csr_rw.1175011679 | Aug 16 05:49:00 PM PDT 24 | Aug 16 05:49:01 PM PDT 24 | 101671129 ps | ||
| T3708 | /workspace/coverage/cover_reg_top/3.usbdev_tl_errors.2452661165 | Aug 16 05:49:59 PM PDT 24 | Aug 16 05:50:03 PM PDT 24 | 315418539 ps | ||
| T3709 | /workspace/coverage/cover_reg_top/0.usbdev_csr_aliasing.713286148 | Aug 16 05:48:45 PM PDT 24 | Aug 16 05:48:47 PM PDT 24 | 148007290 ps | ||
| T3710 | /workspace/coverage/cover_reg_top/1.usbdev_csr_aliasing.3147270211 | Aug 16 05:49:59 PM PDT 24 | Aug 16 05:50:03 PM PDT 24 | 390502344 ps | ||
| T508 | /workspace/coverage/cover_reg_top/11.usbdev_tl_intg_err.3844624013 | Aug 16 05:49:14 PM PDT 24 | Aug 16 05:49:17 PM PDT 24 | 496679279 ps | ||
| T3711 | /workspace/coverage/cover_reg_top/21.usbdev_intr_test.1728040699 | Aug 16 05:51:43 PM PDT 24 | Aug 16 05:51:43 PM PDT 24 | 47347501 ps | ||
| T3712 | /workspace/coverage/cover_reg_top/5.usbdev_csr_rw.1495877953 | Aug 16 05:49:00 PM PDT 24 | Aug 16 05:49:01 PM PDT 24 | 73692570 ps | ||
| T3713 | /workspace/coverage/cover_reg_top/12.usbdev_tl_errors.1766122717 | Aug 16 05:49:03 PM PDT 24 | Aug 16 05:49:06 PM PDT 24 | 244950690 ps | ||
| T3714 | /workspace/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.3663918808 | Aug 16 05:49:17 PM PDT 24 | Aug 16 05:49:18 PM PDT 24 | 76862439 ps | ||
| T3715 | /workspace/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.4192483012 | Aug 16 05:49:06 PM PDT 24 | Aug 16 05:49:07 PM PDT 24 | 164666879 ps | ||
| T3716 | /workspace/coverage/cover_reg_top/5.usbdev_intr_test.3990096442 | Aug 16 05:48:39 PM PDT 24 | Aug 16 05:48:40 PM PDT 24 | 38614493 ps | ||
| T3717 | /workspace/coverage/cover_reg_top/1.usbdev_intr_test.3945080694 | Aug 16 05:48:27 PM PDT 24 | Aug 16 05:48:27 PM PDT 24 | 42420778 ps | ||
| T3718 | /workspace/coverage/cover_reg_top/34.usbdev_intr_test.94521208 | Aug 16 05:49:11 PM PDT 24 | Aug 16 05:49:12 PM PDT 24 | 58576190 ps | ||
| T3719 | /workspace/coverage/cover_reg_top/24.usbdev_intr_test.3022005511 | Aug 16 05:51:16 PM PDT 24 | Aug 16 05:51:17 PM PDT 24 | 58604244 ps | ||
| T352 | /workspace/coverage/cover_reg_top/13.usbdev_tl_intg_err.167587018 | Aug 16 05:49:04 PM PDT 24 | Aug 16 05:49:09 PM PDT 24 | 813295477 ps | ||
| T3720 | /workspace/coverage/cover_reg_top/48.usbdev_intr_test.462260464 | Aug 16 05:49:22 PM PDT 24 | Aug 16 05:49:27 PM PDT 24 | 51688677 ps | ||
| T3721 | /workspace/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.2625173012 | Aug 16 05:49:37 PM PDT 24 | Aug 16 05:49:39 PM PDT 24 | 69993635 ps | ||
| T3722 | /workspace/coverage/cover_reg_top/17.usbdev_tl_errors.865694325 | Aug 16 05:49:14 PM PDT 24 | Aug 16 05:49:17 PM PDT 24 | 263739091 ps | ||
| T3723 | /workspace/coverage/cover_reg_top/13.usbdev_tl_errors.4071800147 | Aug 16 05:48:59 PM PDT 24 | Aug 16 05:49:02 PM PDT 24 | 99341900 ps | ||
| T3724 | /workspace/coverage/cover_reg_top/13.usbdev_intr_test.2191327060 | Aug 16 05:49:00 PM PDT 24 | Aug 16 05:49:01 PM PDT 24 | 57707097 ps | ||
| T353 | /workspace/coverage/cover_reg_top/16.usbdev_tl_intg_err.4166838051 | Aug 16 05:49:09 PM PDT 24 | Aug 16 05:49:13 PM PDT 24 | 874410870 ps | ||
| T3725 | /workspace/coverage/cover_reg_top/20.usbdev_intr_test.1250804498 | Aug 16 05:49:51 PM PDT 24 | Aug 16 05:49:53 PM PDT 24 | 78082386 ps | ||
| T3726 | /workspace/coverage/cover_reg_top/10.usbdev_csr_rw.3110795732 | Aug 16 05:48:49 PM PDT 24 | Aug 16 05:48:50 PM PDT 24 | 65169972 ps | ||
| T3727 | /workspace/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.1223694179 | Aug 16 05:51:34 PM PDT 24 | Aug 16 05:51:36 PM PDT 24 | 142321250 ps | ||
| T3728 | /workspace/coverage/cover_reg_top/44.usbdev_intr_test.2189470731 | Aug 16 05:49:04 PM PDT 24 | Aug 16 05:49:04 PM PDT 24 | 41049055 ps | ||
| T3729 | /workspace/coverage/cover_reg_top/2.usbdev_mem_partial_access.252568395 | Aug 16 05:49:37 PM PDT 24 | Aug 16 05:49:39 PM PDT 24 | 66042866 ps | ||
| T3730 | /workspace/coverage/cover_reg_top/7.usbdev_tl_intg_err.2175017618 | Aug 16 05:48:53 PM PDT 24 | Aug 16 05:48:57 PM PDT 24 | 546125103 ps | ||
| T3731 | /workspace/coverage/cover_reg_top/4.usbdev_tl_intg_err.1354546040 | Aug 16 05:48:30 PM PDT 24 | Aug 16 05:48:33 PM PDT 24 | 736107277 ps | ||
| T3732 | /workspace/coverage/cover_reg_top/3.usbdev_mem_walk.3921168471 | Aug 16 05:48:21 PM PDT 24 | Aug 16 05:48:24 PM PDT 24 | 282622964 ps | ||
| T3733 | /workspace/coverage/cover_reg_top/8.usbdev_intr_test.883876433 | Aug 16 05:49:02 PM PDT 24 | Aug 16 05:49:03 PM PDT 24 | 40772758 ps | ||
| T3734 | /workspace/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.2150943104 | Aug 16 05:50:04 PM PDT 24 | Aug 16 05:50:05 PM PDT 24 | 82303228 ps | ||
| T3735 | /workspace/coverage/cover_reg_top/38.usbdev_intr_test.140645846 | Aug 16 05:50:25 PM PDT 24 | Aug 16 05:50:26 PM PDT 24 | 88924970 ps | ||
| T3736 | /workspace/coverage/cover_reg_top/37.usbdev_intr_test.3212407919 | Aug 16 05:51:16 PM PDT 24 | Aug 16 05:51:17 PM PDT 24 | 56943360 ps | ||
| T3737 | /workspace/coverage/cover_reg_top/31.usbdev_intr_test.1212129803 | Aug 16 05:49:09 PM PDT 24 | Aug 16 05:49:10 PM PDT 24 | 42693730 ps | ||
| T3738 | /workspace/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2115267753 | Aug 16 05:48:52 PM PDT 24 | Aug 16 05:49:01 PM PDT 24 | 1289311531 ps | ||
| T3739 | /workspace/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.4053706371 | Aug 16 05:49:06 PM PDT 24 | Aug 16 05:49:08 PM PDT 24 | 133101752 ps | ||
| T3740 | /workspace/coverage/cover_reg_top/1.usbdev_csr_hw_reset.658835118 | Aug 16 05:50:49 PM PDT 24 | Aug 16 05:50:51 PM PDT 24 | 95607085 ps |
| Test location | /workspace/coverage/default/36.usbdev_pkt_buffer.3303971954 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 11436474539 ps |
| CPU time | 28.25 seconds |
| Started | Aug 16 05:37:54 PM PDT 24 |
| Finished | Aug 16 05:38:22 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-dd9e8222-eee3-411b-ab96-324f7616735f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33039 71954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pkt_buffer.3303971954 |
| Directory | /workspace/36.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/19.usbdev_aon_wake_reset.4126215871 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 20764637794 ps |
| CPU time | 22.89 seconds |
| Started | Aug 16 05:35:50 PM PDT 24 |
| Finished | Aug 16 05:36:13 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-9e491769-9e9c-43e7-9a33-a25131fc303f |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=4126215871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.4126215871 |
| Directory | /workspace/19.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/88.usbdev_endpoint_types.2720526088 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 694930688 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-25d766d2-a72d-4d2d-8e97-f522cdf8f961 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2720526088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.2720526088 |
| Directory | /workspace/88.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_intr_test.3637790768 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 50404760 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:49:08 PM PDT 24 |
| Finished | Aug 16 05:49:09 PM PDT 24 |
| Peak memory | 206912 kb |
| Host | smart-0d2fe214-17c6-4cd7-8862-90f3dee8d750 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3637790768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.3637790768 |
| Directory | /workspace/17.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/39.usbdev_low_speed_traffic.4008812637 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 4273959950 ps |
| CPU time | 33.93 seconds |
| Started | Aug 16 05:38:22 PM PDT 24 |
| Finished | Aug 16 05:38:56 PM PDT 24 |
| Peak memory | 216012 kb |
| Host | smart-8a7d19ce-2edd-4dea-9758-f759e39e660b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4008812637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.4008812637 |
| Directory | /workspace/39.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_tl_intg_err.3962582141 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 1405751452 ps |
| CPU time | 5.38 seconds |
| Started | Aug 16 05:50:11 PM PDT 24 |
| Finished | Aug 16 05:50:16 PM PDT 24 |
| Peak memory | 206832 kb |
| Host | smart-17ad4d50-520e-4046-99e9-2f57c70f1593 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=3962582141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.3962582141 |
| Directory | /workspace/15.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/36.usbdev_aon_wake_disconnect.2595255646 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 5869227282 ps |
| CPU time | 9.82 seconds |
| Started | Aug 16 05:37:42 PM PDT 24 |
| Finished | Aug 16 05:37:52 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-7c13bb22-719e-49cb-8ecf-08abfa5e57f1 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2595255646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_a on_wake_disconnect.2595255646 |
| Directory | /workspace/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/41.usbdev_data_toggle_restore.30127492 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 818049152 ps |
| CPU time | 2.49 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-b4382040-0ce1-462b-b0c8-29bad8cb863b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=30127492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm line +cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.30127492 |
| Directory | /workspace/41.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/42.usbdev_aon_wake_disconnect.1350361636 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 11143299881 ps |
| CPU time | 14.71 seconds |
| Started | Aug 16 05:38:47 PM PDT 24 |
| Finished | Aug 16 05:39:02 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-4dc43eb0-03a5-4ce2-9029-34d463a7d177 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1350361636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_a on_wake_disconnect.1350361636 |
| Directory | /workspace/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/3.usbdev_device_address.934740631 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 28153835240 ps |
| CPU time | 51.28 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:33:54 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-3adf4189-d4c9-4133-894d-8cd1ae64cc06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93474 0631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.934740631 |
| Directory | /workspace/3.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.3880129330 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 334951404 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:32:37 PM PDT 24 |
| Finished | Aug 16 05:32:38 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-09ab4bd4-c005-40d3-9ce9-b4c13f0d6ce4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38801 29330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test_mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.3880129330 |
| Directory | /workspace/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspace/coverage/default/1.usbdev_sec_cm.573224881 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 587164454 ps |
| CPU time | 1.44 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:33:05 PM PDT 24 |
| Peak memory | 224288 kb |
| Host | smart-928e1b9c-165b-4777-b0f9-43dd05e1d8dc |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=573224881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.573224881 |
| Directory | /workspace/1.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/123.usbdev_tx_rx_disruption.2762821744 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 517907251 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:02 PM PDT 24 |
| Finished | Aug 16 05:40:04 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-c3a11109-0f05-4eb9-8ba6-957c2335c688 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2762821744 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 123.usbdev_tx_rx_disruption.2762821744 |
| Directory | /workspace/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2881305330 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 169932504 ps |
| CPU time | 1.78 seconds |
| Started | Aug 16 05:50:05 PM PDT 24 |
| Finished | Aug 16 05:50:06 PM PDT 24 |
| Peak memory | 215368 kb |
| Host | smart-5ac4e419-fd00-4e6a-a468-950b6ef45ade |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2881305330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbd ev_csr_mem_rw_with_rand_reset.2881305330 |
| Directory | /workspace/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/28.usbdev_intr_test.540245287 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 114683451 ps |
| CPU time | 0.78 seconds |
| Started | Aug 16 05:51:56 PM PDT 24 |
| Finished | Aug 16 05:51:57 PM PDT 24 |
| Peak memory | 206764 kb |
| Host | smart-76496ab7-67aa-4449-8e5e-f87669af2c17 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=540245287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.540245287 |
| Directory | /workspace/28.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/45.usbdev_phy_pins_sense.1891797264 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 45334365 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:39:16 PM PDT 24 |
| Finished | Aug 16 05:39:17 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-98922df4-b963-46e4-8a9b-dbf6a442e372 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18917 97264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.1891797264 |
| Directory | /workspace/45.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/49.usbdev_link_resume.2258795914 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 30131790570 ps |
| CPU time | 48.36 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-922a355f-2c7d-49f6-9670-b8ed75c101e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22587 95914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_link_resume.2258795914 |
| Directory | /workspace/49.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/486.usbdev_tx_rx_disruption.1649849809 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 605808071 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:55 PM PDT 24 |
| Finished | Aug 16 05:40:56 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6c7de1b4-4e94-4c83-b41f-c497ece41ab4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1649849809 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 486.usbdev_tx_rx_disruption.1649849809 |
| Directory | /workspace/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/322.usbdev_tx_rx_disruption.1017731322 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 474744430 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-0bd21b69-28dc-4c82-b6f6-bd0d356c4ca0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1017731322 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 322.usbdev_tx_rx_disruption.1017731322 |
| Directory | /workspace/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/0.usbdev_resume_link_active.1124108327 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 20167845632 ps |
| CPU time | 25.96 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:33:01 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-dc763934-2501-4a56-96a6-ee9f276ef2cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11241 08327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_resume_link_active.1124108327 |
| Directory | /workspace/0.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/1.usbdev_link_suspend.2716984907 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 5037470862 ps |
| CPU time | 6.56 seconds |
| Started | Aug 16 05:32:48 PM PDT 24 |
| Finished | Aug 16 05:32:54 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-8efacfb2-50b9-4c97-860d-3d82eaa24275 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27169 84907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_link_suspend.2716984907 |
| Directory | /workspace/1.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/290.usbdev_tx_rx_disruption.3342469660 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 469024269 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-99e1c6c5-536c-4d2b-89ba-8b2e742420c4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3342469660 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 290.usbdev_tx_rx_disruption.3342469660 |
| Directory | /workspace/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/376.usbdev_tx_rx_disruption.3614679788 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 513623801 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:54 PM PDT 24 |
| Finished | Aug 16 05:40:55 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-e62c0bb3-8ad4-4df3-9878-8240af1cf91a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3614679788 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 376.usbdev_tx_rx_disruption.3614679788 |
| Directory | /workspace/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/46.usbdev_device_address.2343267516 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 42433615589 ps |
| CPU time | 73.18 seconds |
| Started | Aug 16 05:39:11 PM PDT 24 |
| Finished | Aug 16 05:40:25 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-91dcc737-52bf-4e3b-ab92-0f2fba13bc09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23432 67516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.2343267516 |
| Directory | /workspace/46.usbdev_device_address/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_rw.3219064521 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 58510996 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:48:29 PM PDT 24 |
| Finished | Aug 16 05:48:30 PM PDT 24 |
| Peak memory | 206972 kb |
| Host | smart-5adf7e60-a82b-4d50-a119-ce5af963e1c5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3219064521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.3219064521 |
| Directory | /workspace/0.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/default/16.usbdev_bitstuff_err.2627222006 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 166006463 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:19 PM PDT 24 |
| Finished | Aug 16 05:35:19 PM PDT 24 |
| Peak memory | 206420 kb |
| Host | smart-7945f61f-49dd-4125-9b2e-f4fcbdb34572 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26272 22006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_bitstuff_err.2627222006 |
| Directory | /workspace/16.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/14.usbdev_rx_full.798767061 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 280412414 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-382d9080-bce6-4fff-8621-3a4ccf18c6e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79876 7061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_rx_full.798767061 |
| Directory | /workspace/14.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/26.usbdev_endpoint_types.2792247799 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 556218028 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-6bf63c76-4d70-40f7-99b1-ac3988862eed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2792247799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.2792247799 |
| Directory | /workspace/26.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_tl_errors.3539140964 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 283202751 ps |
| CPU time | 2.93 seconds |
| Started | Aug 16 05:50:05 PM PDT 24 |
| Finished | Aug 16 05:50:09 PM PDT 24 |
| Peak memory | 215328 kb |
| Host | smart-de007ae6-1e13-4ce5-badb-323c04de9fa5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3539140964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.3539140964 |
| Directory | /workspace/5.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_intr_test.3108665763 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 49409211 ps |
| CPU time | 0.75 seconds |
| Started | Aug 16 05:49:18 PM PDT 24 |
| Finished | Aug 16 05:49:18 PM PDT 24 |
| Peak memory | 206912 kb |
| Host | smart-8a4a9b39-3cc4-4f80-9db2-6f3d55bc10a0 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3108665763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.3108665763 |
| Directory | /workspace/14.usbdev_intr_test/latest |
| Test location | /workspace/coverage/default/4.usbdev_rx_crc_err.1696596897 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 225652675 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:33:23 PM PDT 24 |
| Finished | Aug 16 05:33:24 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-9c52a0ff-e672-4799-9b4f-aa208531f49a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16965 96897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rx_crc_err.1696596897 |
| Directory | /workspace/4.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/65.usbdev_endpoint_types.3225778771 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 526657447 ps |
| CPU time | 1.38 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-d7117b2d-efad-4cb9-ac62-fcede6c68787 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3225778771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.3225778771 |
| Directory | /workspace/65.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/1.usbdev_endpoint_types.3375877927 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 516915483 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:32:46 PM PDT 24 |
| Finished | Aug 16 05:32:47 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-a52a9c41-2b39-407b-a953-d2a9b4566a1d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3375877927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.3375877927 |
| Directory | /workspace/1.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/166.usbdev_endpoint_types.1733242952 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 443609150 ps |
| CPU time | 1.35 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-cc14735a-a04a-4b9c-a308-04524b01c2b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1733242952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.1733242952 |
| Directory | /workspace/166.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/11.usbdev_disconnected.4073508057 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 154141476 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:34:25 PM PDT 24 |
| Finished | Aug 16 05:34:27 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-8fc00330-417a-4c70-ba59-d3ac2cac5956 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40735 08057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_disconnected.4073508057 |
| Directory | /workspace/11.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/13.usbdev_spurious_pids_ignored.853622048 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 1706961209 ps |
| CPU time | 17.17 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:35:09 PM PDT 24 |
| Peak memory | 217476 kb |
| Host | smart-27f23a87-20e1-47c0-80b9-21a6383710ad |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=853622048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.853622048 |
| Directory | /workspace/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/14.usbdev_device_address.957022313 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 41374421711 ps |
| CPU time | 67.28 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:36:00 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-8538d71d-2f92-449a-b3ae-9cb42736d020 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95702 2313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.957022313 |
| Directory | /workspace/14.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/8.usbdev_endpoint_types.2367866691 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 703128135 ps |
| CPU time | 1.9 seconds |
| Started | Aug 16 05:34:00 PM PDT 24 |
| Finished | Aug 16 05:34:02 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e3a701b7-51fd-40d7-afe9-c5a9dabef923 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2367866691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.2367866691 |
| Directory | /workspace/8.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/28.usbdev_data_toggle_restore.3456011592 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 1065987520 ps |
| CPU time | 2.65 seconds |
| Started | Aug 16 05:37:15 PM PDT 24 |
| Finished | Aug 16 05:37:18 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-ab836fd1-c174-46cb-8203-26c841bfd987 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3456011592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.3456011592 |
| Directory | /workspace/28.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/101.usbdev_endpoint_types.3834658927 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 502706584 ps |
| CPU time | 1.44 seconds |
| Started | Aug 16 05:39:49 PM PDT 24 |
| Finished | Aug 16 05:39:51 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-11829fc0-6d37-4194-a888-284684c3ab8a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3834658927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.3834658927 |
| Directory | /workspace/101.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/14.usbdev_endpoint_types.3316957408 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 653874954 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:34:59 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-9ce8348b-d37e-4db1-881b-0cd65a66ce29 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3316957408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.3316957408 |
| Directory | /workspace/14.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/154.usbdev_endpoint_types.2225558863 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 548485704 ps |
| CPU time | 1.38 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-062617a9-4647-495d-b96c-3c76ffe7641e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2225558863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.2225558863 |
| Directory | /workspace/154.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/20.usbdev_device_address.3263758971 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 51013458501 ps |
| CPU time | 89.58 seconds |
| Started | Aug 16 05:35:50 PM PDT 24 |
| Finished | Aug 16 05:37:20 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-cf6b6f49-de50-4aa4-aaf6-6d85c5d2fd63 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32637 58971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.3263758971 |
| Directory | /workspace/20.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/109.usbdev_endpoint_types.775297510 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 278358181 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-fb5adb65-60dc-48d5-9148-7394ccb70ba4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=775297510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.775297510 |
| Directory | /workspace/109.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/150.usbdev_endpoint_types.4225304647 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 568864614 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-e87678f7-0e76-44ea-abe1-1452882f39ba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4225304647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.4225304647 |
| Directory | /workspace/150.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/163.usbdev_endpoint_types.1065673027 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 548438536 ps |
| CPU time | 1.4 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-8575360b-400c-4362-8f97-4bc49558c6d5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1065673027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.1065673027 |
| Directory | /workspace/163.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/182.usbdev_endpoint_types.3186359181 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 530273950 ps |
| CPU time | 1.44 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-af950127-adf0-4717-be13-6fedfedb26df |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3186359181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.3186359181 |
| Directory | /workspace/182.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/30.usbdev_endpoint_types.1051608671 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 448612752 ps |
| CPU time | 1.37 seconds |
| Started | Aug 16 05:37:17 PM PDT 24 |
| Finished | Aug 16 05:37:18 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-18cd16d1-fc27-4636-8425-4497eac92bd9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1051608671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.1051608671 |
| Directory | /workspace/30.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/267.usbdev_tx_rx_disruption.1528600198 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 433349998 ps |
| CPU time | 1.35 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-c898f8d3-4051-43fa-a654-37624b4544c9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1528600198 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 267.usbdev_tx_rx_disruption.1528600198 |
| Directory | /workspace/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_priority.1268490278 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 356718682 ps |
| CPU time | 1.26 seconds |
| Started | Aug 16 05:32:46 PM PDT 24 |
| Finished | Aug 16 05:32:48 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-be3e400c-4113-4fde-a2d2-0d4c70d29e17 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12684 90278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.1268490278 |
| Directory | /workspace/0.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/55.usbdev_endpoint_types.1822297489 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 345099406 ps |
| CPU time | 1.2 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207276 kb |
| Host | smart-c8906d01-d347-45a5-accb-27c74d3460bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1822297489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.1822297489 |
| Directory | /workspace/55.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/1.usbdev_stress_usb_traffic.2944537226 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 14925272877 ps |
| CPU time | 160.62 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 224120 kb |
| Host | smart-6453b68f-c1ea-4940-bb99-46c06081bb2c |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2944537226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.2944537226 |
| Directory | /workspace/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_alert_test.4175172722 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 57170206 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:32:52 PM PDT 24 |
| Finished | Aug 16 05:32:53 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6f2bc064-0ce6-48a7-bc9b-7466f59a599c |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=4175172722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.4175172722 |
| Directory | /workspace/0.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/0.usbdev_av_overflow.3467198478 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 132510544 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:32:28 PM PDT 24 |
| Finished | Aug 16 05:32:29 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-e35b2421-bf05-4368-8860-0f960e0c7c6e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34671 98478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_av_overflow.3467198478 |
| Directory | /workspace/0.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/11.usbdev_pkt_received.4065719204 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 181251767 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:50 PM PDT 24 |
| Finished | Aug 16 05:34:51 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-3ebe1e78-1a61-490e-bd14-29c7222658ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40657 19204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pkt_received.4065719204 |
| Directory | /workspace/11.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/116.usbdev_endpoint_types.2089899585 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 334192110 ps |
| CPU time | 1.22 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-b728038c-6305-453c-ad53-3727bd358b1a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2089899585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.2089899585 |
| Directory | /workspace/116.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/2.usbdev_data_toggle_restore.2330672689 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 1124198175 ps |
| CPU time | 3.11 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:09 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-3874d427-c0d1-446a-891d-2ea5555239a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2330672689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.2330672689 |
| Directory | /workspace/2.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/35.usbdev_endpoint_types.2798872006 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 405981965 ps |
| CPU time | 1.26 seconds |
| Started | Aug 16 05:37:39 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-7093e049-5cf3-4a48-adde-e49445a632d1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2798872006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.2798872006 |
| Directory | /workspace/35.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/47.usbdev_endpoint_types.1789532130 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 297736915 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:39:19 PM PDT 24 |
| Finished | Aug 16 05:39:21 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-d324313a-4df9-448b-96e7-228e23cfe210 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1789532130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.1789532130 |
| Directory | /workspace/47.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/92.usbdev_endpoint_types.633042145 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 649101937 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c2efcbd7-316e-41bd-b648-afef711ba06b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=633042145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.633042145 |
| Directory | /workspace/92.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/16.usbdev_nak_trans.2296970586 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 201754571 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:35:34 PM PDT 24 |
| Finished | Aug 16 05:35:35 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-696d59d2-1368-4b15-8a60-17348868dbee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22969 70586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_nak_trans.2296970586 |
| Directory | /workspace/16.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_device_address.1975232311 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 17359249539 ps |
| CPU time | 31.28 seconds |
| Started | Aug 16 05:38:06 PM PDT 24 |
| Finished | Aug 16 05:38:38 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-7c76c734-e624-4af5-b25c-488996bc2f00 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19752 32311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.1975232311 |
| Directory | /workspace/35.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/3.usbdev_stress_usb_traffic.1942040355 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 4435230931 ps |
| CPU time | 101.66 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 223036 kb |
| Host | smart-91377145-ed19-4a91-ad0d-a7d9ff159512 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1942040355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.1942040355 |
| Directory | /workspace/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_tl_intg_err.3844624013 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 496679279 ps |
| CPU time | 3.11 seconds |
| Started | Aug 16 05:49:14 PM PDT 24 |
| Finished | Aug 16 05:49:17 PM PDT 24 |
| Peak memory | 207304 kb |
| Host | smart-eb222b6c-7286-48d3-865e-9fbb38ad6d60 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=3844624013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.3844624013 |
| Directory | /workspace/11.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_loclk.3376043432 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 117102867105 ps |
| CPU time | 181.88 seconds |
| Started | Aug 16 05:32:34 PM PDT 24 |
| Finished | Aug 16 05:35:36 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-0056189a-beee-4199-a899-ff4b7d3e0b0f |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3376043432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.3376043432 |
| Directory | /workspace/0.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/155.usbdev_endpoint_types.1790130261 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 341037019 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-bb9e895e-8893-4f60-b735-e177f650fd25 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1790130261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.1790130261 |
| Directory | /workspace/155.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/194.usbdev_endpoint_types.655861103 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 822601866 ps |
| CPU time | 1.81 seconds |
| Started | Aug 16 05:40:12 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-1b370f16-eade-49d5-b609-fa8e8ef2fdb2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=655861103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.655861103 |
| Directory | /workspace/194.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/25.usbdev_device_address.1061713659 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 28658689954 ps |
| CPU time | 45.55 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:37:30 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-d6ed73d3-37c0-463a-9abc-fe0b94e3d2d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10617 13659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.1061713659 |
| Directory | /workspace/25.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/27.usbdev_endpoint_types.602060712 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 646447271 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-8d83ff8a-59c0-4fad-9762-dba4095244a1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=602060712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.602060712 |
| Directory | /workspace/27.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/28.usbdev_endpoint_types.3964902410 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 788662164 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-9907d543-1ef6-453a-b09a-010ddd6f8d6e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3964902410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.3964902410 |
| Directory | /workspace/28.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/31.usbdev_rx_full.2865737199 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 265050968 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:37:28 PM PDT 24 |
| Finished | Aug 16 05:37:30 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-c2c6c00b-40d1-4b28-b7d5-b1d47fc59d32 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28657 37199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_rx_full.2865737199 |
| Directory | /workspace/31.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/72.usbdev_endpoint_types.1494533328 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 735032933 ps |
| CPU time | 2.02 seconds |
| Started | Aug 16 05:39:56 PM PDT 24 |
| Finished | Aug 16 05:39:58 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-5dd42e85-4f3f-4688-bd00-7abe8dc74f1a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1494533328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.1494533328 |
| Directory | /workspace/72.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/82.usbdev_endpoint_types.1965827636 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 382163394 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:39:29 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-318bb3f4-f9f0-4bdc-ad13-4f461425c109 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1965827636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.1965827636 |
| Directory | /workspace/82.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_non_iso_usb_traffic.1546423617 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 2429464376 ps |
| CPU time | 22.84 seconds |
| Started | Aug 16 05:35:18 PM PDT 24 |
| Finished | Aug 16 05:35:41 PM PDT 24 |
| Peak memory | 224064 kb |
| Host | smart-0539121d-5e3d-4aab-b107-0662ace2440a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15464 23617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.1546423617 |
| Directory | /workspace/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/6.usbdev_rand_bus_disconnects.775001185 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 7342706098 ps |
| CPU time | 116.89 seconds |
| Started | Aug 16 05:33:50 PM PDT 24 |
| Finished | Aug 16 05:35:47 PM PDT 24 |
| Peak memory | 219364 kb |
| Host | smart-5cf955dd-3be1-4628-a37e-907c0319a041 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=775001185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.775001185 |
| Directory | /workspace/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_tl_intg_err.167587018 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 813295477 ps |
| CPU time | 4.71 seconds |
| Started | Aug 16 05:49:04 PM PDT 24 |
| Finished | Aug 16 05:49:09 PM PDT 24 |
| Peak memory | 207204 kb |
| Host | smart-72d8aa4b-a5dc-471b-b52a-51702f9253ba |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=167587018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.167587018 |
| Directory | /workspace/13.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_stress_usb_traffic.1970412202 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 11035467763 ps |
| CPU time | 83.55 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:34:32 PM PDT 24 |
| Peak memory | 224156 kb |
| Host | smart-3fe77989-dbde-4951-9d0f-4f090dc130ee |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1970412202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.1970412202 |
| Directory | /workspace/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_intr_test.2644331986 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 35706677 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:04 PM PDT 24 |
| Peak memory | 206856 kb |
| Host | smart-fe7e853e-978e-4058-a96e-c5e4397725ec |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2644331986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.2644331986 |
| Directory | /workspace/15.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_tl_intg_err.2931409465 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 664114017 ps |
| CPU time | 3.31 seconds |
| Started | Aug 16 05:49:17 PM PDT 24 |
| Finished | Aug 16 05:49:21 PM PDT 24 |
| Peak memory | 207192 kb |
| Host | smart-56068f43-dbda-4eec-a248-e99a2ba45141 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2931409465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.2931409465 |
| Directory | /workspace/18.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_data_toggle_restore.4230747658 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 594762157 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:32:27 PM PDT 24 |
| Finished | Aug 16 05:32:29 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-9d2353a3-86d9-40cf-92c6-7c69b1ce3667 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4230747658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.4230747658 |
| Directory | /workspace/0.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/102.usbdev_endpoint_types.3045270036 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 496180977 ps |
| CPU time | 1.42 seconds |
| Started | Aug 16 05:40:04 PM PDT 24 |
| Finished | Aug 16 05:40:05 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-247eb9a7-aea0-4372-8a7f-739f1e2c4ce8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3045270036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.3045270036 |
| Directory | /workspace/102.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/111.usbdev_endpoint_types.2606038875 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 425307826 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:39:39 PM PDT 24 |
| Finished | Aug 16 05:39:41 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-5a419347-1420-4f7c-9215-6d3275a1a723 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2606038875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.2606038875 |
| Directory | /workspace/111.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/113.usbdev_endpoint_types.1346169999 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 351264068 ps |
| CPU time | 1.22 seconds |
| Started | Aug 16 05:40:02 PM PDT 24 |
| Finished | Aug 16 05:40:03 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-a60216cd-db8f-4003-ace0-025c2f635a81 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1346169999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.1346169999 |
| Directory | /workspace/113.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/114.usbdev_endpoint_types.992713158 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 297719789 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-16ac9d87-40e3-48e4-8760-3a7ef3c6bb81 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=992713158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.992713158 |
| Directory | /workspace/114.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/117.usbdev_endpoint_types.2412467496 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 551802868 ps |
| CPU time | 1.42 seconds |
| Started | Aug 16 05:39:55 PM PDT 24 |
| Finished | Aug 16 05:39:57 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-b7d279f3-343a-47e3-83fe-97d85266708b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2412467496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.2412467496 |
| Directory | /workspace/117.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/12.usbdev_aon_wake_reset.2784704163 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 20594069401 ps |
| CPU time | 23.78 seconds |
| Started | Aug 16 05:34:50 PM PDT 24 |
| Finished | Aug 16 05:35:14 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-773af527-2c9a-424b-90f2-b666201e93b6 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2784704163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.2784704163 |
| Directory | /workspace/12.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/12.usbdev_stall_trans.822023134 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 171309632 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:35:04 PM PDT 24 |
| Finished | Aug 16 05:35:05 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-c6142624-7cee-4ffb-95d8-b007f329b7c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82202 3134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_trans.822023134 |
| Directory | /workspace/12.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_min_length_out_transaction.2899413101 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 151835883 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:34:57 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-53a3c73d-3af4-4c70-b58d-03749e21ceb1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28994 13101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.2899413101 |
| Directory | /workspace/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_stall_priority_over_nak.995670880 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 192349592 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-8a40a3b1-efe8-49a7-91e6-5e4893632694 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99567 0880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.995670880 |
| Directory | /workspace/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/142.usbdev_endpoint_types.3920304177 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 528887103 ps |
| CPU time | 1.35 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-bf1eed5f-b8fa-4a8c-bac2-8c5bfa5aa113 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3920304177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.3920304177 |
| Directory | /workspace/142.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/176.usbdev_endpoint_types.3845928341 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 589821893 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-8dacd366-b42e-44a8-b01b-0f835a5d9242 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3845928341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.3845928341 |
| Directory | /workspace/176.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/18.usbdev_endpoint_types.2233327788 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 632466326 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-c8862d32-60da-486d-80cc-7885d8104c2f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2233327788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.2233327788 |
| Directory | /workspace/18.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_loclk_max.3632101035 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 90203705453 ps |
| CPU time | 153.97 seconds |
| Started | Aug 16 05:32:54 PM PDT 24 |
| Finished | Aug 16 05:35:28 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-82dc33f7-c788-4d51-a754-3bb13ac24e3f |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3632101035 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk_max.3632101035 |
| Directory | /workspace/2.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/20.usbdev_rx_full.2855693739 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 399599414 ps |
| CPU time | 1.3 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-ba6da0fe-a0fb-41a6-a3d2-fa869ea4cec0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28556 93739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_rx_full.2855693739 |
| Directory | /workspace/20.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/31.usbdev_spurious_pids_ignored.691013639 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 2777910157 ps |
| CPU time | 76.6 seconds |
| Started | Aug 16 05:37:28 PM PDT 24 |
| Finished | Aug 16 05:38:45 PM PDT 24 |
| Peak memory | 224032 kb |
| Host | smart-bc99a222-c4a3-4e2c-90a1-6d1a087e5c0c |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=691013639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.691013639 |
| Directory | /workspace/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/37.usbdev_endpoint_types.2557352508 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 408248223 ps |
| CPU time | 1.21 seconds |
| Started | Aug 16 05:38:03 PM PDT 24 |
| Finished | Aug 16 05:38:04 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-cda0dac6-2cad-4a1f-af51-ed3224168285 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2557352508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.2557352508 |
| Directory | /workspace/37.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/56.usbdev_endpoint_types.966247797 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 458214438 ps |
| CPU time | 1.36 seconds |
| Started | Aug 16 05:39:33 PM PDT 24 |
| Finished | Aug 16 05:39:35 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-464a2827-a9e4-4e14-b239-4fbbd8c243f7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=966247797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.966247797 |
| Directory | /workspace/56.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/57.usbdev_endpoint_types.669433043 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 603707445 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:05 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-f7ebc9f6-931b-4274-bda7-5bb6e0b7f453 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=669433043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.669433043 |
| Directory | /workspace/57.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/75.usbdev_endpoint_types.1571788686 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 467386493 ps |
| CPU time | 1.34 seconds |
| Started | Aug 16 05:40:00 PM PDT 24 |
| Finished | Aug 16 05:40:02 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-0487f641-d758-4e76-ae6b-042bc7410222 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1571788686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.1571788686 |
| Directory | /workspace/75.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/11.usbdev_phy_config_usb_ref_disable.324236268 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 142312573 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:44 PM PDT 24 |
| Finished | Aug 16 05:34:45 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-83c4ce85-f067-4e9d-86a7-4d1d1d13a281 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32423 6268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.324236268 |
| Directory | /workspace/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/107.usbdev_tx_rx_disruption.1959410700 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 594768915 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:39:49 PM PDT 24 |
| Finished | Aug 16 05:39:51 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-dae0b58c-afea-4d73-a683-a82b03736947 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1959410700 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 107.usbdev_tx_rx_disruption.1959410700 |
| Directory | /workspace/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/121.usbdev_tx_rx_disruption.3970101299 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 736098492 ps |
| CPU time | 2 seconds |
| Started | Aug 16 05:39:56 PM PDT 24 |
| Finished | Aug 16 05:39:58 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-b9fb8f95-af3e-400a-8523-4ec963d1854b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3970101299 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 121.usbdev_tx_rx_disruption.3970101299 |
| Directory | /workspace/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/21.usbdev_phy_pins_sense.1442866926 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 69069204 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:35:58 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-f393ca06-0038-4c60-ac1b-45a6fa382b11 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14428 66926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.1442866926 |
| Directory | /workspace/21.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/26.usbdev_invalid_sync.2680908942 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 5495122642 ps |
| CPU time | 158.93 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:39:19 PM PDT 24 |
| Peak memory | 218368 kb |
| Host | smart-620383c6-6bb9-4ab5-8bb3-6cc394e94f5c |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2680908942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.2680908942 |
| Directory | /workspace/26.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/3.usbdev_av_overflow.3598493547 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 138165541 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:33:05 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-57c9725a-2679-46c6-81db-e864eebf12f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35984 93547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_av_overflow.3598493547 |
| Directory | /workspace/3.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_tl_errors.3420547473 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 117486232 ps |
| CPU time | 2.77 seconds |
| Started | Aug 16 05:49:07 PM PDT 24 |
| Finished | Aug 16 05:49:10 PM PDT 24 |
| Peak memory | 223536 kb |
| Host | smart-6ed77316-b92a-46f1-af73-d89e14838941 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3420547473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.3420547473 |
| Directory | /workspace/11.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/default/0.usbdev_av_empty.2549840873 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 151781284 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:32:36 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-fb255d59-7b93-419e-881d-a942d7b31de0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25498 40873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_av_empty.2549840873 |
| Directory | /workspace/0.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/0.usbdev_host_lost.2146967301 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 4250567515 ps |
| CPU time | 11.59 seconds |
| Started | Aug 16 05:32:32 PM PDT 24 |
| Finished | Aug 16 05:32:44 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-1c7abe27-0ba5-4bd1-9f92-80e28f650bae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21469 67301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_host_lost.2146967301 |
| Directory | /workspace/0.usbdev_host_lost/latest |
| Test location | /workspace/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.2448129936 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 489892583 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:32:28 PM PDT 24 |
| Finished | Aug 16 05:32:30 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-2ed6a2f7-d34c-490e-8537-1a1e5ed47610 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24481 29936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.2448129936 |
| Directory | /workspace/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_reset.3562678129 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 165533955 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:32:37 PM PDT 24 |
| Finished | Aug 16 05:32:38 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-4ad68035-22ef-4f81-9634-1e340c279d0f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35626 78129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_reset.3562678129 |
| Directory | /workspace/0.usbdev_link_reset/latest |
| Test location | /workspace/coverage/default/0.usbdev_rx_pid_err.2106270636 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 198295182 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:32:36 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-10208bd4-b68a-4431-b246-7d113331f3fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21062 70636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rx_pid_err.2106270636 |
| Directory | /workspace/0.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_stress_usb_traffic.2103020212 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 7918260014 ps |
| CPU time | 132.88 seconds |
| Started | Aug 16 05:32:43 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 219456 kb |
| Host | smart-093eab85-711e-416d-8eb1-7d79e3286892 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2103020212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.2103020212 |
| Directory | /workspace/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_av_empty.4277413883 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 233240214 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:33:02 PM PDT 24 |
| Finished | Aug 16 05:33:03 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-7aff250c-60bb-4e46-ab1d-c76837083631 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42774 13883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_av_empty.4277413883 |
| Directory | /workspace/2.usbdev_av_empty/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_tl_intg_err.2679713272 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 1195707736 ps |
| CPU time | 4.59 seconds |
| Started | Aug 16 05:50:05 PM PDT 24 |
| Finished | Aug 16 05:50:09 PM PDT 24 |
| Peak memory | 207072 kb |
| Host | smart-e0ce80cf-59a6-4c50-b0e3-29d4b84b29c5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2679713272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.2679713272 |
| Directory | /workspace/1.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_fifo_rst.3808710544 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 202508342 ps |
| CPU time | 2.51 seconds |
| Started | Aug 16 05:32:27 PM PDT 24 |
| Finished | Aug 16 05:32:30 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-c38d96bc-abaf-4441-8734-f7897c2788fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38087 10544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_fifo_rst.3808710544 |
| Directory | /workspace/0.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_non_iso_usb_traffic.2843155092 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 2059143429 ps |
| CPU time | 58.85 seconds |
| Started | Aug 16 05:32:40 PM PDT 24 |
| Finished | Aug 16 05:33:39 PM PDT 24 |
| Peak memory | 217632 kb |
| Host | smart-897986f1-9d75-497d-a8f1-0a6ba40d1954 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28431 55092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.2843155092 |
| Directory | /workspace/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_nak_trans.1471019270 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 219244965 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:32:34 PM PDT 24 |
| Finished | Aug 16 05:32:35 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6e39c21e-2d15-4a38-8913-728f402282d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14710 19270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_nak_trans.1471019270 |
| Directory | /workspace/0.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/0.usbdev_rand_bus_disconnects.3563103843 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 6960620074 ps |
| CPU time | 33.53 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-703a092d-4170-40e5-aebf-50e91d5a6a50 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3563103843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.3563103843 |
| Directory | /workspace/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/1.usbdev_nak_trans.194938069 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 216637969 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:32:57 PM PDT 24 |
| Finished | Aug 16 05:32:58 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-194e7816-3751-420f-b52e-d013e8685fbe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19493 8069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_nak_trans.194938069 |
| Directory | /workspace/1.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_pending_in_trans.270725331 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 212152878 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:00 PM PDT 24 |
| Finished | Aug 16 05:33:01 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-dcdf5ac2-cb81-4625-bbd1-09623a0a0125 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27072 5331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pending_in_trans.270725331 |
| Directory | /workspace/1.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/10.usbdev_nak_trans.1517805163 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 195869855 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:34:25 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-6f941205-7dd6-44b8-9b67-54cdfc164123 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15178 05163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_nak_trans.1517805163 |
| Directory | /workspace/10.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_iso_retraction.1187901084 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 7603703992 ps |
| CPU time | 58.21 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-22b6cede-683b-4b8e-ab34-c5482a7c58d9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1187901084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.1187901084 |
| Directory | /workspace/12.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/12.usbdev_nak_trans.3294311796 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 268905654 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:34:52 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-1c496682-35ed-4929-a624-3f9d0aa58af0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32943 11796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_nak_trans.3294311796 |
| Directory | /workspace/12.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/132.usbdev_tx_rx_disruption.1122159436 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 645158620 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:39:57 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-36bbae96-44c7-444c-8d7e-a8a282ea8540 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1122159436 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 132.usbdev_tx_rx_disruption.1122159436 |
| Directory | /workspace/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/14.usbdev_nak_trans.4206296468 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 211679534 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:34:57 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-54146e91-4411-4426-bcde-861e321a1d1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42062 96468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_nak_trans.4206296468 |
| Directory | /workspace/14.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_nak_trans.1013990732 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 224300162 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c91ab269-5c69-4449-92ba-b80b137865c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10139 90732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_nak_trans.1013990732 |
| Directory | /workspace/15.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_nak_trans.1287118084 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 197097791 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:35:49 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-1b44f381-e95c-4226-bd95-23fda7b6bdd3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12871 18084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_nak_trans.1287118084 |
| Directory | /workspace/19.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_nak_trans.2071034812 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 205669004 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-475cf590-325a-4215-80d9-9c64efc6cfff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20710 34812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_nak_trans.2071034812 |
| Directory | /workspace/20.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_nak_trans.585957054 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 218817442 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:36:47 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-acec2eea-b404-4d8b-937a-4744c89a06bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58595 7054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_nak_trans.585957054 |
| Directory | /workspace/26.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_nak_trans.3563696902 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 282357611 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:09 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-24a4c3b6-bbd8-47d7-b2ff-b7c445d9287d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35636 96902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_nak_trans.3563696902 |
| Directory | /workspace/3.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_aliasing.713286148 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 148007290 ps |
| CPU time | 2.08 seconds |
| Started | Aug 16 05:48:45 PM PDT 24 |
| Finished | Aug 16 05:48:47 PM PDT 24 |
| Peak memory | 207140 kb |
| Host | smart-224c8690-31d6-4f63-b8c3-875f32297904 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=713286148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.713286148 |
| Directory | /workspace/0.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2205391518 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 832570450 ps |
| CPU time | 4.56 seconds |
| Started | Aug 16 05:49:49 PM PDT 24 |
| Finished | Aug 16 05:49:54 PM PDT 24 |
| Peak memory | 206932 kb |
| Host | smart-1a24f7bc-74dc-462c-8745-12e137945e05 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=2205391518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.2205391518 |
| Directory | /workspace/0.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_hw_reset.967966987 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 99288950 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:49:38 PM PDT 24 |
| Finished | Aug 16 05:49:39 PM PDT 24 |
| Peak memory | 206260 kb |
| Host | smart-4ed2ff41-7559-4e8d-a96a-7d89f3ed81a2 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=967966987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.967966987 |
| Directory | /workspace/0.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.2185073549 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 104116199 ps |
| CPU time | 1.32 seconds |
| Started | Aug 16 05:48:27 PM PDT 24 |
| Finished | Aug 16 05:48:29 PM PDT 24 |
| Peak memory | 215532 kb |
| Host | smart-de868c35-3434-4e5c-a69b-7717f4e8e59e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2185073549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbde v_csr_mem_rw_with_rand_reset.2185073549 |
| Directory | /workspace/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_intr_test.3496295172 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 37472173 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:48:57 PM PDT 24 |
| Finished | Aug 16 05:48:58 PM PDT 24 |
| Peak memory | 206924 kb |
| Host | smart-9550e7d8-fa14-483b-b8f2-f2501836dfd0 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3496295172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.3496295172 |
| Directory | /workspace/0.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_mem_partial_access.1514647531 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 103393520 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:49:59 PM PDT 24 |
| Finished | Aug 16 05:50:01 PM PDT 24 |
| Peak memory | 206952 kb |
| Host | smart-8a3e2460-26a2-46fa-a19c-a65287cfa13b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1514647531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.1514647531 |
| Directory | /workspace/0.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_mem_walk.2647909658 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 165347226 ps |
| CPU time | 3.89 seconds |
| Started | Aug 16 05:49:44 PM PDT 24 |
| Finished | Aug 16 05:49:48 PM PDT 24 |
| Peak memory | 205804 kb |
| Host | smart-d65ff9e3-0040-4717-840e-9ef7c12a39be |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=2647909658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.2647909658 |
| Directory | /workspace/0.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2871448466 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 141218703 ps |
| CPU time | 1.26 seconds |
| Started | Aug 16 05:48:21 PM PDT 24 |
| Finished | Aug 16 05:48:23 PM PDT 24 |
| Peak memory | 207172 kb |
| Host | smart-24d70899-35e9-4cfb-a63e-33daa5aa5fe9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2871448466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.2871448466 |
| Directory | /workspace/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_tl_errors.1951363074 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 153409037 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:49:49 PM PDT 24 |
| Finished | Aug 16 05:49:52 PM PDT 24 |
| Peak memory | 205988 kb |
| Host | smart-5ec19ffd-9ee2-4053-8247-336a1b7c436a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1951363074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.1951363074 |
| Directory | /workspace/0.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/0.usbdev_tl_intg_err.4102072017 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 770281266 ps |
| CPU time | 3.23 seconds |
| Started | Aug 16 05:49:49 PM PDT 24 |
| Finished | Aug 16 05:49:52 PM PDT 24 |
| Peak memory | 207000 kb |
| Host | smart-43921858-7ec5-449c-89be-5382e2bd497f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=4102072017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.4102072017 |
| Directory | /workspace/0.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_aliasing.3147270211 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 390502344 ps |
| CPU time | 3.24 seconds |
| Started | Aug 16 05:49:59 PM PDT 24 |
| Finished | Aug 16 05:50:03 PM PDT 24 |
| Peak memory | 206824 kb |
| Host | smart-f8dbe933-dfb6-4d1b-bca6-c3983b78d01e |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3147270211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.3147270211 |
| Directory | /workspace/1.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_bit_bash.390547231 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 443775809 ps |
| CPU time | 6.89 seconds |
| Started | Aug 16 05:50:00 PM PDT 24 |
| Finished | Aug 16 05:50:07 PM PDT 24 |
| Peak memory | 206976 kb |
| Host | smart-ea4cadb6-ffd6-4d68-bcb0-be9aea750599 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=390547231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.390547231 |
| Directory | /workspace/1.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_hw_reset.658835118 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 95607085 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:50:49 PM PDT 24 |
| Finished | Aug 16 05:50:51 PM PDT 24 |
| Peak memory | 205940 kb |
| Host | smart-7de57d53-2552-4e70-8b7a-4fbdc0aedb06 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=658835118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.658835118 |
| Directory | /workspace/1.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1007797782 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 101399767 ps |
| CPU time | 2.06 seconds |
| Started | Aug 16 05:48:43 PM PDT 24 |
| Finished | Aug 16 05:48:45 PM PDT 24 |
| Peak memory | 215548 kb |
| Host | smart-5fd75b03-af94-4101-8681-42e0d1e73daf |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1007797782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbde v_csr_mem_rw_with_rand_reset.1007797782 |
| Directory | /workspace/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_csr_rw.1872631789 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 54487753 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:48:56 PM PDT 24 |
| Finished | Aug 16 05:48:57 PM PDT 24 |
| Peak memory | 207044 kb |
| Host | smart-92788a77-75c7-46eb-bfd8-1d3c804f21dd |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1872631789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.1872631789 |
| Directory | /workspace/1.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_intr_test.3945080694 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 42420778 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:48:27 PM PDT 24 |
| Finished | Aug 16 05:48:27 PM PDT 24 |
| Peak memory | 206868 kb |
| Host | smart-d734fc5a-dda7-4747-9f37-2442053f02e6 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3945080694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.3945080694 |
| Directory | /workspace/1.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_mem_partial_access.2070968404 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 220516818 ps |
| CPU time | 2.32 seconds |
| Started | Aug 16 05:49:52 PM PDT 24 |
| Finished | Aug 16 05:50:05 PM PDT 24 |
| Peak memory | 207188 kb |
| Host | smart-608f9d7f-784e-4090-aac1-03176f03b75b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2070968404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.2070968404 |
| Directory | /workspace/1.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_mem_walk.361999352 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 387981967 ps |
| CPU time | 2.8 seconds |
| Started | Aug 16 05:48:29 PM PDT 24 |
| Finished | Aug 16 05:48:32 PM PDT 24 |
| Peak memory | 207068 kb |
| Host | smart-4057bb30-83c9-4706-88f6-592d86eee735 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=361999352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.361999352 |
| Directory | /workspace/1.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.395132504 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 175275640 ps |
| CPU time | 1.26 seconds |
| Started | Aug 16 05:49:37 PM PDT 24 |
| Finished | Aug 16 05:49:39 PM PDT 24 |
| Peak memory | 203600 kb |
| Host | smart-4aab210f-6f27-442e-a377-9581039577d0 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=395132504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.395132504 |
| Directory | /workspace/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/1.usbdev_tl_errors.1690621827 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 171004451 ps |
| CPU time | 1.88 seconds |
| Started | Aug 16 05:49:53 PM PDT 24 |
| Finished | Aug 16 05:49:55 PM PDT 24 |
| Peak memory | 206272 kb |
| Host | smart-46fc114d-ebc6-49a1-83aa-7f48d895263f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1690621827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.1690621827 |
| Directory | /workspace/1.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.2150943104 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 82303228 ps |
| CPU time | 1.26 seconds |
| Started | Aug 16 05:50:04 PM PDT 24 |
| Finished | Aug 16 05:50:05 PM PDT 24 |
| Peak memory | 223452 kb |
| Host | smart-77c92c0b-b40b-43b4-b02b-0534010a9dcc |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2150943104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbd ev_csr_mem_rw_with_rand_reset.2150943104 |
| Directory | /workspace/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_csr_rw.3110795732 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 65169972 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:48:49 PM PDT 24 |
| Finished | Aug 16 05:48:50 PM PDT 24 |
| Peak memory | 206960 kb |
| Host | smart-73a33781-ce00-4139-b088-e9fcc5328119 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3110795732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.3110795732 |
| Directory | /workspace/10.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_intr_test.2635605956 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 113519835 ps |
| CPU time | 0.78 seconds |
| Started | Aug 16 05:50:04 PM PDT 24 |
| Finished | Aug 16 05:50:05 PM PDT 24 |
| Peak memory | 206728 kb |
| Host | smart-e4b46237-3a0d-489f-95f1-ccc6c0a1c1c9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2635605956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.2635605956 |
| Directory | /workspace/10.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1625640781 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 54283985 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:51:34 PM PDT 24 |
| Finished | Aug 16 05:51:36 PM PDT 24 |
| Peak memory | 205928 kb |
| Host | smart-1a5d17b2-bbd9-4bee-a3a3-f631289c22b0 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1625640781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.1625640781 |
| Directory | /workspace/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_tl_errors.2402676352 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 152072082 ps |
| CPU time | 1.82 seconds |
| Started | Aug 16 05:48:58 PM PDT 24 |
| Finished | Aug 16 05:49:00 PM PDT 24 |
| Peak memory | 207288 kb |
| Host | smart-f6b823cb-fcdb-4401-ad32-7404238c3922 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2402676352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.2402676352 |
| Directory | /workspace/10.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/10.usbdev_tl_intg_err.2681001702 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 1253990046 ps |
| CPU time | 3.7 seconds |
| Started | Aug 16 05:49:00 PM PDT 24 |
| Finished | Aug 16 05:49:04 PM PDT 24 |
| Peak memory | 207244 kb |
| Host | smart-0989979c-378e-4c94-9b39-70db3203a3f1 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2681001702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.2681001702 |
| Directory | /workspace/10.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.1024146628 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 125921800 ps |
| CPU time | 1.93 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:05 PM PDT 24 |
| Peak memory | 215460 kb |
| Host | smart-d5cee45d-44bd-4cf2-a922-41e4116ec791 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1024146628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbd ev_csr_mem_rw_with_rand_reset.1024146628 |
| Directory | /workspace/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_csr_rw.2594371646 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 75938884 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:05 PM PDT 24 |
| Peak memory | 207004 kb |
| Host | smart-89e4db58-777a-47ec-bcdd-54b7beaa22e5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2594371646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.2594371646 |
| Directory | /workspace/11.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_intr_test.3001079526 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 87333430 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:49:01 PM PDT 24 |
| Finished | Aug 16 05:49:02 PM PDT 24 |
| Peak memory | 206876 kb |
| Host | smart-8308b4e5-ed71-461a-8ea6-f03d5d4a0760 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3001079526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.3001079526 |
| Directory | /workspace/11.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.292463777 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 213134550 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:04 PM PDT 24 |
| Peak memory | 207204 kb |
| Host | smart-c19916c3-b432-4b61-b724-4f3dfe1fd55c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=292463777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.292463777 |
| Directory | /workspace/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_csr_rw.1294324011 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 59343235 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:48:59 PM PDT 24 |
| Finished | Aug 16 05:49:00 PM PDT 24 |
| Peak memory | 206876 kb |
| Host | smart-8eb0f5a8-9681-46aa-9754-3986262f7d66 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1294324011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.1294324011 |
| Directory | /workspace/12.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_intr_test.2619225762 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 49488343 ps |
| CPU time | 0.75 seconds |
| Started | Aug 16 05:49:09 PM PDT 24 |
| Finished | Aug 16 05:49:10 PM PDT 24 |
| Peak memory | 206828 kb |
| Host | smart-a6a78430-193e-4746-9ba7-d3ad58a7706a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2619225762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.2619225762 |
| Directory | /workspace/12.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.2427256900 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 142410150 ps |
| CPU time | 1.81 seconds |
| Started | Aug 16 05:48:59 PM PDT 24 |
| Finished | Aug 16 05:49:01 PM PDT 24 |
| Peak memory | 207196 kb |
| Host | smart-c7faae33-c80d-42d4-88af-e4b49dc12c8e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2427256900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.2427256900 |
| Directory | /workspace/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_tl_errors.1766122717 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 244950690 ps |
| CPU time | 2.17 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:06 PM PDT 24 |
| Peak memory | 223204 kb |
| Host | smart-65490e29-0b97-4a14-bb49-71043de7fafb |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1766122717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.1766122717 |
| Directory | /workspace/12.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/12.usbdev_tl_intg_err.163602402 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 581578623 ps |
| CPU time | 3.06 seconds |
| Started | Aug 16 05:49:08 PM PDT 24 |
| Finished | Aug 16 05:49:11 PM PDT 24 |
| Peak memory | 207180 kb |
| Host | smart-508f226a-5301-4614-b762-bd1a40046b7a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=163602402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.163602402 |
| Directory | /workspace/12.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.3331508538 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 120356718 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:49:08 PM PDT 24 |
| Finished | Aug 16 05:49:10 PM PDT 24 |
| Peak memory | 215452 kb |
| Host | smart-e75c6ecc-511f-4356-9b70-81603014d955 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3331508538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbd ev_csr_mem_rw_with_rand_reset.3331508538 |
| Directory | /workspace/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_csr_rw.1278384288 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 80830278 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:50:04 PM PDT 24 |
| Finished | Aug 16 05:50:05 PM PDT 24 |
| Peak memory | 206708 kb |
| Host | smart-c4d2ccab-f973-4f08-8a6e-7932832df1cb |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1278384288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.1278384288 |
| Directory | /workspace/13.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_intr_test.2191327060 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 57707097 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:49:00 PM PDT 24 |
| Finished | Aug 16 05:49:01 PM PDT 24 |
| Peak memory | 206884 kb |
| Host | smart-ecfe08a5-81a2-4159-a48d-0dd6dc1adc3d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2191327060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.2191327060 |
| Directory | /workspace/13.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.687614654 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 218769431 ps |
| CPU time | 1.78 seconds |
| Started | Aug 16 05:49:04 PM PDT 24 |
| Finished | Aug 16 05:49:06 PM PDT 24 |
| Peak memory | 207252 kb |
| Host | smart-3e2dbc57-4378-437d-a74f-6b4f0cda6c27 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=687614654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.687614654 |
| Directory | /workspace/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/13.usbdev_tl_errors.4071800147 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 99341900 ps |
| CPU time | 2.4 seconds |
| Started | Aug 16 05:48:59 PM PDT 24 |
| Finished | Aug 16 05:49:02 PM PDT 24 |
| Peak memory | 215472 kb |
| Host | smart-1a0101f5-d407-46c8-b10f-a69b59b04ace |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4071800147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.4071800147 |
| Directory | /workspace/13.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.4053706371 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 133101752 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:49:06 PM PDT 24 |
| Finished | Aug 16 05:49:08 PM PDT 24 |
| Peak memory | 215448 kb |
| Host | smart-df502230-d4de-4c9c-b4d1-ab446681f793 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4053706371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbd ev_csr_mem_rw_with_rand_reset.4053706371 |
| Directory | /workspace/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_csr_rw.2574689109 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 111846192 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:49:02 PM PDT 24 |
| Finished | Aug 16 05:49:03 PM PDT 24 |
| Peak memory | 206968 kb |
| Host | smart-d86bfc7f-423e-4e61-ae60-91395c2da2e7 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2574689109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.2574689109 |
| Directory | /workspace/14.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.506770552 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 94282135 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:49:08 PM PDT 24 |
| Finished | Aug 16 05:49:09 PM PDT 24 |
| Peak memory | 207272 kb |
| Host | smart-d6fc99bf-a5d8-42cd-b6f8-e63b3eba1f04 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=506770552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.506770552 |
| Directory | /workspace/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_tl_errors.3464461126 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 103716768 ps |
| CPU time | 2.91 seconds |
| Started | Aug 16 05:50:11 PM PDT 24 |
| Finished | Aug 16 05:50:14 PM PDT 24 |
| Peak memory | 222724 kb |
| Host | smart-b45f99df-7fb9-46f4-9968-c6968a475d05 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3464461126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.3464461126 |
| Directory | /workspace/14.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/14.usbdev_tl_intg_err.1960808034 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 314355282 ps |
| CPU time | 2.7 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:05 PM PDT 24 |
| Peak memory | 207208 kb |
| Host | smart-b991adbb-6721-42fa-8e90-659b20a48d96 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1960808034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.1960808034 |
| Directory | /workspace/14.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1559956943 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 161578965 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:05 PM PDT 24 |
| Peak memory | 217240 kb |
| Host | smart-01326340-4c29-45f4-9541-a59f873d8ae3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1559956943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbd ev_csr_mem_rw_with_rand_reset.1559956943 |
| Directory | /workspace/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_csr_rw.3630948727 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 98333443 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:50:10 PM PDT 24 |
| Finished | Aug 16 05:50:11 PM PDT 24 |
| Peak memory | 206016 kb |
| Host | smart-7fc74323-4eec-4a0a-b107-8933e564af44 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3630948727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.3630948727 |
| Directory | /workspace/15.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1256852289 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 287255132 ps |
| CPU time | 1.87 seconds |
| Started | Aug 16 05:49:07 PM PDT 24 |
| Finished | Aug 16 05:49:09 PM PDT 24 |
| Peak memory | 207232 kb |
| Host | smart-35d6e25d-1ead-442b-92ae-f5df7e5118c8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1256852289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.1256852289 |
| Directory | /workspace/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/15.usbdev_tl_errors.1711807093 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 104737438 ps |
| CPU time | 2.43 seconds |
| Started | Aug 16 05:49:12 PM PDT 24 |
| Finished | Aug 16 05:49:15 PM PDT 24 |
| Peak memory | 223012 kb |
| Host | smart-8691e7e6-f3b3-4a07-b332-0563486ab13a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1711807093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.1711807093 |
| Directory | /workspace/15.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.655494457 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 89709450 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:04 PM PDT 24 |
| Peak memory | 223244 kb |
| Host | smart-cd98004b-5f82-4977-a95f-37f945fe42ef |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=655494457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbde v_csr_mem_rw_with_rand_reset.655494457 |
| Directory | /workspace/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_csr_rw.2282345942 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 52204721 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:49:49 PM PDT 24 |
| Finished | Aug 16 05:49:50 PM PDT 24 |
| Peak memory | 207012 kb |
| Host | smart-b9e1c679-d0bd-40ea-9300-5f244eae954c |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2282345942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.2282345942 |
| Directory | /workspace/16.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_intr_test.2338751191 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 30005540 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:49:02 PM PDT 24 |
| Finished | Aug 16 05:49:03 PM PDT 24 |
| Peak memory | 206956 kb |
| Host | smart-24a59640-f71f-44f0-8b18-05d38a7da3d4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2338751191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.2338751191 |
| Directory | /workspace/16.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.917897790 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 62422035 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:04 PM PDT 24 |
| Peak memory | 207192 kb |
| Host | smart-35d44bdc-8f01-4958-8b17-af6ed770a122 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=917897790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.917897790 |
| Directory | /workspace/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_tl_errors.3696700021 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 112375861 ps |
| CPU time | 2.79 seconds |
| Started | Aug 16 05:49:06 PM PDT 24 |
| Finished | Aug 16 05:49:09 PM PDT 24 |
| Peak memory | 223600 kb |
| Host | smart-2d639b14-f307-4700-b890-2e379d47fac3 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3696700021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.3696700021 |
| Directory | /workspace/16.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/16.usbdev_tl_intg_err.4166838051 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 874410870 ps |
| CPU time | 3.49 seconds |
| Started | Aug 16 05:49:09 PM PDT 24 |
| Finished | Aug 16 05:49:13 PM PDT 24 |
| Peak memory | 207232 kb |
| Host | smart-0e250899-245c-4077-b119-eb34942e38cc |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=4166838051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.4166838051 |
| Directory | /workspace/16.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.3477008286 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 119018779 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:49:52 PM PDT 24 |
| Finished | Aug 16 05:49:54 PM PDT 24 |
| Peak memory | 215556 kb |
| Host | smart-c31564f6-312a-41a8-938d-76e784120801 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3477008286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbd ev_csr_mem_rw_with_rand_reset.3477008286 |
| Directory | /workspace/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_csr_rw.2947323775 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 115643130 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:49:05 PM PDT 24 |
| Finished | Aug 16 05:49:06 PM PDT 24 |
| Peak memory | 206944 kb |
| Host | smart-cf603e0f-7a0e-4d06-b9c8-d9a1ab327c4b |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2947323775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.2947323775 |
| Directory | /workspace/17.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.4192483012 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 164666879 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:49:06 PM PDT 24 |
| Finished | Aug 16 05:49:07 PM PDT 24 |
| Peak memory | 207164 kb |
| Host | smart-07987df9-ca3e-458e-bef7-1c7fea628665 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=4192483012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.4192483012 |
| Directory | /workspace/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_tl_errors.865694325 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 263739091 ps |
| CPU time | 2.82 seconds |
| Started | Aug 16 05:49:14 PM PDT 24 |
| Finished | Aug 16 05:49:17 PM PDT 24 |
| Peak memory | 221164 kb |
| Host | smart-c454af9c-54a0-435e-9863-767cabb0c27f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=865694325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.865694325 |
| Directory | /workspace/17.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/17.usbdev_tl_intg_err.3374550779 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 434595857 ps |
| CPU time | 2.67 seconds |
| Started | Aug 16 05:49:09 PM PDT 24 |
| Finished | Aug 16 05:49:12 PM PDT 24 |
| Peak memory | 207228 kb |
| Host | smart-c90635af-14b8-46a7-b3a6-673515123423 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=3374550779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.3374550779 |
| Directory | /workspace/17.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.2437713281 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 139500812 ps |
| CPU time | 1.83 seconds |
| Started | Aug 16 05:49:08 PM PDT 24 |
| Finished | Aug 16 05:49:10 PM PDT 24 |
| Peak memory | 214396 kb |
| Host | smart-5ea26a5c-eb5b-4280-96ab-bd871258d82c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2437713281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbd ev_csr_mem_rw_with_rand_reset.2437713281 |
| Directory | /workspace/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_csr_rw.1735776008 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 50736908 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:49:54 PM PDT 24 |
| Finished | Aug 16 05:49:55 PM PDT 24 |
| Peak memory | 206936 kb |
| Host | smart-8e66379b-199b-4a56-b1e4-b142dd7d6275 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1735776008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.1735776008 |
| Directory | /workspace/18.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_intr_test.4110461218 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 38055454 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:49:08 PM PDT 24 |
| Finished | Aug 16 05:49:09 PM PDT 24 |
| Peak memory | 206848 kb |
| Host | smart-05416542-9d3e-4141-9486-a95be93a14d4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4110461218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.4110461218 |
| Directory | /workspace/18.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1006014089 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 265230121 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:49:05 PM PDT 24 |
| Finished | Aug 16 05:49:07 PM PDT 24 |
| Peak memory | 207124 kb |
| Host | smart-936cf51b-eb5d-4ef8-bfca-79bbbba641b5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1006014089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.1006014089 |
| Directory | /workspace/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/18.usbdev_tl_errors.56176771 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 104298462 ps |
| CPU time | 2.96 seconds |
| Started | Aug 16 05:50:22 PM PDT 24 |
| Finished | Aug 16 05:50:25 PM PDT 24 |
| Peak memory | 223484 kb |
| Host | smart-925b86be-fd67-4f54-bfe4-adbc3851f26c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=56176771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.56176771 |
| Directory | /workspace/18.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.1465082006 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 104886635 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:49:12 PM PDT 24 |
| Finished | Aug 16 05:49:13 PM PDT 24 |
| Peak memory | 215556 kb |
| Host | smart-af930176-5e34-4495-8497-80db7fcedaff |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1465082006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbd ev_csr_mem_rw_with_rand_reset.1465082006 |
| Directory | /workspace/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_csr_rw.1519086365 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 105928304 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:49:13 PM PDT 24 |
| Finished | Aug 16 05:49:14 PM PDT 24 |
| Peak memory | 206868 kb |
| Host | smart-c880cde9-4a23-430b-a157-215bc1a7fb78 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1519086365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.1519086365 |
| Directory | /workspace/19.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_intr_test.2573669717 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 47090119 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:49:09 PM PDT 24 |
| Finished | Aug 16 05:49:10 PM PDT 24 |
| Peak memory | 206876 kb |
| Host | smart-b90c407a-cfb1-475c-b28c-5895137d4542 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2573669717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.2573669717 |
| Directory | /workspace/19.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.493010450 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 82592276 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:49:08 PM PDT 24 |
| Finished | Aug 16 05:49:09 PM PDT 24 |
| Peak memory | 207224 kb |
| Host | smart-2801ba90-a372-4e37-b6cb-323585f9b1fa |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=493010450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.493010450 |
| Directory | /workspace/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_tl_errors.114181347 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 140877097 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:49:08 PM PDT 24 |
| Finished | Aug 16 05:49:09 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-164493b9-35a4-4627-8c38-2571d2253a2f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=114181347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.114181347 |
| Directory | /workspace/19.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/19.usbdev_tl_intg_err.1781780128 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 504311527 ps |
| CPU time | 2.77 seconds |
| Started | Aug 16 05:50:14 PM PDT 24 |
| Finished | Aug 16 05:50:17 PM PDT 24 |
| Peak memory | 207316 kb |
| Host | smart-66e3aaac-9605-4696-96f4-85604f0598bc |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1781780128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.1781780128 |
| Directory | /workspace/19.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_aliasing.2090303999 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 366811057 ps |
| CPU time | 3.62 seconds |
| Started | Aug 16 05:49:37 PM PDT 24 |
| Finished | Aug 16 05:49:42 PM PDT 24 |
| Peak memory | 204468 kb |
| Host | smart-50086060-a1d5-40f5-9d59-447c96ab3d53 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=2090303999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.2090303999 |
| Directory | /workspace/2.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_bit_bash.3766165605 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 749691256 ps |
| CPU time | 4.36 seconds |
| Started | Aug 16 05:49:50 PM PDT 24 |
| Finished | Aug 16 05:49:55 PM PDT 24 |
| Peak memory | 206944 kb |
| Host | smart-cc470ca4-a975-4c61-81b9-8fffb652085a |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3766165605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.3766165605 |
| Directory | /workspace/2.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_hw_reset.1793742248 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 247819300 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:49:37 PM PDT 24 |
| Finished | Aug 16 05:49:39 PM PDT 24 |
| Peak memory | 203740 kb |
| Host | smart-3fcd3c0f-9427-4e28-9262-40cc4d289c3a |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1793742248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.1793742248 |
| Directory | /workspace/2.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.3612169330 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 163062295 ps |
| CPU time | 1.89 seconds |
| Started | Aug 16 05:49:58 PM PDT 24 |
| Finished | Aug 16 05:50:00 PM PDT 24 |
| Peak memory | 215548 kb |
| Host | smart-ab752b46-c964-4e92-b8ac-46722e170c8f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3612169330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbde v_csr_mem_rw_with_rand_reset.3612169330 |
| Directory | /workspace/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_csr_rw.3245314520 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 166566993 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:49:44 PM PDT 24 |
| Finished | Aug 16 05:49:45 PM PDT 24 |
| Peak memory | 205672 kb |
| Host | smart-695aaf1c-99b3-4426-8822-fd068ed3f73b |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3245314520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.3245314520 |
| Directory | /workspace/2.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_intr_test.2787412159 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 58831186 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:48:29 PM PDT 24 |
| Finished | Aug 16 05:48:30 PM PDT 24 |
| Peak memory | 206904 kb |
| Host | smart-74baa0f7-833a-418c-a9cc-2366f42fff4a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2787412159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.2787412159 |
| Directory | /workspace/2.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_mem_partial_access.252568395 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 66042866 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:49:37 PM PDT 24 |
| Finished | Aug 16 05:49:39 PM PDT 24 |
| Peak memory | 204260 kb |
| Host | smart-a06cd9f5-2758-46cd-8237-97af197dd7c1 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=252568395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line +cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.252568395 |
| Directory | /workspace/2.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_mem_walk.1310891560 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 379608305 ps |
| CPU time | 2.64 seconds |
| Started | Aug 16 05:49:49 PM PDT 24 |
| Finished | Aug 16 05:49:53 PM PDT 24 |
| Peak memory | 205880 kb |
| Host | smart-3803a0dc-9d29-450e-88f5-627ffa81c00f |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1310891560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.1310891560 |
| Directory | /workspace/2.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.2625173012 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 69993635 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:49:37 PM PDT 24 |
| Finished | Aug 16 05:49:39 PM PDT 24 |
| Peak memory | 204632 kb |
| Host | smart-8fa82f06-4735-4c91-b937-85396d19a3cf |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2625173012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.2625173012 |
| Directory | /workspace/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_tl_errors.3620338828 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 108528145 ps |
| CPU time | 2.76 seconds |
| Started | Aug 16 05:49:59 PM PDT 24 |
| Finished | Aug 16 05:50:02 PM PDT 24 |
| Peak memory | 206932 kb |
| Host | smart-880938b7-ace0-4695-9678-29f1b03755b9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3620338828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.3620338828 |
| Directory | /workspace/2.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/2.usbdev_tl_intg_err.3847358961 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 1332280584 ps |
| CPU time | 5.72 seconds |
| Started | Aug 16 05:49:37 PM PDT 24 |
| Finished | Aug 16 05:49:44 PM PDT 24 |
| Peak memory | 203256 kb |
| Host | smart-69d5a76e-79d4-4097-9d7c-5ecd09f5f5b8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=3847358961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.3847358961 |
| Directory | /workspace/2.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/20.usbdev_intr_test.1250804498 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 78082386 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:49:51 PM PDT 24 |
| Finished | Aug 16 05:49:53 PM PDT 24 |
| Peak memory | 206848 kb |
| Host | smart-c5c85f07-4b2e-4584-948c-ffd24dd03cdf |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1250804498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.1250804498 |
| Directory | /workspace/20.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/21.usbdev_intr_test.1728040699 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 47347501 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:51:43 PM PDT 24 |
| Finished | Aug 16 05:51:43 PM PDT 24 |
| Peak memory | 206764 kb |
| Host | smart-bbefdfc4-3d7a-405a-aed9-aa632d236088 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1728040699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.1728040699 |
| Directory | /workspace/21.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/22.usbdev_intr_test.1572547047 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 28916719 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:49:07 PM PDT 24 |
| Finished | Aug 16 05:49:08 PM PDT 24 |
| Peak memory | 206880 kb |
| Host | smart-2eae1b04-8346-4649-8e9f-2305014c5bbc |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1572547047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.1572547047 |
| Directory | /workspace/22.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/23.usbdev_intr_test.200855617 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 33966087 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:49:06 PM PDT 24 |
| Finished | Aug 16 05:49:07 PM PDT 24 |
| Peak memory | 206884 kb |
| Host | smart-06f128b8-154a-4773-84d9-d558b46b56a8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=200855617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.200855617 |
| Directory | /workspace/23.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/24.usbdev_intr_test.3022005511 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 58604244 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:51:16 PM PDT 24 |
| Finished | Aug 16 05:51:17 PM PDT 24 |
| Peak memory | 205448 kb |
| Host | smart-8491f593-7304-4d62-acf6-c5ce52510272 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3022005511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.3022005511 |
| Directory | /workspace/24.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/25.usbdev_intr_test.409463266 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 52636341 ps |
| CPU time | 0.75 seconds |
| Started | Aug 16 05:49:18 PM PDT 24 |
| Finished | Aug 16 05:49:19 PM PDT 24 |
| Peak memory | 206884 kb |
| Host | smart-d5e8c82b-ebd7-4612-abeb-667d4ff91a5e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=409463266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.409463266 |
| Directory | /workspace/25.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/26.usbdev_intr_test.975157344 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 41787185 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:49:14 PM PDT 24 |
| Finished | Aug 16 05:49:15 PM PDT 24 |
| Peak memory | 206900 kb |
| Host | smart-20cc5308-b469-4670-8bd3-f69438abadc4 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=975157344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.975157344 |
| Directory | /workspace/26.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/27.usbdev_intr_test.511003151 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 44728505 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:49:07 PM PDT 24 |
| Finished | Aug 16 05:49:08 PM PDT 24 |
| Peak memory | 206884 kb |
| Host | smart-5b472262-3849-40a8-98b8-4e7d640a668c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=511003151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.511003151 |
| Directory | /workspace/27.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/29.usbdev_intr_test.4294680089 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 37513241 ps |
| CPU time | 0.66 seconds |
| Started | Aug 16 05:51:35 PM PDT 24 |
| Finished | Aug 16 05:51:36 PM PDT 24 |
| Peak memory | 206680 kb |
| Host | smart-63aab833-a057-4512-add7-400eb45f018b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4294680089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.4294680089 |
| Directory | /workspace/29.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_aliasing.4200751163 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 172321842 ps |
| CPU time | 2.07 seconds |
| Started | Aug 16 05:49:46 PM PDT 24 |
| Finished | Aug 16 05:49:48 PM PDT 24 |
| Peak memory | 206176 kb |
| Host | smart-cd9a2398-aa3e-4d48-a36c-c6af11536ba2 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=4200751163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.4200751163 |
| Directory | /workspace/3.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2115267753 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 1289311531 ps |
| CPU time | 9.12 seconds |
| Started | Aug 16 05:48:52 PM PDT 24 |
| Finished | Aug 16 05:49:01 PM PDT 24 |
| Peak memory | 207200 kb |
| Host | smart-bf121a76-d5e7-49d7-b879-91b95fdff252 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=2115267753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.2115267753 |
| Directory | /workspace/3.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_hw_reset.681340664 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 103730870 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:49:45 PM PDT 24 |
| Finished | Aug 16 05:49:46 PM PDT 24 |
| Peak memory | 206524 kb |
| Host | smart-49690ec5-3874-4365-a88d-a2b2ab68b84b |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=681340664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.681340664 |
| Directory | /workspace/3.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.973335549 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 83511811 ps |
| CPU time | 1.91 seconds |
| Started | Aug 16 05:50:05 PM PDT 24 |
| Finished | Aug 16 05:50:08 PM PDT 24 |
| Peak memory | 215332 kb |
| Host | smart-482ded8e-8ea6-4f16-a2bc-3bb05ed2102a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=973335549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev _csr_mem_rw_with_rand_reset.973335549 |
| Directory | /workspace/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_csr_rw.2548124768 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 57182930 ps |
| CPU time | 0.78 seconds |
| Started | Aug 16 05:49:44 PM PDT 24 |
| Finished | Aug 16 05:49:46 PM PDT 24 |
| Peak memory | 206524 kb |
| Host | smart-5a314fec-6764-4c8b-9902-321988a1be67 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2548124768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.2548124768 |
| Directory | /workspace/3.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_intr_test.2783530638 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 59243464 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:49:37 PM PDT 24 |
| Finished | Aug 16 05:49:39 PM PDT 24 |
| Peak memory | 203436 kb |
| Host | smart-632de104-8520-499a-b636-edb7cb9c4758 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2783530638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.2783530638 |
| Directory | /workspace/3.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_mem_partial_access.2564035217 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 52922926 ps |
| CPU time | 1.3 seconds |
| Started | Aug 16 05:48:51 PM PDT 24 |
| Finished | Aug 16 05:48:52 PM PDT 24 |
| Peak memory | 207208 kb |
| Host | smart-e59df3cd-46dc-475d-b540-d8e9f7811e4f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2564035217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.2564035217 |
| Directory | /workspace/3.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_mem_walk.3921168471 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 282622964 ps |
| CPU time | 2.4 seconds |
| Started | Aug 16 05:48:21 PM PDT 24 |
| Finished | Aug 16 05:48:24 PM PDT 24 |
| Peak memory | 207044 kb |
| Host | smart-8cd9ef19-d8b9-4319-b216-f71010462f18 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3921168471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.3921168471 |
| Directory | /workspace/3.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3856310241 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 264482697 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:50:05 PM PDT 24 |
| Finished | Aug 16 05:50:07 PM PDT 24 |
| Peak memory | 207056 kb |
| Host | smart-04ce4aa2-b4fa-4180-b6a5-fcaab41d7dbe |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3856310241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.3856310241 |
| Directory | /workspace/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_tl_errors.2452661165 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 315418539 ps |
| CPU time | 3.41 seconds |
| Started | Aug 16 05:49:59 PM PDT 24 |
| Finished | Aug 16 05:50:03 PM PDT 24 |
| Peak memory | 215216 kb |
| Host | smart-be93f6ef-7ed5-4186-b194-37d398c21aa9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2452661165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.2452661165 |
| Directory | /workspace/3.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/3.usbdev_tl_intg_err.1594966667 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 467487831 ps |
| CPU time | 2.64 seconds |
| Started | Aug 16 05:49:44 PM PDT 24 |
| Finished | Aug 16 05:49:47 PM PDT 24 |
| Peak memory | 206684 kb |
| Host | smart-879168f9-9cc7-4bf7-82c5-53c27c2843f8 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1594966667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.1594966667 |
| Directory | /workspace/3.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/30.usbdev_intr_test.3200789698 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 34541053 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:49:54 PM PDT 24 |
| Finished | Aug 16 05:49:54 PM PDT 24 |
| Peak memory | 206912 kb |
| Host | smart-38be0d2c-751a-4f6e-8ec6-143494c9c096 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3200789698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.3200789698 |
| Directory | /workspace/30.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/31.usbdev_intr_test.1212129803 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 42693730 ps |
| CPU time | 0.78 seconds |
| Started | Aug 16 05:49:09 PM PDT 24 |
| Finished | Aug 16 05:49:10 PM PDT 24 |
| Peak memory | 206908 kb |
| Host | smart-cea2b9ca-cc7a-4d12-befe-0626d0179811 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1212129803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.1212129803 |
| Directory | /workspace/31.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/32.usbdev_intr_test.1379681421 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 66399469 ps |
| CPU time | 0.76 seconds |
| Started | Aug 16 05:49:50 PM PDT 24 |
| Finished | Aug 16 05:49:51 PM PDT 24 |
| Peak memory | 206900 kb |
| Host | smart-709377f5-5bfe-40c9-a4f6-0555407e2213 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1379681421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.1379681421 |
| Directory | /workspace/32.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/33.usbdev_intr_test.1464038878 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 59206433 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:49:06 PM PDT 24 |
| Finished | Aug 16 05:49:07 PM PDT 24 |
| Peak memory | 206780 kb |
| Host | smart-983ca09d-67ef-41f8-9de9-3395ecc6068f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1464038878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.1464038878 |
| Directory | /workspace/33.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/34.usbdev_intr_test.94521208 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 58576190 ps |
| CPU time | 0.76 seconds |
| Started | Aug 16 05:49:11 PM PDT 24 |
| Finished | Aug 16 05:49:12 PM PDT 24 |
| Peak memory | 206840 kb |
| Host | smart-c0607789-bc5e-4643-ba15-777f59519921 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=94521208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.94521208 |
| Directory | /workspace/34.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/35.usbdev_intr_test.2324215366 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 99189935 ps |
| CPU time | 0.76 seconds |
| Started | Aug 16 05:49:18 PM PDT 24 |
| Finished | Aug 16 05:49:19 PM PDT 24 |
| Peak memory | 206956 kb |
| Host | smart-a806955b-4b4e-47c1-9544-363516d00366 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2324215366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.2324215366 |
| Directory | /workspace/35.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/36.usbdev_intr_test.19878191 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 64052518 ps |
| CPU time | 0.75 seconds |
| Started | Aug 16 05:49:09 PM PDT 24 |
| Finished | Aug 16 05:49:10 PM PDT 24 |
| Peak memory | 206936 kb |
| Host | smart-6f328a47-c44e-4f63-a4c1-fd5a7c5d7d99 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=19878191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.19878191 |
| Directory | /workspace/36.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/37.usbdev_intr_test.3212407919 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 56943360 ps |
| CPU time | 0.75 seconds |
| Started | Aug 16 05:51:16 PM PDT 24 |
| Finished | Aug 16 05:51:17 PM PDT 24 |
| Peak memory | 205388 kb |
| Host | smart-ee06681d-b1e0-4312-bb4a-032bdcb2713c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3212407919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.3212407919 |
| Directory | /workspace/37.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/38.usbdev_intr_test.140645846 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 88924970 ps |
| CPU time | 0.76 seconds |
| Started | Aug 16 05:50:25 PM PDT 24 |
| Finished | Aug 16 05:50:26 PM PDT 24 |
| Peak memory | 206872 kb |
| Host | smart-d3e18322-8bc5-433d-a477-5076a147a714 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=140645846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.140645846 |
| Directory | /workspace/38.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/39.usbdev_intr_test.2319456439 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 40418975 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:50:10 PM PDT 24 |
| Finished | Aug 16 05:50:11 PM PDT 24 |
| Peak memory | 206360 kb |
| Host | smart-8a3613a8-b979-498e-90b8-67c030fd982e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2319456439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.2319456439 |
| Directory | /workspace/39.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_aliasing.1410450527 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 77864478 ps |
| CPU time | 1.92 seconds |
| Started | Aug 16 05:50:04 PM PDT 24 |
| Finished | Aug 16 05:50:06 PM PDT 24 |
| Peak memory | 207008 kb |
| Host | smart-43913926-1ecb-489d-bb56-7c3b2fc3796a |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=1410450527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.1410450527 |
| Directory | /workspace/4.usbdev_csr_aliasing/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_bit_bash.3422921141 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 159802882 ps |
| CPU time | 3.7 seconds |
| Started | Aug 16 05:49:43 PM PDT 24 |
| Finished | Aug 16 05:49:48 PM PDT 24 |
| Peak memory | 206084 kb |
| Host | smart-2666ba53-87b3-40c4-affb-0c019cf77517 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=3422921141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm +tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.3422921141 |
| Directory | /workspace/4.usbdev_csr_bit_bash/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_hw_reset.969050409 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 77099902 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:49:07 PM PDT 24 |
| Finished | Aug 16 05:49:08 PM PDT 24 |
| Peak memory | 207044 kb |
| Host | smart-4f4d2699-703a-4e04-adcd-40699a974eba |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=969050409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.969050409 |
| Directory | /workspace/4.usbdev_csr_hw_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.1487903496 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 61423414 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:49:05 PM PDT 24 |
| Finished | Aug 16 05:49:07 PM PDT 24 |
| Peak memory | 217704 kb |
| Host | smart-17359f9a-49e2-402e-929d-028cb7d0f133 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1487903496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbde v_csr_mem_rw_with_rand_reset.1487903496 |
| Directory | /workspace/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_csr_rw.1165929752 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 83527311 ps |
| CPU time | 1.11 seconds |
| Started | Aug 16 05:48:52 PM PDT 24 |
| Finished | Aug 16 05:48:54 PM PDT 24 |
| Peak memory | 206916 kb |
| Host | smart-6c55d337-1934-43cc-b1f1-2e6d9fd5283c |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1165929752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.1165929752 |
| Directory | /workspace/4.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_intr_test.4221163923 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 102830479 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:49:01 PM PDT 24 |
| Finished | Aug 16 05:49:02 PM PDT 24 |
| Peak memory | 206900 kb |
| Host | smart-b99ee81e-8283-4ce8-a4e1-3a45637c3059 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4221163923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.4221163923 |
| Directory | /workspace/4.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_mem_partial_access.2117710098 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 102282718 ps |
| CPU time | 1.38 seconds |
| Started | Aug 16 05:50:05 PM PDT 24 |
| Finished | Aug 16 05:50:07 PM PDT 24 |
| Peak memory | 215236 kb |
| Host | smart-67707a7a-38eb-4a8e-b6e0-4052c37cd66e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2117710098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.2117710098 |
| Directory | /workspace/4.usbdev_mem_partial_access/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_mem_walk.187995157 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 414611992 ps |
| CPU time | 2.56 seconds |
| Started | Aug 16 05:50:04 PM PDT 24 |
| Finished | Aug 16 05:50:06 PM PDT 24 |
| Peak memory | 206896 kb |
| Host | smart-206c7f8b-eac2-43cd-aeb9-7efb39a6f68d |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/ sim.tcl +ntb_random_seed=187995157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+ tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.187995157 |
| Directory | /workspace/4.usbdev_mem_walk/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.3225028155 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 148418658 ps |
| CPU time | 1.2 seconds |
| Started | Aug 16 05:49:10 PM PDT 24 |
| Finished | Aug 16 05:49:11 PM PDT 24 |
| Peak memory | 207308 kb |
| Host | smart-3b52d239-0371-4d0e-a061-2d068e298b74 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3225028155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.3225028155 |
| Directory | /workspace/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_tl_errors.1568555105 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 60953252 ps |
| CPU time | 1.42 seconds |
| Started | Aug 16 05:50:05 PM PDT 24 |
| Finished | Aug 16 05:50:07 PM PDT 24 |
| Peak memory | 207108 kb |
| Host | smart-20efe6a5-c27b-46dd-be0c-289f39270f7f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1568555105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.1568555105 |
| Directory | /workspace/4.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/4.usbdev_tl_intg_err.1354546040 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 736107277 ps |
| CPU time | 2.75 seconds |
| Started | Aug 16 05:48:30 PM PDT 24 |
| Finished | Aug 16 05:48:33 PM PDT 24 |
| Peak memory | 207224 kb |
| Host | smart-f4d4de3f-94f2-4312-81f8-d3a8e1cde658 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1354546040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.1354546040 |
| Directory | /workspace/4.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/40.usbdev_intr_test.1217324611 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 41331022 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:50:12 PM PDT 24 |
| Finished | Aug 16 05:50:12 PM PDT 24 |
| Peak memory | 206916 kb |
| Host | smart-555c9907-c9f0-4b83-a68d-e52e4b0ed502 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1217324611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.1217324611 |
| Directory | /workspace/40.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/41.usbdev_intr_test.6537068 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 37424988 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:49:09 PM PDT 24 |
| Finished | Aug 16 05:49:09 PM PDT 24 |
| Peak memory | 206840 kb |
| Host | smart-d68c0999-8af8-490c-8f18-14ac656e0244 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=6537068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.6537068 |
| Directory | /workspace/41.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/42.usbdev_intr_test.1879237280 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 41596067 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:49:16 PM PDT 24 |
| Finished | Aug 16 05:49:16 PM PDT 24 |
| Peak memory | 206872 kb |
| Host | smart-c4b55acc-5421-495f-9297-9294bd813b7a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1879237280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.1879237280 |
| Directory | /workspace/42.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/43.usbdev_intr_test.3751361594 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 55927918 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:49:05 PM PDT 24 |
| Finished | Aug 16 05:49:06 PM PDT 24 |
| Peak memory | 206884 kb |
| Host | smart-ce3cb396-6951-43aa-b2b9-0b51ad90f553 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3751361594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.3751361594 |
| Directory | /workspace/43.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/44.usbdev_intr_test.2189470731 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 41049055 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:49:04 PM PDT 24 |
| Finished | Aug 16 05:49:04 PM PDT 24 |
| Peak memory | 206824 kb |
| Host | smart-9854bbcb-07b1-4149-b081-b2e8cc9f49c1 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2189470731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.2189470731 |
| Directory | /workspace/44.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/45.usbdev_intr_test.255065800 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 65396135 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:49:09 PM PDT 24 |
| Finished | Aug 16 05:49:10 PM PDT 24 |
| Peak memory | 206920 kb |
| Host | smart-e158a04d-776d-43de-88f7-fafbd9610810 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=255065800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.255065800 |
| Directory | /workspace/45.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/46.usbdev_intr_test.2365271768 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 46216751 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:49:17 PM PDT 24 |
| Finished | Aug 16 05:49:18 PM PDT 24 |
| Peak memory | 206856 kb |
| Host | smart-053f3ab0-80d1-4571-8a70-181f30542e81 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2365271768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.2365271768 |
| Directory | /workspace/46.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/47.usbdev_intr_test.2656194129 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 44924093 ps |
| CPU time | 0.75 seconds |
| Started | Aug 16 05:49:16 PM PDT 24 |
| Finished | Aug 16 05:49:17 PM PDT 24 |
| Peak memory | 206780 kb |
| Host | smart-c123b790-cbea-46f0-a745-df81f247a72d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2656194129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.2656194129 |
| Directory | /workspace/47.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/48.usbdev_intr_test.462260464 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 51688677 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:49:22 PM PDT 24 |
| Finished | Aug 16 05:49:27 PM PDT 24 |
| Peak memory | 206848 kb |
| Host | smart-b966d3c9-deae-414b-bb8e-b621c53aa31f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=462260464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.462260464 |
| Directory | /workspace/48.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/49.usbdev_intr_test.4146538296 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 105216948 ps |
| CPU time | 0.76 seconds |
| Started | Aug 16 05:51:48 PM PDT 24 |
| Finished | Aug 16 05:51:48 PM PDT 24 |
| Peak memory | 206728 kb |
| Host | smart-418dc8a9-01a5-4e1d-a346-966f17bc3839 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=4146538296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.4146538296 |
| Directory | /workspace/49.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.3663918808 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 76862439 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:49:17 PM PDT 24 |
| Finished | Aug 16 05:49:18 PM PDT 24 |
| Peak memory | 215472 kb |
| Host | smart-4b3b3fea-29b9-4e6e-a05e-37a686e36b58 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3663918808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbde v_csr_mem_rw_with_rand_reset.3663918808 |
| Directory | /workspace/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_csr_rw.1495877953 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 73692570 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:49:00 PM PDT 24 |
| Finished | Aug 16 05:49:01 PM PDT 24 |
| Peak memory | 206972 kb |
| Host | smart-baeaefe1-4570-4116-981b-180127b1205a |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1495877953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.1495877953 |
| Directory | /workspace/5.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_intr_test.3990096442 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 38614493 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:48:39 PM PDT 24 |
| Finished | Aug 16 05:48:40 PM PDT 24 |
| Peak memory | 206904 kb |
| Host | smart-0d6df8b8-bc8a-462b-8089-7dac46ff7604 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3990096442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.3990096442 |
| Directory | /workspace/5.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.2356648649 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 82616449 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:49:05 PM PDT 24 |
| Finished | Aug 16 05:49:07 PM PDT 24 |
| Peak memory | 207244 kb |
| Host | smart-9f140ae2-8f1a-4fdf-965f-3beedf8800c9 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2356648649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.2356648649 |
| Directory | /workspace/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/5.usbdev_tl_intg_err.2587683307 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 291061206 ps |
| CPU time | 2.37 seconds |
| Started | Aug 16 05:50:05 PM PDT 24 |
| Finished | Aug 16 05:50:08 PM PDT 24 |
| Peak memory | 207060 kb |
| Host | smart-f36d78ef-8517-42c0-b20a-a84152725b88 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2587683307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.2587683307 |
| Directory | /workspace/5.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1140980137 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 176695233 ps |
| CPU time | 1.9 seconds |
| Started | Aug 16 05:48:43 PM PDT 24 |
| Finished | Aug 16 05:48:45 PM PDT 24 |
| Peak memory | 215484 kb |
| Host | smart-f568294d-7220-4442-9367-5346be0c264e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1140980137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbde v_csr_mem_rw_with_rand_reset.1140980137 |
| Directory | /workspace/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_csr_rw.3905902505 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 51860767 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:48:43 PM PDT 24 |
| Finished | Aug 16 05:48:45 PM PDT 24 |
| Peak memory | 206972 kb |
| Host | smart-089d8510-d9a6-4979-b375-97cc18568664 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3905902505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.3905902505 |
| Directory | /workspace/6.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_intr_test.582695756 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 37344057 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:50:05 PM PDT 24 |
| Finished | Aug 16 05:50:06 PM PDT 24 |
| Peak memory | 206748 kb |
| Host | smart-4ac992d0-2f70-43ff-aaa3-1c1c500c51df |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=582695756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.582695756 |
| Directory | /workspace/6.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2938462459 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 66333454 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:49:09 PM PDT 24 |
| Finished | Aug 16 05:49:11 PM PDT 24 |
| Peak memory | 207296 kb |
| Host | smart-9099139f-54db-4a00-838b-a7e233981b1d |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=2938462459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.2938462459 |
| Directory | /workspace/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_tl_errors.1858835694 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 87392480 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:50:05 PM PDT 24 |
| Finished | Aug 16 05:50:07 PM PDT 24 |
| Peak memory | 207048 kb |
| Host | smart-deb38ba6-cfec-4bf3-8ea2-540d68f2b87f |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1858835694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.1858835694 |
| Directory | /workspace/6.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/6.usbdev_tl_intg_err.685107339 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 425464048 ps |
| CPU time | 2.82 seconds |
| Started | Aug 16 05:48:31 PM PDT 24 |
| Finished | Aug 16 05:48:34 PM PDT 24 |
| Peak memory | 207252 kb |
| Host | smart-8e772aa4-e7ab-44bf-8a7f-55f83d26d0a6 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=685107339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.685107339 |
| Directory | /workspace/6.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.1722194435 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 141480468 ps |
| CPU time | 1.81 seconds |
| Started | Aug 16 05:48:59 PM PDT 24 |
| Finished | Aug 16 05:49:01 PM PDT 24 |
| Peak memory | 223612 kb |
| Host | smart-fe21fa18-473f-4bc6-b1c8-b3c89058a186 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1722194435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbde v_csr_mem_rw_with_rand_reset.1722194435 |
| Directory | /workspace/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_csr_rw.1770095319 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 113496003 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:49:02 PM PDT 24 |
| Finished | Aug 16 05:49:03 PM PDT 24 |
| Peak memory | 206996 kb |
| Host | smart-82fd7477-8628-4175-aa2c-88be48635888 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1770095319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.1770095319 |
| Directory | /workspace/7.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_intr_test.3199372725 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 38265771 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:04 PM PDT 24 |
| Peak memory | 206852 kb |
| Host | smart-88aa8465-72bd-4515-9a6c-26c6db0886f1 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=3199372725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.3199372725 |
| Directory | /workspace/7.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.3950441522 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 175287564 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:49:06 PM PDT 24 |
| Finished | Aug 16 05:49:07 PM PDT 24 |
| Peak memory | 207260 kb |
| Host | smart-96cf7ccf-ea69-4440-859d-25547764f9b6 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3950441522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.3950441522 |
| Directory | /workspace/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_tl_errors.526876192 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 69777123 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:49:03 PM PDT 24 |
| Finished | Aug 16 05:49:04 PM PDT 24 |
| Peak memory | 207148 kb |
| Host | smart-58307775-6ab2-4a75-bd51-15ae225721e1 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=526876192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.526876192 |
| Directory | /workspace/7.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/7.usbdev_tl_intg_err.2175017618 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 546125103 ps |
| CPU time | 4.33 seconds |
| Started | Aug 16 05:48:53 PM PDT 24 |
| Finished | Aug 16 05:48:57 PM PDT 24 |
| Peak memory | 207272 kb |
| Host | smart-c93ce7b7-4954-4489-884c-04abb3847c10 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2175017618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.2175017618 |
| Directory | /workspace/7.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.1428580187 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 176645248 ps |
| CPU time | 1.94 seconds |
| Started | Aug 16 05:49:37 PM PDT 24 |
| Finished | Aug 16 05:49:40 PM PDT 24 |
| Peak memory | 215424 kb |
| Host | smart-fddbf6b7-fe49-488b-9351-eb21110e22ac |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1428580187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbde v_csr_mem_rw_with_rand_reset.1428580187 |
| Directory | /workspace/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_csr_rw.1175011679 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 101671129 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:49:00 PM PDT 24 |
| Finished | Aug 16 05:49:01 PM PDT 24 |
| Peak memory | 207104 kb |
| Host | smart-997cb71b-6c91-4250-a4f1-0d13b06adfa0 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1175011679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.1175011679 |
| Directory | /workspace/8.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_intr_test.883876433 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 40772758 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:49:02 PM PDT 24 |
| Finished | Aug 16 05:49:03 PM PDT 24 |
| Peak memory | 206904 kb |
| Host | smart-dcd73a63-213f-4793-83c7-3681f69e548c |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=883876433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.883876433 |
| Directory | /workspace/8.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.1624136083 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 131488451 ps |
| CPU time | 1.22 seconds |
| Started | Aug 16 05:48:58 PM PDT 24 |
| Finished | Aug 16 05:49:00 PM PDT 24 |
| Peak memory | 207248 kb |
| Host | smart-3b3ed8d0-933d-473d-885f-bd732179e08e |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=1624136083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.1624136083 |
| Directory | /workspace/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_tl_errors.1217413100 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 256526525 ps |
| CPU time | 3.18 seconds |
| Started | Aug 16 05:50:04 PM PDT 24 |
| Finished | Aug 16 05:50:07 PM PDT 24 |
| Peak memory | 207100 kb |
| Host | smart-6320aefb-7233-4d6e-89be-b30ca9b6cbeb |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1217413100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.1217413100 |
| Directory | /workspace/8.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/8.usbdev_tl_intg_err.2358863873 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 1174271132 ps |
| CPU time | 5.61 seconds |
| Started | Aug 16 05:49:22 PM PDT 24 |
| Finished | Aug 16 05:49:28 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-3e052add-cbdc-46ed-bf65-4979cecd3202 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=2358863873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.2358863873 |
| Directory | /workspace/8.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.1223694179 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 142321250 ps |
| CPU time | 1.75 seconds |
| Started | Aug 16 05:51:34 PM PDT 24 |
| Finished | Aug 16 05:51:36 PM PDT 24 |
| Peak memory | 214260 kb |
| Host | smart-61e3a8f1-8080-49c2-b506-b5404ca9de1a |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1223694179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbde v_csr_mem_rw_with_rand_reset.1223694179 |
| Directory | /workspace/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_csr_rw.3562999369 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 78908555 ps |
| CPU time | 0.78 seconds |
| Started | Aug 16 05:48:46 PM PDT 24 |
| Finished | Aug 16 05:48:47 PM PDT 24 |
| Peak memory | 206944 kb |
| Host | smart-797688c9-fc7e-4f43-b920-99a9fa328fa5 |
| User | root |
| Command | /workspace/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3562999369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.3562999369 |
| Directory | /workspace/9.usbdev_csr_rw/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_intr_test.2760219017 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 50340208 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:48:57 PM PDT 24 |
| Finished | Aug 16 05:48:57 PM PDT 24 |
| Peak memory | 206932 kb |
| Host | smart-0267a872-2348-4d3f-a413-dd496ceb8778 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=2760219017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.2760219017 |
| Directory | /workspace/9.usbdev_intr_test/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.3245074965 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 233847232 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:49:04 PM PDT 24 |
| Finished | Aug 16 05:49:05 PM PDT 24 |
| Peak memory | 207220 kb |
| Host | smart-d9f93da3-1070-4622-93f4-004d087a683b |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/ hw/dv/tools/sim.tcl +ntb_random_seed=3245074965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.3245074965 |
| Directory | /workspace/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_tl_errors.1549421975 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 159135359 ps |
| CPU time | 2.77 seconds |
| Started | Aug 16 05:49:02 PM PDT 24 |
| Finished | Aug 16 05:49:05 PM PDT 24 |
| Peak memory | 207276 kb |
| Host | smart-5ca0bf06-44ba-440d-8db1-6ecf0187a089 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl + ntb_random_seed=1549421975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.1549421975 |
| Directory | /workspace/9.usbdev_tl_errors/latest |
| Test location | /workspace/coverage/cover_reg_top/9.usbdev_tl_intg_err.1885738716 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 969829535 ps |
| CPU time | 5.36 seconds |
| Started | Aug 16 05:49:00 PM PDT 24 |
| Finished | Aug 16 05:49:05 PM PDT 24 |
| Peak memory | 207236 kb |
| Host | smart-ba7bf853-29fc-4af9-82e8-e944096b6af7 |
| User | root |
| Command | /workspace/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/too ls/sim.tcl +ntb_random_seed=1885738716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.1885738716 |
| Directory | /workspace/9.usbdev_tl_intg_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_aon_wake_disconnect.4166925267 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 6184008339 ps |
| CPU time | 7.99 seconds |
| Started | Aug 16 05:32:28 PM PDT 24 |
| Finished | Aug 16 05:32:36 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-41217da0-58f0-4cb3-bbdc-d1691b6e4e3f |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4166925267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_ao n_wake_disconnect.4166925267 |
| Directory | /workspace/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/0.usbdev_aon_wake_reset.2620363352 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 13381621073 ps |
| CPU time | 16.98 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:32:52 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-b809e07b-72b5-42ae-b323-717f2d5b7315 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2620363352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.2620363352 |
| Directory | /workspace/0.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/0.usbdev_aon_wake_resume.2286638778 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 30470828185 ps |
| CPU time | 37.17 seconds |
| Started | Aug 16 05:32:31 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-0eb36ab3-d36a-4d27-868a-b7ef003bd9fb |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2286638778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_ao n_wake_resume.2286638778 |
| Directory | /workspace/0.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/0.usbdev_av_buffer.1189047968 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 153009576 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:32:29 PM PDT 24 |
| Finished | Aug 16 05:32:30 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-01a4b6d9-e51a-4b3d-9c9d-1b520c7e483a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11890 47968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_av_buffer.1189047968 |
| Directory | /workspace/0.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/0.usbdev_bitstuff_err.2720091983 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 192607717 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:32:30 PM PDT 24 |
| Finished | Aug 16 05:32:31 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-f05843fc-17aa-4dff-bd2a-33f7eb2266dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27200 91983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_bitstuff_err.2720091983 |
| Directory | /workspace/0.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_data_toggle_clear.736304247 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 481813299 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:32:27 PM PDT 24 |
| Finished | Aug 16 05:32:29 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-76c3266f-68ac-48a6-b0ea-d448d4e7855b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73630 4247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_clear.736304247 |
| Directory | /workspace/0.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/0.usbdev_device_address.655284906 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 15084880819 ps |
| CPU time | 24.29 seconds |
| Started | Aug 16 05:32:30 PM PDT 24 |
| Finished | Aug 16 05:32:54 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-8167d5dd-edf1-4830-88f0-790ed6b2bd28 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65528 4906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.655284906 |
| Directory | /workspace/0.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/0.usbdev_device_timeout.2452404317 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 430080956 ps |
| CPU time | 8.03 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:32:43 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-5853fd6b-d239-49a3-a334-c88c28135014 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2452404317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.2452404317 |
| Directory | /workspace/0.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/0.usbdev_disable_endpoint.353040808 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 512982074 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:32:30 PM PDT 24 |
| Finished | Aug 16 05:32:31 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-d27332bf-2225-4512-b212-d792a89e9858 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35304 0808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_disable_endpoint.353040808 |
| Directory | /workspace/0.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/0.usbdev_disconnected.576816920 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 208902697 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:32:30 PM PDT 24 |
| Finished | Aug 16 05:32:31 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-28574553-f414-44ed-accd-f3d3be2929bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57681 6920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_disconnected.576816920 |
| Directory | /workspace/0.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/0.usbdev_dpi_config_host.3102637736 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 5130174075 ps |
| CPU time | 49.73 seconds |
| Started | Aug 16 05:32:28 PM PDT 24 |
| Finished | Aug 16 05:33:18 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-db0d6962-1a4c-4d41-a88e-ef25f77095e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31026 37736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.3102637736 |
| Directory | /workspace/0.usbdev_dpi_config_host/latest |
| Test location | /workspace/coverage/default/0.usbdev_enable.4123832761 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 33395428 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:32:32 PM PDT 24 |
| Finished | Aug 16 05:32:33 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-a16ee2cd-1d1a-4f72-84f4-6fb105aa8399 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41238 32761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_enable.4123832761 |
| Directory | /workspace/0.usbdev_enable/latest |
| Test location | /workspace/coverage/default/0.usbdev_endpoint_access.391332685 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 796237911 ps |
| CPU time | 2.49 seconds |
| Started | Aug 16 05:32:28 PM PDT 24 |
| Finished | Aug 16 05:32:30 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-2befd4ab-9f7a-4950-94d1-b628643dde05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39133 2685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.391332685 |
| Directory | /workspace/0.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/0.usbdev_endpoint_types.1799431092 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 149853179 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:32:30 PM PDT 24 |
| Finished | Aug 16 05:32:31 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-7ad00757-2550-47c6-a838-5861619bab98 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1799431092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.1799431092 |
| Directory | /workspace/0.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_hiclk.2927270992 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 115202278110 ps |
| CPU time | 206.07 seconds |
| Started | Aug 16 05:32:36 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-ce03f4cb-cc61-49b5-a727-a7507af17728 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2927270992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.2927270992 |
| Directory | /workspace/0.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_hiclk_max.3833443389 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 115290957447 ps |
| CPU time | 217.95 seconds |
| Started | Aug 16 05:32:27 PM PDT 24 |
| Finished | Aug 16 05:36:05 PM PDT 24 |
| Peak memory | 207856 kb |
| Host | smart-0ea99c04-7965-4db1-bec2-4af048087648 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3833443389 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk_max.3833443389 |
| Directory | /workspace/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_loclk_max.3593711291 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 121012722771 ps |
| CPU time | 204.47 seconds |
| Started | Aug 16 05:32:31 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 207852 kb |
| Host | smart-86c4e328-10f8-4e93-a979-5d65184420c6 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3593711291 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk_max.3593711291 |
| Directory | /workspace/0.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/0.usbdev_freq_phase.2337260389 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 115147729577 ps |
| CPU time | 182.86 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:35:38 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-8fd97adc-94ea-4e45-aae3-dba7ab276d4d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23372 60389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_phase.2337260389 |
| Directory | /workspace/0.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/0.usbdev_in_iso.3599543937 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 204492350 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:32:39 PM PDT 24 |
| Finished | Aug 16 05:32:40 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-cb53d19b-2a6a-4e98-857e-31ca20258b49 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3599543937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.3599543937 |
| Directory | /workspace/0.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/0.usbdev_in_stall.3584671648 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 155929185 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:32:42 PM PDT 24 |
| Finished | Aug 16 05:32:53 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-5b694927-1079-49b0-93af-ed15f16ccaf1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35846 71648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_in_stall.3584671648 |
| Directory | /workspace/0.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/0.usbdev_in_trans.1650002338 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 197885085 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:32:36 PM PDT 24 |
| Finished | Aug 16 05:32:37 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-db4bdaa1-62b7-473b-aff7-1b52f7a6e291 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16500 02338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_in_trans.1650002338 |
| Directory | /workspace/0.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/0.usbdev_invalid_sync.1065781451 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 3312239583 ps |
| CPU time | 97.5 seconds |
| Started | Aug 16 05:32:32 PM PDT 24 |
| Finished | Aug 16 05:34:10 PM PDT 24 |
| Peak memory | 218296 kb |
| Host | smart-f5b158ea-c38b-48f0-a472-63ddc803b5a9 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1065781451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.1065781451 |
| Directory | /workspace/0.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/0.usbdev_iso_retraction.2682836880 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 6896558442 ps |
| CPU time | 82.54 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-ca323106-0d93-421e-ad76-55785e68c8d6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2682836880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.2682836880 |
| Directory | /workspace/0.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_in_err.1071473115 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 238709245 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:32:39 PM PDT 24 |
| Finished | Aug 16 05:32:40 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-983fb406-b87d-4719-ad02-ef280669b9c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10714 73115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_in_err.1071473115 |
| Directory | /workspace/0.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_out_err.2803228696 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 533437466 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:32:36 PM PDT 24 |
| Finished | Aug 16 05:32:38 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-bd86bc2b-9d14-4317-bb01-0783c4d151ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28032 28696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_out_err.2803228696 |
| Directory | /workspace/0.usbdev_link_out_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_resume.1856884272 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 7495752421 ps |
| CPU time | 12.03 seconds |
| Started | Aug 16 05:32:36 PM PDT 24 |
| Finished | Aug 16 05:32:48 PM PDT 24 |
| Peak memory | 216656 kb |
| Host | smart-1a446c6e-d943-4771-8150-a8aa261f26e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18568 84272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_resume.1856884272 |
| Directory | /workspace/0.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/0.usbdev_link_suspend.1286722633 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 9896555443 ps |
| CPU time | 12.81 seconds |
| Started | Aug 16 05:32:37 PM PDT 24 |
| Finished | Aug 16 05:32:50 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-6674fc34-4a36-4669-b693-668161a75b7f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12867 22633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_link_suspend.1286722633 |
| Directory | /workspace/0.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/0.usbdev_low_speed_traffic.3290691973 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 3675892192 ps |
| CPU time | 35.9 seconds |
| Started | Aug 16 05:32:45 PM PDT 24 |
| Finished | Aug 16 05:33:21 PM PDT 24 |
| Peak memory | 218472 kb |
| Host | smart-bdc99e84-18de-4549-b87b-8ff9a34a6aa8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3290691973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.3290691973 |
| Directory | /workspace/0.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_inter_pkt_delay.1340519791 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 3043297146 ps |
| CPU time | 22.11 seconds |
| Started | Aug 16 05:32:45 PM PDT 24 |
| Finished | Aug 16 05:33:07 PM PDT 24 |
| Peak memory | 217768 kb |
| Host | smart-95ebe8ed-37ed-45d8-ba52-6622a70ce1ab |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1340519791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.1340519791 |
| Directory | /workspace/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_length_in_transaction.580040289 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 265947383 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:32:34 PM PDT 24 |
| Finished | Aug 16 05:32:35 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-30b91b3f-6bf7-49d6-adfb-8b2f1ef667c1 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=580040289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.580040289 |
| Directory | /workspace/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_length_out_transaction.2740629353 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 190768474 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:32:40 PM PDT 24 |
| Finished | Aug 16 05:32:41 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ed87cd89-4b78-4058-8473-e64bb234b8ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27406 29353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.2740629353 |
| Directory | /workspace/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_max_usb_traffic.475493797 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 3424345576 ps |
| CPU time | 32.9 seconds |
| Started | Aug 16 05:32:37 PM PDT 24 |
| Finished | Aug 16 05:33:10 PM PDT 24 |
| Peak memory | 224124 kb |
| Host | smart-bc7fe2ca-d2d9-4fe0-885b-9ba0d925574c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=475493797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.475493797 |
| Directory | /workspace/0.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/0.usbdev_min_inter_pkt_delay.3434867560 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 2075462374 ps |
| CPU time | 20.8 seconds |
| Started | Aug 16 05:32:36 PM PDT 24 |
| Finished | Aug 16 05:32:57 PM PDT 24 |
| Peak memory | 217376 kb |
| Host | smart-0e388902-668f-4332-900a-193cc86c981b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3434867560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.3434867560 |
| Directory | /workspace/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/0.usbdev_min_length_in_transaction.3262987103 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 170007255 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:32:40 PM PDT 24 |
| Finished | Aug 16 05:32:41 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-bc5a735c-6da6-430f-8ef3-7ce32138d713 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3262987103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.3262987103 |
| Directory | /workspace/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_min_length_out_transaction.2131630493 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 181922817 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:32:36 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-64152759-a6c1-4b56-b4b4-ba92bc5071cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21316 30493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.2131630493 |
| Directory | /workspace/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1405779379 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 486463769 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:32:33 PM PDT 24 |
| Finished | Aug 16 05:32:35 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-223a6c9b-c7c6-4e51-8c0b-370d5de9b51e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14057 79379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1405779379 |
| Directory | /workspace/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspace/coverage/default/0.usbdev_out_iso.442178793 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 147239150 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:32:38 PM PDT 24 |
| Finished | Aug 16 05:32:39 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-52891089-2b22-4270-b190-45c65f6c9049 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44217 8793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_out_iso.442178793 |
| Directory | /workspace/0.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/0.usbdev_out_stall.532025602 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 149690488 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:32:36 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-12b74875-2784-46d9-95fc-005569c0ff50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53202 5602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_out_stall.532025602 |
| Directory | /workspace/0.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/0.usbdev_out_trans_nak.284013696 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 217989476 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:32:37 PM PDT 24 |
| Finished | Aug 16 05:32:38 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-a067cce9-dee5-4610-8a1a-d6f4b7be4464 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28401 3696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_out_trans_nak.284013696 |
| Directory | /workspace/0.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/0.usbdev_pending_in_trans.3203441093 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 148337598 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:32:45 PM PDT 24 |
| Finished | Aug 16 05:32:45 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-9441802c-b871-43b9-a606-c1adeafe91de |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32034 41093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pending_in_trans.3203441093 |
| Directory | /workspace/0.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.1732386854 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 189277054 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:32:34 PM PDT 24 |
| Finished | Aug 16 05:32:35 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-b74ec903-1a60-4269-9327-39688246ffcd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17323 86854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_bit_handling_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.1732386854 |
| Directory | /workspace/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_pinflip.2487995547 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 248770386 ps |
| CPU time | 1.11 seconds |
| Started | Aug 16 05:32:33 PM PDT 24 |
| Finished | Aug 16 05:32:35 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-09382024-351b-4c69-a229-26f8449bbb69 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2487995547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.2487995547 |
| Directory | /workspace/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_rand_bus_type.48875579 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 196476102 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:32:36 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-a1550dc8-e513-48f0-b588-f3613842ab25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48875 579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.48875579 |
| Directory | /workspace/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_rx_dp_dn.1190152632 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 263028550 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:32:32 PM PDT 24 |
| Finished | Aug 16 05:32:33 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-5e37e255-7573-4e03-989b-351b4316c6de |
| User | root |
| Command | /workspace/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1190152632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ass ert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.1190152632 |
| Directory | /workspace/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_tx_use_d_se0.3027865218 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 225931480 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:32:46 PM PDT 24 |
| Finished | Aug 16 05:32:47 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-ce308801-6a15-4f31-8749-18f319863829 |
| User | root |
| Command | /workspace/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3027865218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ass ert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.3027865218 |
| Directory | /workspace/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_config_usb_ref_disable.142118876 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 155844031 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:32:37 PM PDT 24 |
| Finished | Aug 16 05:32:37 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-8759834d-9d42-4c4d-bf3d-0ce45ea8d056 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14211 8876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.142118876 |
| Directory | /workspace/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/0.usbdev_phy_pins_sense.1020685174 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 71152418 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:32:40 PM PDT 24 |
| Finished | Aug 16 05:32:41 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-cf41a696-0c67-4cc9-abfb-2df23f6eef7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10206 85174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.1020685174 |
| Directory | /workspace/0.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/0.usbdev_pkt_buffer.2708862627 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 18126454839 ps |
| CPU time | 48.95 seconds |
| Started | Aug 16 05:32:37 PM PDT 24 |
| Finished | Aug 16 05:33:26 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-5c11500e-4162-403e-90b7-86b11e534188 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27088 62627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pkt_buffer.2708862627 |
| Directory | /workspace/0.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/0.usbdev_pkt_received.2063510211 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 179948442 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:32:42 PM PDT 24 |
| Finished | Aug 16 05:32:43 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-20734b32-8d22-4622-8ee5-2ed12a74fa24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20635 10211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pkt_received.2063510211 |
| Directory | /workspace/0.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/0.usbdev_pkt_sent.2224222131 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 222202584 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:32:36 PM PDT 24 |
| Finished | Aug 16 05:32:37 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-02eed7b0-d0bf-4d73-b1d4-4605b6b2bd71 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22242 22131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pkt_sent.2224222131 |
| Directory | /workspace/0.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/0.usbdev_rand_bus_resets.3086996884 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 5363866656 ps |
| CPU time | 54.93 seconds |
| Started | Aug 16 05:32:32 PM PDT 24 |
| Finished | Aug 16 05:33:27 PM PDT 24 |
| Peak memory | 218940 kb |
| Host | smart-6de64902-89a8-4937-83f6-41433a65f75b |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3086996884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.3086996884 |
| Directory | /workspace/0.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/0.usbdev_rand_suspends.833276818 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 9524104333 ps |
| CPU time | 182.03 seconds |
| Started | Aug 16 05:32:45 PM PDT 24 |
| Finished | Aug 16 05:35:47 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-23ae1bbd-1a53-490a-b043-5e222b22e1eb |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=833276818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.833276818 |
| Directory | /workspace/0.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/0.usbdev_random_length_in_transaction.2497105979 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 198729886 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:32:51 PM PDT 24 |
| Finished | Aug 16 05:32:53 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-0d2f4e46-9f24-4c14-8bc8-e2fd24d4461e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24971 05979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_in_transaction.2497105979 |
| Directory | /workspace/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_random_length_out_transaction.2520717737 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 183766780 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:32:43 PM PDT 24 |
| Finished | Aug 16 05:32:44 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-f9bd431f-8e79-4a0f-a053-64538e246556 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25207 17737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.2520717737 |
| Directory | /workspace/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/0.usbdev_rx_crc_err.3983188691 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 183318956 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:32:45 PM PDT 24 |
| Finished | Aug 16 05:32:46 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-9a734438-908f-440a-8e60-293435bc5bbf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39831 88691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rx_crc_err.3983188691 |
| Directory | /workspace/0.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/0.usbdev_rx_full.3044697726 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 251715042 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:32:35 PM PDT 24 |
| Finished | Aug 16 05:32:36 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c9159b21-8b3c-4fe6-bc3e-ab53a785d133 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30446 97726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rx_full.3044697726 |
| Directory | /workspace/0.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/0.usbdev_sec_cm.575951061 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 1513293411 ps |
| CPU time | 2.62 seconds |
| Started | Aug 16 05:32:41 PM PDT 24 |
| Finished | Aug 16 05:32:44 PM PDT 24 |
| Peak memory | 224352 kb |
| Host | smart-eff6fd7b-643a-4fe0-97cb-da234d6477cc |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=575951061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.575951061 |
| Directory | /workspace/0.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_priority_over_stall_response.2935095429 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 203630736 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:32:42 PM PDT 24 |
| Finished | Aug 16 05:32:43 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-9ee68ceb-845a-47f1-a8f8-88e6daefad9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29350 95429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.2935095429 |
| Directory | /workspace/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_stage.1679739565 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 148051528 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:32:54 PM PDT 24 |
| Finished | Aug 16 05:32:55 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-4be13334-e750-4bfb-90c8-be93963fcf4a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16797 39565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_stage.1679739565 |
| Directory | /workspace/0.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/0.usbdev_setup_trans_ignored.3481515333 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 161979053 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:32:42 PM PDT 24 |
| Finished | Aug 16 05:32:43 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-9ae45d66-b1ac-4f38-8b3e-68eb664dba06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34815 15333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_trans_ignored.3481515333 |
| Directory | /workspace/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/0.usbdev_smoke.765273940 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 258784347 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:32:48 PM PDT 24 |
| Finished | Aug 16 05:32:49 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-24a07361-1d14-4acb-9c20-3a297a078b24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76527 3940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.765273940 |
| Directory | /workspace/0.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/0.usbdev_spurious_pids_ignored.295946301 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 1818298842 ps |
| CPU time | 13.68 seconds |
| Started | Aug 16 05:33:00 PM PDT 24 |
| Finished | Aug 16 05:33:14 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-8d0fed56-c6a4-477f-84a6-e5744714cd0b |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=295946301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.295946301 |
| Directory | /workspace/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/0.usbdev_stall_priority_over_nak.1246001150 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 189706613 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:32:52 PM PDT 24 |
| Finished | Aug 16 05:32:54 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-9aff7178-b28a-479d-81c1-ec8840e04b5d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12460 01150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.1246001150 |
| Directory | /workspace/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/0.usbdev_stall_trans.1874413237 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 156918587 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:32:43 PM PDT 24 |
| Finished | Aug 16 05:32:44 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-2b2f55cf-7650-4fa2-93e5-de2dc967b767 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18744 13237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_trans.1874413237 |
| Directory | /workspace/0.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/0.usbdev_stream_len_max.2761620784 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 617258065 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:32:50 PM PDT 24 |
| Finished | Aug 16 05:32:52 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-b34d6ab0-72ce-4203-a9b4-5d8d14d15247 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27616 20784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.2761620784 |
| Directory | /workspace/0.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/0.usbdev_streaming_out.973903668 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 2586482342 ps |
| CPU time | 29.17 seconds |
| Started | Aug 16 05:32:47 PM PDT 24 |
| Finished | Aug 16 05:33:17 PM PDT 24 |
| Peak memory | 224120 kb |
| Host | smart-35b333b2-a39e-4b45-babd-033c0b791f25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97390 3668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_streaming_out.973903668 |
| Directory | /workspace/0.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/0.usbdev_timeout_missing_host_handshake.1005377578 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 920150577 ps |
| CPU time | 18.25 seconds |
| Started | Aug 16 05:32:30 PM PDT 24 |
| Finished | Aug 16 05:32:48 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-0bcd4974-7dd9-4cfc-8424-9cdd4492018d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1005377578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host _handshake.1005377578 |
| Directory | /workspace/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/0.usbdev_tx_rx_disruption.1416785487 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 506013978 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:32:49 PM PDT 24 |
| Finished | Aug 16 05:32:51 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-b65765f0-79d7-4c32-b37d-a356714a4825 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1416785487 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_tx_rx_disruption.1416785487 |
| Directory | /workspace/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/1.usbdev_alert_test.3881451253 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 54490172 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:33:02 PM PDT 24 |
| Finished | Aug 16 05:33:03 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-9d257866-f42f-44dc-a42e-4afa2ee6aaba |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3881451253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.3881451253 |
| Directory | /workspace/1.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/1.usbdev_aon_wake_disconnect.1226177369 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 9227528222 ps |
| CPU time | 11.97 seconds |
| Started | Aug 16 05:32:44 PM PDT 24 |
| Finished | Aug 16 05:32:56 PM PDT 24 |
| Peak memory | 207816 kb |
| Host | smart-73afb12c-8adf-454c-8ce6-29aea937cd30 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1226177369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_ao n_wake_disconnect.1226177369 |
| Directory | /workspace/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/1.usbdev_aon_wake_reset.1640666587 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 15755685389 ps |
| CPU time | 18.24 seconds |
| Started | Aug 16 05:32:48 PM PDT 24 |
| Finished | Aug 16 05:33:06 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-8b5d8b2e-415d-4fe2-82e0-9ca21ffde827 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1640666587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.1640666587 |
| Directory | /workspace/1.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/1.usbdev_aon_wake_resume.3528143073 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 31135468728 ps |
| CPU time | 38.31 seconds |
| Started | Aug 16 05:32:52 PM PDT 24 |
| Finished | Aug 16 05:33:30 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-2a54df6c-a9d0-4953-bd45-03269ce6839c |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3528143073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_ao n_wake_resume.3528143073 |
| Directory | /workspace/1.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/1.usbdev_av_buffer.4737080 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 165592300 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:32:42 PM PDT 24 |
| Finished | Aug 16 05:32:43 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-501a9951-1a9c-405d-83e6-56085804234e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47370 80 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_av_buffer.4737080 |
| Directory | /workspace/1.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/1.usbdev_av_empty.1636511061 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 196584061 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:32:47 PM PDT 24 |
| Finished | Aug 16 05:32:48 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-fddfe19d-499a-4599-b8d1-8d6a9db3c6fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16365 11061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_av_empty.1636511061 |
| Directory | /workspace/1.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/1.usbdev_av_overflow.1047299320 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 132753985 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:32:49 PM PDT 24 |
| Finished | Aug 16 05:32:49 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-d310b89e-95bf-4d67-bbe5-5f86681d7520 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10472 99320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_av_overflow.1047299320 |
| Directory | /workspace/1.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/1.usbdev_bitstuff_err.1563629096 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 145341137 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:32:45 PM PDT 24 |
| Finished | Aug 16 05:32:46 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-fd002a7c-10b7-4bb9-8c16-3a3cae598de1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15636 29096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_bitstuff_err.1563629096 |
| Directory | /workspace/1.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_data_toggle_clear.613163797 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 671252348 ps |
| CPU time | 2.19 seconds |
| Started | Aug 16 05:32:42 PM PDT 24 |
| Finished | Aug 16 05:32:44 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-f4a33697-c7a8-4284-84e1-5371c13d82e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61316 3797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_clear.613163797 |
| Directory | /workspace/1.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/1.usbdev_data_toggle_restore.231928106 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 334984225 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:32:51 PM PDT 24 |
| Finished | Aug 16 05:32:53 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-062f307f-b1b1-4ec9-8370-35fa54e05a80 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=231928106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.231928106 |
| Directory | /workspace/1.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/1.usbdev_device_address.1570877164 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 26515821878 ps |
| CPU time | 47.1 seconds |
| Started | Aug 16 05:32:45 PM PDT 24 |
| Finished | Aug 16 05:33:32 PM PDT 24 |
| Peak memory | 207880 kb |
| Host | smart-27d27062-1112-4922-af98-3cc56e68ebaf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15708 77164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.1570877164 |
| Directory | /workspace/1.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/1.usbdev_device_timeout.3978289097 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 5279794670 ps |
| CPU time | 47.99 seconds |
| Started | Aug 16 05:32:42 PM PDT 24 |
| Finished | Aug 16 05:33:30 PM PDT 24 |
| Peak memory | 207868 kb |
| Host | smart-b2c31e76-4502-4136-b673-8ded4ce0debd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3978289097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.3978289097 |
| Directory | /workspace/1.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/1.usbdev_disable_endpoint.1294835929 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 608161020 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:32:44 PM PDT 24 |
| Finished | Aug 16 05:32:46 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-1dd50e15-cf95-48f4-a3b0-a981db8c9a85 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12948 35929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_disable_endpoint.1294835929 |
| Directory | /workspace/1.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/1.usbdev_disconnected.3669809263 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 190788619 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:32:43 PM PDT 24 |
| Finished | Aug 16 05:32:45 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-5970a7dd-fd4f-49c5-9256-bb8cd9feb58b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36698 09263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_disconnected.3669809263 |
| Directory | /workspace/1.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/1.usbdev_enable.85481510 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 39783415 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:32:41 PM PDT 24 |
| Finished | Aug 16 05:32:42 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-e57363cb-8673-4b43-8d13-6b31aacd1145 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=85481 510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_enable.85481510 |
| Directory | /workspace/1.usbdev_enable/latest |
| Test location | /workspace/coverage/default/1.usbdev_endpoint_access.1080532093 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 876435053 ps |
| CPU time | 2.45 seconds |
| Started | Aug 16 05:32:44 PM PDT 24 |
| Finished | Aug 16 05:32:52 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-3e882d7a-fd9c-4a8b-9355-d3dc69b31af6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10805 32093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.1080532093 |
| Directory | /workspace/1.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/1.usbdev_fifo_rst.76015146 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 275380007 ps |
| CPU time | 2.19 seconds |
| Started | Aug 16 05:32:52 PM PDT 24 |
| Finished | Aug 16 05:32:54 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-ab05bd51-0973-44b3-9c4c-cc799c6ba61c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76015 146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_fifo_rst.76015146 |
| Directory | /workspace/1.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_hiclk.3036091071 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 95186987088 ps |
| CPU time | 142.17 seconds |
| Started | Aug 16 05:32:43 PM PDT 24 |
| Finished | Aug 16 05:35:05 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-73537100-02f3-4bd1-83b5-ac76a283267a |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3036091071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.3036091071 |
| Directory | /workspace/1.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_hiclk_max.3587763317 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 108129138601 ps |
| CPU time | 197.73 seconds |
| Started | Aug 16 05:32:40 PM PDT 24 |
| Finished | Aug 16 05:35:58 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-63a71e83-5902-42df-b785-0a7441932897 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3587763317 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk_max.3587763317 |
| Directory | /workspace/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_loclk.4153431253 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 102115564856 ps |
| CPU time | 172.05 seconds |
| Started | Aug 16 05:32:42 PM PDT 24 |
| Finished | Aug 16 05:35:34 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-af850b72-ba94-40a6-bed3-8278ae3e5898 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=4153431253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.4153431253 |
| Directory | /workspace/1.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_loclk_max.639527158 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 119157615597 ps |
| CPU time | 234.86 seconds |
| Started | Aug 16 05:32:43 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-2c04f433-8882-402a-b1d3-cc72dd9a666e |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=639527158 -assert no postproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspac e/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk_max.639527158 |
| Directory | /workspace/1.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/1.usbdev_freq_phase.2805987514 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 84154038007 ps |
| CPU time | 126.34 seconds |
| Started | Aug 16 05:32:44 PM PDT 24 |
| Finished | Aug 16 05:34:50 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-31dfea43-5f0f-4665-9720-8af3a7eb69ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28059 87514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_phase.2805987514 |
| Directory | /workspace/1.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/1.usbdev_in_iso.399582496 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 225405593 ps |
| CPU time | 1.22 seconds |
| Started | Aug 16 05:32:56 PM PDT 24 |
| Finished | Aug 16 05:32:57 PM PDT 24 |
| Peak memory | 216876 kb |
| Host | smart-c1995da6-2af1-4d9a-b2b6-f0d71168c308 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=399582496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.399582496 |
| Directory | /workspace/1.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/1.usbdev_in_stall.2227938479 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 144370497 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:32:42 PM PDT 24 |
| Finished | Aug 16 05:32:43 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-ad69ad71-5d62-4f99-b45d-048cf9aee160 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22279 38479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_in_stall.2227938479 |
| Directory | /workspace/1.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/1.usbdev_in_trans.1800093278 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 214802232 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:32:56 PM PDT 24 |
| Finished | Aug 16 05:32:57 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-7a2c35d7-bc28-47d3-be18-04ff498fe770 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18000 93278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_in_trans.1800093278 |
| Directory | /workspace/1.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_invalid_sync.575839383 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 3577789433 ps |
| CPU time | 99.6 seconds |
| Started | Aug 16 05:32:44 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-805b46de-e99d-43bd-90d8-5ee7eb336792 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=575839383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.575839383 |
| Directory | /workspace/1.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/1.usbdev_iso_retraction.189241453 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 10764888508 ps |
| CPU time | 81.78 seconds |
| Started | Aug 16 05:32:47 PM PDT 24 |
| Finished | Aug 16 05:34:09 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-f61ad1e1-0b32-4763-b1f5-ea6f8f0d5cd1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=189241453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.189241453 |
| Directory | /workspace/1.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/1.usbdev_link_in_err.1303802055 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 204004872 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:32:47 PM PDT 24 |
| Finished | Aug 16 05:32:48 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-01b75a0a-759f-40d9-a5e6-6581dee81309 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13038 02055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_link_in_err.1303802055 |
| Directory | /workspace/1.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_link_resume.2030605105 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 24096611130 ps |
| CPU time | 43.48 seconds |
| Started | Aug 16 05:32:57 PM PDT 24 |
| Finished | Aug 16 05:33:41 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-6d8d48c1-672e-4ed1-b362-a5fce38ef877 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20306 05105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_link_resume.2030605105 |
| Directory | /workspace/1.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/1.usbdev_low_speed_traffic.2538841582 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 2937981201 ps |
| CPU time | 30.37 seconds |
| Started | Aug 16 05:32:49 PM PDT 24 |
| Finished | Aug 16 05:33:20 PM PDT 24 |
| Peak memory | 218372 kb |
| Host | smart-c3a24173-4020-43cd-bb2f-4d27f2efa4fc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2538841582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.2538841582 |
| Directory | /workspace/1.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_inter_pkt_delay.1176856663 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 4138585139 ps |
| CPU time | 32.38 seconds |
| Started | Aug 16 05:32:52 PM PDT 24 |
| Finished | Aug 16 05:33:25 PM PDT 24 |
| Peak memory | 217676 kb |
| Host | smart-15d70af7-0922-419f-a859-73fb4a4082a0 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1176856663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1176856663 |
| Directory | /workspace/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_length_in_transaction.2690620695 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 277056394 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:32:43 PM PDT 24 |
| Finished | Aug 16 05:32:44 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-a0245cdd-67a6-436b-a337-63f67de55116 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2690620695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.2690620695 |
| Directory | /workspace/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_length_out_transaction.3531875029 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 207703339 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:32:43 PM PDT 24 |
| Finished | Aug 16 05:32:44 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-cf06d535-6f19-4bcf-8822-3c6683b97111 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35318 75029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.3531875029 |
| Directory | /workspace/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_non_iso_usb_traffic.565403713 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 2286670501 ps |
| CPU time | 18.16 seconds |
| Started | Aug 16 05:33:01 PM PDT 24 |
| Finished | Aug 16 05:33:19 PM PDT 24 |
| Peak memory | 218028 kb |
| Host | smart-21198745-d86f-459e-9875-8636da57e5bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56540 3713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.565403713 |
| Directory | /workspace/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/1.usbdev_max_usb_traffic.2024950669 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 2679700691 ps |
| CPU time | 22.94 seconds |
| Started | Aug 16 05:32:49 PM PDT 24 |
| Finished | Aug 16 05:33:12 PM PDT 24 |
| Peak memory | 224228 kb |
| Host | smart-2e22e9c7-2f5d-44c7-8bea-3d23738d4d20 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2024950669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.2024950669 |
| Directory | /workspace/1.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/1.usbdev_min_inter_pkt_delay.3858791298 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 1715924956 ps |
| CPU time | 48.57 seconds |
| Started | Aug 16 05:32:44 PM PDT 24 |
| Finished | Aug 16 05:33:32 PM PDT 24 |
| Peak memory | 215836 kb |
| Host | smart-f5dde659-5340-40cf-88cb-5153dec4e08a |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3858791298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.3858791298 |
| Directory | /workspace/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/1.usbdev_min_length_in_transaction.333104251 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 213931025 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:32:53 PM PDT 24 |
| Finished | Aug 16 05:32:54 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-d9341c5a-c31a-4887-a603-5bc0890297ed |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=333104251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.333104251 |
| Directory | /workspace/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_min_length_out_transaction.1725716206 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 146830273 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:32:52 PM PDT 24 |
| Finished | Aug 16 05:32:53 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-0bc96f97-d353-485a-9a7f-169c081d80c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17257 16206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.1725716206 |
| Directory | /workspace/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_out_iso.119692366 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 190231575 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:32:44 PM PDT 24 |
| Finished | Aug 16 05:32:50 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-bd5e3d8d-58e3-4e49-8c65-7f6dd8c7c768 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11969 2366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_out_iso.119692366 |
| Directory | /workspace/1.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/1.usbdev_out_stall.1502042691 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 276147322 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:33:02 PM PDT 24 |
| Finished | Aug 16 05:33:03 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-42b27418-6f0f-4fd3-93be-59ef64efedd6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15020 42691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_out_stall.1502042691 |
| Directory | /workspace/1.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/1.usbdev_out_trans_nak.2963580801 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 154791291 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:33:05 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-f8b0784b-4efb-4463-8ab3-dc81c1d72fdd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29635 80801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_out_trans_nak.2963580801 |
| Directory | /workspace/1.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_config_pinflip.2008524528 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 250835830 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:32:50 PM PDT 24 |
| Finished | Aug 16 05:32:51 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-f64259c9-b369-4784-8b63-fed687da8592 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2008524528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.2008524528 |
| Directory | /workspace/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_config_rand_bus_type.2289027599 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 191927934 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:32:59 PM PDT 24 |
| Finished | Aug 16 05:33:00 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-e9abf997-1ddf-40cf-873d-a7bf8d6ebc4b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22890 27599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.2289027599 |
| Directory | /workspace/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_config_usb_ref_disable.41287780 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 143717223 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:32:59 PM PDT 24 |
| Finished | Aug 16 05:33:00 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-1a20ba64-11cc-4dbc-8bd6-1bc7b43acfed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41287 780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.41287780 |
| Directory | /workspace/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/1.usbdev_phy_pins_sense.3782405121 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 37900958 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:33:01 PM PDT 24 |
| Finished | Aug 16 05:33:02 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-acd89c22-d38d-42a0-b8e2-d55d616f1f4d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37824 05121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.3782405121 |
| Directory | /workspace/1.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/1.usbdev_pkt_buffer.1504664529 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 20304105596 ps |
| CPU time | 63.04 seconds |
| Started | Aug 16 05:32:51 PM PDT 24 |
| Finished | Aug 16 05:33:54 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-0b5e874b-2d25-4883-9655-da38d1b654ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15046 64529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pkt_buffer.1504664529 |
| Directory | /workspace/1.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/1.usbdev_pkt_received.2106305886 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 168808984 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:00 PM PDT 24 |
| Finished | Aug 16 05:33:01 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-7157ed42-f92a-4723-845b-04c8f14f1a6e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21063 05886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pkt_received.2106305886 |
| Directory | /workspace/1.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/1.usbdev_pkt_sent.1746851787 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 202948517 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:32:51 PM PDT 24 |
| Finished | Aug 16 05:32:52 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-6241f676-e0f8-4d85-af36-0e6ce7bb80cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17468 51787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pkt_sent.1746851787 |
| Directory | /workspace/1.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/1.usbdev_rand_bus_disconnects.2659018440 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 3533157727 ps |
| CPU time | 92.63 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:34:36 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-f9e75b08-84c2-4bf8-bb17-b5061accc960 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2659018440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.2659018440 |
| Directory | /workspace/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/1.usbdev_rand_bus_resets.3631258392 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 3819607133 ps |
| CPU time | 38.3 seconds |
| Started | Aug 16 05:32:51 PM PDT 24 |
| Finished | Aug 16 05:33:29 PM PDT 24 |
| Peak memory | 224088 kb |
| Host | smart-20e3935d-3c14-40da-83e8-ec710346cfb1 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3631258392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.3631258392 |
| Directory | /workspace/1.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/1.usbdev_rand_suspends.1393987049 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 6097609431 ps |
| CPU time | 82.29 seconds |
| Started | Aug 16 05:32:59 PM PDT 24 |
| Finished | Aug 16 05:34:22 PM PDT 24 |
| Peak memory | 219428 kb |
| Host | smart-e26129b3-fabf-4482-b479-1aafe6e536e8 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1393987049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.1393987049 |
| Directory | /workspace/1.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/1.usbdev_random_length_in_transaction.2255971220 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 211685861 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:06 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-cde950ec-630a-400e-ab62-f26b3c3190ed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22559 71220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_in_transaction.2255971220 |
| Directory | /workspace/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_random_length_out_transaction.2337214387 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 192153102 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:33:04 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-7bebfbaf-3389-4329-bb5e-21585b3d1fd3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23372 14387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.2337214387 |
| Directory | /workspace/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/1.usbdev_resume_link_active.2734473450 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 20229469353 ps |
| CPU time | 25.41 seconds |
| Started | Aug 16 05:32:55 PM PDT 24 |
| Finished | Aug 16 05:33:21 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-9c625bd6-7e9a-4340-afee-ac46fff4e75e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27344 73450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_resume_link_active.2734473450 |
| Directory | /workspace/1.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/1.usbdev_rx_crc_err.2277592401 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 176642559 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:32:55 PM PDT 24 |
| Finished | Aug 16 05:32:56 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-1511b69e-c109-4b27-848a-cd5fd695916a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22775 92401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_crc_err.2277592401 |
| Directory | /workspace/1.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_rx_full.1732773951 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 278394323 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:09 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-3042b8e4-60f7-4afa-94a2-e297efae7ea8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17327 73951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_full.1732773951 |
| Directory | /workspace/1.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/1.usbdev_rx_pid_err.1466037156 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 166511144 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:32:58 PM PDT 24 |
| Finished | Aug 16 05:32:59 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-2068ffa5-ca54-4a89-85ff-72f3e9f2b56c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14660 37156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_pid_err.1466037156 |
| Directory | /workspace/1.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_priority.772376078 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 472983858 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:33:05 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-3f48d52b-df91-43de-a212-46dfae21b491 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77237 6078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.772376078 |
| Directory | /workspace/1.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_priority_over_stall_response.2167593510 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 199298348 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:07 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-19a1c96d-efdd-4d77-840b-3728b59660a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21675 93510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.2167593510 |
| Directory | /workspace/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_stage.1295229419 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 156080778 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:33:00 PM PDT 24 |
| Finished | Aug 16 05:33:01 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-c4c52e4d-918e-478e-9457-61637c15630e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12952 29419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_stage.1295229419 |
| Directory | /workspace/1.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/1.usbdev_setup_trans_ignored.255675592 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 218164856 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:32:51 PM PDT 24 |
| Finished | Aug 16 05:32:52 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-0a98bef5-ec43-4f26-825a-1462358e6edf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25567 5592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_trans_ignored.255675592 |
| Directory | /workspace/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/1.usbdev_smoke.1353532874 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 258141823 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:32:55 PM PDT 24 |
| Finished | Aug 16 05:32:57 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-f1d2c51c-3a2f-4f36-97af-b1c7ff012bcf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13535 32874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.1353532874 |
| Directory | /workspace/1.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/1.usbdev_spurious_pids_ignored.2829906573 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 3081958609 ps |
| CPU time | 32.43 seconds |
| Started | Aug 16 05:33:00 PM PDT 24 |
| Finished | Aug 16 05:33:32 PM PDT 24 |
| Peak memory | 223976 kb |
| Host | smart-1694e088-a9f8-4907-9d92-af137592cbf0 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2829906573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.2829906573 |
| Directory | /workspace/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/1.usbdev_stall_priority_over_nak.3465672805 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 174729179 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:32:58 PM PDT 24 |
| Finished | Aug 16 05:32:59 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-99a6a849-3d51-4c87-9d5b-c914fda81958 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34656 72805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.3465672805 |
| Directory | /workspace/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/1.usbdev_stall_trans.2618416967 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 229240956 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:32:56 PM PDT 24 |
| Finished | Aug 16 05:32:57 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-29039005-9fd5-4a11-9e8d-8c59d15c55bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26184 16967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_trans.2618416967 |
| Directory | /workspace/1.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/1.usbdev_stream_len_max.1144427119 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 1068936908 ps |
| CPU time | 2.79 seconds |
| Started | Aug 16 05:33:01 PM PDT 24 |
| Finished | Aug 16 05:33:04 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-3cec7dc6-ec04-4426-a28b-25ba03570e13 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11444 27119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.1144427119 |
| Directory | /workspace/1.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/1.usbdev_streaming_out.933627091 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 2447788187 ps |
| CPU time | 21.82 seconds |
| Started | Aug 16 05:32:56 PM PDT 24 |
| Finished | Aug 16 05:33:18 PM PDT 24 |
| Peak memory | 217808 kb |
| Host | smart-78a62c68-143b-452c-9818-9407a2727c02 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93362 7091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_streaming_out.933627091 |
| Directory | /workspace/1.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/1.usbdev_timeout_missing_host_handshake.1111544011 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 4974985149 ps |
| CPU time | 33.81 seconds |
| Started | Aug 16 05:32:53 PM PDT 24 |
| Finished | Aug 16 05:33:27 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-0108d436-45d4-44a1-83f2-92670b78666f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1111544011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host _handshake.1111544011 |
| Directory | /workspace/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/1.usbdev_tx_rx_disruption.3564236080 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 610024736 ps |
| CPU time | 1.97 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:33:06 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-64d7176c-c172-4f7f-8919-ff4021f0b183 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3564236080 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_tx_rx_disruption.3564236080 |
| Directory | /workspace/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/10.usbdev_alert_test.545118516 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 37878406 ps |
| CPU time | 0.66 seconds |
| Started | Aug 16 05:34:34 PM PDT 24 |
| Finished | Aug 16 05:34:35 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-35f5d977-d4c0-476c-8e9e-74224c688e94 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=545118516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.545118516 |
| Directory | /workspace/10.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/10.usbdev_aon_wake_disconnect.924052101 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 4487130951 ps |
| CPU time | 7.99 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:16 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-89d8db39-216c-4ef8-b782-f3934186eba1 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=924052101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_ao n_wake_disconnect.924052101 |
| Directory | /workspace/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/10.usbdev_aon_wake_reset.468097646 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 15398243949 ps |
| CPU time | 19.74 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:29 PM PDT 24 |
| Peak memory | 215992 kb |
| Host | smart-5d2101f4-9a0b-45f3-9a51-90091245b6a7 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=468097646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.468097646 |
| Directory | /workspace/10.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/10.usbdev_aon_wake_resume.408011347 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 23968068355 ps |
| CPU time | 29.35 seconds |
| Started | Aug 16 05:34:14 PM PDT 24 |
| Finished | Aug 16 05:34:44 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-bf95de98-581b-420b-beb2-f24c505aa7af |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=408011347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_ao n_wake_resume.408011347 |
| Directory | /workspace/10.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/10.usbdev_av_buffer.339727153 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 158622911 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:11 PM PDT 24 |
| Finished | Aug 16 05:34:12 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-077029a7-36ef-4c54-9899-c3cb5263957e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33972 7153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_av_buffer.339727153 |
| Directory | /workspace/10.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/10.usbdev_bitstuff_err.4006085562 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 162522989 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:10 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-00297512-ce2e-436a-b105-49faf742444a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40060 85562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_bitstuff_err.4006085562 |
| Directory | /workspace/10.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/10.usbdev_data_toggle_clear.2043496276 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 184801276 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:34:15 PM PDT 24 |
| Finished | Aug 16 05:34:16 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-e03c08ee-03e2-45d1-9cdf-5e9599445f11 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20434 96276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_clear.2043496276 |
| Directory | /workspace/10.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/10.usbdev_data_toggle_restore.897413738 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 386333388 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:10 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-9c07670e-c79c-4330-9d6d-170c9dfb974c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=897413738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.897413738 |
| Directory | /workspace/10.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/10.usbdev_device_address.1082305702 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 39671198124 ps |
| CPU time | 80.71 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:35:30 PM PDT 24 |
| Peak memory | 207840 kb |
| Host | smart-95ba48b6-85df-44c3-8222-020e35ac24e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10823 05702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.1082305702 |
| Directory | /workspace/10.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/10.usbdev_device_timeout.3030500940 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 428238755 ps |
| CPU time | 8.15 seconds |
| Started | Aug 16 05:34:14 PM PDT 24 |
| Finished | Aug 16 05:34:22 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-04a71f87-5f63-41a3-a18c-5c187cebd0d2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3030500940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.3030500940 |
| Directory | /workspace/10.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/10.usbdev_disable_endpoint.2438131068 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 612060992 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:34:16 PM PDT 24 |
| Finished | Aug 16 05:34:18 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-03875023-b402-4d09-aafe-4f0bfccec895 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24381 31068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_disable_endpoint.2438131068 |
| Directory | /workspace/10.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/10.usbdev_disconnected.1722803663 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 142123274 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:11 PM PDT 24 |
| Finished | Aug 16 05:34:12 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-c518169c-806a-409d-95a3-cac87766a1c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17228 03663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_disconnected.1722803663 |
| Directory | /workspace/10.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/10.usbdev_enable.2584292761 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 74301367 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:34:23 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-b8252b9e-da79-4838-a057-a1dd000772d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25842 92761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_enable.2584292761 |
| Directory | /workspace/10.usbdev_enable/latest |
| Test location | /workspace/coverage/default/10.usbdev_endpoint_access.1434786451 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 946120259 ps |
| CPU time | 2.34 seconds |
| Started | Aug 16 05:34:23 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-ef39ee73-2206-4d75-9721-898f10d95105 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14347 86451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.1434786451 |
| Directory | /workspace/10.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/10.usbdev_endpoint_types.1553881109 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 310177706 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:34:23 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-32f7e111-a4b2-474e-96d3-f805c73e6a35 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1553881109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.1553881109 |
| Directory | /workspace/10.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/10.usbdev_fifo_rst.2232858776 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 182092093 ps |
| CPU time | 1.75 seconds |
| Started | Aug 16 05:34:22 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-377c0987-563f-4153-80f1-12e61e06dd79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22328 58776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_fifo_rst.2232858776 |
| Directory | /workspace/10.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/10.usbdev_in_iso.2015909376 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 194505043 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:34:28 PM PDT 24 |
| Finished | Aug 16 05:34:30 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c6e3dfc5-72ce-45ee-be03-e12312bd2b60 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2015909376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.2015909376 |
| Directory | /workspace/10.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/10.usbdev_in_stall.1483352619 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 144666144 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:34:31 PM PDT 24 |
| Finished | Aug 16 05:34:32 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-b742b501-8c1d-4f78-919b-c09d9b36405f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14833 52619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_in_stall.1483352619 |
| Directory | /workspace/10.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/10.usbdev_in_trans.4028617748 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 173715125 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:27 PM PDT 24 |
| Finished | Aug 16 05:34:28 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-86b9f577-fe92-458c-be6c-2565fb4a5dcf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40286 17748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_in_trans.4028617748 |
| Directory | /workspace/10.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/10.usbdev_invalid_sync.74508156 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 3362987707 ps |
| CPU time | 94.27 seconds |
| Started | Aug 16 05:34:34 PM PDT 24 |
| Finished | Aug 16 05:36:08 PM PDT 24 |
| Peak memory | 217560 kb |
| Host | smart-5cce72a9-cc05-419b-a3e2-cf25832d313f |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=74508156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.74508156 |
| Directory | /workspace/10.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/10.usbdev_iso_retraction.4052829848 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 12655173652 ps |
| CPU time | 96.69 seconds |
| Started | Aug 16 05:34:22 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-66d56ead-7fe4-41b2-a93b-899fa0ff3a21 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4052829848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.4052829848 |
| Directory | /workspace/10.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/10.usbdev_link_in_err.2336623125 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 212469450 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:25 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-37109eec-0301-4441-9752-056832f3ceec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23366 23125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_link_in_err.2336623125 |
| Directory | /workspace/10.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/10.usbdev_link_resume.4197690352 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 11825677042 ps |
| CPU time | 15.6 seconds |
| Started | Aug 16 05:34:26 PM PDT 24 |
| Finished | Aug 16 05:34:42 PM PDT 24 |
| Peak memory | 207820 kb |
| Host | smart-64d8fe0e-c60b-4cdb-95b8-11bf20421259 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41976 90352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_link_resume.4197690352 |
| Directory | /workspace/10.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/10.usbdev_link_suspend.1001881378 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 8588707642 ps |
| CPU time | 12.1 seconds |
| Started | Aug 16 05:34:36 PM PDT 24 |
| Finished | Aug 16 05:34:49 PM PDT 24 |
| Peak memory | 207872 kb |
| Host | smart-40521768-2774-446a-a9e2-86172b15a684 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10018 81378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_link_suspend.1001881378 |
| Directory | /workspace/10.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/10.usbdev_low_speed_traffic.2748117399 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 5070020709 ps |
| CPU time | 150.08 seconds |
| Started | Aug 16 05:34:33 PM PDT 24 |
| Finished | Aug 16 05:37:03 PM PDT 24 |
| Peak memory | 218432 kb |
| Host | smart-88acf27c-e86c-402b-9d3d-8502a28d58e1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2748117399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.2748117399 |
| Directory | /workspace/10.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_inter_pkt_delay.1078096764 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 3746422169 ps |
| CPU time | 111.12 seconds |
| Started | Aug 16 05:34:40 PM PDT 24 |
| Finished | Aug 16 05:36:31 PM PDT 24 |
| Peak memory | 217464 kb |
| Host | smart-adf5911d-6bff-47f9-aa29-24a720083f52 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1078096764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.1078096764 |
| Directory | /workspace/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_length_in_transaction.3568810909 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 238473657 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:34:25 PM PDT 24 |
| Finished | Aug 16 05:34:27 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-152786f9-d25c-4293-b99e-1c4bff69b914 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3568810909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.3568810909 |
| Directory | /workspace/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_length_out_transaction.1912378365 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 240058259 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:34:35 PM PDT 24 |
| Finished | Aug 16 05:34:36 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a2f2bbe1-fd43-48a9-8858-c69ca6a1940b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19123 78365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.1912378365 |
| Directory | /workspace/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_non_iso_usb_traffic.3256203689 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 2288554183 ps |
| CPU time | 66.26 seconds |
| Started | Aug 16 05:34:33 PM PDT 24 |
| Finished | Aug 16 05:35:39 PM PDT 24 |
| Peak memory | 217396 kb |
| Host | smart-ba7ea277-be18-4834-9dd5-ebcc580a2477 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32562 03689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.3256203689 |
| Directory | /workspace/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/10.usbdev_max_usb_traffic.2220025670 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 3425030741 ps |
| CPU time | 33.96 seconds |
| Started | Aug 16 05:34:34 PM PDT 24 |
| Finished | Aug 16 05:35:08 PM PDT 24 |
| Peak memory | 217640 kb |
| Host | smart-4caea1e9-4f50-473e-8dd9-7ac2261490d9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2220025670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.2220025670 |
| Directory | /workspace/10.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/10.usbdev_min_inter_pkt_delay.4264682732 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 2922712020 ps |
| CPU time | 82.77 seconds |
| Started | Aug 16 05:34:43 PM PDT 24 |
| Finished | Aug 16 05:36:06 PM PDT 24 |
| Peak memory | 217740 kb |
| Host | smart-c2711001-9587-4252-8275-e2755cdc9fdb |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=4264682732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.4264682732 |
| Directory | /workspace/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/10.usbdev_min_length_in_transaction.3608087134 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 178202784 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:34:27 PM PDT 24 |
| Finished | Aug 16 05:34:28 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-ccb7de13-29c8-4d22-9778-0782ca6150b4 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3608087134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.3608087134 |
| Directory | /workspace/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_min_length_out_transaction.176512445 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 143199203 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:39 PM PDT 24 |
| Finished | Aug 16 05:34:40 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-eaebef9f-8601-44b0-9b34-d28801b9e370 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17651 2445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.176512445 |
| Directory | /workspace/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_out_iso.910913742 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 180003691 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:31 PM PDT 24 |
| Finished | Aug 16 05:34:33 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-5f362b0b-2752-4c0a-bf07-16a4347a85a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91091 3742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_out_iso.910913742 |
| Directory | /workspace/10.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/10.usbdev_out_stall.1096525385 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 152775514 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:34:26 PM PDT 24 |
| Finished | Aug 16 05:34:27 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-15c0b760-024f-40e4-becd-3d01fdce7dd4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10965 25385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_out_stall.1096525385 |
| Directory | /workspace/10.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/10.usbdev_out_trans_nak.397060498 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 164777917 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:34:23 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-a83818f5-bc5b-49cf-baf7-478c56cead43 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39706 0498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_out_trans_nak.397060498 |
| Directory | /workspace/10.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/10.usbdev_pending_in_trans.4164639224 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 227886854 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:34:29 PM PDT 24 |
| Finished | Aug 16 05:34:30 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-97b07f0e-a98a-488a-9162-476977380641 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41646 39224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pending_in_trans.4164639224 |
| Directory | /workspace/10.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/10.usbdev_phy_config_pinflip.356835461 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 203018342 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:34:22 PM PDT 24 |
| Finished | Aug 16 05:34:23 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-c51d8837-2ce0-4432-9b4f-f7a4cba34bb7 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=356835461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.356835461 |
| Directory | /workspace/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/10.usbdev_phy_config_usb_ref_disable.227512813 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 216163055 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:34:25 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-e2480087-6d95-41ea-b498-1d09ac7d3887 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22751 2813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.227512813 |
| Directory | /workspace/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/10.usbdev_phy_pins_sense.3679006402 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 39902092 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:34:32 PM PDT 24 |
| Finished | Aug 16 05:34:33 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-ed535d7e-8f65-453d-9481-df2f78600c5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36790 06402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.3679006402 |
| Directory | /workspace/10.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/10.usbdev_pkt_buffer.3819011384 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 18954429828 ps |
| CPU time | 48.65 seconds |
| Started | Aug 16 05:34:26 PM PDT 24 |
| Finished | Aug 16 05:35:15 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-46131b6e-1dcb-46d5-86f4-2b9b62005102 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38190 11384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pkt_buffer.3819011384 |
| Directory | /workspace/10.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/10.usbdev_pkt_received.3298208562 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 204559035 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:34:25 PM PDT 24 |
| Finished | Aug 16 05:34:27 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-20713877-65aa-4ff5-8bfd-ceddee9e7818 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32982 08562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pkt_received.3298208562 |
| Directory | /workspace/10.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/10.usbdev_pkt_sent.3273703134 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 240070031 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:34:42 PM PDT 24 |
| Finished | Aug 16 05:34:44 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-a2bfe3bb-7f76-4d44-ac80-e688bfcdd428 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32737 03134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pkt_sent.3273703134 |
| Directory | /workspace/10.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/10.usbdev_random_length_in_transaction.2299009723 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 228845718 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:34:27 PM PDT 24 |
| Finished | Aug 16 05:34:29 PM PDT 24 |
| Peak memory | 206984 kb |
| Host | smart-29f63b65-c45d-4843-bf22-0bcfed66720b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22990 09723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_in_transaction.2299009723 |
| Directory | /workspace/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_random_length_out_transaction.3491738245 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 204169874 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:23 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-cf5db4d0-4d50-4d78-a6f2-6252bdd0426a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34917 38245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.3491738245 |
| Directory | /workspace/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/10.usbdev_resume_link_active.3179195692 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 20181785089 ps |
| CPU time | 26.18 seconds |
| Started | Aug 16 05:34:25 PM PDT 24 |
| Finished | Aug 16 05:34:51 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-abbcce6f-0654-47cf-9300-4475bb13ae58 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31791 95692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_resume_link_active.3179195692 |
| Directory | /workspace/10.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/10.usbdev_rx_crc_err.2511964850 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 168548638 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:34:23 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-2b223b48-3c60-487e-b0b9-c587496ce8e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25119 64850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_rx_crc_err.2511964850 |
| Directory | /workspace/10.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/10.usbdev_rx_full.3604496425 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 377265782 ps |
| CPU time | 1.38 seconds |
| Started | Aug 16 05:34:25 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-0b2665db-7ed7-4498-ac6a-f8070e33b958 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36044 96425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_rx_full.3604496425 |
| Directory | /workspace/10.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/10.usbdev_setup_stage.2476170342 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 186784304 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:34:34 PM PDT 24 |
| Finished | Aug 16 05:34:35 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-977934a7-7895-4120-9242-a727f6c8acde |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24761 70342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_setup_stage.2476170342 |
| Directory | /workspace/10.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/10.usbdev_setup_trans_ignored.3669924168 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 153273564 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:34:27 PM PDT 24 |
| Finished | Aug 16 05:34:28 PM PDT 24 |
| Peak memory | 207008 kb |
| Host | smart-abee9376-c3bb-4bae-8ee5-3c67546dc092 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36699 24168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_setup_trans_ignored.3669924168 |
| Directory | /workspace/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/10.usbdev_smoke.1438636595 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 198074090 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:34:48 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-78958b5c-d5dd-46d7-ad08-b10d4794d4b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14386 36595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.1438636595 |
| Directory | /workspace/10.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/10.usbdev_spurious_pids_ignored.1994716440 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 2219521114 ps |
| CPU time | 63.42 seconds |
| Started | Aug 16 05:34:23 PM PDT 24 |
| Finished | Aug 16 05:35:27 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-025651da-9f31-4f79-9cf1-6eb1b6a9e728 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1994716440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.1994716440 |
| Directory | /workspace/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/10.usbdev_stall_priority_over_nak.4087680763 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 196308550 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:34:33 PM PDT 24 |
| Finished | Aug 16 05:34:35 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-333eee90-b897-4d5f-8944-3290c0ecaac8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40876 80763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.4087680763 |
| Directory | /workspace/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/10.usbdev_stall_trans.3089052608 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 165605680 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:34:23 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-f19c9890-7f1f-460d-88c9-37aeb0fa2bde |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30890 52608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_trans.3089052608 |
| Directory | /workspace/10.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/10.usbdev_stream_len_max.907433849 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 643844361 ps |
| CPU time | 1.98 seconds |
| Started | Aug 16 05:34:28 PM PDT 24 |
| Finished | Aug 16 05:34:31 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-e6f3969e-6247-437e-b749-c721f51962a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90743 3849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.907433849 |
| Directory | /workspace/10.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/10.usbdev_streaming_out.243688414 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 2648874000 ps |
| CPU time | 75.77 seconds |
| Started | Aug 16 05:34:24 PM PDT 24 |
| Finished | Aug 16 05:35:40 PM PDT 24 |
| Peak memory | 215992 kb |
| Host | smart-db033b55-c74a-4ba2-ad40-24fc485aac71 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24368 8414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_streaming_out.243688414 |
| Directory | /workspace/10.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/10.usbdev_timeout_missing_host_handshake.340759140 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 144857175 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:10 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-5bf4e99c-9f21-4ec3-99f6-83e5d0f466af |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=340759140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host _handshake.340759140 |
| Directory | /workspace/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/10.usbdev_tx_rx_disruption.2185789863 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 508029078 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:34:39 PM PDT 24 |
| Finished | Aug 16 05:34:41 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-c5b82f90-50b4-4391-9165-1c64e5ef3762 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2185789863 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_tx_rx_disruption.2185789863 |
| Directory | /workspace/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/100.usbdev_endpoint_types.3615709429 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 364325787 ps |
| CPU time | 1.14 seconds |
| Started | Aug 16 05:39:55 PM PDT 24 |
| Finished | Aug 16 05:39:57 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-7b101ff2-3310-4ec7-a3cf-d1d90483763b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3615709429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.3615709429 |
| Directory | /workspace/100.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/100.usbdev_tx_rx_disruption.3311440600 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 636181951 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:39:56 PM PDT 24 |
| Finished | Aug 16 05:39:57 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-d20467d1-43a2-48d7-8e85-6ec4764db872 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3311440600 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 100.usbdev_tx_rx_disruption.3311440600 |
| Directory | /workspace/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/101.usbdev_tx_rx_disruption.2665497564 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 591970165 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:05 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-b94cb835-8ced-47fd-8b80-f04073e7144f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2665497564 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 101.usbdev_tx_rx_disruption.2665497564 |
| Directory | /workspace/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/102.usbdev_tx_rx_disruption.1181209150 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 493152806 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-102144dd-9610-4ff6-a35f-b440bf428ce5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1181209150 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 102.usbdev_tx_rx_disruption.1181209150 |
| Directory | /workspace/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/103.usbdev_endpoint_types.4101079446 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 136450248 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:40:02 PM PDT 24 |
| Finished | Aug 16 05:40:03 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-9f50b737-4e69-4b58-afb9-df352b7e74e4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4101079446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.4101079446 |
| Directory | /workspace/103.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/103.usbdev_tx_rx_disruption.125042715 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 623402274 ps |
| CPU time | 1.88 seconds |
| Started | Aug 16 05:40:01 PM PDT 24 |
| Finished | Aug 16 05:40:03 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-7c16bcec-58fa-4497-8f7f-eb19ea4ba16b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=125042715 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 103.usbdev_tx_rx_disruption.125042715 |
| Directory | /workspace/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/104.usbdev_endpoint_types.1003862236 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 269931744 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:39:42 PM PDT 24 |
| Finished | Aug 16 05:39:43 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4d63293a-b875-4ee9-ada3-1905a977b6db |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1003862236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.1003862236 |
| Directory | /workspace/104.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/104.usbdev_tx_rx_disruption.151493905 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 594274263 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:39:42 PM PDT 24 |
| Finished | Aug 16 05:39:44 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-e962fabe-684b-4be2-866c-b45ab7ab7074 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=151493905 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 104.usbdev_tx_rx_disruption.151493905 |
| Directory | /workspace/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/105.usbdev_endpoint_types.288922144 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 575172194 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:40:05 PM PDT 24 |
| Finished | Aug 16 05:40:06 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-9b59307f-a1a1-4633-9f0e-7a49f781f1dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=288922144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.288922144 |
| Directory | /workspace/105.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/105.usbdev_tx_rx_disruption.3950249706 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 558722449 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:39:57 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-9f73fa94-32de-43c4-a8ea-f746cb58c0b9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3950249706 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 105.usbdev_tx_rx_disruption.3950249706 |
| Directory | /workspace/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/106.usbdev_endpoint_types.1015440719 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 516877931 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-0fa55816-9446-4b9e-aebc-3d46263511cc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1015440719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.1015440719 |
| Directory | /workspace/106.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/106.usbdev_tx_rx_disruption.3840321002 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 505216010 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:02 PM PDT 24 |
| Finished | Aug 16 05:40:04 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-da2aba88-b634-4edd-af96-77217ba0ea0b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3840321002 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 106.usbdev_tx_rx_disruption.3840321002 |
| Directory | /workspace/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/107.usbdev_endpoint_types.443614227 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 498569519 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-f70077fc-a5e5-4513-bc13-25ba261f73f1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=443614227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.443614227 |
| Directory | /workspace/107.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/108.usbdev_endpoint_types.3914754421 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 397944320 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:39:46 PM PDT 24 |
| Finished | Aug 16 05:39:47 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-388bd808-94a9-4f71-b285-17a769134702 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3914754421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.3914754421 |
| Directory | /workspace/108.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/108.usbdev_tx_rx_disruption.2403026810 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 488759427 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-ba5cdc27-66a9-4941-a178-a36d6b3d19c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2403026810 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 108.usbdev_tx_rx_disruption.2403026810 |
| Directory | /workspace/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/109.usbdev_tx_rx_disruption.1645083213 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 467861380 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:39:55 PM PDT 24 |
| Finished | Aug 16 05:39:57 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2ffd3bc4-8f5c-4470-a625-c334039c5e82 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1645083213 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 109.usbdev_tx_rx_disruption.1645083213 |
| Directory | /workspace/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/11.usbdev_alert_test.1550153609 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 33715772 ps |
| CPU time | 0.66 seconds |
| Started | Aug 16 05:34:41 PM PDT 24 |
| Finished | Aug 16 05:34:42 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-16792bc6-cc74-4ab4-943c-c03a497b67f1 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1550153609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.1550153609 |
| Directory | /workspace/11.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/11.usbdev_aon_wake_disconnect.2990225395 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 5607334421 ps |
| CPU time | 8.08 seconds |
| Started | Aug 16 05:34:29 PM PDT 24 |
| Finished | Aug 16 05:34:37 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-6d710a3d-e262-4071-89be-db1b36b7edef |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2990225395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_a on_wake_disconnect.2990225395 |
| Directory | /workspace/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/11.usbdev_aon_wake_reset.3291752982 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 20691410275 ps |
| CPU time | 26.47 seconds |
| Started | Aug 16 05:34:36 PM PDT 24 |
| Finished | Aug 16 05:35:03 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-fb4282b2-5536-4dfc-b655-fb906955c8fe |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3291752982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.3291752982 |
| Directory | /workspace/11.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/11.usbdev_aon_wake_resume.1653177320 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 25946510775 ps |
| CPU time | 30.81 seconds |
| Started | Aug 16 05:34:40 PM PDT 24 |
| Finished | Aug 16 05:35:11 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-bc537f9d-fd03-4f14-9a2f-34c2a7d69e11 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1653177320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_a on_wake_resume.1653177320 |
| Directory | /workspace/11.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/11.usbdev_av_buffer.2129579411 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 145535811 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:34:23 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-63699ef9-0f8e-419a-84ad-b4666af403e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21295 79411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_av_buffer.2129579411 |
| Directory | /workspace/11.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/11.usbdev_bitstuff_err.3781164353 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 170653216 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:34:36 PM PDT 24 |
| Finished | Aug 16 05:34:37 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-61f8c4f1-b509-4379-b5c7-0099b6879a38 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37811 64353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_bitstuff_err.3781164353 |
| Directory | /workspace/11.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/11.usbdev_data_toggle_clear.2061982453 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 417482134 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:34:42 PM PDT 24 |
| Finished | Aug 16 05:34:43 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-f88aa36a-b7ab-432a-87f3-734935dbc168 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20619 82453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_clear.2061982453 |
| Directory | /workspace/11.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/11.usbdev_data_toggle_restore.4018431059 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 330269690 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:34:24 PM PDT 24 |
| Finished | Aug 16 05:34:25 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-897fb654-3dc4-4ef0-b4a3-6e1bb34c9817 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4018431059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.4018431059 |
| Directory | /workspace/11.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/11.usbdev_device_address.3239524777 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 26665154455 ps |
| CPU time | 41.46 seconds |
| Started | Aug 16 05:34:27 PM PDT 24 |
| Finished | Aug 16 05:35:09 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-d4cb8db9-ec02-498b-9dfe-008210338054 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32395 24777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.3239524777 |
| Directory | /workspace/11.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/11.usbdev_device_timeout.1626089984 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 1177601275 ps |
| CPU time | 26.45 seconds |
| Started | Aug 16 05:34:44 PM PDT 24 |
| Finished | Aug 16 05:35:11 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-2c62ba32-6f2b-48f9-84a6-efcbac7b52aa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1626089984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.1626089984 |
| Directory | /workspace/11.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/11.usbdev_disable_endpoint.3930822121 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 592689610 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:34:24 PM PDT 24 |
| Finished | Aug 16 05:34:30 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-a63b32fb-ba80-488b-98b5-cc71662f1a64 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39308 22121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_disable_endpoint.3930822121 |
| Directory | /workspace/11.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/11.usbdev_enable.1936173331 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 39819998 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:34:37 PM PDT 24 |
| Finished | Aug 16 05:34:38 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-2b78cd97-6b2a-4c29-83e5-f588a9d561cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19361 73331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_enable.1936173331 |
| Directory | /workspace/11.usbdev_enable/latest |
| Test location | /workspace/coverage/default/11.usbdev_endpoint_access.1923789855 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 846824752 ps |
| CPU time | 2.23 seconds |
| Started | Aug 16 05:34:24 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-c42125ec-8a65-4b7b-bb53-3b27dab61cdc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19237 89855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.1923789855 |
| Directory | /workspace/11.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/11.usbdev_endpoint_types.2876629826 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 246578974 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:34:42 PM PDT 24 |
| Finished | Aug 16 05:34:43 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-8e0fe181-4092-4af4-8a11-8b70e7d18bd6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2876629826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.2876629826 |
| Directory | /workspace/11.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/11.usbdev_fifo_rst.737702619 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 163735476 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:34:39 PM PDT 24 |
| Finished | Aug 16 05:34:41 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-271692aa-a9c9-4a7b-a464-e7fbef9cccc5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73770 2619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_fifo_rst.737702619 |
| Directory | /workspace/11.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/11.usbdev_in_iso.3746353865 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 280743728 ps |
| CPU time | 1.28 seconds |
| Started | Aug 16 05:34:32 PM PDT 24 |
| Finished | Aug 16 05:34:34 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-5250c725-8926-4af0-8813-b37d4f148978 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3746353865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.3746353865 |
| Directory | /workspace/11.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/11.usbdev_in_stall.21273089 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 146336670 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:34:24 PM PDT 24 |
| Finished | Aug 16 05:34:30 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-2cd1f4d3-dd9e-421f-97aa-a1db7ba64479 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21273 089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_in_stall.21273089 |
| Directory | /workspace/11.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/11.usbdev_in_trans.3633773979 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 221114436 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:34:24 PM PDT 24 |
| Finished | Aug 16 05:34:25 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-caf4ad38-c9f0-4f96-b9ad-6f02593908ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36337 73979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_in_trans.3633773979 |
| Directory | /workspace/11.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/11.usbdev_invalid_sync.2228194392 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 5516137209 ps |
| CPU time | 53.9 seconds |
| Started | Aug 16 05:34:48 PM PDT 24 |
| Finished | Aug 16 05:35:42 PM PDT 24 |
| Peak memory | 218424 kb |
| Host | smart-4c21216a-81b9-4877-947c-ed0f92486cb0 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2228194392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.2228194392 |
| Directory | /workspace/11.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/11.usbdev_iso_retraction.3525014011 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 4586081494 ps |
| CPU time | 56.83 seconds |
| Started | Aug 16 05:34:40 PM PDT 24 |
| Finished | Aug 16 05:35:37 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-c77b1330-a58d-468f-b26b-8a30ce2af908 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3525014011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.3525014011 |
| Directory | /workspace/11.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/11.usbdev_link_in_err.312144741 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 188834924 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:34:29 PM PDT 24 |
| Finished | Aug 16 05:34:31 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-42fe6e94-e53c-42a5-bec9-1c5879e7f450 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31214 4741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_link_in_err.312144741 |
| Directory | /workspace/11.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/11.usbdev_link_resume.489751362 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 33429897731 ps |
| CPU time | 56.28 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-1f2c35cd-b855-425c-9187-057dbe396be7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48975 1362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_link_resume.489751362 |
| Directory | /workspace/11.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/11.usbdev_link_suspend.345080631 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 5027315202 ps |
| CPU time | 6.81 seconds |
| Started | Aug 16 05:34:48 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 215984 kb |
| Host | smart-d2be8a25-ab7d-43da-87d5-49afdbdd6076 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34508 0631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_link_suspend.345080631 |
| Directory | /workspace/11.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/11.usbdev_low_speed_traffic.980244893 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 3510708230 ps |
| CPU time | 27.46 seconds |
| Started | Aug 16 05:34:41 PM PDT 24 |
| Finished | Aug 16 05:35:09 PM PDT 24 |
| Peak memory | 216988 kb |
| Host | smart-78495065-1525-4a56-a0d6-c7cd9dc6a081 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=980244893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.980244893 |
| Directory | /workspace/11.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_inter_pkt_delay.2262186271 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 3115317654 ps |
| CPU time | 88.73 seconds |
| Started | Aug 16 05:34:30 PM PDT 24 |
| Finished | Aug 16 05:35:58 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-ecbb8073-8008-4ea3-bd2d-0772e32c6d15 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2262186271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.2262186271 |
| Directory | /workspace/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_length_in_transaction.100932089 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 304067968 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:34:48 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-ef6ec19a-7728-4cda-a2f6-5887be3f9168 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=100932089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.100932089 |
| Directory | /workspace/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_length_out_transaction.805952971 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 243939845 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:34:30 PM PDT 24 |
| Finished | Aug 16 05:34:31 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-09f57f9c-dbb4-422a-a1d2-7ed9fd8ab30e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80595 2971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.805952971 |
| Directory | /workspace/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_non_iso_usb_traffic.1591492079 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 2640904446 ps |
| CPU time | 26.64 seconds |
| Started | Aug 16 05:34:30 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 217956 kb |
| Host | smart-cd0f78eb-8fb1-4643-a862-a92f216c315c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15914 92079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.1591492079 |
| Directory | /workspace/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/11.usbdev_max_usb_traffic.3856243152 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 3059105408 ps |
| CPU time | 33.9 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:35:19 PM PDT 24 |
| Peak memory | 218584 kb |
| Host | smart-9caa7c29-ea43-4383-a8e8-543bc6229ebc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3856243152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.3856243152 |
| Directory | /workspace/11.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/11.usbdev_min_inter_pkt_delay.826286850 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 2043618116 ps |
| CPU time | 19.55 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:35:05 PM PDT 24 |
| Peak memory | 217532 kb |
| Host | smart-376867e0-137e-4cb5-a6b1-26c693da734e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=826286850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.826286850 |
| Directory | /workspace/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/11.usbdev_min_length_in_transaction.3349781914 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 152774760 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:34:40 PM PDT 24 |
| Finished | Aug 16 05:34:41 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-9a38f50a-1e3c-4a7d-873c-2ec72c79921d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3349781914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.3349781914 |
| Directory | /workspace/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_min_length_out_transaction.4080622374 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 147045740 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:34:30 PM PDT 24 |
| Finished | Aug 16 05:34:31 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-c8f02abb-b99c-478e-9397-78d6a6ed5b1f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40806 22374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.4080622374 |
| Directory | /workspace/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_nak_trans.3012051593 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 223954770 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:34:46 PM PDT 24 |
| Finished | Aug 16 05:34:47 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-dcd92ff2-2133-4b7e-980a-fcc6a4ed27d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30120 51593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_nak_trans.3012051593 |
| Directory | /workspace/11.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/11.usbdev_out_iso.3474172551 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 181712006 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:34:32 PM PDT 24 |
| Finished | Aug 16 05:34:33 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-3e5b3fd3-fed9-4847-9d1b-2a7560733586 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34741 72551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_out_iso.3474172551 |
| Directory | /workspace/11.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/11.usbdev_out_stall.2463773065 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 185916019 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:32 PM PDT 24 |
| Finished | Aug 16 05:34:33 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-607a4821-917c-416a-8555-65d6f01b3c8e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24637 73065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_out_stall.2463773065 |
| Directory | /workspace/11.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/11.usbdev_out_trans_nak.2671877870 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 171560118 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:34:31 PM PDT 24 |
| Finished | Aug 16 05:34:33 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-4af348e9-d8e8-43b8-83ad-148cee1dace7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26718 77870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_out_trans_nak.2671877870 |
| Directory | /workspace/11.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/11.usbdev_pending_in_trans.3062192330 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 157902701 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:34:48 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-5fd74133-19f2-40e2-b75e-463b2547115d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30621 92330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pending_in_trans.3062192330 |
| Directory | /workspace/11.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/11.usbdev_phy_config_pinflip.3115771911 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 219685853 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:34:46 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-b37c3cef-fce9-4836-b772-711c9e81c6f8 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3115771911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.3115771911 |
| Directory | /workspace/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/11.usbdev_phy_pins_sense.1209169187 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 98024268 ps |
| CPU time | 0.75 seconds |
| Started | Aug 16 05:34:40 PM PDT 24 |
| Finished | Aug 16 05:34:41 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-7821ea12-56d4-4505-995e-5179754608a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12091 69187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.1209169187 |
| Directory | /workspace/11.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/11.usbdev_pkt_buffer.1090753355 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 16297670055 ps |
| CPU time | 41.72 seconds |
| Started | Aug 16 05:34:39 PM PDT 24 |
| Finished | Aug 16 05:35:21 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-6057968f-919b-4064-af76-75fa89bb3303 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10907 53355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pkt_buffer.1090753355 |
| Directory | /workspace/11.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/11.usbdev_pkt_sent.1179130154 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 166761721 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:34 PM PDT 24 |
| Finished | Aug 16 05:34:35 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-9cadcea7-e032-4db1-8e34-9a4f59a6cf08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11791 30154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_pkt_sent.1179130154 |
| Directory | /workspace/11.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/11.usbdev_random_length_in_transaction.959994318 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 198186688 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:50 PM PDT 24 |
| Finished | Aug 16 05:34:51 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7043d412-304d-40cf-8efe-dd7ab6f53313 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95999 4318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_in_transaction.959994318 |
| Directory | /workspace/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_random_length_out_transaction.924471607 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 229213338 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:34:46 PM PDT 24 |
| Finished | Aug 16 05:34:48 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-22101490-1459-416d-94cc-2f0535331ecf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92447 1607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.924471607 |
| Directory | /workspace/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/11.usbdev_resume_link_active.4046153560 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 20164121462 ps |
| CPU time | 24.54 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:35:16 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-23436724-1310-4b76-990b-689f582be2c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40461 53560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_resume_link_active.4046153560 |
| Directory | /workspace/11.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/11.usbdev_rx_crc_err.997156035 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 140154902 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:34:46 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-fe26652f-5b4c-40d3-8ef7-a56d22209335 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99715 6035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_rx_crc_err.997156035 |
| Directory | /workspace/11.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/11.usbdev_rx_full.19732968 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 410454574 ps |
| CPU time | 1.3 seconds |
| Started | Aug 16 05:34:31 PM PDT 24 |
| Finished | Aug 16 05:34:33 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-e188df8c-9bec-482f-bed1-c2f21eda5684 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19732 968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_rx_full.19732968 |
| Directory | /workspace/11.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/11.usbdev_setup_stage.2881182050 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 151622794 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:34:30 PM PDT 24 |
| Finished | Aug 16 05:34:31 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-f7d3eee8-7f51-4673-b81c-a7130f3022d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28811 82050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_setup_stage.2881182050 |
| Directory | /workspace/11.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/11.usbdev_setup_trans_ignored.3241208415 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 146989766 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:34:30 PM PDT 24 |
| Finished | Aug 16 05:34:31 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-5ebd3a22-ea0b-46ee-8e4a-7e28bc608a52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32412 08415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_setup_trans_ignored.3241208415 |
| Directory | /workspace/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/11.usbdev_smoke.551379923 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 232983515 ps |
| CPU time | 1.16 seconds |
| Started | Aug 16 05:34:48 PM PDT 24 |
| Finished | Aug 16 05:34:49 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7f5366a2-578f-4983-a6ac-e68a4bc31b4d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55137 9923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.551379923 |
| Directory | /workspace/11.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/11.usbdev_spurious_pids_ignored.687573748 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 3249287663 ps |
| CPU time | 100.19 seconds |
| Started | Aug 16 05:34:36 PM PDT 24 |
| Finished | Aug 16 05:36:16 PM PDT 24 |
| Peak memory | 217648 kb |
| Host | smart-56c00ac3-9cd7-4cb9-935c-33183e3c69e9 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=687573748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.687573748 |
| Directory | /workspace/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/11.usbdev_stall_priority_over_nak.734256513 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 187743920 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:34:33 PM PDT 24 |
| Finished | Aug 16 05:34:34 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-1387d953-3482-41e0-9128-b9fcc2d050ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73425 6513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.734256513 |
| Directory | /workspace/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/11.usbdev_stall_trans.2668525412 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 149661132 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:34:46 PM PDT 24 |
| Finished | Aug 16 05:34:46 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-1b25002b-a124-461c-bf12-498a0d30e586 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26685 25412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_trans.2668525412 |
| Directory | /workspace/11.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/11.usbdev_stream_len_max.900574857 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 193020984 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:34:46 PM PDT 24 |
| Finished | Aug 16 05:34:47 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-9882f129-12b6-4dcc-a5bd-da092ff92b78 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90057 4857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.900574857 |
| Directory | /workspace/11.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/11.usbdev_streaming_out.2011617468 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 2386670867 ps |
| CPU time | 67.2 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 217404 kb |
| Host | smart-6613bbe9-974c-4ce9-8086-e8f3e28c44ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20116 17468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_streaming_out.2011617468 |
| Directory | /workspace/11.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/11.usbdev_timeout_missing_host_handshake.1240139932 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 570617000 ps |
| CPU time | 11.45 seconds |
| Started | Aug 16 05:34:27 PM PDT 24 |
| Finished | Aug 16 05:34:39 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-6fba4d70-c5cb-4435-a99f-b7ad9441919a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1240139932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_hos t_handshake.1240139932 |
| Directory | /workspace/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/11.usbdev_tx_rx_disruption.3362220861 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 599151223 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:34:50 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-e3029d08-44a1-473d-bd65-78e681d2055e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3362220861 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_tx_rx_disruption.3362220861 |
| Directory | /workspace/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/110.usbdev_endpoint_types.2747902373 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 513464155 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:39:30 PM PDT 24 |
| Finished | Aug 16 05:39:32 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-e9248664-4783-4326-a6ea-1b09c5ada450 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2747902373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.2747902373 |
| Directory | /workspace/110.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/110.usbdev_tx_rx_disruption.722758835 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 586502726 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:39:52 PM PDT 24 |
| Finished | Aug 16 05:39:53 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-24e38cd9-b76b-4189-8ee8-2f169c066eba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=722758835 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 110.usbdev_tx_rx_disruption.722758835 |
| Directory | /workspace/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/111.usbdev_tx_rx_disruption.1474893041 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 676705590 ps |
| CPU time | 1.78 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-0c2fec6b-a85f-4358-ac0d-7bb1eb63c665 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1474893041 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 111.usbdev_tx_rx_disruption.1474893041 |
| Directory | /workspace/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/112.usbdev_endpoint_types.3029851981 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 212261042 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:04 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-db5af1a6-57ea-45a4-bde0-15eb813b6d05 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3029851981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.3029851981 |
| Directory | /workspace/112.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/112.usbdev_tx_rx_disruption.2031650442 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 492198605 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:40:11 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-41a5395f-fb85-4636-9cd7-8039cbeb7211 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2031650442 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 112.usbdev_tx_rx_disruption.2031650442 |
| Directory | /workspace/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/113.usbdev_tx_rx_disruption.3656097955 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 584956496 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:40:02 PM PDT 24 |
| Finished | Aug 16 05:40:03 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-27f37f5d-fd63-4b6f-be20-b96e0c3785a1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3656097955 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 113.usbdev_tx_rx_disruption.3656097955 |
| Directory | /workspace/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/114.usbdev_tx_rx_disruption.1589327935 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 466594364 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:05 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-3e23832e-5738-4624-9c10-ad39448cfc59 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1589327935 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 114.usbdev_tx_rx_disruption.1589327935 |
| Directory | /workspace/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/115.usbdev_endpoint_types.897867640 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 216597130 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:40:00 PM PDT 24 |
| Finished | Aug 16 05:40:02 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f910ab4a-c3d8-477f-80ac-afd7cb688ad3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=897867640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.897867640 |
| Directory | /workspace/115.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/115.usbdev_tx_rx_disruption.2805303179 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 566106626 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:05 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-602555f7-af3e-4b41-8252-8257bc835e77 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2805303179 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 115.usbdev_tx_rx_disruption.2805303179 |
| Directory | /workspace/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/116.usbdev_tx_rx_disruption.3323066639 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 525554392 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-0cff8dc4-a54a-494d-b14b-106eb7f3a101 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3323066639 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 116.usbdev_tx_rx_disruption.3323066639 |
| Directory | /workspace/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/117.usbdev_tx_rx_disruption.2683226886 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 536500671 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-82e984d2-7b38-484f-afb2-e05bf3a8b785 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2683226886 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 117.usbdev_tx_rx_disruption.2683226886 |
| Directory | /workspace/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/118.usbdev_endpoint_types.2997676995 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 289098225 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-b5fb4d56-113f-4085-81ba-6d843d6515ee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2997676995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.2997676995 |
| Directory | /workspace/118.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/118.usbdev_tx_rx_disruption.2354160886 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 496728447 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-c7e4c031-e655-43c5-8015-ecc58b5804ab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2354160886 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 118.usbdev_tx_rx_disruption.2354160886 |
| Directory | /workspace/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/119.usbdev_endpoint_types.2333035809 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 417478804 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:40:04 PM PDT 24 |
| Finished | Aug 16 05:40:06 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-496f9840-f338-4a1c-9a3e-937d16aa1e77 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2333035809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.2333035809 |
| Directory | /workspace/119.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/119.usbdev_tx_rx_disruption.4034524559 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 534613829 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:51 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-b07a9e1f-2b94-48e0-aa81-7c830886991b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4034524559 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 119.usbdev_tx_rx_disruption.4034524559 |
| Directory | /workspace/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/12.usbdev_alert_test.2675709720 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 55866510 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:34:54 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2c6dd55c-a0e4-44fd-b9e7-6b0c6f53e51e |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2675709720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.2675709720 |
| Directory | /workspace/12.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/12.usbdev_aon_wake_disconnect.2319755664 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 10649031979 ps |
| CPU time | 12.75 seconds |
| Started | Aug 16 05:34:33 PM PDT 24 |
| Finished | Aug 16 05:34:46 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-a1e790fe-fc3b-40c1-bc27-e25e87458816 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2319755664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_a on_wake_disconnect.2319755664 |
| Directory | /workspace/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/12.usbdev_aon_wake_resume.437596211 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 25719648040 ps |
| CPU time | 33.41 seconds |
| Started | Aug 16 05:34:42 PM PDT 24 |
| Finished | Aug 16 05:35:16 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-f1e4cf35-ed5c-483f-a3d7-59b5cb9bbea9 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=437596211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_ao n_wake_resume.437596211 |
| Directory | /workspace/12.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/12.usbdev_av_buffer.2146768344 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 144002876 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:34:46 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-c9c9e1ec-a892-4a71-bc89-0fe6c3aa6534 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21467 68344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_av_buffer.2146768344 |
| Directory | /workspace/12.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/12.usbdev_bitstuff_err.2036226764 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 161086239 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:34:50 PM PDT 24 |
| Finished | Aug 16 05:34:51 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-5d606bdf-b504-424b-b37c-543f68a58ed9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20362 26764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_bitstuff_err.2036226764 |
| Directory | /workspace/12.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/12.usbdev_data_toggle_clear.341206005 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 556745728 ps |
| CPU time | 1.86 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-135e0b28-910d-42b4-bd11-e1858582ceb2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34120 6005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_clear.341206005 |
| Directory | /workspace/12.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/12.usbdev_data_toggle_restore.545224368 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 284827250 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:34:48 PM PDT 24 |
| Finished | Aug 16 05:34:49 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-09e279b3-0cc5-4edd-a17f-a1ecf12c865f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=545224368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.545224368 |
| Directory | /workspace/12.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/12.usbdev_device_address.1769328214 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 23367964342 ps |
| CPU time | 35.37 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:35:26 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-0cef7e0e-f086-44eb-90a9-c95d80534f1b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17693 28214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.1769328214 |
| Directory | /workspace/12.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/12.usbdev_device_timeout.2985610268 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 3436241303 ps |
| CPU time | 33.63 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:35:29 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-e24689a6-a1a3-44f4-821f-ba1b07ce2fee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2985610268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.2985610268 |
| Directory | /workspace/12.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/12.usbdev_disable_endpoint.1580196143 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 645464826 ps |
| CPU time | 1.94 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-6534af8d-bead-4dbd-9143-4cbb34081021 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15801 96143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_disable_endpoint.1580196143 |
| Directory | /workspace/12.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/12.usbdev_disconnected.1416548881 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 155358255 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:34:52 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-7264e257-1943-4e27-abf6-50eceada053c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14165 48881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_disconnected.1416548881 |
| Directory | /workspace/12.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/12.usbdev_enable.4250017301 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 32747722 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:34:48 PM PDT 24 |
| Finished | Aug 16 05:34:49 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-4458788d-6262-43a0-b9dd-0012e07abeb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42500 17301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_enable.4250017301 |
| Directory | /workspace/12.usbdev_enable/latest |
| Test location | /workspace/coverage/default/12.usbdev_endpoint_access.3799463578 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 1025886183 ps |
| CPU time | 2.7 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:34:51 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-51815c5c-2dad-4972-b369-b69f4a0103fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37994 63578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.3799463578 |
| Directory | /workspace/12.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/12.usbdev_endpoint_types.344842115 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 311712543 ps |
| CPU time | 1.11 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:34:52 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-8ea44dfd-46b5-4ca7-8b41-5f26062a6191 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=344842115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.344842115 |
| Directory | /workspace/12.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/12.usbdev_fifo_rst.4255300126 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 322385341 ps |
| CPU time | 3.14 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:34:50 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-2de07929-2633-47d5-8551-37d68b3443fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42553 00126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_fifo_rst.4255300126 |
| Directory | /workspace/12.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/12.usbdev_in_iso.684374993 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 166906001 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:34:54 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f610a642-e902-45b9-a0cf-ae6d209a5f04 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=684374993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.684374993 |
| Directory | /workspace/12.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/12.usbdev_in_stall.3333609531 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 157850732 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:48 PM PDT 24 |
| Finished | Aug 16 05:34:49 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-8680ba08-e40a-44a1-a101-6ce1e1271d1b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33336 09531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_in_stall.3333609531 |
| Directory | /workspace/12.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/12.usbdev_in_trans.2559087083 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 196262318 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:34:54 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-0c3c78b2-ded8-4202-89f9-99358138ec25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25590 87083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_in_trans.2559087083 |
| Directory | /workspace/12.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_invalid_sync.2762406035 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 3677542231 ps |
| CPU time | 36.97 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:35:22 PM PDT 24 |
| Peak memory | 216056 kb |
| Host | smart-522b1300-cfda-4552-8bda-10a633f01b5c |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2762406035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.2762406035 |
| Directory | /workspace/12.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/12.usbdev_link_in_err.618359991 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 171873259 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:34:50 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-7874bb53-6c23-4370-aee5-6e7d989d9cc6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61835 9991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_link_in_err.618359991 |
| Directory | /workspace/12.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/12.usbdev_link_resume.1412895239 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 27296257487 ps |
| CPU time | 46.48 seconds |
| Started | Aug 16 05:34:46 PM PDT 24 |
| Finished | Aug 16 05:35:33 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-b1191719-14c3-4dff-aa67-86dc75b65d88 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14128 95239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_link_resume.1412895239 |
| Directory | /workspace/12.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/12.usbdev_link_suspend.1384889816 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 4917096880 ps |
| CPU time | 6.38 seconds |
| Started | Aug 16 05:34:46 PM PDT 24 |
| Finished | Aug 16 05:34:52 PM PDT 24 |
| Peak memory | 215992 kb |
| Host | smart-bb4acb1e-8622-428b-944f-b61f2df31147 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13848 89816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_link_suspend.1384889816 |
| Directory | /workspace/12.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/12.usbdev_low_speed_traffic.3419341209 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 4075132658 ps |
| CPU time | 121.25 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 218360 kb |
| Host | smart-a6d36bd5-43cf-436d-8a5a-8fb7a9e594d5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3419341209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.3419341209 |
| Directory | /workspace/12.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_inter_pkt_delay.257772832 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 1920339007 ps |
| CPU time | 20.29 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 217360 kb |
| Host | smart-40e53ede-bc42-4a83-93f5-d9d8fb19d1af |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=257772832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.257772832 |
| Directory | /workspace/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_length_in_transaction.305332113 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 242736530 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:34:46 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-327b7697-b7cf-4fb3-9c5b-1ad446d47261 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=305332113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.305332113 |
| Directory | /workspace/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_length_out_transaction.3461276015 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 196434818 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6f14c272-38b4-4e70-87c8-f83bcd2d1721 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34612 76015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.3461276015 |
| Directory | /workspace/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_non_iso_usb_traffic.4248347947 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 3106918752 ps |
| CPU time | 91.91 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:36:21 PM PDT 24 |
| Peak memory | 217772 kb |
| Host | smart-9f12abb3-9480-46b2-b81d-03a3503bfac0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42483 47947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.4248347947 |
| Directory | /workspace/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/12.usbdev_max_usb_traffic.2153072015 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 2173078302 ps |
| CPU time | 63.76 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:36:01 PM PDT 24 |
| Peak memory | 217796 kb |
| Host | smart-d17328cd-519c-409b-ab80-0a8c24dbad3f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2153072015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.2153072015 |
| Directory | /workspace/12.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/12.usbdev_min_inter_pkt_delay.1754671549 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 2496812059 ps |
| CPU time | 71.55 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:36:05 PM PDT 24 |
| Peak memory | 217468 kb |
| Host | smart-fc412457-af63-4b6b-b5ca-92ee908fce85 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1754671549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.1754671549 |
| Directory | /workspace/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/12.usbdev_min_length_in_transaction.2810309450 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 202379160 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-4630b5f1-27c1-4363-a09f-4c61bd0681e4 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2810309450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.2810309450 |
| Directory | /workspace/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_min_length_out_transaction.843470243 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 206766492 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:34:54 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7109dffe-d301-4a40-9fff-ef2a380fe260 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84347 0243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.843470243 |
| Directory | /workspace/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_out_iso.1598892618 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 171931348 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:34:52 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-0e8c882b-1d93-4f7d-af6a-54f8c31913f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15988 92618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_out_iso.1598892618 |
| Directory | /workspace/12.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/12.usbdev_out_stall.2912243538 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 175882978 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:34:46 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-cac73a81-3f2b-4481-a319-2a291314041f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29122 43538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_out_stall.2912243538 |
| Directory | /workspace/12.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/12.usbdev_out_trans_nak.649990555 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 165400843 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-457e71b5-77e7-499a-90a7-5bb01d03f34e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64999 0555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_out_trans_nak.649990555 |
| Directory | /workspace/12.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/12.usbdev_pending_in_trans.1895946633 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 152556880 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:34:46 PM PDT 24 |
| Finished | Aug 16 05:34:47 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-a83c405b-f738-4c9e-8827-1d1b0d9acd86 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18959 46633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pending_in_trans.1895946633 |
| Directory | /workspace/12.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/12.usbdev_phy_config_pinflip.811282677 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 205101394 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:34:50 PM PDT 24 |
| Finished | Aug 16 05:34:51 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-dad10992-f074-4093-8f0a-70731463a63b |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=811282677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.811282677 |
| Directory | /workspace/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/12.usbdev_phy_config_usb_ref_disable.96681476 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 222325093 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-5ac8fcaf-8e1e-4d82-9ddc-180a72ab2b99 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96681 476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.96681476 |
| Directory | /workspace/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/12.usbdev_phy_pins_sense.1437755780 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 44137816 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:34:48 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-a9afd0cc-062e-4697-85c7-2b60e37c49bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14377 55780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.1437755780 |
| Directory | /workspace/12.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/12.usbdev_pkt_buffer.1508268820 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 19976829335 ps |
| CPU time | 51.39 seconds |
| Started | Aug 16 05:34:50 PM PDT 24 |
| Finished | Aug 16 05:35:42 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-ad4e58d9-191f-43ea-96cd-5c3526b9a725 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15082 68820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pkt_buffer.1508268820 |
| Directory | /workspace/12.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/12.usbdev_pkt_received.2323645751 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 151426791 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:34:50 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-61b3e74a-e78e-4d77-ba42-0082c390f899 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23236 45751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pkt_received.2323645751 |
| Directory | /workspace/12.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/12.usbdev_pkt_sent.2519354559 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 170632079 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:34:50 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-1b8493d4-fdc1-42f5-9361-3251166dd711 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25193 54559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pkt_sent.2519354559 |
| Directory | /workspace/12.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/12.usbdev_random_length_in_transaction.4071986926 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 260161611 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-552ca12f-2788-4020-8e18-b2ce19e03710 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40719 86926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_in_transaction.4071986926 |
| Directory | /workspace/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_random_length_out_transaction.559109822 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 190894984 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-d8de5cc6-34f1-4d37-8468-c511c8c17fa5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55910 9822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.559109822 |
| Directory | /workspace/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/12.usbdev_resume_link_active.1533171845 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 20159985357 ps |
| CPU time | 29.89 seconds |
| Started | Aug 16 05:34:43 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-eb2a86f2-244c-4ab1-b174-b278c9e41be8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15331 71845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_resume_link_active.1533171845 |
| Directory | /workspace/12.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/12.usbdev_rx_crc_err.4200564496 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 180792150 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:34:50 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c1c06757-3324-44e8-93b9-3fa664fb5911 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42005 64496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_rx_crc_err.4200564496 |
| Directory | /workspace/12.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/12.usbdev_rx_full.1773206902 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 247681645 ps |
| CPU time | 1.19 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-50c2ac5b-8f9c-4029-a878-8c564928fd92 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17732 06902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_rx_full.1773206902 |
| Directory | /workspace/12.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/12.usbdev_setup_stage.1167180319 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 155321809 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:34:54 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-b622bd1c-a672-48b8-ae9a-ac3814f1edee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11671 80319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_setup_stage.1167180319 |
| Directory | /workspace/12.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/12.usbdev_setup_trans_ignored.927634061 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 147052517 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:34:46 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-1b6d8270-3b3d-495d-8ef4-22efd04f7ae8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92763 4061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_setup_trans_ignored.927634061 |
| Directory | /workspace/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/12.usbdev_smoke.2247387106 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 200921671 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:34:54 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-4b2e795e-0f58-4a4b-ba90-5d15441a7910 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22473 87106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.2247387106 |
| Directory | /workspace/12.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/12.usbdev_spurious_pids_ignored.1362761996 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 2597630695 ps |
| CPU time | 20.75 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-0c2bc776-4730-4b92-8840-fe9b57da1ce9 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1362761996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.1362761996 |
| Directory | /workspace/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/12.usbdev_stall_priority_over_nak.2474451203 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 160330443 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:34:48 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a605b51c-0317-4d58-baec-b9d1c580dada |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24744 51203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.2474451203 |
| Directory | /workspace/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/12.usbdev_stream_len_max.2481005656 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 1335701516 ps |
| CPU time | 3.45 seconds |
| Started | Aug 16 05:34:46 PM PDT 24 |
| Finished | Aug 16 05:34:50 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-4c9dc3dd-71af-4e18-a8a8-8cb49203fd6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24810 05656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.2481005656 |
| Directory | /workspace/12.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/12.usbdev_streaming_out.3135166342 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 2700476605 ps |
| CPU time | 75.74 seconds |
| Started | Aug 16 05:34:48 PM PDT 24 |
| Finished | Aug 16 05:36:04 PM PDT 24 |
| Peak memory | 217540 kb |
| Host | smart-40a24c08-2a04-4c93-8aca-2ef5f535b476 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31351 66342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_streaming_out.3135166342 |
| Directory | /workspace/12.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/12.usbdev_timeout_missing_host_handshake.170286625 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 870927471 ps |
| CPU time | 6.33 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-772551c8-34d9-4807-bb72-3397ec1a8d14 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=170286625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host _handshake.170286625 |
| Directory | /workspace/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/12.usbdev_tx_rx_disruption.1013150539 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 542452834 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:34:51 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-702d3767-6a1d-4f4b-9de3-06a60ec79f7e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1013150539 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_tx_rx_disruption.1013150539 |
| Directory | /workspace/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/120.usbdev_endpoint_types.3010557016 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 164683550 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:40:00 PM PDT 24 |
| Finished | Aug 16 05:40:01 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-5ab8d7c8-3b61-4ed4-ab4e-09aceff2e39b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3010557016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.3010557016 |
| Directory | /workspace/120.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/120.usbdev_tx_rx_disruption.2019561459 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 517163116 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:40:06 PM PDT 24 |
| Finished | Aug 16 05:40:08 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-0cfa6ba6-f606-46cd-a4b5-6796cabceaa1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2019561459 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 120.usbdev_tx_rx_disruption.2019561459 |
| Directory | /workspace/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/121.usbdev_endpoint_types.3554284678 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 419782562 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-5b4ad07c-18c5-4055-a67d-aea571687602 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3554284678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.3554284678 |
| Directory | /workspace/121.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/122.usbdev_endpoint_types.2840772008 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 526201595 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:40:11 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d04790ba-b8a7-424a-a62f-1486a15e2ddf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2840772008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.2840772008 |
| Directory | /workspace/122.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/122.usbdev_tx_rx_disruption.2377435812 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 475339668 ps |
| CPU time | 1.42 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-7937118f-0c78-4484-9378-426578541429 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2377435812 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 122.usbdev_tx_rx_disruption.2377435812 |
| Directory | /workspace/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/123.usbdev_endpoint_types.3708914215 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 537706033 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:04 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-e18e2214-43b8-43b2-b59d-afaefc12b21c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3708914215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.3708914215 |
| Directory | /workspace/123.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/124.usbdev_endpoint_types.1893133467 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 291928091 ps |
| CPU time | 1.19 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-b55a20c4-1087-4036-83d6-57d3a3d626d0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1893133467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.1893133467 |
| Directory | /workspace/124.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/124.usbdev_tx_rx_disruption.719853402 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 476497493 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-be09a90c-de42-4ddb-bf8b-065c9caca146 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=719853402 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 124.usbdev_tx_rx_disruption.719853402 |
| Directory | /workspace/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/125.usbdev_endpoint_types.4283657156 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 577304369 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-0225f3e0-4e48-40eb-850f-8499ae9dea79 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4283657156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.4283657156 |
| Directory | /workspace/125.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/125.usbdev_tx_rx_disruption.1351847490 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 576549231 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:40:09 PM PDT 24 |
| Finished | Aug 16 05:40:11 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-202819c7-2dd0-405e-b280-f66882e82884 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1351847490 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 125.usbdev_tx_rx_disruption.1351847490 |
| Directory | /workspace/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/126.usbdev_endpoint_types.861097130 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 659427213 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:40:05 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-f77a4fe6-c164-4ef3-9990-e3c6ecc8abe7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=861097130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.861097130 |
| Directory | /workspace/126.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/126.usbdev_tx_rx_disruption.919737042 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 526212842 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:40:09 PM PDT 24 |
| Finished | Aug 16 05:40:11 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-f52ac154-8e2c-41f2-a251-a1e14679758f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=919737042 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 126.usbdev_tx_rx_disruption.919737042 |
| Directory | /workspace/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/127.usbdev_endpoint_types.359928882 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 322896352 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:40:12 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-a9dbbbc6-cef7-452e-b9b4-1c7508fe7b93 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=359928882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.359928882 |
| Directory | /workspace/127.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/127.usbdev_tx_rx_disruption.3423005596 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 501030767 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:00 PM PDT 24 |
| Finished | Aug 16 05:40:02 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-0d4cbab2-3423-4f83-8283-dc13077c2732 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3423005596 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 127.usbdev_tx_rx_disruption.3423005596 |
| Directory | /workspace/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/128.usbdev_endpoint_types.1895314796 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 263192520 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:40:06 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-12e10026-2b9d-4631-9647-719e19519a00 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1895314796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.1895314796 |
| Directory | /workspace/128.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/128.usbdev_tx_rx_disruption.2924946010 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 477979515 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:40:00 PM PDT 24 |
| Finished | Aug 16 05:40:01 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-788aa03a-c8b4-45ec-b34a-f4e48f58ff0a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2924946010 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 128.usbdev_tx_rx_disruption.2924946010 |
| Directory | /workspace/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/129.usbdev_endpoint_types.3043204189 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 225768945 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:11 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-23dd2c59-ffca-47d1-bf95-9f407b606d58 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3043204189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.3043204189 |
| Directory | /workspace/129.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/129.usbdev_tx_rx_disruption.1069632665 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 556169400 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-096288c7-6d95-4e0e-9003-431ff8e9a665 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1069632665 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 129.usbdev_tx_rx_disruption.1069632665 |
| Directory | /workspace/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/13.usbdev_alert_test.2704126222 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 52340019 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-699c80c3-6548-4a1b-8893-2be1dc5aafc6 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2704126222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.2704126222 |
| Directory | /workspace/13.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/13.usbdev_aon_wake_disconnect.1558524916 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 11304074468 ps |
| CPU time | 14.97 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:35:03 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-be2d280a-caf0-487a-906a-a248242ca75a |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1558524916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_a on_wake_disconnect.1558524916 |
| Directory | /workspace/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/13.usbdev_aon_wake_reset.2528937582 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 13532696750 ps |
| CPU time | 15.68 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:35:09 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-33e04856-05d9-4457-841d-174f80aefc57 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2528937582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.2528937582 |
| Directory | /workspace/13.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/13.usbdev_aon_wake_resume.3419094414 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 31242956065 ps |
| CPU time | 35.24 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:35:30 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-c6123650-a8b8-47e5-8c10-6ebd164d21c3 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3419094414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_a on_wake_resume.3419094414 |
| Directory | /workspace/13.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/13.usbdev_av_buffer.3072319444 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 186333468 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-1c49515e-2abd-45e8-8db0-226989e9d31c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30723 19444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_av_buffer.3072319444 |
| Directory | /workspace/13.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/13.usbdev_bitstuff_err.1000447583 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 151213006 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-e0393e59-522e-4d58-aa9d-801a6f50528b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10004 47583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_bitstuff_err.1000447583 |
| Directory | /workspace/13.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/13.usbdev_data_toggle_clear.3249261645 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 155297138 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:34:48 PM PDT 24 |
| Finished | Aug 16 05:34:49 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-94962e25-c161-4f83-841d-9ec8aed3e069 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32492 61645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_clear.3249261645 |
| Directory | /workspace/13.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/13.usbdev_data_toggle_restore.3169154600 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 945034276 ps |
| CPU time | 2.44 seconds |
| Started | Aug 16 05:34:50 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-1c3eaf5a-f2c2-449b-9d12-a464c19d0956 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3169154600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.3169154600 |
| Directory | /workspace/13.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/13.usbdev_device_address.2916989013 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 24856774889 ps |
| CPU time | 42.91 seconds |
| Started | Aug 16 05:34:43 PM PDT 24 |
| Finished | Aug 16 05:35:26 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-ca6550bd-53f8-4246-ac8a-83161a356960 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29169 89013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_address.2916989013 |
| Directory | /workspace/13.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/13.usbdev_device_timeout.1396101888 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 3369255494 ps |
| CPU time | 31.91 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:35:27 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-d396dc05-79a1-48b7-b868-78b43799398f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1396101888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.1396101888 |
| Directory | /workspace/13.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/13.usbdev_disable_endpoint.3496715154 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 760395825 ps |
| CPU time | 2.13 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:34:51 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-5f7d3572-b5ba-483c-a57c-07b2a8cd0706 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34967 15154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_disable_endpoint.3496715154 |
| Directory | /workspace/13.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/13.usbdev_disconnected.21129228 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 172238751 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-f0e9d46e-f730-4445-9544-34b5e9a88cd8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21129 228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_disconnected.21129228 |
| Directory | /workspace/13.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/13.usbdev_enable.3359955234 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 61444201 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:34:45 PM PDT 24 |
| Finished | Aug 16 05:34:46 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-2495d37b-a85c-4740-aaa7-4a77a23b5032 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33599 55234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_enable.3359955234 |
| Directory | /workspace/13.usbdev_enable/latest |
| Test location | /workspace/coverage/default/13.usbdev_endpoint_access.4180641798 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 837744365 ps |
| CPU time | 2.27 seconds |
| Started | Aug 16 05:34:58 PM PDT 24 |
| Finished | Aug 16 05:35:01 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-9f4e7326-18d9-4291-998a-52f584999844 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41806 41798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.4180641798 |
| Directory | /workspace/13.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/13.usbdev_endpoint_types.4148298963 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 265000516 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:34:51 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-aebfcbd0-d7a1-45c5-9152-6a499875b6a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4148298963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.4148298963 |
| Directory | /workspace/13.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/13.usbdev_fifo_rst.4222479180 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 311790185 ps |
| CPU time | 2.54 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:34:54 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-65b64ad8-5745-4a91-81ea-dee938150356 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42224 79180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_fifo_rst.4222479180 |
| Directory | /workspace/13.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/13.usbdev_in_iso.1649941849 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 222838736 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:34:48 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-53657c1f-129b-4020-8efb-2eb5509c01fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1649941849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.1649941849 |
| Directory | /workspace/13.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/13.usbdev_in_stall.1044931300 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 152768021 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:34:48 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a1984798-c6be-47aa-ba52-78b6535b8107 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10449 31300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_in_stall.1044931300 |
| Directory | /workspace/13.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/13.usbdev_in_trans.2315478892 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 233167186 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-89699339-a7f4-4a91-afe6-ce76c16e7b6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23154 78892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_in_trans.2315478892 |
| Directory | /workspace/13.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_invalid_sync.2546911651 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 4581330984 ps |
| CPU time | 140.04 seconds |
| Started | Aug 16 05:34:48 PM PDT 24 |
| Finished | Aug 16 05:37:08 PM PDT 24 |
| Peak memory | 217960 kb |
| Host | smart-8b1c23af-cf7b-4067-8792-5ac6b110e2c8 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2546911651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.2546911651 |
| Directory | /workspace/13.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/13.usbdev_iso_retraction.3302858230 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 5764789271 ps |
| CPU time | 41.04 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:35:34 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-9ffb6cab-34fa-4f86-b14e-f355ccfc6602 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3302858230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.3302858230 |
| Directory | /workspace/13.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/13.usbdev_link_in_err.3741633252 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 238135893 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:34:48 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-0a4813fa-aa81-4c8d-96c1-5a3bf5d2e3ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37416 33252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_link_in_err.3741633252 |
| Directory | /workspace/13.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/13.usbdev_link_resume.3854780217 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 5381499376 ps |
| CPU time | 8.98 seconds |
| Started | Aug 16 05:34:46 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 216528 kb |
| Host | smart-557a8d2a-be97-46dd-8508-3e222d92df52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38547 80217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_link_resume.3854780217 |
| Directory | /workspace/13.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/13.usbdev_link_suspend.3542531768 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 3703711911 ps |
| CPU time | 5.37 seconds |
| Started | Aug 16 05:34:49 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-9ccc1046-e4a0-4900-be6b-dbb0ded258ed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35425 31768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_link_suspend.3542531768 |
| Directory | /workspace/13.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/13.usbdev_low_speed_traffic.3859763783 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 4822462507 ps |
| CPU time | 37.49 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:35:31 PM PDT 24 |
| Peak memory | 224172 kb |
| Host | smart-0c0e372d-f70e-4022-bbbb-d8d82636d44a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3859763783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.3859763783 |
| Directory | /workspace/13.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_inter_pkt_delay.2300353318 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 2743666275 ps |
| CPU time | 26.08 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:35:19 PM PDT 24 |
| Peak memory | 217840 kb |
| Host | smart-dc40bafc-62f8-465d-af57-17b3ab3ae662 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2300353318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.2300353318 |
| Directory | /workspace/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_length_in_transaction.3510234 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 237095104 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:34:48 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-359804b6-87d2-4548-8c72-23403f766d98 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3510234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.3510234 |
| Directory | /workspace/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_length_out_transaction.3387750472 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 190641606 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:34:52 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c739963a-aae8-478e-bc7c-e7a8713aa0cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33877 50472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.3387750472 |
| Directory | /workspace/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_non_iso_usb_traffic.310286931 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 1693639904 ps |
| CPU time | 17.39 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:35:09 PM PDT 24 |
| Peak memory | 217428 kb |
| Host | smart-47099a69-2777-4e0d-95d0-fef2008e9436 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31028 6931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.310286931 |
| Directory | /workspace/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/13.usbdev_max_usb_traffic.657699803 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 2151518076 ps |
| CPU time | 23.27 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:35:16 PM PDT 24 |
| Peak memory | 218292 kb |
| Host | smart-27d6e1d0-09bd-4567-87f6-a07e80251811 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=657699803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.657699803 |
| Directory | /workspace/13.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/13.usbdev_min_inter_pkt_delay.2641543164 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 1623176143 ps |
| CPU time | 16.73 seconds |
| Started | Aug 16 05:34:46 PM PDT 24 |
| Finished | Aug 16 05:35:03 PM PDT 24 |
| Peak memory | 217468 kb |
| Host | smart-81a0270a-0977-4de3-9a13-cd99a42a6654 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2641543164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.2641543164 |
| Directory | /workspace/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/13.usbdev_min_length_in_transaction.150461701 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 151362027 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-b8cddc08-b3a5-4572-a603-cf2435c38cbc |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=150461701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.150461701 |
| Directory | /workspace/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_nak_trans.161324180 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 191074244 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-bd3e3d15-c7af-4178-be28-d4598ed40e40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16132 4180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_nak_trans.161324180 |
| Directory | /workspace/13.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_out_iso.3765571138 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 186704183 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:34:52 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-0e3f958e-061d-480e-a16a-2fb176e50263 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37655 71138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_out_iso.3765571138 |
| Directory | /workspace/13.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/13.usbdev_out_stall.562249436 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 168212636 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-090ecb08-325d-4790-8f3b-9f6342471e09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56224 9436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_out_stall.562249436 |
| Directory | /workspace/13.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/13.usbdev_out_trans_nak.3907811124 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 157738841 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:34:52 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-5d55a40f-c38c-411d-aefc-17d28fe02a11 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39078 11124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_out_trans_nak.3907811124 |
| Directory | /workspace/13.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/13.usbdev_pending_in_trans.135779499 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 168691744 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-5af9d56e-abaa-4507-a7bb-77c8829cabf2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13577 9499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pending_in_trans.135779499 |
| Directory | /workspace/13.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_phy_config_pinflip.2778166941 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 176948180 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-46cdf342-3880-4f92-88c6-51e8ef60fe2a |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2778166941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.2778166941 |
| Directory | /workspace/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/13.usbdev_phy_config_usb_ref_disable.2137318331 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 161811720 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-9a192144-488c-4870-aeb1-07b32d4aa1ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21373 18331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2137318331 |
| Directory | /workspace/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/13.usbdev_phy_pins_sense.817741474 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 44898017 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-1a52df00-b531-4fed-a451-b9a17fd84186 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81774 1474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.817741474 |
| Directory | /workspace/13.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/13.usbdev_pkt_buffer.2721798266 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 11644886582 ps |
| CPU time | 30.72 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:35:25 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-de5a9779-aac3-4d96-9a9e-4ed5dfd44bed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27217 98266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pkt_buffer.2721798266 |
| Directory | /workspace/13.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/13.usbdev_pkt_received.2699208411 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 173657514 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:34:54 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-c8a9b76d-42e4-400f-8fbd-0fff39ac4f61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26992 08411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pkt_received.2699208411 |
| Directory | /workspace/13.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/13.usbdev_pkt_sent.3221667435 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 236221494 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-010116d6-7e1d-47bc-af2b-223de5945134 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32216 67435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pkt_sent.3221667435 |
| Directory | /workspace/13.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/13.usbdev_random_length_in_transaction.3888410854 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 241091163 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-b2c94b7d-5d26-4dfb-97c4-393524c1f878 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38884 10854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_in_transaction.3888410854 |
| Directory | /workspace/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_random_length_out_transaction.743140900 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 208621798 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:35:01 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-25dcc284-ee15-4040-98da-e406135cbcef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74314 0900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.743140900 |
| Directory | /workspace/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/13.usbdev_resume_link_active.1216815902 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 20211084730 ps |
| CPU time | 24.08 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:35:20 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-0a4bb9ca-06e6-47dc-a72c-b8e09b0fa1be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12168 15902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_resume_link_active.1216815902 |
| Directory | /workspace/13.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/13.usbdev_rx_crc_err.909094007 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 139249310 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:34:58 PM PDT 24 |
| Finished | Aug 16 05:34:59 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-008ceecc-916e-4d20-b0a8-3c570266b6c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90909 4007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_rx_crc_err.909094007 |
| Directory | /workspace/13.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/13.usbdev_rx_full.1034619383 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 389285565 ps |
| CPU time | 1.4 seconds |
| Started | Aug 16 05:34:58 PM PDT 24 |
| Finished | Aug 16 05:35:00 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-688b1e24-fdd1-45d7-a4b4-7eb679ad0ac6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10346 19383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_rx_full.1034619383 |
| Directory | /workspace/13.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/13.usbdev_setup_stage.301597252 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 152698213 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:34:58 PM PDT 24 |
| Finished | Aug 16 05:34:59 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-276bf95b-2bd2-40d1-8d4a-768e02cca4d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30159 7252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_setup_stage.301597252 |
| Directory | /workspace/13.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/13.usbdev_setup_trans_ignored.2626331303 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 202111290 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-32760fb2-a833-407b-a61b-ceaf148718ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26263 31303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_setup_trans_ignored.2626331303 |
| Directory | /workspace/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/13.usbdev_smoke.2225767808 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 254771616 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:34:58 PM PDT 24 |
| Finished | Aug 16 05:35:00 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-4ed30640-2d10-42f3-bb0d-6dc83064ff81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22257 67808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.2225767808 |
| Directory | /workspace/13.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/13.usbdev_stall_priority_over_nak.1267712470 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 152323983 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-bd1e7297-1eb5-4bc1-aa6e-d153df40727f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12677 12470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.1267712470 |
| Directory | /workspace/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/13.usbdev_stall_trans.3069175005 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 192944976 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-cb5bfdda-9c87-4e48-b932-f7ca45cb2cf7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30691 75005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_trans.3069175005 |
| Directory | /workspace/13.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/13.usbdev_stream_len_max.1896271240 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 1105357251 ps |
| CPU time | 2.67 seconds |
| Started | Aug 16 05:34:58 PM PDT 24 |
| Finished | Aug 16 05:35:01 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-1679e311-c5c7-496b-a9bf-78266f817f3d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18962 71240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.1896271240 |
| Directory | /workspace/13.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/13.usbdev_streaming_out.1746910599 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 2965214935 ps |
| CPU time | 24.03 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:35:18 PM PDT 24 |
| Peak memory | 224168 kb |
| Host | smart-16852bd1-969e-4fb2-ac15-48f4019971c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17469 10599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_streaming_out.1746910599 |
| Directory | /workspace/13.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/13.usbdev_timeout_missing_host_handshake.984938399 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 452893232 ps |
| CPU time | 8.07 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:35:00 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-dfc88214-a387-4504-b12f-31a1c75fd4a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=984938399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host _handshake.984938399 |
| Directory | /workspace/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/13.usbdev_tx_rx_disruption.754815709 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 418773172 ps |
| CPU time | 1.35 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:34:54 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-64e545ba-c42d-4f69-ae16-91fc02c2d8bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=754815709 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 13.usbdev_tx_rx_disruption.754815709 |
| Directory | /workspace/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/130.usbdev_endpoint_types.1406960896 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 712849444 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-90684a7b-17c1-4a02-a4c5-60a35db8c7f9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1406960896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.1406960896 |
| Directory | /workspace/130.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/130.usbdev_tx_rx_disruption.1693720895 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 503595860 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:40:05 PM PDT 24 |
| Finished | Aug 16 05:40:06 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-8b8dc277-0f44-431d-95a0-07f3e770a2e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1693720895 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 130.usbdev_tx_rx_disruption.1693720895 |
| Directory | /workspace/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/131.usbdev_endpoint_types.3301943774 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 183933357 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:59 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d0e4b38e-dda7-4adf-b41a-19bb31f77ea3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3301943774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.3301943774 |
| Directory | /workspace/131.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/131.usbdev_tx_rx_disruption.1827256902 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 501135998 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-962bbb00-4f18-4540-b2a3-e5e99c13edf7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1827256902 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 131.usbdev_tx_rx_disruption.1827256902 |
| Directory | /workspace/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/132.usbdev_endpoint_types.2270589081 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 439265142 ps |
| CPU time | 1.24 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-02f1993f-6bbd-495c-aa81-0347457389d7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2270589081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.2270589081 |
| Directory | /workspace/132.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/133.usbdev_endpoint_types.1761756522 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 649709543 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:01 PM PDT 24 |
| Finished | Aug 16 05:40:03 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-e03a1255-b741-4a6b-9426-e047ebdce76d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1761756522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.1761756522 |
| Directory | /workspace/133.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/133.usbdev_tx_rx_disruption.3373536911 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 491622553 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:40:11 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-6baa253c-30e7-4ab2-89ef-9ad207475e3e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3373536911 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 133.usbdev_tx_rx_disruption.3373536911 |
| Directory | /workspace/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/134.usbdev_endpoint_types.3890613178 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 264064561 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:40:09 PM PDT 24 |
| Finished | Aug 16 05:40:10 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-a512e254-ac63-44cc-9598-83de14260b1f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3890613178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.3890613178 |
| Directory | /workspace/134.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/134.usbdev_tx_rx_disruption.3685210824 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 498093774 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:05 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-32ec8602-39c4-48f3-a585-9d5579f9bf4e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3685210824 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 134.usbdev_tx_rx_disruption.3685210824 |
| Directory | /workspace/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/135.usbdev_endpoint_types.921941281 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 498392512 ps |
| CPU time | 1.35 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-12dce979-3a99-439e-994c-8fbf88f76642 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=921941281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.921941281 |
| Directory | /workspace/135.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/135.usbdev_tx_rx_disruption.3836400948 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 479738769 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:39:50 PM PDT 24 |
| Finished | Aug 16 05:39:51 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-2d5625d5-5070-4a08-9804-cb78d9e734ef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3836400948 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 135.usbdev_tx_rx_disruption.3836400948 |
| Directory | /workspace/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/136.usbdev_endpoint_types.2443113399 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 354100391 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-8c4050c9-32b5-43ea-965a-48a0b6747ad7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2443113399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.2443113399 |
| Directory | /workspace/136.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/136.usbdev_tx_rx_disruption.2020151350 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 585850612 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:39:48 PM PDT 24 |
| Finished | Aug 16 05:39:50 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9ca9a2df-597f-4bcc-ba79-bdb2ecf01295 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2020151350 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 136.usbdev_tx_rx_disruption.2020151350 |
| Directory | /workspace/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/137.usbdev_endpoint_types.3043939029 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 278463656 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-f9dbcd00-0712-4b0b-8b8b-bbdaefcd60e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3043939029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.3043939029 |
| Directory | /workspace/137.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/137.usbdev_tx_rx_disruption.858315130 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 523256083 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:02 PM PDT 24 |
| Finished | Aug 16 05:40:04 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-8bbaf185-2422-4690-b6e1-0f5f8fcad6ca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=858315130 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 137.usbdev_tx_rx_disruption.858315130 |
| Directory | /workspace/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/138.usbdev_endpoint_types.111337566 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 709309096 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-7dbed6fe-be55-4538-8b9a-cff4285925ae |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=111337566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.111337566 |
| Directory | /workspace/138.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/138.usbdev_tx_rx_disruption.1143361357 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 596060956 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-b3c0e8b5-9956-420c-870d-ff687865f878 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1143361357 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 138.usbdev_tx_rx_disruption.1143361357 |
| Directory | /workspace/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/139.usbdev_endpoint_types.2551731997 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 303898850 ps |
| CPU time | 1.22 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:05 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-255b005e-c98f-47b0-8ee4-7d6996307343 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2551731997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.2551731997 |
| Directory | /workspace/139.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/139.usbdev_tx_rx_disruption.1480912846 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 503530776 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-d2817313-234a-4b5b-8bf2-b6efaf1b6df6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1480912846 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 139.usbdev_tx_rx_disruption.1480912846 |
| Directory | /workspace/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/14.usbdev_alert_test.1853325954 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 50081878 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-7cd61d4e-4b8f-4ebf-9663-04c26d060298 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1853325954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.1853325954 |
| Directory | /workspace/14.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/14.usbdev_aon_wake_disconnect.1346383613 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 8984283722 ps |
| CPU time | 12.46 seconds |
| Started | Aug 16 05:35:00 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207896 kb |
| Host | smart-822f9a1c-50cd-4b78-80eb-8366676e8aa6 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1346383613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_a on_wake_disconnect.1346383613 |
| Directory | /workspace/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/14.usbdev_aon_wake_reset.1353017068 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 14789422739 ps |
| CPU time | 17.41 seconds |
| Started | Aug 16 05:34:47 PM PDT 24 |
| Finished | Aug 16 05:35:04 PM PDT 24 |
| Peak memory | 216020 kb |
| Host | smart-5fbdf3a4-c8c1-414f-9aa8-35467eb63eb0 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1353017068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.1353017068 |
| Directory | /workspace/14.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/14.usbdev_aon_wake_resume.226390275 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 29925557771 ps |
| CPU time | 33.55 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:35:27 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-50618d16-a213-45e0-be75-9c4a0966ef4d |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=226390275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_ao n_wake_resume.226390275 |
| Directory | /workspace/14.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/14.usbdev_av_buffer.696667047 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 142256566 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:00 PM PDT 24 |
| Finished | Aug 16 05:35:01 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-58b62ead-8930-4d4c-8849-8fabf18694d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69666 7047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_av_buffer.696667047 |
| Directory | /workspace/14.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/14.usbdev_bitstuff_err.3314558376 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 152355145 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-420b6fa3-2a94-44d0-8502-f54af19c7c78 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33145 58376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_bitstuff_err.3314558376 |
| Directory | /workspace/14.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/14.usbdev_data_toggle_clear.1743459047 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 468820944 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:34:57 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-eaeee195-828a-41b8-af54-382b963681e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17434 59047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_clear.1743459047 |
| Directory | /workspace/14.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/14.usbdev_data_toggle_restore.160409840 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 996985226 ps |
| CPU time | 2.51 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-8decf191-4b2b-41fe-87b5-7f1a173770e5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=160409840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.160409840 |
| Directory | /workspace/14.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/14.usbdev_device_timeout.2224407597 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 146926448 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:34:59 PM PDT 24 |
| Finished | Aug 16 05:35:00 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-b427dd6f-c6cf-463d-9662-9461d7ce0943 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2224407597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.2224407597 |
| Directory | /workspace/14.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/14.usbdev_disable_endpoint.3281895794 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 490864759 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:34:51 PM PDT 24 |
| Finished | Aug 16 05:34:52 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-379ebba7-6210-4a28-94b3-a1bf12762b50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32818 95794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disable_endpoint.3281895794 |
| Directory | /workspace/14.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/14.usbdev_disconnected.110209407 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 169466104 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-574df0d9-07c8-472b-bc31-87d77ce46a94 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11020 9407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disconnected.110209407 |
| Directory | /workspace/14.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/14.usbdev_enable.2058997093 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 37323594 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:34:54 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-3f4169a0-fb24-4c0f-9aaa-0191d7a30933 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20589 97093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_enable.2058997093 |
| Directory | /workspace/14.usbdev_enable/latest |
| Test location | /workspace/coverage/default/14.usbdev_endpoint_access.3473030841 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 872381814 ps |
| CPU time | 2.46 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:34:59 PM PDT 24 |
| Peak memory | 207916 kb |
| Host | smart-18ce6b23-02f2-4fb4-8a63-cb1734fc5e38 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34730 30841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.3473030841 |
| Directory | /workspace/14.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/14.usbdev_fifo_rst.580505551 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 196345716 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:34:59 PM PDT 24 |
| Finished | Aug 16 05:35:01 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-24132c5b-4c5b-47df-9beb-7fd04088e579 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58050 5551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_fifo_rst.580505551 |
| Directory | /workspace/14.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/14.usbdev_in_iso.2417272245 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 190726513 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:35:00 PM PDT 24 |
| Finished | Aug 16 05:35:01 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-197ddfcc-d52c-4842-8438-f19764936fe2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2417272245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.2417272245 |
| Directory | /workspace/14.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/14.usbdev_in_stall.541723321 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 142567694 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-c076d2fc-c9de-4c16-bd66-137f2e8535a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54172 3321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_in_stall.541723321 |
| Directory | /workspace/14.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/14.usbdev_in_trans.1022284437 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 220767911 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-912a0fe1-73e9-4a96-ba2d-1996ee9c202e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10222 84437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_in_trans.1022284437 |
| Directory | /workspace/14.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_invalid_sync.3652210797 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 3462146676 ps |
| CPU time | 35.57 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:35:32 PM PDT 24 |
| Peak memory | 217228 kb |
| Host | smart-a971c033-3457-4730-bc07-c53f86499d06 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3652210797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.3652210797 |
| Directory | /workspace/14.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/14.usbdev_iso_retraction.2670966199 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 8029893443 ps |
| CPU time | 89.84 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:36:32 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-3b08bf9a-bc36-4d23-ba6e-bd101742d9bd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2670966199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.2670966199 |
| Directory | /workspace/14.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/14.usbdev_link_in_err.103984039 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 165776654 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:34:58 PM PDT 24 |
| Finished | Aug 16 05:34:59 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-7c55f71c-373e-4cd7-8526-08c5afde5081 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10398 4039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_link_in_err.103984039 |
| Directory | /workspace/14.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/14.usbdev_link_resume.1922220359 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 7199726034 ps |
| CPU time | 10.28 seconds |
| Started | Aug 16 05:34:58 PM PDT 24 |
| Finished | Aug 16 05:35:08 PM PDT 24 |
| Peak memory | 216680 kb |
| Host | smart-459c0b40-5cef-426c-9013-e7ec38abd3ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19222 20359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_link_resume.1922220359 |
| Directory | /workspace/14.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/14.usbdev_link_suspend.800265360 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 10924505965 ps |
| CPU time | 14.96 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:35:11 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-a3b477e8-8bf2-4657-8eed-d33e08163629 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80026 5360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_link_suspend.800265360 |
| Directory | /workspace/14.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/14.usbdev_low_speed_traffic.3296906462 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 3556564964 ps |
| CPU time | 104.15 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 218268 kb |
| Host | smart-b05c8fb9-840a-4f4c-86cc-f228e2bc3454 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3296906462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.3296906462 |
| Directory | /workspace/14.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_inter_pkt_delay.1524164448 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 2664417757 ps |
| CPU time | 21.59 seconds |
| Started | Aug 16 05:34:53 PM PDT 24 |
| Finished | Aug 16 05:35:14 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-f577b0b1-e220-462b-852a-94683f4a4d1e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1524164448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.1524164448 |
| Directory | /workspace/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_length_in_transaction.1932317359 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 242049776 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:35:06 PM PDT 24 |
| Finished | Aug 16 05:35:07 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-6924e234-9939-4cc8-841d-ed9016e9725f |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1932317359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.1932317359 |
| Directory | /workspace/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_length_out_transaction.1884020915 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 198447086 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:34:57 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-4688a027-a0fc-4a89-ab4e-866fc955cfc3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18840 20915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.1884020915 |
| Directory | /workspace/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_non_iso_usb_traffic.1376286362 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 2202744477 ps |
| CPU time | 64.93 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:36:01 PM PDT 24 |
| Peak memory | 217416 kb |
| Host | smart-6eae8e87-08fa-48ac-94ef-dc57700cdb9e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13762 86362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.1376286362 |
| Directory | /workspace/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/14.usbdev_max_usb_traffic.3278450025 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 1911848875 ps |
| CPU time | 52.95 seconds |
| Started | Aug 16 05:34:59 PM PDT 24 |
| Finished | Aug 16 05:35:52 PM PDT 24 |
| Peak memory | 217556 kb |
| Host | smart-be5bea3e-d97d-406f-bb32-f0679048e93a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3278450025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.3278450025 |
| Directory | /workspace/14.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/14.usbdev_min_inter_pkt_delay.126587767 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 1722955038 ps |
| CPU time | 13.01 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:35:08 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-89866217-9d04-4333-8a39-16cf3796a3cb |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=126587767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.126587767 |
| Directory | /workspace/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/14.usbdev_min_length_in_transaction.1310587098 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 165358161 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-9c5e336f-df91-4dec-87fd-3e0e2d90c8aa |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1310587098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.1310587098 |
| Directory | /workspace/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_min_length_out_transaction.1960773941 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 147426847 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-236c92e1-3d93-4ee5-8775-540b17c98ed6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19607 73941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.1960773941 |
| Directory | /workspace/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_out_iso.4094071661 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 181413142 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-eda0f26c-de9f-4b69-b186-25355bfab129 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40940 71661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_out_iso.4094071661 |
| Directory | /workspace/14.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/14.usbdev_out_stall.1481060934 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 171165519 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:34:55 PM PDT 24 |
| Finished | Aug 16 05:34:56 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-339ea8ec-bfb7-4539-8e53-558cbcad1806 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14810 60934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_out_stall.1481060934 |
| Directory | /workspace/14.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/14.usbdev_out_trans_nak.108615374 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 163398059 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:34:58 PM PDT 24 |
| Finished | Aug 16 05:34:59 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-47cd8850-f3fc-4cac-9c4f-2677b9639995 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10861 5374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_out_trans_nak.108615374 |
| Directory | /workspace/14.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/14.usbdev_pending_in_trans.1356843364 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 152357633 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-f18e6f15-27dc-4258-b108-526de74809b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13568 43364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pending_in_trans.1356843364 |
| Directory | /workspace/14.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_phy_config_pinflip.2005830612 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 228110503 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:34:52 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-a81d4f07-b9e0-4d93-baa2-57d1566667d1 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2005830612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.2005830612 |
| Directory | /workspace/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/14.usbdev_phy_config_usb_ref_disable.808222107 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 148725631 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:05 PM PDT 24 |
| Finished | Aug 16 05:35:06 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-e6df1dde-fcdf-47ed-a010-655f62151de0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80822 2107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.808222107 |
| Directory | /workspace/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/14.usbdev_phy_pins_sense.2464497478 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 47130499 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:01 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-e3c5d0ad-3046-412d-9241-5a6d86932092 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24644 97478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.2464497478 |
| Directory | /workspace/14.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/14.usbdev_pkt_buffer.3070111349 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 7549685768 ps |
| CPU time | 19.64 seconds |
| Started | Aug 16 05:35:08 PM PDT 24 |
| Finished | Aug 16 05:35:28 PM PDT 24 |
| Peak memory | 215856 kb |
| Host | smart-5a5d5e5f-620a-42aa-9c86-27ad2de8178e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30701 11349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pkt_buffer.3070111349 |
| Directory | /workspace/14.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/14.usbdev_pkt_received.2665417390 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 144368089 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:02 PM PDT 24 |
| Finished | Aug 16 05:35:03 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-bb5b456a-e722-45f9-9842-fa1e01a7a764 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26654 17390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pkt_received.2665417390 |
| Directory | /workspace/14.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/14.usbdev_pkt_sent.2808640519 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 202749972 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:35:07 PM PDT 24 |
| Finished | Aug 16 05:35:08 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-8eaa60c1-dcc2-4342-88a3-89a5823c3f06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28086 40519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pkt_sent.2808640519 |
| Directory | /workspace/14.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/14.usbdev_random_length_in_transaction.743812438 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 228416861 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:00 PM PDT 24 |
| Finished | Aug 16 05:35:01 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-e601823a-9585-4048-9f8c-a2bc1a05ee87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74381 2438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_in_transaction.743812438 |
| Directory | /workspace/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_random_length_out_transaction.4287459421 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 212281375 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:35:05 PM PDT 24 |
| Finished | Aug 16 05:35:06 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9827f4a4-e1e9-4325-9632-57517b69e8d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42874 59421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.4287459421 |
| Directory | /workspace/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/14.usbdev_resume_link_active.1321107017 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 20181650698 ps |
| CPU time | 22.57 seconds |
| Started | Aug 16 05:35:17 PM PDT 24 |
| Finished | Aug 16 05:35:39 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-594f50ba-419a-44a9-aa58-bc748570cb46 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13211 07017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_resume_link_active.1321107017 |
| Directory | /workspace/14.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/14.usbdev_rx_crc_err.1933598188 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 186182273 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:04 PM PDT 24 |
| Finished | Aug 16 05:35:05 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-16d19a67-6341-49d2-91f2-abb30a54ff79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19335 98188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_rx_crc_err.1933598188 |
| Directory | /workspace/14.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/14.usbdev_setup_stage.108187459 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 151010214 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:35:25 PM PDT 24 |
| Finished | Aug 16 05:35:26 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-06b6b33c-da72-47cc-864d-7e7c5e2bac0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10818 7459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_setup_stage.108187459 |
| Directory | /workspace/14.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/14.usbdev_setup_trans_ignored.1372640464 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 174978196 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:03 PM PDT 24 |
| Finished | Aug 16 05:35:04 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-30fe577d-df7d-4288-9239-ce9d1747a6d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13726 40464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_setup_trans_ignored.1372640464 |
| Directory | /workspace/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/14.usbdev_smoke.2630844769 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 258201160 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:35:02 PM PDT 24 |
| Finished | Aug 16 05:35:03 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-5afe7ba2-7d59-48a9-bd8d-2027f0079e03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26308 44769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.2630844769 |
| Directory | /workspace/14.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/14.usbdev_spurious_pids_ignored.4062532910 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 2963135684 ps |
| CPU time | 30.87 seconds |
| Started | Aug 16 05:34:59 PM PDT 24 |
| Finished | Aug 16 05:35:30 PM PDT 24 |
| Peak memory | 217004 kb |
| Host | smart-b4c906cd-8df0-4757-b7ef-287c96965bb5 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4062532910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.4062532910 |
| Directory | /workspace/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/14.usbdev_stall_trans.3099866009 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 188914078 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-87bd6610-f174-4552-932c-b53c56ee19ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30998 66009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_trans.3099866009 |
| Directory | /workspace/14.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/14.usbdev_stream_len_max.3022785762 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 932980002 ps |
| CPU time | 2.4 seconds |
| Started | Aug 16 05:35:03 PM PDT 24 |
| Finished | Aug 16 05:35:06 PM PDT 24 |
| Peak memory | 207856 kb |
| Host | smart-f898e8fa-969c-4e8a-b6a5-62878a7d0b7d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30227 85762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.3022785762 |
| Directory | /workspace/14.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/14.usbdev_streaming_out.1481198584 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 2333959751 ps |
| CPU time | 22.51 seconds |
| Started | Aug 16 05:35:15 PM PDT 24 |
| Finished | Aug 16 05:35:38 PM PDT 24 |
| Peak memory | 217044 kb |
| Host | smart-de15860a-60d0-4b42-bb46-726265511184 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14811 98584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_streaming_out.1481198584 |
| Directory | /workspace/14.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/14.usbdev_timeout_missing_host_handshake.699506375 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 857542653 ps |
| CPU time | 17.68 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:35:14 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-e668a1cc-6e0a-4303-bd7a-0447944a8219 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=699506375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host _handshake.699506375 |
| Directory | /workspace/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/14.usbdev_tx_rx_disruption.1809407214 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 565150860 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:35:03 PM PDT 24 |
| Finished | Aug 16 05:35:04 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-8d9e5cf3-72df-4dd0-aa9e-b1882e42604e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1809407214 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_tx_rx_disruption.1809407214 |
| Directory | /workspace/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/140.usbdev_endpoint_types.3055729714 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 290075226 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:40:09 PM PDT 24 |
| Finished | Aug 16 05:40:11 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-ffba41cd-dd3b-49fa-bbbe-ad9d34e86fd7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3055729714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.3055729714 |
| Directory | /workspace/140.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/140.usbdev_tx_rx_disruption.4127308627 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 613593477 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-4f8ebba9-eb36-4d38-91cd-1c3b7dd1fd1e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4127308627 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 140.usbdev_tx_rx_disruption.4127308627 |
| Directory | /workspace/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/141.usbdev_endpoint_types.2295230231 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 477585612 ps |
| CPU time | 1.4 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d9c57d97-5b2d-403d-b561-125ee44e45b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2295230231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.2295230231 |
| Directory | /workspace/141.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/141.usbdev_tx_rx_disruption.1465078003 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 460155095 ps |
| CPU time | 1.43 seconds |
| Started | Aug 16 05:39:57 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-bda5ef7d-4e59-4b9c-875e-316dd3272e1e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1465078003 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 141.usbdev_tx_rx_disruption.1465078003 |
| Directory | /workspace/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/142.usbdev_tx_rx_disruption.4228608179 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 549247504 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-ae9a2378-2bbc-46ff-842b-28d20ce286dd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4228608179 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 142.usbdev_tx_rx_disruption.4228608179 |
| Directory | /workspace/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/143.usbdev_endpoint_types.834011593 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 509095408 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-b9d414e9-5c67-4c32-8140-a06d9334a8d9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=834011593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.834011593 |
| Directory | /workspace/143.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/143.usbdev_tx_rx_disruption.3015100389 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 651363363 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-58cde72c-2a4e-43ca-81c2-bcf71679846e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3015100389 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 143.usbdev_tx_rx_disruption.3015100389 |
| Directory | /workspace/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/144.usbdev_endpoint_types.3225970249 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 241717849 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-4aef8db2-ea3c-4d92-a909-3e84f5da1ffa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3225970249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.3225970249 |
| Directory | /workspace/144.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/144.usbdev_tx_rx_disruption.2072085976 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 525743765 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-635a2761-4cea-4b60-9bd9-e5f1979dc277 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2072085976 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 144.usbdev_tx_rx_disruption.2072085976 |
| Directory | /workspace/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/145.usbdev_endpoint_types.3933861167 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 418218819 ps |
| CPU time | 1.26 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-cc2ae123-850a-4281-905c-23260e3fb2a4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3933861167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.3933861167 |
| Directory | /workspace/145.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/145.usbdev_tx_rx_disruption.1701849556 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 675603574 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-5084dfc8-ddf9-42ac-a479-ded83f3377ec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1701849556 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 145.usbdev_tx_rx_disruption.1701849556 |
| Directory | /workspace/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/146.usbdev_endpoint_types.2575257653 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 183176163 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-c727e900-d9c4-4a19-a27d-9e93fac72e25 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2575257653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.2575257653 |
| Directory | /workspace/146.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/146.usbdev_tx_rx_disruption.3716242467 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 479253309 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-724ca9ca-9d62-47f4-ba36-72f0fc4277f6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3716242467 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 146.usbdev_tx_rx_disruption.3716242467 |
| Directory | /workspace/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/147.usbdev_endpoint_types.904959091 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 544874833 ps |
| CPU time | 1.37 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-0593ce15-e541-4fa9-b94a-777002294962 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=904959091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.904959091 |
| Directory | /workspace/147.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/147.usbdev_tx_rx_disruption.348797546 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 495285471 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-149d2474-15cf-4529-bd0f-f0654e12e8d1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=348797546 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 147.usbdev_tx_rx_disruption.348797546 |
| Directory | /workspace/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/148.usbdev_endpoint_types.994959068 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 179757713 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6b7462df-e257-4438-ad65-db77e0d8c7c1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=994959068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.994959068 |
| Directory | /workspace/148.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/148.usbdev_tx_rx_disruption.3189023936 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 613002263 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-7dc3f7b0-d0ec-4d7e-9b83-294a07037550 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3189023936 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 148.usbdev_tx_rx_disruption.3189023936 |
| Directory | /workspace/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/149.usbdev_endpoint_types.1308111707 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 188637536 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-43f90261-be82-44d0-afbb-342c1b58826d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1308111707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.1308111707 |
| Directory | /workspace/149.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/149.usbdev_tx_rx_disruption.1329227804 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 490522882 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:23 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-83a737d0-5b5b-49aa-b0a7-db0416aa0790 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1329227804 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 149.usbdev_tx_rx_disruption.1329227804 |
| Directory | /workspace/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/15.usbdev_alert_test.776799641 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 80430778 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:35:06 PM PDT 24 |
| Finished | Aug 16 05:35:07 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-cee078ed-d691-4fa3-bdae-63172936a520 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=776799641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.776799641 |
| Directory | /workspace/15.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/15.usbdev_aon_wake_disconnect.654825829 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 10796008115 ps |
| CPU time | 14 seconds |
| Started | Aug 16 05:34:58 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-703291e3-1582-4a00-81fd-4c4f23d2b10a |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=654825829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_ao n_wake_disconnect.654825829 |
| Directory | /workspace/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/15.usbdev_aon_wake_reset.3425487387 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 13442750165 ps |
| CPU time | 20.17 seconds |
| Started | Aug 16 05:35:03 PM PDT 24 |
| Finished | Aug 16 05:35:23 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-04302bcc-09fa-44c2-bbdc-6940a7d48b95 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3425487387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.3425487387 |
| Directory | /workspace/15.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/15.usbdev_aon_wake_resume.2373169206 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 23322009413 ps |
| CPU time | 28.22 seconds |
| Started | Aug 16 05:35:18 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-bf45354b-2854-4701-9dba-5ec2605cd7f2 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2373169206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_a on_wake_resume.2373169206 |
| Directory | /workspace/15.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/15.usbdev_av_buffer.1241460562 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 162746480 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:34:57 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-8c67df13-9dee-4a9e-b4df-05b613cb42dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12414 60562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_av_buffer.1241460562 |
| Directory | /workspace/15.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/15.usbdev_bitstuff_err.697585545 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 188102911 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:02 PM PDT 24 |
| Finished | Aug 16 05:35:03 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-2422ad04-ac54-4af8-b6a8-71df0c9a9693 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69758 5545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_bitstuff_err.697585545 |
| Directory | /workspace/15.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/15.usbdev_data_toggle_clear.2756003053 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 350676939 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:35:20 PM PDT 24 |
| Finished | Aug 16 05:35:21 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-2497110a-1b43-4bbf-8699-7ea336a5cd88 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27560 03053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_clear.2756003053 |
| Directory | /workspace/15.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/15.usbdev_data_toggle_restore.3275172680 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 821928073 ps |
| CPU time | 2.4 seconds |
| Started | Aug 16 05:35:00 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-306cf669-80a7-4d68-880e-ebb0fdf03682 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3275172680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.3275172680 |
| Directory | /workspace/15.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/15.usbdev_device_address.1342255752 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 12778869683 ps |
| CPU time | 21.46 seconds |
| Started | Aug 16 05:35:00 PM PDT 24 |
| Finished | Aug 16 05:35:21 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-0904668c-79d7-487d-b349-19c7724ad757 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13422 55752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.1342255752 |
| Directory | /workspace/15.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/15.usbdev_device_timeout.2032509428 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 1000187041 ps |
| CPU time | 21.34 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:30 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-ae44667b-b6b9-492e-ac11-0565c6084002 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2032509428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.2032509428 |
| Directory | /workspace/15.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/15.usbdev_disable_endpoint.7164650 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 660802098 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:35:00 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c2623e5d-2963-4e9d-8ec1-007a82711aae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71646 50 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_disable_endpoint.7164650 |
| Directory | /workspace/15.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/15.usbdev_disconnected.3515991654 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 147165297 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:04 PM PDT 24 |
| Finished | Aug 16 05:35:04 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-0b7d6308-80a0-4d83-ac9d-c012ba67b1a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35159 91654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_disconnected.3515991654 |
| Directory | /workspace/15.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/15.usbdev_enable.2413130851 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 43743136 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-d8905015-d48a-417c-84b0-02143d370b58 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24131 30851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_enable.2413130851 |
| Directory | /workspace/15.usbdev_enable/latest |
| Test location | /workspace/coverage/default/15.usbdev_endpoint_access.1921107550 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 1029131535 ps |
| CPU time | 2.52 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:11 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-a009f261-a56a-44e3-9a78-8262dd242075 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19211 07550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.1921107550 |
| Directory | /workspace/15.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/15.usbdev_endpoint_types.1001509489 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 227093545 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:34:59 PM PDT 24 |
| Finished | Aug 16 05:35:00 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-f235ea15-bf51-46b9-888e-6762868d4473 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1001509489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.1001509489 |
| Directory | /workspace/15.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/15.usbdev_fifo_rst.418782005 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 192672729 ps |
| CPU time | 2.38 seconds |
| Started | Aug 16 05:35:20 PM PDT 24 |
| Finished | Aug 16 05:35:23 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-d1dde649-ce33-4a6a-8eb8-5bb332ad8718 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41878 2005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_fifo_rst.418782005 |
| Directory | /workspace/15.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/15.usbdev_in_iso.1828602247 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 232075362 ps |
| CPU time | 1.16 seconds |
| Started | Aug 16 05:35:08 PM PDT 24 |
| Finished | Aug 16 05:35:09 PM PDT 24 |
| Peak memory | 216944 kb |
| Host | smart-c9e723b6-2fc0-4f64-be4f-5079f01a14c4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1828602247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.1828602247 |
| Directory | /workspace/15.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/15.usbdev_in_stall.4117147850 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 140587294 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:35:04 PM PDT 24 |
| Finished | Aug 16 05:35:05 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-04575f29-b205-44be-8918-7629a71602ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41171 47850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_in_stall.4117147850 |
| Directory | /workspace/15.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/15.usbdev_in_trans.117509032 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 165839223 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:28 PM PDT 24 |
| Finished | Aug 16 05:35:29 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-38736848-1843-4c84-8ef7-4d5584e30268 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11750 9032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_in_trans.117509032 |
| Directory | /workspace/15.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_invalid_sync.1279456843 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 3276580101 ps |
| CPU time | 89.54 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:36:26 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-dae26911-70e4-4259-9b8c-60bff099e414 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1279456843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.1279456843 |
| Directory | /workspace/15.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/15.usbdev_iso_retraction.1038681290 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 7886792201 ps |
| CPU time | 52.68 seconds |
| Started | Aug 16 05:35:03 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-2486e4b8-e0bf-4de1-b1e4-80733402b9f2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1038681290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.1038681290 |
| Directory | /workspace/15.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/15.usbdev_link_in_err.3791711906 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 222145794 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:35:04 PM PDT 24 |
| Finished | Aug 16 05:35:05 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-74ad6f82-a0dc-49c8-927b-d6f71b973854 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37917 11906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_link_in_err.3791711906 |
| Directory | /workspace/15.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/15.usbdev_link_resume.2142714838 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 10059779367 ps |
| CPU time | 14.94 seconds |
| Started | Aug 16 05:34:59 PM PDT 24 |
| Finished | Aug 16 05:35:14 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-9a57c755-5aa7-4909-905a-1cba31dafa54 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21427 14838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_link_resume.2142714838 |
| Directory | /workspace/15.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/15.usbdev_link_suspend.1380465514 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 10265011512 ps |
| CPU time | 12.65 seconds |
| Started | Aug 16 05:34:56 PM PDT 24 |
| Finished | Aug 16 05:35:09 PM PDT 24 |
| Peak memory | 207828 kb |
| Host | smart-4beb9c9e-ee44-4390-b436-b9c047049188 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13804 65514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_link_suspend.1380465514 |
| Directory | /workspace/15.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/15.usbdev_low_speed_traffic.1401560224 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 2913438976 ps |
| CPU time | 24.76 seconds |
| Started | Aug 16 05:35:04 PM PDT 24 |
| Finished | Aug 16 05:35:29 PM PDT 24 |
| Peak memory | 219192 kb |
| Host | smart-aaeea3e7-689e-4803-80d9-3cc21a7be329 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1401560224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.1401560224 |
| Directory | /workspace/15.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_inter_pkt_delay.2045528526 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 2706975866 ps |
| CPU time | 28.66 seconds |
| Started | Aug 16 05:35:06 PM PDT 24 |
| Finished | Aug 16 05:35:35 PM PDT 24 |
| Peak memory | 224012 kb |
| Host | smart-161ac4a1-583a-434d-8aca-44b03959d3de |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2045528526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.2045528526 |
| Directory | /workspace/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_length_in_transaction.750974072 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 233639698 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:35:19 PM PDT 24 |
| Finished | Aug 16 05:35:20 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-04a1b1a4-255e-4631-bbb7-7c3d0e3efa47 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=750974072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.750974072 |
| Directory | /workspace/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_max_length_out_transaction.4228283667 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 192468804 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-fae96a59-694f-4efb-8a36-38be9967c806 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42282 83667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.4228283667 |
| Directory | /workspace/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_min_inter_pkt_delay.2370104076 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 1700757255 ps |
| CPU time | 12.75 seconds |
| Started | Aug 16 05:35:00 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 217336 kb |
| Host | smart-8de0c3f4-7540-41aa-a538-ffc8b891cbc2 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2370104076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.2370104076 |
| Directory | /workspace/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/15.usbdev_min_length_in_transaction.3795174612 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 186847511 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:02 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-d51d0d9b-c3ad-484d-b590-214d70aa0efc |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3795174612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.3795174612 |
| Directory | /workspace/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_min_length_out_transaction.3270965290 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 151140514 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:03 PM PDT 24 |
| Finished | Aug 16 05:35:04 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-8e973fca-0a9a-4495-8b94-05e00c477b56 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32709 65290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.3270965290 |
| Directory | /workspace/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_out_iso.2770336882 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 166195723 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:07 PM PDT 24 |
| Finished | Aug 16 05:35:08 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-31024006-d874-4744-beb1-e760cb2beb24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27703 36882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_out_iso.2770336882 |
| Directory | /workspace/15.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/15.usbdev_out_stall.4244601959 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 176691311 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:10 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-36008365-191d-409b-a51d-8531c64ad52b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42446 01959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_out_stall.4244601959 |
| Directory | /workspace/15.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/15.usbdev_out_trans_nak.81971410 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 189126292 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:57 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-38a955dd-a869-4e17-8bfb-3d5dade0f7ed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81971 410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_out_trans_nak.81971410 |
| Directory | /workspace/15.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/15.usbdev_pending_in_trans.3918502011 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 173948889 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-a573b8c9-e21f-43e4-adf4-4d99ce47c208 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39185 02011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pending_in_trans.3918502011 |
| Directory | /workspace/15.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_phy_config_pinflip.1687148601 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 252487808 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:35:32 PM PDT 24 |
| Finished | Aug 16 05:35:33 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-35c3cf7a-1f6e-4ab3-88c9-6c0bbe1b59ef |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1687148601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.1687148601 |
| Directory | /workspace/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/15.usbdev_phy_config_usb_ref_disable.375714919 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 186471528 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:35:10 PM PDT 24 |
| Finished | Aug 16 05:35:10 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-77f28c06-9b18-4395-ae4b-dc6506c7db6a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37571 4919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.375714919 |
| Directory | /workspace/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/15.usbdev_phy_pins_sense.4010948249 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 57157173 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:35:02 PM PDT 24 |
| Finished | Aug 16 05:35:03 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-5c2484fc-6a83-4d71-b06f-1f1d5e0535f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40109 48249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.4010948249 |
| Directory | /workspace/15.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/15.usbdev_pkt_buffer.4005469804 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 15829066859 ps |
| CPU time | 39.47 seconds |
| Started | Aug 16 05:35:03 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-11d17202-85dd-4445-9d3d-f4e4384b04e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40054 69804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pkt_buffer.4005469804 |
| Directory | /workspace/15.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/15.usbdev_pkt_received.1646749599 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 156180582 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:15 PM PDT 24 |
| Finished | Aug 16 05:35:16 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-794ca1a1-470e-485f-abaf-22b7fa5a2b03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16467 49599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pkt_received.1646749599 |
| Directory | /workspace/15.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/15.usbdev_pkt_sent.715900836 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 242760926 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:35:07 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ab11bbb0-adfe-4cbf-9695-d7ee898631ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71590 0836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_pkt_sent.715900836 |
| Directory | /workspace/15.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/15.usbdev_random_length_in_transaction.3542033838 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 207608710 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:07 PM PDT 24 |
| Finished | Aug 16 05:35:08 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-96ae9b40-6ec2-4aa2-b15c-7123909b7356 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35420 33838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_in_transaction.3542033838 |
| Directory | /workspace/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_random_length_out_transaction.3914020842 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 191787579 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:35:31 PM PDT 24 |
| Finished | Aug 16 05:35:32 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-b19cf4a2-37b0-43b1-82d9-e9cdf44f069a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39140 20842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.3914020842 |
| Directory | /workspace/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/15.usbdev_resume_link_active.2672112316 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 20190021036 ps |
| CPU time | 25.48 seconds |
| Started | Aug 16 05:35:19 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-a6842bd7-4a8b-44af-82a7-97547fa3a78b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26721 12316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_resume_link_active.2672112316 |
| Directory | /workspace/15.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/15.usbdev_rx_crc_err.4098379869 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 149262827 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:35:23 PM PDT 24 |
| Finished | Aug 16 05:35:23 PM PDT 24 |
| Peak memory | 206348 kb |
| Host | smart-0bf52f59-22f4-43b6-a165-2a782b545627 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40983 79869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_rx_crc_err.4098379869 |
| Directory | /workspace/15.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/15.usbdev_rx_full.3527197511 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 318148397 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:10 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-7820ffc3-8d16-4512-aca9-f3886ad5a191 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35271 97511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_rx_full.3527197511 |
| Directory | /workspace/15.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/15.usbdev_setup_stage.1564738317 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 169332160 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:32 PM PDT 24 |
| Finished | Aug 16 05:35:33 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a5d7de2a-8f84-4af1-a188-65d5f5bd9be6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15647 38317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_setup_stage.1564738317 |
| Directory | /workspace/15.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/15.usbdev_setup_trans_ignored.156656947 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 143809805 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-1816cdcf-5cb7-4326-8402-761919dba837 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15665 6947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_setup_trans_ignored.156656947 |
| Directory | /workspace/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/15.usbdev_smoke.510014138 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 220788800 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:35:23 PM PDT 24 |
| Finished | Aug 16 05:35:24 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-ad9025da-78ba-4e70-8379-efb600e17b14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51001 4138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.510014138 |
| Directory | /workspace/15.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/15.usbdev_spurious_pids_ignored.3049245176 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 3286531140 ps |
| CPU time | 34.16 seconds |
| Started | Aug 16 05:35:22 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 217808 kb |
| Host | smart-7c417cf1-19d9-46f6-b90c-292e3cea1d35 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3049245176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.3049245176 |
| Directory | /workspace/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/15.usbdev_stall_priority_over_nak.1495455712 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 194122067 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:10 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-fde4c118-c4aa-4645-be86-c33bea43b86b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14954 55712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.1495455712 |
| Directory | /workspace/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/15.usbdev_stall_trans.1883000421 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 148455780 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:19 PM PDT 24 |
| Finished | Aug 16 05:35:20 PM PDT 24 |
| Peak memory | 206452 kb |
| Host | smart-1f0a6a71-3ec9-48c7-ad00-a3a543969e04 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18830 00421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_trans.1883000421 |
| Directory | /workspace/15.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/15.usbdev_stream_len_max.589262942 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 362026635 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:35:03 PM PDT 24 |
| Finished | Aug 16 05:35:04 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-77c4299a-3d69-48a9-8a4f-7ef8968c9039 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58926 2942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.589262942 |
| Directory | /workspace/15.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/15.usbdev_streaming_out.3130164448 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 2569445771 ps |
| CPU time | 73.7 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:36:25 PM PDT 24 |
| Peak memory | 224024 kb |
| Host | smart-d45ec98d-bd16-4e4f-9b62-18ab04edf60c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31301 64448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_streaming_out.3130164448 |
| Directory | /workspace/15.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/15.usbdev_timeout_missing_host_handshake.3332866557 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 8400283776 ps |
| CPU time | 59.06 seconds |
| Started | Aug 16 05:35:00 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-62d31002-b3a2-453c-aa51-bd33c25118f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3332866557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_hos t_handshake.3332866557 |
| Directory | /workspace/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/15.usbdev_tx_rx_disruption.3153071192 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 492403102 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:35:31 PM PDT 24 |
| Finished | Aug 16 05:35:32 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-8a30d9c4-926b-4524-b4dd-f6ed93d3920e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3153071192 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_tx_rx_disruption.3153071192 |
| Directory | /workspace/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/150.usbdev_tx_rx_disruption.2711416156 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 505050365 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-541c04d8-32bc-4475-aeb6-f5dc4f0e54a0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2711416156 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 150.usbdev_tx_rx_disruption.2711416156 |
| Directory | /workspace/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/151.usbdev_endpoint_types.781625482 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 237247477 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:40:07 PM PDT 24 |
| Finished | Aug 16 05:40:08 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-53b58771-1d29-4a05-8bbe-293e7e36ad86 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=781625482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.781625482 |
| Directory | /workspace/151.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/151.usbdev_tx_rx_disruption.477039271 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 533776094 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-68e0b531-67d7-468e-9840-51efd062f44d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=477039271 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 151.usbdev_tx_rx_disruption.477039271 |
| Directory | /workspace/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/152.usbdev_endpoint_types.1802444233 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 357548655 ps |
| CPU time | 1.2 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-9293dba7-c2f7-4ad9-96f5-dbfe7ee46642 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1802444233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.1802444233 |
| Directory | /workspace/152.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/152.usbdev_tx_rx_disruption.815391986 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 558811479 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-dbe3c50f-943c-4088-bb60-77e1dfe33bbd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=815391986 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 152.usbdev_tx_rx_disruption.815391986 |
| Directory | /workspace/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/153.usbdev_endpoint_types.3418126169 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 353977838 ps |
| CPU time | 1.19 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-d321578c-8fc2-49a7-a22d-874479d2d77b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3418126169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.3418126169 |
| Directory | /workspace/153.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/153.usbdev_tx_rx_disruption.3596211720 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 518400532 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-be383208-0871-47d0-9c1c-b972649dee13 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3596211720 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 153.usbdev_tx_rx_disruption.3596211720 |
| Directory | /workspace/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/154.usbdev_tx_rx_disruption.3970465616 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 479397284 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-d23d7be2-bf43-49f5-a504-4e58edc412a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3970465616 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 154.usbdev_tx_rx_disruption.3970465616 |
| Directory | /workspace/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/155.usbdev_tx_rx_disruption.1071720046 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 528805093 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:29 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-5b6e54d5-627b-4b79-a2a9-3f7a4cf5c855 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1071720046 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 155.usbdev_tx_rx_disruption.1071720046 |
| Directory | /workspace/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/156.usbdev_endpoint_types.2168019443 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 281886598 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:40:11 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-ffd1e631-2718-4d82-8f77-67a1e7fa6bc3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2168019443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.2168019443 |
| Directory | /workspace/156.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/156.usbdev_tx_rx_disruption.617475733 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 440062780 ps |
| CPU time | 1.38 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-fe5e3ab3-8ce7-4d59-b140-410d970a3a76 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=617475733 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 156.usbdev_tx_rx_disruption.617475733 |
| Directory | /workspace/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/157.usbdev_endpoint_types.979783964 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 165717457 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:40:06 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-55d079fc-712d-4f87-97ba-18275e099dc9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=979783964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.979783964 |
| Directory | /workspace/157.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/157.usbdev_tx_rx_disruption.4121886983 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 683383062 ps |
| CPU time | 1.86 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-8b876280-fbef-41f3-8ce7-eb27fe64209d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4121886983 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 157.usbdev_tx_rx_disruption.4121886983 |
| Directory | /workspace/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/158.usbdev_endpoint_types.858226418 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 547967782 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-2e1d2196-2e72-46b5-ac1d-163f18c4fd5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=858226418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.858226418 |
| Directory | /workspace/158.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/158.usbdev_tx_rx_disruption.4023806817 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 614534394 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:28 PM PDT 24 |
| Finished | Aug 16 05:40:30 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-22844d4d-296c-4633-8b62-63bd067e6e90 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4023806817 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 158.usbdev_tx_rx_disruption.4023806817 |
| Directory | /workspace/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/159.usbdev_endpoint_types.2434481446 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 280324238 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-15bbac47-48b3-4654-8b27-e84805ee5ee1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2434481446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.2434481446 |
| Directory | /workspace/159.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/159.usbdev_tx_rx_disruption.4059889145 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 541274927 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-eba5fd89-f5ae-48e6-bb69-eec49dc94989 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4059889145 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 159.usbdev_tx_rx_disruption.4059889145 |
| Directory | /workspace/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/16.usbdev_alert_test.1662105902 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 82623943 ps |
| CPU time | 0.75 seconds |
| Started | Aug 16 05:35:29 PM PDT 24 |
| Finished | Aug 16 05:35:29 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-7e07057f-1587-465a-8ab4-7f52f90441d7 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1662105902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.1662105902 |
| Directory | /workspace/16.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/16.usbdev_aon_wake_disconnect.53793030 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 6417210290 ps |
| CPU time | 8.51 seconds |
| Started | Aug 16 05:35:03 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-6610dcd6-1390-4f94-a8f1-55425c72fbcf |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53793030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon _wake_disconnect.53793030 |
| Directory | /workspace/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/16.usbdev_aon_wake_reset.3780265596 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 15972648510 ps |
| CPU time | 17.63 seconds |
| Started | Aug 16 05:35:10 PM PDT 24 |
| Finished | Aug 16 05:35:28 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-1631da08-b858-47af-819f-0b34d491a130 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3780265596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.3780265596 |
| Directory | /workspace/16.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/16.usbdev_aon_wake_resume.3439373353 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 28741258066 ps |
| CPU time | 43.75 seconds |
| Started | Aug 16 05:35:15 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-91979952-621d-453f-9f0d-4a1a75a926a5 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3439373353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_a on_wake_resume.3439373353 |
| Directory | /workspace/16.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/16.usbdev_av_buffer.1649086596 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 167899518 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:10 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-65f63ec4-de10-4395-9f8f-1b2a390e1f5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16490 86596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_av_buffer.1649086596 |
| Directory | /workspace/16.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/16.usbdev_data_toggle_clear.3554858725 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 308437332 ps |
| CPU time | 1.25 seconds |
| Started | Aug 16 05:35:25 PM PDT 24 |
| Finished | Aug 16 05:35:26 PM PDT 24 |
| Peak memory | 206456 kb |
| Host | smart-c5ce1eb2-2ad9-4e97-97d2-e2236ce7a5f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35548 58725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_clear.3554858725 |
| Directory | /workspace/16.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/16.usbdev_data_toggle_restore.948415831 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 866058760 ps |
| CPU time | 2.31 seconds |
| Started | Aug 16 05:35:21 PM PDT 24 |
| Finished | Aug 16 05:35:24 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-5215218a-c9ac-461f-b43e-4d715dcfec05 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=948415831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.948415831 |
| Directory | /workspace/16.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/16.usbdev_device_address.1035055423 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 17724085923 ps |
| CPU time | 31.99 seconds |
| Started | Aug 16 05:35:02 PM PDT 24 |
| Finished | Aug 16 05:35:34 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-570c4db2-be68-4790-96c7-0f7381b4cc06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10350 55423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.1035055423 |
| Directory | /workspace/16.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/16.usbdev_device_timeout.2403844738 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 2941546456 ps |
| CPU time | 24.86 seconds |
| Started | Aug 16 05:35:17 PM PDT 24 |
| Finished | Aug 16 05:35:42 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-458ada27-4bb1-4bc8-ae8e-c937233a2d73 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2403844738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.2403844738 |
| Directory | /workspace/16.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/16.usbdev_disable_endpoint.755047119 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 1065924807 ps |
| CPU time | 2.25 seconds |
| Started | Aug 16 05:35:05 PM PDT 24 |
| Finished | Aug 16 05:35:08 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-2002c7a7-bb1f-439a-8954-1c3b57d55f66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75504 7119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_disable_endpoint.755047119 |
| Directory | /workspace/16.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/16.usbdev_disconnected.2835014911 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 139971596 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:39 PM PDT 24 |
| Finished | Aug 16 05:35:40 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-e429bb66-a269-420d-87b1-6b124501162c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28350 14911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_disconnected.2835014911 |
| Directory | /workspace/16.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/16.usbdev_enable.517256608 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 35165806 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:35:05 PM PDT 24 |
| Finished | Aug 16 05:35:05 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-296263aa-e6a7-4f77-bce3-80e3b6d5bdae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51725 6608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_enable.517256608 |
| Directory | /workspace/16.usbdev_enable/latest |
| Test location | /workspace/coverage/default/16.usbdev_endpoint_access.1030161918 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 993415213 ps |
| CPU time | 2.76 seconds |
| Started | Aug 16 05:35:08 PM PDT 24 |
| Finished | Aug 16 05:35:11 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-c41e20c2-8c41-445b-8022-61cd8470aa79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10301 61918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.1030161918 |
| Directory | /workspace/16.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/16.usbdev_endpoint_types.1621121955 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 189216505 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:10 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-b1d27cf9-eda3-4cd9-8978-6212f03e0fd4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1621121955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.1621121955 |
| Directory | /workspace/16.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/16.usbdev_fifo_rst.3259401428 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 171878900 ps |
| CPU time | 2.09 seconds |
| Started | Aug 16 05:35:08 PM PDT 24 |
| Finished | Aug 16 05:35:11 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-3727d1c7-bf4a-4c27-87f6-ab98fecfe3fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32594 01428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_fifo_rst.3259401428 |
| Directory | /workspace/16.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/16.usbdev_in_iso.1958892441 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 204027844 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:02 PM PDT 24 |
| Finished | Aug 16 05:35:03 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-0d09c891-fc74-49c7-9319-650a6f7a724a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1958892441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.1958892441 |
| Directory | /workspace/16.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/16.usbdev_in_stall.2359204184 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 157376636 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:35:05 PM PDT 24 |
| Finished | Aug 16 05:35:06 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-bd9f915c-3bd1-46c2-83a4-bf6ea67002a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23592 04184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_in_stall.2359204184 |
| Directory | /workspace/16.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/16.usbdev_in_trans.3924618237 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 293714297 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:35:07 PM PDT 24 |
| Finished | Aug 16 05:35:08 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-bf5735d2-2739-42a1-a6ea-e028a9eee006 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39246 18237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_in_trans.3924618237 |
| Directory | /workspace/16.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/16.usbdev_invalid_sync.1155669286 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 2892597642 ps |
| CPU time | 20.55 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:30 PM PDT 24 |
| Peak memory | 218364 kb |
| Host | smart-67d4352a-de77-47b5-9992-e7fe9433fdf2 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1155669286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.1155669286 |
| Directory | /workspace/16.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/16.usbdev_iso_retraction.1110448627 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 6586877300 ps |
| CPU time | 40.98 seconds |
| Started | Aug 16 05:35:01 PM PDT 24 |
| Finished | Aug 16 05:35:42 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-d679e355-08a7-4075-8992-32c3768ad9bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1110448627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.1110448627 |
| Directory | /workspace/16.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/16.usbdev_link_in_err.2909254852 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 276745731 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:35:36 PM PDT 24 |
| Finished | Aug 16 05:35:37 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-46c7749f-6d34-439f-87f2-04882ec52903 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29092 54852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_link_in_err.2909254852 |
| Directory | /workspace/16.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/16.usbdev_link_resume.3050397206 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 9918920186 ps |
| CPU time | 15.09 seconds |
| Started | Aug 16 05:35:10 PM PDT 24 |
| Finished | Aug 16 05:35:25 PM PDT 24 |
| Peak memory | 216100 kb |
| Host | smart-22d6d321-ac81-4457-a37c-3590c501ece0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30503 97206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_link_resume.3050397206 |
| Directory | /workspace/16.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/16.usbdev_link_suspend.1170431492 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 3594828403 ps |
| CPU time | 5.13 seconds |
| Started | Aug 16 05:35:10 PM PDT 24 |
| Finished | Aug 16 05:35:15 PM PDT 24 |
| Peak memory | 215852 kb |
| Host | smart-f061c0e4-a9af-46b7-933e-905137e9f588 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11704 31492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_link_suspend.1170431492 |
| Directory | /workspace/16.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/16.usbdev_low_speed_traffic.1200993794 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 3126958914 ps |
| CPU time | 24.7 seconds |
| Started | Aug 16 05:35:18 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 219160 kb |
| Host | smart-33d9cd82-7334-47f5-a9f6-ff0ddf00ff4c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1200993794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.1200993794 |
| Directory | /workspace/16.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_inter_pkt_delay.1705214624 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 2097457022 ps |
| CPU time | 20.43 seconds |
| Started | Aug 16 05:35:13 PM PDT 24 |
| Finished | Aug 16 05:35:33 PM PDT 24 |
| Peak memory | 223940 kb |
| Host | smart-84213326-d4f4-4aeb-8f11-a00008aa8bd9 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1705214624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.1705214624 |
| Directory | /workspace/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_length_in_transaction.3339805770 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 245401015 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:35:08 PM PDT 24 |
| Finished | Aug 16 05:35:09 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-98c37aa1-f976-4515-bd63-82d397d3d538 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3339805770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.3339805770 |
| Directory | /workspace/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_length_out_transaction.139872992 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 205774902 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:35:37 PM PDT 24 |
| Finished | Aug 16 05:35:38 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-3486566c-e82a-4598-bc23-c4a44af4e0a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13987 2992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.139872992 |
| Directory | /workspace/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_max_non_iso_usb_traffic.3921935150 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 2042193021 ps |
| CPU time | 20.85 seconds |
| Started | Aug 16 05:35:25 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 217036 kb |
| Host | smart-8755286c-4d09-4c6d-b57e-825ca88100cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39219 35150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.3921935150 |
| Directory | /workspace/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/16.usbdev_min_inter_pkt_delay.1262448495 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 2213692485 ps |
| CPU time | 22.22 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:32 PM PDT 24 |
| Peak memory | 224020 kb |
| Host | smart-2c91bed4-e203-4447-a8b3-0ab355b7cfce |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1262448495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.1262448495 |
| Directory | /workspace/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/16.usbdev_min_length_in_transaction.1571773308 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 180420857 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:35:07 PM PDT 24 |
| Finished | Aug 16 05:35:08 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-ec599148-c3eb-462a-a903-fd8205a6a6a8 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1571773308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.1571773308 |
| Directory | /workspace/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_min_length_out_transaction.1031461419 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 164500016 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:06 PM PDT 24 |
| Finished | Aug 16 05:35:07 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-730d567b-7b99-43e2-b481-d6802357e7f9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10314 61419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.1031461419 |
| Directory | /workspace/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_out_iso.3656368303 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 197533278 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-64c89869-24c9-4e18-bfbd-e557020ab0ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36563 68303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_out_iso.3656368303 |
| Directory | /workspace/16.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/16.usbdev_out_stall.93910310 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 164092477 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:10 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-089a6268-35bd-4024-b502-9202b6d55ca4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93910 310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_out_stall.93910310 |
| Directory | /workspace/16.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/16.usbdev_out_trans_nak.755074345 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 159710396 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:35:39 PM PDT 24 |
| Finished | Aug 16 05:35:40 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-bb20af6a-efdb-4a88-b2ac-7d1052746524 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75507 4345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_out_trans_nak.755074345 |
| Directory | /workspace/16.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/16.usbdev_pending_in_trans.2572356572 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 177800815 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:12 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-e61a3a1b-f5e9-471c-9062-82e86b5f3483 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25723 56572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pending_in_trans.2572356572 |
| Directory | /workspace/16.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/16.usbdev_phy_config_pinflip.1437788307 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 225612194 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-4dbdf4b7-3735-4db3-b565-cd26c0417b74 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1437788307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.1437788307 |
| Directory | /workspace/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/16.usbdev_phy_config_usb_ref_disable.1873065441 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 149831455 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:35:29 PM PDT 24 |
| Finished | Aug 16 05:35:30 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-d396d3f6-81dd-4eff-9600-93ddb44cff91 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18730 65441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.1873065441 |
| Directory | /workspace/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/16.usbdev_phy_pins_sense.1471428267 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 68269438 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:35:19 PM PDT 24 |
| Finished | Aug 16 05:35:20 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-29ca844a-62d1-4bd7-9d21-df6a33a1ac96 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14714 28267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.1471428267 |
| Directory | /workspace/16.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/16.usbdev_pkt_buffer.2342339892 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 12693747145 ps |
| CPU time | 34.17 seconds |
| Started | Aug 16 05:35:29 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 220672 kb |
| Host | smart-5d678902-2702-43de-a8aa-3d36c67e4277 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23423 39892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pkt_buffer.2342339892 |
| Directory | /workspace/16.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/16.usbdev_pkt_received.4286265381 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 167805511 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-470720b8-5074-4864-a954-7598a3bf2b30 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42862 65381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pkt_received.4286265381 |
| Directory | /workspace/16.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/16.usbdev_pkt_sent.2572178350 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 230288134 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:35:12 PM PDT 24 |
| Finished | Aug 16 05:35:15 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-d9966650-b3f3-4696-a149-0c5354874db5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25721 78350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pkt_sent.2572178350 |
| Directory | /workspace/16.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/16.usbdev_random_length_in_transaction.3677606799 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 235312383 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:35:14 PM PDT 24 |
| Finished | Aug 16 05:35:15 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-7a660b30-ff1d-4e86-9dfb-5aacd5830414 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36776 06799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_in_transaction.3677606799 |
| Directory | /workspace/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_random_length_out_transaction.1528868989 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 144035325 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:12 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-83d0bb78-edfe-470a-970a-44fb0b2c5ac2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15288 68989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.1528868989 |
| Directory | /workspace/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/16.usbdev_resume_link_active.152725412 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 20182041077 ps |
| CPU time | 25.05 seconds |
| Started | Aug 16 05:35:20 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-b2a7f176-bc30-4ce2-8daf-5170d6f6a595 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15272 5412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_resume_link_active.152725412 |
| Directory | /workspace/16.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/16.usbdev_rx_crc_err.1527794511 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 141042309 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:35:12 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-3cfa039f-028c-451b-84fb-3f1eb967d4a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15277 94511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_rx_crc_err.1527794511 |
| Directory | /workspace/16.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/16.usbdev_rx_full.250710526 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 399569145 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:35:35 PM PDT 24 |
| Finished | Aug 16 05:35:36 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8e23cd6f-4018-4baf-97eb-31acf7f4951b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25071 0526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_rx_full.250710526 |
| Directory | /workspace/16.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/16.usbdev_setup_stage.1470101612 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 165484587 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:15 PM PDT 24 |
| Finished | Aug 16 05:35:16 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-77118047-882e-426c-8245-aa7c864945a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14701 01612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_setup_stage.1470101612 |
| Directory | /workspace/16.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/16.usbdev_setup_trans_ignored.3102781075 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 152039009 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:10 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-d587a327-033e-44c8-adfc-bf9df92ac5d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31027 81075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_setup_trans_ignored.3102781075 |
| Directory | /workspace/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/16.usbdev_smoke.3061588924 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 260378097 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:35:12 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a07282ae-cc75-40e9-b8bf-2394310bd906 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30615 88924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.3061588924 |
| Directory | /workspace/16.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/16.usbdev_spurious_pids_ignored.1217766263 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 1917260286 ps |
| CPU time | 55.82 seconds |
| Started | Aug 16 05:35:28 PM PDT 24 |
| Finished | Aug 16 05:36:24 PM PDT 24 |
| Peak memory | 224048 kb |
| Host | smart-d150aad7-76a1-4a93-aa1d-104b1ae3ad3f |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1217766263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.1217766263 |
| Directory | /workspace/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/16.usbdev_stall_priority_over_nak.3657090002 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 177598396 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:13 PM PDT 24 |
| Finished | Aug 16 05:35:14 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-32b22024-7f62-4188-bbb4-d3cb62fbdceb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36570 90002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.3657090002 |
| Directory | /workspace/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/16.usbdev_stall_trans.941025542 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 155260899 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:35:15 PM PDT 24 |
| Finished | Aug 16 05:35:16 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7f7e1509-18b9-427e-9ac0-0cb8c1c89cd3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=94102 5542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_trans.941025542 |
| Directory | /workspace/16.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/16.usbdev_stream_len_max.4004939985 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 1215152558 ps |
| CPU time | 3.23 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:14 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-8e72744a-18fa-470e-b1a3-197536e442dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40049 39985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.4004939985 |
| Directory | /workspace/16.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/16.usbdev_streaming_out.3081809156 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 3587017272 ps |
| CPU time | 28.61 seconds |
| Started | Aug 16 05:35:23 PM PDT 24 |
| Finished | Aug 16 05:35:51 PM PDT 24 |
| Peak memory | 217820 kb |
| Host | smart-10803ecb-b80f-4fc0-99e4-2efeede436e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30818 09156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_streaming_out.3081809156 |
| Directory | /workspace/16.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/16.usbdev_timeout_missing_host_handshake.3068322419 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 1151998393 ps |
| CPU time | 25.72 seconds |
| Started | Aug 16 05:35:19 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-604af86b-0586-49fc-b74e-86121619f315 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3068322419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_hos t_handshake.3068322419 |
| Directory | /workspace/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/16.usbdev_tx_rx_disruption.153306837 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 647702103 ps |
| CPU time | 1.88 seconds |
| Started | Aug 16 05:35:24 PM PDT 24 |
| Finished | Aug 16 05:35:26 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-04026a37-6355-41b0-8f20-7cd23392be17 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=153306837 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 16.usbdev_tx_rx_disruption.153306837 |
| Directory | /workspace/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/160.usbdev_endpoint_types.2824546169 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 451321695 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-2318326c-0acb-4a11-9d3c-ae06057c59ea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2824546169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.2824546169 |
| Directory | /workspace/160.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/160.usbdev_tx_rx_disruption.1201136836 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 438716497 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-8da9c571-0686-41aa-8a8f-f6adba8c18b4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1201136836 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 160.usbdev_tx_rx_disruption.1201136836 |
| Directory | /workspace/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/161.usbdev_endpoint_types.1146110825 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 226317590 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:40:11 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3345f7e6-5d2e-4be0-b4ec-d0879b557b98 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1146110825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.1146110825 |
| Directory | /workspace/161.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/161.usbdev_tx_rx_disruption.1573363834 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 459943366 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-9bd8d913-d5f7-4888-9729-c9d4d7d85a6c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1573363834 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 161.usbdev_tx_rx_disruption.1573363834 |
| Directory | /workspace/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/162.usbdev_endpoint_types.1389469259 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 369352921 ps |
| CPU time | 1.21 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-851ad8a2-9307-48d3-abfb-b1489a836725 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1389469259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.1389469259 |
| Directory | /workspace/162.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/162.usbdev_tx_rx_disruption.3026757276 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 422311707 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-58e36e38-fdd4-41ce-befc-f665d8321fa0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3026757276 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 162.usbdev_tx_rx_disruption.3026757276 |
| Directory | /workspace/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/163.usbdev_tx_rx_disruption.3884124134 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 608398904 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-461dfb3f-b81b-4df3-bb1c-2d7b51d5d752 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3884124134 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 163.usbdev_tx_rx_disruption.3884124134 |
| Directory | /workspace/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/164.usbdev_endpoint_types.1085740309 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 494384745 ps |
| CPU time | 1.37 seconds |
| Started | Aug 16 05:40:26 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-965191e8-cb41-49ca-a048-a17a33ac91dd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1085740309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.1085740309 |
| Directory | /workspace/164.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/164.usbdev_tx_rx_disruption.2967470152 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 497944443 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:04 PM PDT 24 |
| Finished | Aug 16 05:40:06 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-3e9f54d9-1f35-4c25-adca-d5f8911454a5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2967470152 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 164.usbdev_tx_rx_disruption.2967470152 |
| Directory | /workspace/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/165.usbdev_endpoint_types.2866672607 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 379477549 ps |
| CPU time | 1.26 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-7884f171-0653-46d4-9846-1567ebfb77fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2866672607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.2866672607 |
| Directory | /workspace/165.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/165.usbdev_tx_rx_disruption.14268335 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 467926460 ps |
| CPU time | 1.42 seconds |
| Started | Aug 16 05:40:51 PM PDT 24 |
| Finished | Aug 16 05:40:52 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2183d727-a1dd-4cb3-a846-007fb7afaf9d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14268335 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 165.usbdev_tx_rx_disruption.14268335 |
| Directory | /workspace/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/166.usbdev_tx_rx_disruption.2400202931 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 637168843 ps |
| CPU time | 1.78 seconds |
| Started | Aug 16 05:40:21 PM PDT 24 |
| Finished | Aug 16 05:40:23 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-b0d145a5-8f2e-4d89-9b16-aff0007d0b96 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2400202931 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 166.usbdev_tx_rx_disruption.2400202931 |
| Directory | /workspace/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/167.usbdev_endpoint_types.2396442286 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 352930181 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:40:35 PM PDT 24 |
| Finished | Aug 16 05:40:36 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-a63777aa-2cf1-46aa-a99a-27465c268e39 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2396442286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.2396442286 |
| Directory | /workspace/167.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/167.usbdev_tx_rx_disruption.1745336043 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 455541674 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-1c565ee3-616d-451d-89ad-90bbbfbf6189 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1745336043 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 167.usbdev_tx_rx_disruption.1745336043 |
| Directory | /workspace/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/168.usbdev_endpoint_types.1708147085 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 215198012 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4d33fb5f-9b91-4658-873f-a483ef6dcd5d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1708147085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.1708147085 |
| Directory | /workspace/168.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/168.usbdev_tx_rx_disruption.2302509142 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 552827309 ps |
| CPU time | 1.8 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-a7a8dc6c-2414-41ca-8419-73d0002fc150 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2302509142 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 168.usbdev_tx_rx_disruption.2302509142 |
| Directory | /workspace/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/169.usbdev_endpoint_types.622757799 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 441409020 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:40:11 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-e116e9f2-22de-4ecd-9457-307d1faf16ea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=622757799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.622757799 |
| Directory | /workspace/169.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/169.usbdev_tx_rx_disruption.3181753375 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 609901484 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-ec96f04e-345b-4e9c-997c-b69f15e43171 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3181753375 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 169.usbdev_tx_rx_disruption.3181753375 |
| Directory | /workspace/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/17.usbdev_alert_test.4239908154 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 47924939 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-cc2c6569-3006-4927-a5bf-ff7e05939973 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=4239908154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.4239908154 |
| Directory | /workspace/17.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/17.usbdev_aon_wake_disconnect.2828622718 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 6709482346 ps |
| CPU time | 8.65 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:20 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-f4beaf42-350a-42b1-a72d-0f5899585b99 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2828622718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_a on_wake_disconnect.2828622718 |
| Directory | /workspace/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/17.usbdev_aon_wake_reset.2625661949 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 20154655352 ps |
| CPU time | 26.28 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:37 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-20444768-031d-435a-86ef-64e3aa0bb1f3 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2625661949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.2625661949 |
| Directory | /workspace/17.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/17.usbdev_aon_wake_resume.1138726197 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 23928202887 ps |
| CPU time | 31.27 seconds |
| Started | Aug 16 05:35:24 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 216004 kb |
| Host | smart-c63fa13d-8dfe-48c5-95aa-ae1acf70dbf9 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1138726197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_a on_wake_resume.1138726197 |
| Directory | /workspace/17.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/17.usbdev_av_buffer.173295216 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 150981558 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-83d55615-7a06-42a3-810d-9c30a18f3bef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17329 5216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_av_buffer.173295216 |
| Directory | /workspace/17.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/17.usbdev_bitstuff_err.3072856873 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 162225259 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:12 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-29e959ba-ce4f-4c41-aaa9-058f9e4bf6ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30728 56873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_bitstuff_err.3072856873 |
| Directory | /workspace/17.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/17.usbdev_data_toggle_clear.1726653160 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 381189609 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:35:22 PM PDT 24 |
| Finished | Aug 16 05:35:24 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-59cda325-bffa-438c-8877-32ca7bd87605 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17266 53160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_clear.1726653160 |
| Directory | /workspace/17.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/17.usbdev_data_toggle_restore.557041024 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 1328514960 ps |
| CPU time | 3.37 seconds |
| Started | Aug 16 05:35:09 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-4c9420e9-58dc-4b02-8daf-dec684fbb41e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=557041024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.557041024 |
| Directory | /workspace/17.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/17.usbdev_device_address.244989639 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 17614162332 ps |
| CPU time | 29.79 seconds |
| Started | Aug 16 05:35:29 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 207848 kb |
| Host | smart-9b7f65be-3718-4b19-8af4-7131faf53f1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24498 9639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.244989639 |
| Directory | /workspace/17.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/17.usbdev_device_timeout.4100446789 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 2503003941 ps |
| CPU time | 20.8 seconds |
| Started | Aug 16 05:35:28 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207836 kb |
| Host | smart-43cd28e8-93d3-47aa-986d-22bd8cb7a080 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4100446789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.4100446789 |
| Directory | /workspace/17.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/17.usbdev_disable_endpoint.3808295634 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 1247751536 ps |
| CPU time | 2.83 seconds |
| Started | Aug 16 05:35:30 PM PDT 24 |
| Finished | Aug 16 05:35:33 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-2c4c729a-473d-4832-8e80-28c7761a56ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38082 95634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_disable_endpoint.3808295634 |
| Directory | /workspace/17.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/17.usbdev_disconnected.375649301 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 197957592 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-fb1b0823-66df-4ee6-b863-257bb2194cb5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37564 9301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_disconnected.375649301 |
| Directory | /workspace/17.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/17.usbdev_enable.628074397 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 41007817 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:35:15 PM PDT 24 |
| Finished | Aug 16 05:35:16 PM PDT 24 |
| Peak memory | 207332 kb |
| Host | smart-020b7d83-cada-45eb-871a-1adf49e065f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62807 4397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_enable.628074397 |
| Directory | /workspace/17.usbdev_enable/latest |
| Test location | /workspace/coverage/default/17.usbdev_endpoint_access.1773028474 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 813558268 ps |
| CPU time | 2.07 seconds |
| Started | Aug 16 05:35:10 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-a9232748-47b5-4df2-bd26-cc3961ddee4b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17730 28474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.1773028474 |
| Directory | /workspace/17.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/17.usbdev_endpoint_types.4287431436 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 170734994 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:35:24 PM PDT 24 |
| Finished | Aug 16 05:35:25 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-eebc602b-3cd9-4b1e-8deb-d78dbb293957 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4287431436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.4287431436 |
| Directory | /workspace/17.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/17.usbdev_fifo_rst.1633932295 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 159852667 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:35:26 PM PDT 24 |
| Finished | Aug 16 05:35:28 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-f5919191-559e-43fd-849d-35f3683b04ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16339 32295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_fifo_rst.1633932295 |
| Directory | /workspace/17.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/17.usbdev_in_iso.1459306058 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 164377272 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:14 PM PDT 24 |
| Finished | Aug 16 05:35:15 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-991ea476-9410-4980-907f-b2d962fe910c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1459306058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.1459306058 |
| Directory | /workspace/17.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/17.usbdev_in_stall.3136959625 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 147629677 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:16 PM PDT 24 |
| Finished | Aug 16 05:35:17 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-50397ece-f0c4-499a-9478-50123edac0a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31369 59625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_in_stall.3136959625 |
| Directory | /workspace/17.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/17.usbdev_in_trans.3308049975 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 192188319 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:12 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-15a038db-0881-43bb-8016-b6ad79f6806a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33080 49975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_in_trans.3308049975 |
| Directory | /workspace/17.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_invalid_sync.1080873485 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 2221928698 ps |
| CPU time | 21.72 seconds |
| Started | Aug 16 05:35:32 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 218704 kb |
| Host | smart-9741d18e-7b1e-4b2a-9af8-5ce357dfa1e6 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1080873485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.1080873485 |
| Directory | /workspace/17.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/17.usbdev_iso_retraction.2467221647 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 12435131426 ps |
| CPU time | 148.38 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-eb629adb-63ae-47a4-906f-365b4d8ce009 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2467221647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.2467221647 |
| Directory | /workspace/17.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/17.usbdev_link_in_err.369419827 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 173832569 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:24 PM PDT 24 |
| Finished | Aug 16 05:35:25 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-21b0cfea-55e2-4eda-9591-a43c0d61bd30 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36941 9827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_link_in_err.369419827 |
| Directory | /workspace/17.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/17.usbdev_link_resume.3219014760 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 13696683845 ps |
| CPU time | 21.12 seconds |
| Started | Aug 16 05:35:13 PM PDT 24 |
| Finished | Aug 16 05:35:34 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-c8983026-a64b-493a-8069-92dc1976deaa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32190 14760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_link_resume.3219014760 |
| Directory | /workspace/17.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/17.usbdev_link_suspend.3923800531 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 5483183371 ps |
| CPU time | 7.32 seconds |
| Started | Aug 16 05:35:33 PM PDT 24 |
| Finished | Aug 16 05:35:41 PM PDT 24 |
| Peak memory | 216056 kb |
| Host | smart-d6604946-99f6-45a6-8a3d-71a8586d8e4b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39238 00531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_link_suspend.3923800531 |
| Directory | /workspace/17.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/17.usbdev_low_speed_traffic.4207183121 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 4409689363 ps |
| CPU time | 46.46 seconds |
| Started | Aug 16 05:35:11 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 224112 kb |
| Host | smart-b13ad4dd-01f7-4b51-b50a-21d233f225a2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4207183121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.4207183121 |
| Directory | /workspace/17.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_inter_pkt_delay.2436001399 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 2681436771 ps |
| CPU time | 83.95 seconds |
| Started | Aug 16 05:35:26 PM PDT 24 |
| Finished | Aug 16 05:36:50 PM PDT 24 |
| Peak memory | 216048 kb |
| Host | smart-225585a7-0caa-4774-9cbf-febcbfb734f3 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2436001399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.2436001399 |
| Directory | /workspace/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_length_in_transaction.1381836260 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 253346061 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:35:12 PM PDT 24 |
| Finished | Aug 16 05:35:13 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-74554379-fa85-4562-910f-e8e90897ee45 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1381836260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.1381836260 |
| Directory | /workspace/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_length_out_transaction.2761602615 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 207657039 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:35:17 PM PDT 24 |
| Finished | Aug 16 05:35:18 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d64e840b-e873-4d69-9128-c2865008979d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27616 02615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.2761602615 |
| Directory | /workspace/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_max_non_iso_usb_traffic.647602184 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 2876692903 ps |
| CPU time | 28.14 seconds |
| Started | Aug 16 05:35:13 PM PDT 24 |
| Finished | Aug 16 05:35:42 PM PDT 24 |
| Peak memory | 217716 kb |
| Host | smart-0047ab41-c15c-4584-8cc8-36961184c0a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64760 2184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.647602184 |
| Directory | /workspace/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/17.usbdev_min_inter_pkt_delay.2550709486 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 2351268162 ps |
| CPU time | 23.64 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:36:05 PM PDT 24 |
| Peak memory | 217632 kb |
| Host | smart-d2871485-098a-41ff-a51a-9425333ed59e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2550709486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.2550709486 |
| Directory | /workspace/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/17.usbdev_min_length_in_transaction.4127531796 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 168552140 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:25 PM PDT 24 |
| Finished | Aug 16 05:35:26 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-42a772c8-9d23-49e4-9c0e-d010c3e31c36 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4127531796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.4127531796 |
| Directory | /workspace/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_min_length_out_transaction.709710491 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 146038186 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:35:31 PM PDT 24 |
| Finished | Aug 16 05:35:32 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-f4344c2c-e8cd-4f0c-814c-b6502a781700 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70971 0491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.709710491 |
| Directory | /workspace/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_nak_trans.3202484581 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 210637675 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-3b6f6ef0-8b40-4840-99d5-cf0792e49365 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32024 84581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_nak_trans.3202484581 |
| Directory | /workspace/17.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_out_iso.1974132790 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 187399887 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-b1ffff1d-ffdb-41f8-ac9c-1289fd1b0425 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19741 32790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_out_iso.1974132790 |
| Directory | /workspace/17.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/17.usbdev_out_stall.1732701705 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 158645740 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:36 PM PDT 24 |
| Finished | Aug 16 05:35:37 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-cddbdf20-c812-40be-90c2-bdb6ebf0098e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17327 01705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_out_stall.1732701705 |
| Directory | /workspace/17.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/17.usbdev_out_trans_nak.492855363 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 172101111 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:35:42 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-5c05a02b-b57f-470b-92f0-5de188a67eae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49285 5363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_out_trans_nak.492855363 |
| Directory | /workspace/17.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/17.usbdev_pending_in_trans.261508794 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 157825296 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-b4a55cc4-7e9e-4f1e-9830-eed2930f0158 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26150 8794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pending_in_trans.261508794 |
| Directory | /workspace/17.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_phy_config_pinflip.2658204859 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 235989748 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:35:36 PM PDT 24 |
| Finished | Aug 16 05:35:37 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-3eebe331-d882-4842-a60e-bf54bcb01422 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2658204859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.2658204859 |
| Directory | /workspace/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/17.usbdev_phy_config_usb_ref_disable.976515841 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 152887182 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:30 PM PDT 24 |
| Finished | Aug 16 05:35:31 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-1d90e801-2ea1-4ccc-b13e-e1952b01578a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97651 5841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.976515841 |
| Directory | /workspace/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/17.usbdev_phy_pins_sense.1853345612 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 70979034 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:35:40 PM PDT 24 |
| Finished | Aug 16 05:35:41 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-5358fd11-b24b-44ab-b2da-0b7ef086ea11 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18533 45612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.1853345612 |
| Directory | /workspace/17.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/17.usbdev_pkt_buffer.232944293 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 17678838201 ps |
| CPU time | 51.43 seconds |
| Started | Aug 16 05:35:36 PM PDT 24 |
| Finished | Aug 16 05:36:28 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-b3b0b0da-f58c-4f9d-b83c-1494fddf9e03 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23294 4293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pkt_buffer.232944293 |
| Directory | /workspace/17.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/17.usbdev_pkt_received.1679461328 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 203970338 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:35:40 PM PDT 24 |
| Finished | Aug 16 05:35:41 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-ab02872d-9218-42f2-9045-5e48a88afff4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16794 61328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pkt_received.1679461328 |
| Directory | /workspace/17.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/17.usbdev_pkt_sent.2168535388 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 198547874 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:37 PM PDT 24 |
| Finished | Aug 16 05:35:38 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-3403cc41-e161-48bb-b895-ee2245d782ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21685 35388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_pkt_sent.2168535388 |
| Directory | /workspace/17.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/17.usbdev_random_length_in_transaction.3703717330 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 221218034 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:35:32 PM PDT 24 |
| Finished | Aug 16 05:35:33 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-bc831f5e-8a68-4349-adc6-1a75a2b01eaf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37037 17330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_in_transaction.3703717330 |
| Directory | /workspace/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_random_length_out_transaction.4200215696 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 162895941 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:38 PM PDT 24 |
| Finished | Aug 16 05:35:39 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-2ad9530c-5b49-41b9-b822-c5e043715986 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42002 15696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.4200215696 |
| Directory | /workspace/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/17.usbdev_resume_link_active.604458993 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 20174210711 ps |
| CPU time | 24.56 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:36:07 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-73649ff4-9c6b-4aa4-8a41-2fd5b62d69d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60445 8993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_resume_link_active.604458993 |
| Directory | /workspace/17.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/17.usbdev_rx_crc_err.1310215956 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 174971291 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:35:40 PM PDT 24 |
| Finished | Aug 16 05:35:41 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-41e4881d-0d72-4374-96ac-4842b7ddc979 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13102 15956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_rx_crc_err.1310215956 |
| Directory | /workspace/17.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/17.usbdev_rx_full.3042055763 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 303786672 ps |
| CPU time | 1.25 seconds |
| Started | Aug 16 05:35:33 PM PDT 24 |
| Finished | Aug 16 05:35:35 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-f8fe2348-48a6-436b-a924-5244add9471b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30420 55763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_rx_full.3042055763 |
| Directory | /workspace/17.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/17.usbdev_setup_stage.2086311558 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 169704394 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:29 PM PDT 24 |
| Finished | Aug 16 05:35:30 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-45214c4b-4f82-421a-a498-7f403c78af53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20863 11558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_setup_stage.2086311558 |
| Directory | /workspace/17.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/17.usbdev_setup_trans_ignored.1818727187 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 151022991 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:35:42 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-706f1d63-36f8-4364-88fa-a48fd73d7800 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18187 27187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_setup_trans_ignored.1818727187 |
| Directory | /workspace/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/17.usbdev_smoke.2117148349 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 271489644 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:35:27 PM PDT 24 |
| Finished | Aug 16 05:35:28 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-fed8d3de-710d-420e-a88a-12b6c24a0a5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21171 48349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.2117148349 |
| Directory | /workspace/17.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/17.usbdev_spurious_pids_ignored.363329324 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 2054932056 ps |
| CPU time | 20.69 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 215832 kb |
| Host | smart-bdd492c9-c35f-42d8-8921-1f41dd1165db |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=363329324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.363329324 |
| Directory | /workspace/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/17.usbdev_stall_priority_over_nak.1835201640 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 199657215 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-5a9fa784-d1b4-410e-9656-c034aaccd4ed |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18352 01640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.1835201640 |
| Directory | /workspace/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/17.usbdev_stall_trans.62767544 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 168955044 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-09fa98be-ae20-409e-8b72-1a32bd8843f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62767 544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_trans.62767544 |
| Directory | /workspace/17.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/17.usbdev_stream_len_max.4075408763 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 941722364 ps |
| CPU time | 2.73 seconds |
| Started | Aug 16 05:35:40 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-02c523f6-efea-4682-8f2f-6fc901107bf5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40754 08763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.4075408763 |
| Directory | /workspace/17.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/17.usbdev_streaming_out.839232871 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 3576198179 ps |
| CPU time | 28.12 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:36:11 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-7c6bfc41-018c-48d1-a081-66f888e8f2e0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83923 2871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_streaming_out.839232871 |
| Directory | /workspace/17.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/17.usbdev_timeout_missing_host_handshake.2758603213 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 4769398697 ps |
| CPU time | 44.48 seconds |
| Started | Aug 16 05:35:27 PM PDT 24 |
| Finished | Aug 16 05:36:11 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-621d95d6-facd-4cd7-84c6-0fe5d6987c4e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2758603213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_hos t_handshake.2758603213 |
| Directory | /workspace/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/17.usbdev_tx_rx_disruption.265293614 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 509529510 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:35:38 PM PDT 24 |
| Finished | Aug 16 05:35:40 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-d8685793-606a-4e85-b7b6-857ee8834f1b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=265293614 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_tx_rx_disruption.265293614 |
| Directory | /workspace/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/170.usbdev_endpoint_types.719414054 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 424163405 ps |
| CPU time | 1.4 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-a5bece07-b0d6-49cd-9972-736dade42206 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=719414054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.719414054 |
| Directory | /workspace/170.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/170.usbdev_tx_rx_disruption.2241816999 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 655291680 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-55ab6c66-3cc4-4016-9ee1-d47f46b0b09b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2241816999 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 170.usbdev_tx_rx_disruption.2241816999 |
| Directory | /workspace/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/171.usbdev_endpoint_types.3503876494 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 177594313 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-3728f8f7-9a79-4118-b743-1b6cee80e963 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3503876494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.3503876494 |
| Directory | /workspace/171.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/171.usbdev_tx_rx_disruption.2798422269 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 628296071 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-0dc786ee-164d-4b5b-bb76-9dd9a78248ca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2798422269 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 171.usbdev_tx_rx_disruption.2798422269 |
| Directory | /workspace/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/172.usbdev_endpoint_types.1234589581 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 324441600 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-e3cd60cc-9f70-41e4-8bc1-0e332eb39ad6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1234589581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.1234589581 |
| Directory | /workspace/172.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/172.usbdev_tx_rx_disruption.1191678004 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 429029820 ps |
| CPU time | 1.34 seconds |
| Started | Aug 16 05:40:11 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-6bfd9cac-1f17-4c38-a550-fbba8da27b80 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1191678004 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 172.usbdev_tx_rx_disruption.1191678004 |
| Directory | /workspace/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/173.usbdev_endpoint_types.272360071 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 184862268 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-edb9b9bf-372c-4934-82f3-e4b0f745f7a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=272360071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.272360071 |
| Directory | /workspace/173.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/173.usbdev_tx_rx_disruption.1930798795 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 525160025 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-938272ac-9a7c-45f0-ac84-98a8f5d0d18a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1930798795 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 173.usbdev_tx_rx_disruption.1930798795 |
| Directory | /workspace/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/174.usbdev_endpoint_types.4142859201 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 396550060 ps |
| CPU time | 1.26 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-cebe6637-a01a-4103-afdf-ff23fcf8d340 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4142859201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.4142859201 |
| Directory | /workspace/174.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/174.usbdev_tx_rx_disruption.1663308130 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 551934795 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:11 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-90c579c9-ee5d-4834-93fa-4967ac4f3c4f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1663308130 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 174.usbdev_tx_rx_disruption.1663308130 |
| Directory | /workspace/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/175.usbdev_endpoint_types.2408144798 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 331929934 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-b5883ce9-4ff5-4aad-a59b-c097e93d79f7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2408144798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.2408144798 |
| Directory | /workspace/175.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/175.usbdev_tx_rx_disruption.1422451453 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 465198375 ps |
| CPU time | 1.44 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-a46bb75b-4ddb-48a4-a446-c676c5101aee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1422451453 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 175.usbdev_tx_rx_disruption.1422451453 |
| Directory | /workspace/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/176.usbdev_tx_rx_disruption.2622800113 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 434564562 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-e2a6cb2d-d15a-44b0-a546-d72e2c1d9b4f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2622800113 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 176.usbdev_tx_rx_disruption.2622800113 |
| Directory | /workspace/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/177.usbdev_endpoint_types.1805262095 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 730171787 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:40:26 PM PDT 24 |
| Finished | Aug 16 05:40:32 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-2bf757e8-f0e9-48eb-8868-b28c69efcb7b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1805262095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.1805262095 |
| Directory | /workspace/177.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/177.usbdev_tx_rx_disruption.3989191047 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 447212693 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-83f842f2-584d-4421-9f1f-79312f607ea6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3989191047 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 177.usbdev_tx_rx_disruption.3989191047 |
| Directory | /workspace/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/178.usbdev_endpoint_types.3110045067 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 550658867 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-b6cc826b-0673-4963-b940-a5be5590ec47 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3110045067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.3110045067 |
| Directory | /workspace/178.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/178.usbdev_tx_rx_disruption.2790110369 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 572181659 ps |
| CPU time | 1.85 seconds |
| Started | Aug 16 05:40:10 PM PDT 24 |
| Finished | Aug 16 05:40:12 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-2e10154b-cb56-4ad7-88ca-a53cd989614f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2790110369 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 178.usbdev_tx_rx_disruption.2790110369 |
| Directory | /workspace/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/179.usbdev_endpoint_types.4192140340 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 153023315 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:40:07 PM PDT 24 |
| Finished | Aug 16 05:40:08 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-13d9cceb-7ea5-44c3-8e68-8d9e2b6b8d58 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4192140340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.4192140340 |
| Directory | /workspace/179.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/179.usbdev_tx_rx_disruption.2076431186 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 529487777 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-e71618fd-2586-48d4-9f87-0073b683063b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2076431186 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 179.usbdev_tx_rx_disruption.2076431186 |
| Directory | /workspace/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/18.usbdev_alert_test.3117849186 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 53324852 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:35:49 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-1863c29c-d629-4093-80b2-6fb195fcdaf6 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3117849186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.3117849186 |
| Directory | /workspace/18.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/18.usbdev_aon_wake_disconnect.1550574140 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 10201394322 ps |
| CPU time | 14.01 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-957389c9-b095-457e-a1fc-e422d1f101dd |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1550574140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_a on_wake_disconnect.1550574140 |
| Directory | /workspace/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/18.usbdev_aon_wake_reset.3546267867 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 18433629542 ps |
| CPU time | 24.35 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:36:10 PM PDT 24 |
| Peak memory | 207816 kb |
| Host | smart-dd13f7cc-1298-490e-b6e2-8b8889294cf3 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3546267867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.3546267867 |
| Directory | /workspace/18.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/18.usbdev_aon_wake_resume.4238976084 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 24529239839 ps |
| CPU time | 32.4 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:36:18 PM PDT 24 |
| Peak memory | 216004 kb |
| Host | smart-af4110e8-2622-4f2c-a79c-c80b55dbd505 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4238976084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_a on_wake_resume.4238976084 |
| Directory | /workspace/18.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/18.usbdev_av_buffer.3711017977 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 174291734 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-707825a6-2652-4e38-9ae1-284b7fb32249 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37110 17977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_av_buffer.3711017977 |
| Directory | /workspace/18.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/18.usbdev_bitstuff_err.104799887 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 166798400 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-a09cd0b6-fa82-42f0-a4b9-501d9df21200 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10479 9887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_bitstuff_err.104799887 |
| Directory | /workspace/18.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/18.usbdev_data_toggle_clear.1120917141 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 446866883 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-3a3fe368-fe15-4600-ac0d-11c9d0512f87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11209 17141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_clear.1120917141 |
| Directory | /workspace/18.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/18.usbdev_data_toggle_restore.1349011475 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 1170979578 ps |
| CPU time | 3.14 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-1fc56832-3cdd-4936-ac42-1aa9a2ec8f11 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1349011475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.1349011475 |
| Directory | /workspace/18.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/18.usbdev_device_address.4049475177 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 41539525847 ps |
| CPU time | 70.35 seconds |
| Started | Aug 16 05:35:34 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 207812 kb |
| Host | smart-e13f3952-bce4-4a97-ae60-2f98e89d5de4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40494 75177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.4049475177 |
| Directory | /workspace/18.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/18.usbdev_device_timeout.2789216094 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 1341632885 ps |
| CPU time | 9.11 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:52 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-43c9f3cc-49c0-4bd6-a728-c0863914ee25 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2789216094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.2789216094 |
| Directory | /workspace/18.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/18.usbdev_disable_endpoint.165422078 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 790058965 ps |
| CPU time | 2.12 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:51 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-ef0cc35c-0400-44a9-95e8-3d5286fbd218 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16542 2078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_disable_endpoint.165422078 |
| Directory | /workspace/18.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/18.usbdev_disconnected.1315823478 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 139807339 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-86f822e2-63bb-4f24-8986-4fcde13b5691 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13158 23478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_disconnected.1315823478 |
| Directory | /workspace/18.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/18.usbdev_enable.3416473458 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 55918584 ps |
| CPU time | 0.76 seconds |
| Started | Aug 16 05:35:34 PM PDT 24 |
| Finished | Aug 16 05:35:35 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-46f76f94-e9d1-42bc-a212-866efb9663a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34164 73458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_enable.3416473458 |
| Directory | /workspace/18.usbdev_enable/latest |
| Test location | /workspace/coverage/default/18.usbdev_endpoint_access.2128737337 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 1093863129 ps |
| CPU time | 2.82 seconds |
| Started | Aug 16 05:35:38 PM PDT 24 |
| Finished | Aug 16 05:35:41 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-669e8fa8-c1f3-4d00-b462-8c1f8336fb89 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21287 37337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.2128737337 |
| Directory | /workspace/18.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/18.usbdev_fifo_rst.813310561 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 318278875 ps |
| CPU time | 2.61 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-48b7d406-2293-4d22-8807-ce8714ce316b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81331 0561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_fifo_rst.813310561 |
| Directory | /workspace/18.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/18.usbdev_in_iso.4248645383 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 252875256 ps |
| CPU time | 1.17 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-b85572a0-3873-49de-a03c-cdf147905f5a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4248645383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.4248645383 |
| Directory | /workspace/18.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/18.usbdev_in_stall.1711456286 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 184272582 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:38 PM PDT 24 |
| Finished | Aug 16 05:35:39 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-bd6834ef-3798-4c5b-8898-5b8a25538707 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17114 56286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_in_stall.1711456286 |
| Directory | /workspace/18.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/18.usbdev_in_trans.1234790437 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 208681357 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-485a9fb8-b43a-4418-8801-d63ce288113d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12347 90437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_in_trans.1234790437 |
| Directory | /workspace/18.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_invalid_sync.1712548609 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 2601113908 ps |
| CPU time | 25.89 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:36:07 PM PDT 24 |
| Peak memory | 224132 kb |
| Host | smart-9df4dce3-3590-45c5-8037-e0112c353d03 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1712548609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.1712548609 |
| Directory | /workspace/18.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/18.usbdev_iso_retraction.1687016872 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 9369041516 ps |
| CPU time | 59.3 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-1defea8b-edbc-4f5b-9795-fe294cfa1f56 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1687016872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.1687016872 |
| Directory | /workspace/18.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/18.usbdev_link_in_err.926858192 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 226241922 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-1e40947b-e3d9-455b-8c1f-c921edb1cdeb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92685 8192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_link_in_err.926858192 |
| Directory | /workspace/18.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/18.usbdev_link_resume.847820714 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 7350428386 ps |
| CPU time | 11.49 seconds |
| Started | Aug 16 05:35:51 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-58ca315d-3c28-4a8c-8d85-bf898bfc9033 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84782 0714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_link_resume.847820714 |
| Directory | /workspace/18.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/18.usbdev_link_suspend.1758089146 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 4752984767 ps |
| CPU time | 6.8 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:51 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-f2bf15b3-6e4d-4209-a758-ee489e0db366 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17580 89146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_link_suspend.1758089146 |
| Directory | /workspace/18.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/18.usbdev_low_speed_traffic.1456109984 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 3269116229 ps |
| CPU time | 33.95 seconds |
| Started | Aug 16 05:35:39 PM PDT 24 |
| Finished | Aug 16 05:36:13 PM PDT 24 |
| Peak memory | 224084 kb |
| Host | smart-2d943939-8fac-4bcf-a23b-1ec6546fc91f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1456109984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.1456109984 |
| Directory | /workspace/18.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_inter_pkt_delay.1996221200 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 2413475662 ps |
| CPU time | 66.87 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:36:52 PM PDT 24 |
| Peak memory | 217216 kb |
| Host | smart-3efde0c4-edb6-4c8c-ae24-43e9bf285345 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1996221200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.1996221200 |
| Directory | /workspace/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_length_in_transaction.4101841098 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 248841400 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-7749fcc3-f2b6-4662-9917-1a13a4d931f7 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=4101841098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.4101841098 |
| Directory | /workspace/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_length_out_transaction.617376848 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 189204905 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:35:37 PM PDT 24 |
| Finished | Aug 16 05:35:38 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-819c210c-91f8-470c-a3b6-fa0fa86241cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61737 6848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.617376848 |
| Directory | /workspace/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_max_non_iso_usb_traffic.663897906 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 2991725834 ps |
| CPU time | 31.26 seconds |
| Started | Aug 16 05:35:38 PM PDT 24 |
| Finished | Aug 16 05:36:09 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-7c4662d4-cd0e-4269-849a-c17f6c3e6a35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66389 7906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.663897906 |
| Directory | /workspace/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/18.usbdev_min_inter_pkt_delay.1385980703 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 3696895869 ps |
| CPU time | 108.1 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:37:31 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-90b0a326-9525-46c8-9df2-fbf87ad9339f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1385980703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.1385980703 |
| Directory | /workspace/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/18.usbdev_min_length_in_transaction.1037632258 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 185957144 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-481293c9-822c-41ce-b26e-84a6af674829 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1037632258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.1037632258 |
| Directory | /workspace/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_min_length_out_transaction.908520433 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 183579018 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:35:42 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-644df408-d6f3-4c1e-964a-f6c090d6ef14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90852 0433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.908520433 |
| Directory | /workspace/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_nak_trans.2039449260 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 191577897 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:35:47 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-2a417357-2b86-4056-b759-b0376c459a4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20394 49260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_nak_trans.2039449260 |
| Directory | /workspace/18.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_out_iso.3858052708 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 192513274 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:47 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-15075f2e-5a6d-4161-816b-6767d0b12216 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38580 52708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_out_iso.3858052708 |
| Directory | /workspace/18.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/18.usbdev_out_stall.2812877570 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 172708046 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:47 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0486966e-6641-4668-8b48-5a2763b1e077 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28128 77570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_out_stall.2812877570 |
| Directory | /workspace/18.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/18.usbdev_out_trans_nak.3395985706 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 175138410 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:47 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-0fdf21f3-500f-4af9-be57-63950556cd6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33959 85706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_out_trans_nak.3395985706 |
| Directory | /workspace/18.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/18.usbdev_pending_in_trans.2622597125 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 178362742 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:47 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-3cb2d000-2b36-4201-b0b9-afd4f47dd1db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26225 97125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pending_in_trans.2622597125 |
| Directory | /workspace/18.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_phy_config_pinflip.1380546162 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 233490294 ps |
| CPU time | 1.17 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-15a7d92d-6588-4508-aaed-edf24d710869 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1380546162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.1380546162 |
| Directory | /workspace/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/18.usbdev_phy_config_usb_ref_disable.1184263033 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 150735935 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7999b016-8484-4852-8fa4-1e89b5ab2fac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11842 63033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.1184263033 |
| Directory | /workspace/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/18.usbdev_phy_pins_sense.2371125414 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 55726269 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:35:41 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bf453bef-f441-4c58-b00c-0f59ba980cae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23711 25414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.2371125414 |
| Directory | /workspace/18.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/18.usbdev_pkt_buffer.576708219 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 5961099946 ps |
| CPU time | 17.25 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-d9de9dec-4508-481d-a22a-561e21ae0d92 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57670 8219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pkt_buffer.576708219 |
| Directory | /workspace/18.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/18.usbdev_pkt_received.4286627538 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 154679348 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:33 PM PDT 24 |
| Finished | Aug 16 05:35:34 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-22e7bb23-5000-4df2-ac31-f85411b897e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42866 27538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pkt_received.4286627538 |
| Directory | /workspace/18.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/18.usbdev_pkt_sent.2728009827 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 199714281 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-9e3142da-52a0-45ae-859c-103ecdc8ce87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27280 09827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_pkt_sent.2728009827 |
| Directory | /workspace/18.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/18.usbdev_random_length_in_transaction.3044592300 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 177702796 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-46176678-ef85-4575-af7e-33f45f84ed74 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30445 92300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_in_transaction.3044592300 |
| Directory | /workspace/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_random_length_out_transaction.67261373 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 193659227 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:34 PM PDT 24 |
| Finished | Aug 16 05:35:35 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-bde0063f-1033-4bec-9154-e505b0b8f483 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67261 373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.67261373 |
| Directory | /workspace/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/18.usbdev_resume_link_active.669225463 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 20165689392 ps |
| CPU time | 22.89 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:36:04 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-f59fe3a5-765c-42d2-bbe0-c721c668a2b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66922 5463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_resume_link_active.669225463 |
| Directory | /workspace/18.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/18.usbdev_rx_crc_err.3619499155 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 177358657 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6b882829-2f24-4161-a4b1-414aeaa9a37c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36194 99155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_rx_crc_err.3619499155 |
| Directory | /workspace/18.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/18.usbdev_rx_full.2789860866 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 372531707 ps |
| CPU time | 1.23 seconds |
| Started | Aug 16 05:35:35 PM PDT 24 |
| Finished | Aug 16 05:35:37 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-147c16d1-75a8-4722-93b5-f5d9396d1ead |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27898 60866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_rx_full.2789860866 |
| Directory | /workspace/18.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/18.usbdev_setup_stage.1508411911 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 151268084 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-995b0e72-5ebc-4615-81ac-7595c770ffbd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15084 11911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_setup_stage.1508411911 |
| Directory | /workspace/18.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/18.usbdev_setup_trans_ignored.3313968411 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 145895890 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-c81c8743-8e3f-4980-94c2-3bd94a63f17c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33139 68411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_setup_trans_ignored.3313968411 |
| Directory | /workspace/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/18.usbdev_smoke.3269579985 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 214139082 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-4d29036f-2747-44fa-b42f-4ddc644ec08d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32695 79985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.3269579985 |
| Directory | /workspace/18.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/18.usbdev_spurious_pids_ignored.1355300594 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 2135825445 ps |
| CPU time | 17.87 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 217536 kb |
| Host | smart-1d37e18f-272f-482b-a17d-f1ec8aa8530a |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1355300594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.1355300594 |
| Directory | /workspace/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/18.usbdev_stall_priority_over_nak.4010137806 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 180983244 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-cb2b0a70-2e17-4f3e-a526-790b0151dd97 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40101 37806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.4010137806 |
| Directory | /workspace/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/18.usbdev_stall_trans.1157861726 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 200438559 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-271a6af8-dd46-4c84-8879-204ffd92570c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11578 61726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_trans.1157861726 |
| Directory | /workspace/18.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/18.usbdev_stream_len_max.280057353 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 540479986 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-2392b182-3e91-440b-a228-6234e4095163 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28005 7353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.280057353 |
| Directory | /workspace/18.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/18.usbdev_streaming_out.2403165391 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 4235086470 ps |
| CPU time | 32.66 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:36:18 PM PDT 24 |
| Peak memory | 217676 kb |
| Host | smart-1449be8b-feb7-4ba8-bb5b-770f5e8c5318 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24031 65391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_streaming_out.2403165391 |
| Directory | /workspace/18.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/18.usbdev_timeout_missing_host_handshake.4012076307 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 8371771500 ps |
| CPU time | 54.81 seconds |
| Started | Aug 16 05:35:38 PM PDT 24 |
| Finished | Aug 16 05:36:33 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-05e3a345-795c-44a3-a619-de01daca1c47 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4012076307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_hos t_handshake.4012076307 |
| Directory | /workspace/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/18.usbdev_tx_rx_disruption.4268583175 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 531984031 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-fa79e1a0-4c3f-4472-baa6-b920c25afac4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4268583175 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_tx_rx_disruption.4268583175 |
| Directory | /workspace/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/180.usbdev_endpoint_types.2581546290 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 462108166 ps |
| CPU time | 1.42 seconds |
| Started | Aug 16 05:40:38 PM PDT 24 |
| Finished | Aug 16 05:40:40 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-121ad31a-d6a3-468d-909b-0d261e651005 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2581546290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.2581546290 |
| Directory | /workspace/180.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/180.usbdev_tx_rx_disruption.3350523524 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 549062599 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-f474d1cd-b116-4fa0-b60c-30b6b5dc772a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3350523524 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 180.usbdev_tx_rx_disruption.3350523524 |
| Directory | /workspace/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/181.usbdev_endpoint_types.765187791 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 478447680 ps |
| CPU time | 1.37 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-740f3019-132e-47cb-85cf-25663da8f633 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=765187791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.765187791 |
| Directory | /workspace/181.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/181.usbdev_tx_rx_disruption.3359456943 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 645446936 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-5dfd6b0a-83ab-47bc-a1ca-7b202a09f83c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3359456943 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 181.usbdev_tx_rx_disruption.3359456943 |
| Directory | /workspace/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/182.usbdev_tx_rx_disruption.3854370888 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 583564711 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:40:29 PM PDT 24 |
| Finished | Aug 16 05:40:31 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-b2eb87d4-bc68-4eb7-8d87-5964f2fe69d5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3854370888 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 182.usbdev_tx_rx_disruption.3854370888 |
| Directory | /workspace/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/183.usbdev_endpoint_types.53328723 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 318071534 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:40:43 PM PDT 24 |
| Finished | Aug 16 05:40:49 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-daf3e20e-76e4-4ecc-846b-9f1313a37bfd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=53328723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.53328723 |
| Directory | /workspace/183.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/183.usbdev_tx_rx_disruption.615366917 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 639702826 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:40:25 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-44291688-cfa6-465a-888e-faa0efc4e9d7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=615366917 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 183.usbdev_tx_rx_disruption.615366917 |
| Directory | /workspace/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/184.usbdev_endpoint_types.3214306417 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 152560373 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-b9cb47cf-3483-4c75-b0ff-4fe4f6680159 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3214306417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.3214306417 |
| Directory | /workspace/184.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/184.usbdev_tx_rx_disruption.1325227093 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 582547485 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-669862a2-b98f-4481-b0f8-6dbac14f8b44 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1325227093 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 184.usbdev_tx_rx_disruption.1325227093 |
| Directory | /workspace/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/185.usbdev_endpoint_types.3676059378 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 538325826 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-751a50e9-ffb5-42e1-a241-30700aaf7c9d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3676059378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.3676059378 |
| Directory | /workspace/185.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/185.usbdev_tx_rx_disruption.1662441641 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 560549472 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a61b4686-57ce-48a5-ac9c-61a9e3d1fa33 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1662441641 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 185.usbdev_tx_rx_disruption.1662441641 |
| Directory | /workspace/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/186.usbdev_endpoint_types.2012090042 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 416779626 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:40:24 PM PDT 24 |
| Finished | Aug 16 05:40:36 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-c1635ffa-299c-4858-9228-b10e07323271 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2012090042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.2012090042 |
| Directory | /workspace/186.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/186.usbdev_tx_rx_disruption.355732459 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 551985016 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-19de3a33-5440-4a01-a807-960e8561f7b9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=355732459 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 186.usbdev_tx_rx_disruption.355732459 |
| Directory | /workspace/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/187.usbdev_endpoint_types.3705980770 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 495834032 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-5c06a670-20ba-4d71-803a-190cbf9eb3cb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3705980770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.3705980770 |
| Directory | /workspace/187.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/187.usbdev_tx_rx_disruption.3577201948 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 519971757 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c6970171-8436-4667-8a1b-76c6dec2893d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3577201948 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 187.usbdev_tx_rx_disruption.3577201948 |
| Directory | /workspace/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/188.usbdev_endpoint_types.1908831273 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 415302356 ps |
| CPU time | 1.2 seconds |
| Started | Aug 16 05:40:24 PM PDT 24 |
| Finished | Aug 16 05:40:25 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-0b24e89c-51f8-4a8b-97ee-72804d53dbc1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1908831273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.1908831273 |
| Directory | /workspace/188.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/188.usbdev_tx_rx_disruption.1604781872 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 518634254 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-f7eb4276-eb86-4d81-9807-e78ff046e324 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1604781872 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 188.usbdev_tx_rx_disruption.1604781872 |
| Directory | /workspace/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/189.usbdev_endpoint_types.1425761294 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 370370595 ps |
| CPU time | 1.29 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-b6b7160f-5bbe-4972-b24a-a6bc1441d8cb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1425761294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.1425761294 |
| Directory | /workspace/189.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/189.usbdev_tx_rx_disruption.3822061529 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 501923494 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-2ef0ed54-be4d-4be8-9f78-49734f0022d6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3822061529 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 189.usbdev_tx_rx_disruption.3822061529 |
| Directory | /workspace/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/19.usbdev_alert_test.504010272 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 84927232 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:47 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-bf0f6317-95ec-4823-9e4a-38ed4f534fbd |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=504010272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.504010272 |
| Directory | /workspace/19.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/19.usbdev_aon_wake_disconnect.1246944922 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 10200683580 ps |
| CPU time | 13.95 seconds |
| Started | Aug 16 05:35:49 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-58066cd5-1d16-4fd6-b305-df7f05036e8f |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1246944922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_a on_wake_disconnect.1246944922 |
| Directory | /workspace/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/19.usbdev_aon_wake_resume.2900282704 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 31197921685 ps |
| CPU time | 43.24 seconds |
| Started | Aug 16 05:35:51 PM PDT 24 |
| Finished | Aug 16 05:36:34 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-a2f4317e-ab90-4dce-a588-0cbd038ad8b9 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2900282704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_a on_wake_resume.2900282704 |
| Directory | /workspace/19.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/19.usbdev_av_buffer.3151283718 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 148072702 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-63656044-3a49-4d8b-9fd3-519dbfe3c2b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31512 83718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_av_buffer.3151283718 |
| Directory | /workspace/19.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/19.usbdev_bitstuff_err.2754456402 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 144169305 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:47 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-2837aaa6-3ab5-4e00-80c5-419db9a1f1a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27544 56402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_bitstuff_err.2754456402 |
| Directory | /workspace/19.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/19.usbdev_data_toggle_clear.260753713 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 263394039 ps |
| CPU time | 1.16 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-15699ad3-b9b4-49a0-b69b-e9e030d2256c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26075 3713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_clear.260753713 |
| Directory | /workspace/19.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/19.usbdev_data_toggle_restore.382254299 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 1023221703 ps |
| CPU time | 2.56 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-03eab896-eb29-41df-a371-e2860cc69c3c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=382254299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.382254299 |
| Directory | /workspace/19.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/19.usbdev_device_address.1554212071 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 42033761196 ps |
| CPU time | 63.05 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:36:52 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-7d42c806-b9c9-456f-8c4a-d883ff6e58c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15542 12071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.1554212071 |
| Directory | /workspace/19.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/19.usbdev_device_timeout.488029080 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 4923869387 ps |
| CPU time | 33.32 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:36:17 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-ea5376eb-dc60-4b1f-a296-0a757cebc3fa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=488029080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.488029080 |
| Directory | /workspace/19.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/19.usbdev_disable_endpoint.3026472735 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 603946487 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:51 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-94edae40-9ec8-4efd-bb02-221f81d0ed2b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30264 72735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_disable_endpoint.3026472735 |
| Directory | /workspace/19.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/19.usbdev_disconnected.606602571 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 138881432 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:51 PM PDT 24 |
| Finished | Aug 16 05:35:52 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-9f7f05bd-005c-4624-babc-774a2739ef6d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60660 2571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_disconnected.606602571 |
| Directory | /workspace/19.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/19.usbdev_enable.2932211950 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 37652916 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-2a8246a4-6bb9-4530-b0ca-ab331d71a10c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29322 11950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_enable.2932211950 |
| Directory | /workspace/19.usbdev_enable/latest |
| Test location | /workspace/coverage/default/19.usbdev_endpoint_access.305746136 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 886528406 ps |
| CPU time | 2.64 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:54 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-12b55042-fa74-4bb5-a6fd-094be6e1a431 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30574 6136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.305746136 |
| Directory | /workspace/19.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/19.usbdev_endpoint_types.2221629469 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 309875268 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-892000da-f0e9-4b21-b062-e0933a848dfe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2221629469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.2221629469 |
| Directory | /workspace/19.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/19.usbdev_fifo_rst.1389731321 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 287819160 ps |
| CPU time | 2.5 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:51 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-b9ed7b65-9ce7-41a7-af27-22f993629661 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13897 31321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_fifo_rst.1389731321 |
| Directory | /workspace/19.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/19.usbdev_in_iso.1947490919 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 166790754 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-70ff3e92-ba14-4360-8fd3-412164921af3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1947490919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.1947490919 |
| Directory | /workspace/19.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/19.usbdev_in_stall.627073223 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 139094005 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:50 PM PDT 24 |
| Finished | Aug 16 05:35:51 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-e1d96506-c432-4a2b-89df-657c5a8c3a53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62707 3223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_in_stall.627073223 |
| Directory | /workspace/19.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/19.usbdev_in_trans.2140316277 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 179653659 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-dda70f01-3b30-4902-ad9f-a802ca06c5f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21403 16277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_in_trans.2140316277 |
| Directory | /workspace/19.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_invalid_sync.4073588847 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 3958553908 ps |
| CPU time | 29.68 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:36:23 PM PDT 24 |
| Peak memory | 218296 kb |
| Host | smart-0da34187-04fb-4cbd-8d97-0f3b768aa533 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4073588847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.4073588847 |
| Directory | /workspace/19.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/19.usbdev_iso_retraction.4099774316 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 12848934505 ps |
| CPU time | 158.73 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:38:26 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-1d345b90-8dd8-4413-ac02-06c6f367b49d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4099774316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.4099774316 |
| Directory | /workspace/19.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/19.usbdev_link_in_err.2738197376 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 209644369 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-74d33278-dd6a-4b58-b8f7-00d40807bb7f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27381 97376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_link_in_err.2738197376 |
| Directory | /workspace/19.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/19.usbdev_link_resume.779472935 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 13113357224 ps |
| CPU time | 19.84 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:36:05 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-745311cf-943e-4525-bcea-34fe8c0616b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77947 2935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_link_resume.779472935 |
| Directory | /workspace/19.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/19.usbdev_link_suspend.3475935439 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 4046104708 ps |
| CPU time | 6.12 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:35:52 PM PDT 24 |
| Peak memory | 207840 kb |
| Host | smart-3f2e23da-476c-47ab-b4c3-f6b7bfc2385d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34759 35439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_link_suspend.3475935439 |
| Directory | /workspace/19.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/19.usbdev_low_speed_traffic.245793241 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 3738397123 ps |
| CPU time | 120.51 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:37:43 PM PDT 24 |
| Peak memory | 218472 kb |
| Host | smart-a17d2f6f-ce60-4ebe-8058-39150d9fe218 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=245793241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.245793241 |
| Directory | /workspace/19.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_inter_pkt_delay.3742399410 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 3912781635 ps |
| CPU time | 112.74 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-0638ec95-63fa-453a-a692-13caa6516e46 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3742399410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.3742399410 |
| Directory | /workspace/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_length_in_transaction.3590752430 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 251666520 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-89105d0a-a38a-420f-9060-7051953f022b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3590752430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.3590752430 |
| Directory | /workspace/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_length_out_transaction.3642807167 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 210378723 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:50 PM PDT 24 |
| Finished | Aug 16 05:35:51 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-9a308d41-a795-41a3-b2b1-9225dcbb2daf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36428 07167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.3642807167 |
| Directory | /workspace/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_max_non_iso_usb_traffic.1603533938 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 1719102003 ps |
| CPU time | 17.07 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:36:11 PM PDT 24 |
| Peak memory | 217436 kb |
| Host | smart-f697b7b4-a5b6-4069-b283-56f335332597 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16035 33938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.1603533938 |
| Directory | /workspace/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/19.usbdev_min_inter_pkt_delay.858460695 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 2169232549 ps |
| CPU time | 20.69 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:36:04 PM PDT 24 |
| Peak memory | 216904 kb |
| Host | smart-b8301b92-1fa1-4948-99a7-112e5ee95083 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=858460695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.858460695 |
| Directory | /workspace/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/19.usbdev_min_length_in_transaction.3450485734 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 153166497 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-036899ca-7013-42e2-b704-7fc0c6cf47fd |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3450485734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.3450485734 |
| Directory | /workspace/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_min_length_out_transaction.3912332545 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 144956962 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-da43110e-d4b9-42b2-bc90-481f2daa4029 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39123 32545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.3912332545 |
| Directory | /workspace/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_out_iso.2375834352 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 192037597 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-6f1c14ba-3102-4fa6-8cdb-9eda82fc7c8c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23758 34352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_out_iso.2375834352 |
| Directory | /workspace/19.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/19.usbdev_out_stall.2961895588 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 190234869 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:35:42 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-5789267e-a31b-40c3-9991-9538a1e73497 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29618 95588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_out_stall.2961895588 |
| Directory | /workspace/19.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/19.usbdev_out_trans_nak.1335553041 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 157184913 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-463e6e5c-0897-4ddc-a1eb-034ee4609721 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13355 53041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_out_trans_nak.1335553041 |
| Directory | /workspace/19.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/19.usbdev_pending_in_trans.1207179492 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 146411627 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:54 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-777daa29-c2ab-4b2a-ad12-d807c8cba4d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12071 79492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pending_in_trans.1207179492 |
| Directory | /workspace/19.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_phy_config_pinflip.2422987970 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 175886594 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:35:54 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-41d49c9d-766f-4781-b7d6-e56087ec9ed8 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2422987970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.2422987970 |
| Directory | /workspace/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/19.usbdev_phy_config_usb_ref_disable.1080496468 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 140562024 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:41 PM PDT 24 |
| Finished | Aug 16 05:35:42 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-157dc7fb-9e70-4eaf-8c0b-257f7b750bf9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10804 96468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.1080496468 |
| Directory | /workspace/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/19.usbdev_phy_pins_sense.2077347096 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 59182724 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-ef1a8fca-b186-4d6e-9fc2-2cf65d028500 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20773 47096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2077347096 |
| Directory | /workspace/19.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/19.usbdev_pkt_buffer.1509975825 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 21591423539 ps |
| CPU time | 61.3 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-4b9ac635-c482-4a42-8a45-6400dea53049 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15099 75825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pkt_buffer.1509975825 |
| Directory | /workspace/19.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/19.usbdev_pkt_received.2454068444 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 176842983 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-25e4b11e-ff93-4046-92da-57a56b49d79e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24540 68444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pkt_received.2454068444 |
| Directory | /workspace/19.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/19.usbdev_pkt_sent.3502804166 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 223731709 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-7bfa3589-caa1-493f-ad7e-f795a7f46c2c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35028 04166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_pkt_sent.3502804166 |
| Directory | /workspace/19.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/19.usbdev_random_length_in_transaction.2290257465 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 203119353 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-0e4f4944-874b-409e-b0f3-e3bcf20f97f5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22902 57465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_in_transaction.2290257465 |
| Directory | /workspace/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_random_length_out_transaction.828468386 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 199804831 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-f4e8f6e9-e2db-4fc7-b067-3a5eacbb3f57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82846 8386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.828468386 |
| Directory | /workspace/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/19.usbdev_resume_link_active.1626978065 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 20161406360 ps |
| CPU time | 24.83 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:36:13 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-69f73e98-22c9-4afa-803e-4231117b738f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16269 78065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_resume_link_active.1626978065 |
| Directory | /workspace/19.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/19.usbdev_rx_crc_err.1713533658 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 174809594 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:54 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-85eb1222-e03d-43d3-8a43-557b5613a3d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17135 33658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_rx_crc_err.1713533658 |
| Directory | /workspace/19.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/19.usbdev_rx_full.3129874168 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 359082219 ps |
| CPU time | 1.34 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-0a288c6f-14b0-403d-a143-670d7d41374f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31298 74168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_rx_full.3129874168 |
| Directory | /workspace/19.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/19.usbdev_setup_stage.4164974309 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 156084633 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-b784f0a4-7052-4dfa-b9a6-cc7f6bf1cb8a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41649 74309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_setup_stage.4164974309 |
| Directory | /workspace/19.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/19.usbdev_setup_trans_ignored.1056136827 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 164109316 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-da5c7ef6-8ab0-4ca7-98a0-61175b3b4f95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10561 36827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_setup_trans_ignored.1056136827 |
| Directory | /workspace/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/19.usbdev_smoke.1558346794 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 222730866 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-021c67fd-b595-460a-8504-b507d5719f11 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15583 46794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.1558346794 |
| Directory | /workspace/19.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/19.usbdev_spurious_pids_ignored.1949162194 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 3553164506 ps |
| CPU time | 104.11 seconds |
| Started | Aug 16 05:35:50 PM PDT 24 |
| Finished | Aug 16 05:37:34 PM PDT 24 |
| Peak memory | 217496 kb |
| Host | smart-89b5b22c-5a4a-425f-9b4f-ee4cc07544d2 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1949162194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.1949162194 |
| Directory | /workspace/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/19.usbdev_stall_priority_over_nak.2189574680 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 173308814 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-476b31b7-dd41-479b-981d-854a4a6f080b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21895 74680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.2189574680 |
| Directory | /workspace/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/19.usbdev_stall_trans.4088747270 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 188463200 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-368a1db6-55a5-459e-aec9-8f5aab158e53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40887 47270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_trans.4088747270 |
| Directory | /workspace/19.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/19.usbdev_stream_len_max.1702326723 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 375488085 ps |
| CPU time | 1.23 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-f9f0182d-dabc-46ae-96eb-18b76bded9f9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17023 26723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.1702326723 |
| Directory | /workspace/19.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/19.usbdev_streaming_out.3766191538 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 2260049472 ps |
| CPU time | 66.56 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:36:54 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-9399ca8e-2587-4d19-a818-171f5e07da9c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37661 91538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_streaming_out.3766191538 |
| Directory | /workspace/19.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/19.usbdev_timeout_missing_host_handshake.35004434 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 1019857653 ps |
| CPU time | 23.32 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:36:17 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-3225435b-e449-4546-a2ac-80bea3ac773b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35004434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_ handshake.35004434 |
| Directory | /workspace/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/19.usbdev_tx_rx_disruption.2079208316 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 579503311 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-83e3cf18-b24b-495c-b3ce-7cc6fb4b4f0f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2079208316 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_tx_rx_disruption.2079208316 |
| Directory | /workspace/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/190.usbdev_endpoint_types.829700999 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 448705048 ps |
| CPU time | 1.32 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-b8b1764a-4779-4262-9456-98e6459b3cc7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=829700999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.829700999 |
| Directory | /workspace/190.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/190.usbdev_tx_rx_disruption.3755477994 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 540094032 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-a26c9ab9-01c4-46f1-a2cb-5dbcea0f4c84 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3755477994 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 190.usbdev_tx_rx_disruption.3755477994 |
| Directory | /workspace/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/191.usbdev_endpoint_types.1030610698 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 375721179 ps |
| CPU time | 1.25 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-c416ae85-09ba-457c-be61-bf79f8fefc09 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1030610698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.1030610698 |
| Directory | /workspace/191.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/191.usbdev_tx_rx_disruption.2215455685 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 421407876 ps |
| CPU time | 1.35 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-602d8be7-0584-4f35-86ba-5e3f6cb21007 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2215455685 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 191.usbdev_tx_rx_disruption.2215455685 |
| Directory | /workspace/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/192.usbdev_endpoint_types.3924513506 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 626597546 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d7be86e9-e176-4b9b-abe0-90c874718e9c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3924513506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.3924513506 |
| Directory | /workspace/192.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/192.usbdev_tx_rx_disruption.3130082967 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 580486748 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-e61a18ac-7963-45ca-b5fb-69502a6606e2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3130082967 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 192.usbdev_tx_rx_disruption.3130082967 |
| Directory | /workspace/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/193.usbdev_endpoint_types.3476958079 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 205142297 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-5820d956-e523-478b-91a8-51e876ba97fc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3476958079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.3476958079 |
| Directory | /workspace/193.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/193.usbdev_tx_rx_disruption.493999824 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 600146727 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:05 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-09e34d90-2bf8-4ee4-b576-f2b211a979ef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=493999824 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 193.usbdev_tx_rx_disruption.493999824 |
| Directory | /workspace/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/194.usbdev_tx_rx_disruption.2057723882 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 527985063 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:40:12 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-0977995e-c404-4533-bd73-d75865cd9d24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2057723882 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 194.usbdev_tx_rx_disruption.2057723882 |
| Directory | /workspace/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/195.usbdev_endpoint_types.3063104583 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 241100142 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-b10a1e5b-414c-4f61-bfac-767d3bac1d5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3063104583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.3063104583 |
| Directory | /workspace/195.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/195.usbdev_tx_rx_disruption.854144835 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 492026794 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:25 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-8500d16f-1dcf-4464-ac3c-3b8bd4f35914 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=854144835 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 195.usbdev_tx_rx_disruption.854144835 |
| Directory | /workspace/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/196.usbdev_endpoint_types.2325070447 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 547030178 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:11 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a8a18d1c-d964-4c05-a83f-e85367af7981 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2325070447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.2325070447 |
| Directory | /workspace/196.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/196.usbdev_tx_rx_disruption.1849604151 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 577144577 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-18bb96b3-ea84-43e0-98da-1cc8df7e3cb9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1849604151 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 196.usbdev_tx_rx_disruption.1849604151 |
| Directory | /workspace/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/197.usbdev_endpoint_types.3981844072 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 558779808 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-cdbf34bb-3bbf-41ae-8744-8defc54000bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3981844072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.3981844072 |
| Directory | /workspace/197.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/197.usbdev_tx_rx_disruption.2770951116 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 508194802 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-80253102-b7f7-4b5c-89ae-dff262a83673 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2770951116 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 197.usbdev_tx_rx_disruption.2770951116 |
| Directory | /workspace/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/198.usbdev_endpoint_types.1627398868 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 497010357 ps |
| CPU time | 1.28 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7ce0e35c-4baf-47d3-a431-8e686241dcc7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1627398868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.1627398868 |
| Directory | /workspace/198.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/198.usbdev_tx_rx_disruption.2738162907 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 519032106 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:40:12 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-6ae53020-604f-4f20-bbfa-2db7f595ee60 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2738162907 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 198.usbdev_tx_rx_disruption.2738162907 |
| Directory | /workspace/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/199.usbdev_endpoint_types.312312504 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 697060145 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:23 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-a39253ed-534d-4422-9628-b52bd204d5eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=312312504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.312312504 |
| Directory | /workspace/199.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/199.usbdev_tx_rx_disruption.52087266 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 567859600 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-7c24a3b1-d7f0-4e34-8211-be2520d0d8ff |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52087266 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 199.usbdev_tx_rx_disruption.52087266 |
| Directory | /workspace/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/2.usbdev_alert_test.1406608123 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 35794551 ps |
| CPU time | 0.63 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:06 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8660be99-fd80-41c4-9795-b3a98805d683 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1406608123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.1406608123 |
| Directory | /workspace/2.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/2.usbdev_aon_wake_disconnect.1381800186 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 6253503491 ps |
| CPU time | 9.51 seconds |
| Started | Aug 16 05:32:54 PM PDT 24 |
| Finished | Aug 16 05:33:04 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-0c327082-c30c-475e-b66c-4ee28fe4c49d |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1381800186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_ao n_wake_disconnect.1381800186 |
| Directory | /workspace/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/2.usbdev_aon_wake_reset.3274183658 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 19494484776 ps |
| CPU time | 22.16 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:33:26 PM PDT 24 |
| Peak memory | 207840 kb |
| Host | smart-2b2aab4b-f511-4f99-b68c-9f4d0359e964 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3274183658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.3274183658 |
| Directory | /workspace/2.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/2.usbdev_aon_wake_resume.2425587114 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 29320779641 ps |
| CPU time | 35.42 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:40 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-83039ed7-374b-4714-a976-436460d44cfb |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2425587114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_ao n_wake_resume.2425587114 |
| Directory | /workspace/2.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/2.usbdev_av_buffer.1569207808 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 177140334 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:00 PM PDT 24 |
| Finished | Aug 16 05:33:01 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-8c70e6c7-8505-4d89-a7ab-4f2a27a38a2a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15692 07808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_av_buffer.1569207808 |
| Directory | /workspace/2.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/2.usbdev_av_overflow.1122671267 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 145608995 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:32:54 PM PDT 24 |
| Finished | Aug 16 05:32:55 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-4abd0046-2d5d-45d1-999f-d3388b3ecc84 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11226 71267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_av_overflow.1122671267 |
| Directory | /workspace/2.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/2.usbdev_bitstuff_err.59954934 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 182978245 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:33:02 PM PDT 24 |
| Finished | Aug 16 05:33:03 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-4529adc0-b7b0-43da-9e93-8f8d0d570f4f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59954 934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_bitstuff_err.59954934 |
| Directory | /workspace/2.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_data_toggle_clear.1579278575 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 224610482 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:32:58 PM PDT 24 |
| Finished | Aug 16 05:32:59 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-c069cec6-08ab-4c6e-81a3-79d5b2449451 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15792 78575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_clear.1579278575 |
| Directory | /workspace/2.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/2.usbdev_device_address.2336923543 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 39805629233 ps |
| CPU time | 66.24 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:34:15 PM PDT 24 |
| Peak memory | 207920 kb |
| Host | smart-c48a4a36-8cb5-4a1f-bbff-8995eff4a761 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23369 23543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.2336923543 |
| Directory | /workspace/2.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/2.usbdev_device_timeout.1024295973 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 8393419011 ps |
| CPU time | 55.01 seconds |
| Started | Aug 16 05:32:58 PM PDT 24 |
| Finished | Aug 16 05:33:53 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-fdba7439-f632-4b07-8498-f4546e3d1c88 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1024295973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.1024295973 |
| Directory | /workspace/2.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/2.usbdev_disable_endpoint.1628879009 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 507492903 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:32:55 PM PDT 24 |
| Finished | Aug 16 05:32:57 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-6f62ef81-36db-461c-bdde-19a0321f11a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16288 79009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_disable_endpoint.1628879009 |
| Directory | /workspace/2.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/2.usbdev_disconnected.2304105991 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 166385652 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:32:57 PM PDT 24 |
| Finished | Aug 16 05:32:57 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-4d7eaba3-80c2-4173-aa9a-c66f75f50b1d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23041 05991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_disconnected.2304105991 |
| Directory | /workspace/2.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/2.usbdev_enable.4015415799 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 37387637 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:32:54 PM PDT 24 |
| Finished | Aug 16 05:32:55 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-37e61688-f0cd-44d2-a9a9-61e7a5dc99d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40154 15799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_enable.4015415799 |
| Directory | /workspace/2.usbdev_enable/latest |
| Test location | /workspace/coverage/default/2.usbdev_endpoint_access.3964500636 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 785054463 ps |
| CPU time | 2.31 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:33:05 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-b69f0bf8-01c2-4a75-82f1-32c813901023 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39645 00636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.3964500636 |
| Directory | /workspace/2.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/2.usbdev_endpoint_types.3762144974 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 411116151 ps |
| CPU time | 1.25 seconds |
| Started | Aug 16 05:33:01 PM PDT 24 |
| Finished | Aug 16 05:33:02 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-9626d0c3-71bc-40d2-b71f-e8458360173f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3762144974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.3762144974 |
| Directory | /workspace/2.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/2.usbdev_fifo_rst.3516274367 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 341256843 ps |
| CPU time | 2.48 seconds |
| Started | Aug 16 05:33:00 PM PDT 24 |
| Finished | Aug 16 05:33:02 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-abaed69d-0222-4c19-b0bb-0712e60d3cdf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35162 74367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_fifo_rst.3516274367 |
| Directory | /workspace/2.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_hiclk.1355982698 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 82173598336 ps |
| CPU time | 136.54 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:35:22 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-d55fa1a7-8d59-4c18-9309-ffacbd07c61b |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=1355982698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.1355982698 |
| Directory | /workspace/2.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_hiclk_max.741703504 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 102214628997 ps |
| CPU time | 172.71 seconds |
| Started | Aug 16 05:32:51 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-092d1081-d613-4631-800d-e787225596cc |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=741703504 -assert no postproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspac e/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk_max.741703504 |
| Directory | /workspace/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_loclk.4264163985 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 119115431512 ps |
| CPU time | 205.64 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:36:30 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-9141e76c-74c2-4940-9f6b-33db8b30019a |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=4264163985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.4264163985 |
| Directory | /workspace/2.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/2.usbdev_freq_phase.4286733230 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 100146786868 ps |
| CPU time | 145.19 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:35:29 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-e733af4d-94d5-4c4a-8ac2-8dfc263f71a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42867 33230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_phase.4286733230 |
| Directory | /workspace/2.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/2.usbdev_in_iso.1612628193 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 150922110 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:06 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-8e4daeed-5789-409b-8db0-e0147be249a8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1612628193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.1612628193 |
| Directory | /workspace/2.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/2.usbdev_in_stall.899369960 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 213519533 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:32:56 PM PDT 24 |
| Finished | Aug 16 05:32:57 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-5f077e89-ae01-4801-835a-0f06ddde1aab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89936 9960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_in_stall.899369960 |
| Directory | /workspace/2.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/2.usbdev_in_trans.2286488765 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 230174200 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:33:01 PM PDT 24 |
| Finished | Aug 16 05:33:03 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-9366e88f-e5ca-49e8-b792-23d5ba23b865 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22864 88765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_in_trans.2286488765 |
| Directory | /workspace/2.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_invalid_sync.1692394480 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 4204671816 ps |
| CPU time | 42.93 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:49 PM PDT 24 |
| Peak memory | 224064 kb |
| Host | smart-bf9056c5-6cd1-4bc8-822e-a78d6e89ad9e |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1692394480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.1692394480 |
| Directory | /workspace/2.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/2.usbdev_iso_retraction.4024866636 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 4521628899 ps |
| CPU time | 48.96 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:54 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-76307170-a8d8-4160-a8ae-4cee1bf41ef6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4024866636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.4024866636 |
| Directory | /workspace/2.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/2.usbdev_link_in_err.2127559723 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 255885693 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:33:02 PM PDT 24 |
| Finished | Aug 16 05:33:03 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-1dbe5184-239d-4161-823c-0750748c4675 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21275 59723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_link_in_err.2127559723 |
| Directory | /workspace/2.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_link_resume.154182430 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 32114611631 ps |
| CPU time | 50.45 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:55 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-1df84590-8b09-4dd3-bcf1-b5fa27b7bc53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15418 2430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_link_resume.154182430 |
| Directory | /workspace/2.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/2.usbdev_link_suspend.4157119663 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 6004465260 ps |
| CPU time | 8.3 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:14 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-9625fcee-13cf-44b3-837e-04dc016444b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41571 19663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_link_suspend.4157119663 |
| Directory | /workspace/2.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/2.usbdev_low_speed_traffic.4157863198 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 3742881991 ps |
| CPU time | 39.74 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:44 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-0e1f4a63-4804-4046-aa7f-07e995193946 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4157863198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.4157863198 |
| Directory | /workspace/2.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_inter_pkt_delay.516853248 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 2685948957 ps |
| CPU time | 23.78 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:32 PM PDT 24 |
| Peak memory | 217700 kb |
| Host | smart-41715cfc-f5b1-454b-b6b4-904215290167 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=516853248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.516853248 |
| Directory | /workspace/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_length_in_transaction.100171474 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 254585969 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:32:57 PM PDT 24 |
| Finished | Aug 16 05:32:58 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-daaf3c8e-b88c-426c-b4e3-c57bd4e7c5d5 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=100171474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.100171474 |
| Directory | /workspace/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_length_out_transaction.3886336427 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 233899209 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:32:58 PM PDT 24 |
| Finished | Aug 16 05:33:00 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-7e5332c2-5fec-455b-bd9b-1b18a13a588c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38863 36427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.3886336427 |
| Directory | /workspace/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_non_iso_usb_traffic.349979007 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 1740416114 ps |
| CPU time | 50.71 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:33:54 PM PDT 24 |
| Peak memory | 215848 kb |
| Host | smart-b8c3d4d5-e46f-4715-8cc2-f70f90012932 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34997 9007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.349979007 |
| Directory | /workspace/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_max_usb_traffic.441109898 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 2880436842 ps |
| CPU time | 84.61 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:34:29 PM PDT 24 |
| Peak memory | 215984 kb |
| Host | smart-f65fc506-177e-4e8f-9257-32091a6184c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=441109898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.441109898 |
| Directory | /workspace/2.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/2.usbdev_min_inter_pkt_delay.3553043480 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 4285680273 ps |
| CPU time | 45.64 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:52 PM PDT 24 |
| Peak memory | 217508 kb |
| Host | smart-fbeef1c1-0211-4c9c-8885-c62579db19bb |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3553043480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.3553043480 |
| Directory | /workspace/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/2.usbdev_min_length_in_transaction.3372691553 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 168025733 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:32:59 PM PDT 24 |
| Finished | Aug 16 05:33:00 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-6dd40b09-1364-4976-b0a7-c3714832f35e |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3372691553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.3372691553 |
| Directory | /workspace/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_min_length_out_transaction.1212590895 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 154289821 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:07 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-e34eb314-e6ea-4b7c-a7d1-a06ed1c373ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12125 90895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.1212590895 |
| Directory | /workspace/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_nak_trans.409287841 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 201814502 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-dc50559a-7c9b-4b1a-bdf1-71e1f8745304 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40928 7841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_nak_trans.409287841 |
| Directory | /workspace/2.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_out_iso.2691236029 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 165730654 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:33:05 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-ce432059-2baa-4ec8-894f-8e4e7da1f479 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26912 36029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_out_iso.2691236029 |
| Directory | /workspace/2.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/2.usbdev_out_stall.2093289840 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 182433545 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:33:04 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-5d4f4f5f-30d6-45b2-acf1-1aaf497b257b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20932 89840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_out_stall.2093289840 |
| Directory | /workspace/2.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/2.usbdev_out_trans_nak.2815442731 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 157198362 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:06 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-064db8a6-d4d2-4633-98c0-cf92e360ec61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28154 42731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_out_trans_nak.2815442731 |
| Directory | /workspace/2.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/2.usbdev_pending_in_trans.4046382252 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 217245435 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:10 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-06970d43-4367-4667-89fb-05159ef59041 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40463 82252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pending_in_trans.4046382252 |
| Directory | /workspace/2.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_config_pinflip.2874385790 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 253849697 ps |
| CPU time | 1.11 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:09 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-eae93cf7-df2a-4686-881c-6b62a776b8ec |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2874385790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.2874385790 |
| Directory | /workspace/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_config_rand_bus_type.145245283 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 232167271 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:33:00 PM PDT 24 |
| Finished | Aug 16 05:33:01 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-43b72161-36b9-4cce-8a46-1ffc21220648 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14524 5283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.145245283 |
| Directory | /workspace/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_config_usb_ref_disable.646907574 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 146407172 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:10 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-0b08efb3-14f4-439e-aed3-86687588d3fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64690 7574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.646907574 |
| Directory | /workspace/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/2.usbdev_phy_pins_sense.1794124976 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 54904546 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:07 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-a69f3d87-a32b-4dac-9729-a7da9cd17f29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17941 24976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.1794124976 |
| Directory | /workspace/2.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/2.usbdev_pkt_buffer.1042855428 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 13204346400 ps |
| CPU time | 34.69 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:42 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-c10cd2c2-1fa8-44d8-be93-f0ee1bdf76c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10428 55428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pkt_buffer.1042855428 |
| Directory | /workspace/2.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/2.usbdev_pkt_received.2438119396 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 208955400 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:02 PM PDT 24 |
| Finished | Aug 16 05:33:03 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-b3db4617-613d-4d19-b56f-dccf9ff201e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24381 19396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pkt_received.2438119396 |
| Directory | /workspace/2.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/2.usbdev_pkt_sent.2496850864 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 173891668 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:33:05 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-3222bf1d-a05d-48ba-8d7d-32454415d8e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24968 50864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pkt_sent.2496850864 |
| Directory | /workspace/2.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/2.usbdev_rand_bus_disconnects.3486868843 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 7695862816 ps |
| CPU time | 46.53 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:52 PM PDT 24 |
| Peak memory | 224012 kb |
| Host | smart-6c73d3ae-a44b-4b41-b8e4-c238286af612 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3486868843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.3486868843 |
| Directory | /workspace/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/2.usbdev_rand_bus_resets.1673336911 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 6721390615 ps |
| CPU time | 81.32 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 219104 kb |
| Host | smart-7d0fa6b1-38f5-458d-894d-30f5e311ebb3 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1673336911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.1673336911 |
| Directory | /workspace/2.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/2.usbdev_rand_suspends.3279622331 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 10376255559 ps |
| CPU time | 193.28 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:36:23 PM PDT 24 |
| Peak memory | 224096 kb |
| Host | smart-4c72aefa-6e33-435b-b1a2-1ab7873f9d3c |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3279622331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.3279622331 |
| Directory | /workspace/2.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/2.usbdev_random_length_in_transaction.1090136435 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 251454166 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:06 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-ae6a8143-4aeb-4471-a35f-778b97eac959 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10901 36435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_in_transaction.1090136435 |
| Directory | /workspace/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_random_length_out_transaction.3610558526 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 156212561 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:33:04 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-79e5977d-bc66-49e4-865c-e4f84542e370 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36105 58526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.3610558526 |
| Directory | /workspace/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/2.usbdev_resume_link_active.746390424 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 20158585053 ps |
| CPU time | 28.5 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:38 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-b1d3f54f-8c54-4369-9086-412590ff72d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74639 0424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_resume_link_active.746390424 |
| Directory | /workspace/2.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/2.usbdev_rx_crc_err.976333555 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 153557236 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:07 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-3cdaf3bd-2bd0-4f1c-ad31-14865aec9bf3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97633 3555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rx_crc_err.976333555 |
| Directory | /workspace/2.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_rx_full.2133961631 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 324118749 ps |
| CPU time | 1.19 seconds |
| Started | Aug 16 05:33:07 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-bb1e8b7b-d612-423a-b629-00f46b780e73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21339 61631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rx_full.2133961631 |
| Directory | /workspace/2.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/2.usbdev_rx_pid_err.2137947825 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 152168556 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:06 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-0acaae8d-3312-4d78-846d-c94d658db16b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21379 47825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rx_pid_err.2137947825 |
| Directory | /workspace/2.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/2.usbdev_sec_cm.1773575186 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 680792786 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 224124 kb |
| Host | smart-8b038264-43da-48ac-8eb6-5312641b8947 |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1773575186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.1773575186 |
| Directory | /workspace/2.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_priority.1419250326 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 405555140 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:09 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-2d373f1a-7e20-4146-917a-d3454550ce10 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14192 50326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.1419250326 |
| Directory | /workspace/2.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_priority_over_stall_response.3487451839 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 194847303 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:33:01 PM PDT 24 |
| Finished | Aug 16 05:33:02 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-137e0538-dd3c-4d96-8047-5f21c28780b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34874 51839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.3487451839 |
| Directory | /workspace/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_stage.2127799324 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 150151173 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:33:04 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-6e9df727-bbf5-4aa6-b933-37dcf5162cd6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21277 99324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_stage.2127799324 |
| Directory | /workspace/2.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/2.usbdev_setup_trans_ignored.2850167015 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 161112236 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:10 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-c70f7e0e-47b9-4c7e-91c3-bef7067b0502 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28501 67015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_trans_ignored.2850167015 |
| Directory | /workspace/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/2.usbdev_smoke.2321568495 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 217762392 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:33:07 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-b2ba7ea2-fafb-483a-a2d3-00e90670cabd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23215 68495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.2321568495 |
| Directory | /workspace/2.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/2.usbdev_spurious_pids_ignored.2189664733 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 2941133803 ps |
| CPU time | 86.36 seconds |
| Started | Aug 16 05:33:02 PM PDT 24 |
| Finished | Aug 16 05:34:28 PM PDT 24 |
| Peak memory | 217624 kb |
| Host | smart-17143356-499e-4591-8d1a-16ba2d39dc5c |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2189664733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.2189664733 |
| Directory | /workspace/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/2.usbdev_stall_priority_over_nak.1943191479 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 211464415 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:06 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-89f32bab-2159-491d-abc6-8d89d1b56fa1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19431 91479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.1943191479 |
| Directory | /workspace/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/2.usbdev_stall_trans.3796858963 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 184689536 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:01 PM PDT 24 |
| Finished | Aug 16 05:33:02 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-cf3b6678-08a2-4e2b-9fdc-32f8870b8875 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37968 58963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_trans.3796858963 |
| Directory | /workspace/2.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/2.usbdev_stream_len_max.3986201262 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 434694574 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:07 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-3f09d905-7514-46e0-b69a-7fb1b87f64a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39862 01262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.3986201262 |
| Directory | /workspace/2.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/2.usbdev_streaming_out.1399522907 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 1786687384 ps |
| CPU time | 17.82 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:33:22 PM PDT 24 |
| Peak memory | 224080 kb |
| Host | smart-95e4f63e-5e6e-4f30-8aae-29e1950d28dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13995 22907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_streaming_out.1399522907 |
| Directory | /workspace/2.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/2.usbdev_timeout_missing_host_handshake.1474296577 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 1521119401 ps |
| CPU time | 12.79 seconds |
| Started | Aug 16 05:33:01 PM PDT 24 |
| Finished | Aug 16 05:33:14 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-1839541f-0247-4fb5-bc07-30e33e527966 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1474296577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host _handshake.1474296577 |
| Directory | /workspace/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/2.usbdev_tx_rx_disruption.3324687187 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 547781742 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-64a5ad04-be25-4504-858a-89db269c8d30 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3324687187 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_tx_rx_disruption.3324687187 |
| Directory | /workspace/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/20.usbdev_alert_test.58045498 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 43046401 ps |
| CPU time | 0.65 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:44 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-959075c8-2a0c-4736-a820-6b82fcfcbf29 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=58045498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.58045498 |
| Directory | /workspace/20.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/20.usbdev_aon_wake_disconnect.3239488398 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 11080789973 ps |
| CPU time | 15.85 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:36:01 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-77e46274-2c55-44bc-86d1-e98f7f37ef01 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3239488398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_a on_wake_disconnect.3239488398 |
| Directory | /workspace/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/20.usbdev_aon_wake_reset.1956808554 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 18680591582 ps |
| CPU time | 22.37 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:36:06 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-dd59fcb8-a1b8-4162-a945-922e9f397ea2 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1956808554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.1956808554 |
| Directory | /workspace/20.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/20.usbdev_aon_wake_resume.1890994907 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 28590313136 ps |
| CPU time | 33.46 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:36:26 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-21360911-4129-43b3-b1b9-007c9688afa2 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1890994907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_a on_wake_resume.1890994907 |
| Directory | /workspace/20.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/20.usbdev_av_buffer.902692644 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 161832651 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-be43cd39-d211-4dff-8258-ac33663723af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90269 2644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_av_buffer.902692644 |
| Directory | /workspace/20.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/20.usbdev_bitstuff_err.502860377 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 187241843 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-3f1e8fe1-e835-452d-82c6-9cbe56ad93aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50286 0377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_bitstuff_err.502860377 |
| Directory | /workspace/20.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/20.usbdev_data_toggle_clear.4055869825 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 325352446 ps |
| CPU time | 1.25 seconds |
| Started | Aug 16 05:35:50 PM PDT 24 |
| Finished | Aug 16 05:35:51 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-05dc8a4e-5a72-4ac6-b8f7-32f4967f5d8c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40558 69825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_clear.4055869825 |
| Directory | /workspace/20.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/20.usbdev_data_toggle_restore.2309426319 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 814583468 ps |
| CPU time | 2.26 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-876d6c31-5aba-4d81-a118-9c38338d8d73 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2309426319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.2309426319 |
| Directory | /workspace/20.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/20.usbdev_device_timeout.89100107 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 3882400382 ps |
| CPU time | 34.17 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:36:23 PM PDT 24 |
| Peak memory | 207824 kb |
| Host | smart-d1567e83-273f-4e93-9592-9f58bf506b3e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89100107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.89100107 |
| Directory | /workspace/20.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/20.usbdev_disable_endpoint.2981279415 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 1008355379 ps |
| CPU time | 2.21 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d979b783-60e6-4991-9bf3-86760a45246e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29812 79415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disable_endpoint.2981279415 |
| Directory | /workspace/20.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/20.usbdev_disconnected.2140235883 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 151208853 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-d86a33b1-a98c-4150-bee5-baba71088566 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21402 35883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disconnected.2140235883 |
| Directory | /workspace/20.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/20.usbdev_enable.1931347818 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 36656151 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:54 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-bc6b00b8-1188-40f7-8b6e-651da0a44aee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19313 47818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_enable.1931347818 |
| Directory | /workspace/20.usbdev_enable/latest |
| Test location | /workspace/coverage/default/20.usbdev_endpoint_access.2982927722 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 914279240 ps |
| CPU time | 2.65 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-59b4e974-72ac-477b-b7ac-56ba7d5b61b7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29829 27722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.2982927722 |
| Directory | /workspace/20.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/20.usbdev_endpoint_types.634248332 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 648488016 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:35:46 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-90a30e9d-f10a-432d-9d5c-23b95dd0bfbd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=634248332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.634248332 |
| Directory | /workspace/20.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/20.usbdev_fifo_rst.246543812 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 240586149 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-dbb8a30f-e3b6-47ea-9fc5-1870c670c714 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24654 3812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_fifo_rst.246543812 |
| Directory | /workspace/20.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/20.usbdev_in_iso.3594189409 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 188492203 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-aa199f82-240f-4508-a59b-86bb9d749a90 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3594189409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.3594189409 |
| Directory | /workspace/20.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/20.usbdev_in_stall.1772928729 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 144372232 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:51 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207304 kb |
| Host | smart-2c7b9ed5-765a-43b1-95c6-fb5fb3dec410 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17729 28729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_in_stall.1772928729 |
| Directory | /workspace/20.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/20.usbdev_in_trans.1241876017 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 177127332 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:48 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f7183b69-3d54-4085-8495-92c10747bd19 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12418 76017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_in_trans.1241876017 |
| Directory | /workspace/20.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_invalid_sync.3902801339 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 3185638259 ps |
| CPU time | 22.45 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:36:09 PM PDT 24 |
| Peak memory | 216040 kb |
| Host | smart-f710f93f-a95d-423c-bdf2-0a9691c0d6b0 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3902801339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.3902801339 |
| Directory | /workspace/20.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/20.usbdev_iso_retraction.316834441 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 8640889994 ps |
| CPU time | 62.31 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:37:01 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-c6603205-4303-45c7-9b29-4f2c7e60c88b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=316834441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.316834441 |
| Directory | /workspace/20.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/20.usbdev_link_in_err.1915601417 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 215924427 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:35:54 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-183a1bd3-bb25-4736-ad77-3276a0c43043 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19156 01417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_link_in_err.1915601417 |
| Directory | /workspace/20.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/20.usbdev_link_resume.816538859 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 12828847713 ps |
| CPU time | 15.79 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-25c76985-4920-4db3-aa28-3a163b89861b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81653 8859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_link_resume.816538859 |
| Directory | /workspace/20.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/20.usbdev_link_suspend.3471824427 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 3716772575 ps |
| CPU time | 5.37 seconds |
| Started | Aug 16 05:35:46 PM PDT 24 |
| Finished | Aug 16 05:35:52 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-bba4d5b8-d8d1-4073-9713-95e25981dbad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34718 24427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_link_suspend.3471824427 |
| Directory | /workspace/20.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/20.usbdev_low_speed_traffic.4138511720 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 2646906195 ps |
| CPU time | 73.85 seconds |
| Started | Aug 16 05:35:49 PM PDT 24 |
| Finished | Aug 16 05:37:03 PM PDT 24 |
| Peak memory | 218712 kb |
| Host | smart-3c25fdc7-304c-4d30-82fb-6f9a6ca57f8c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4138511720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.4138511720 |
| Directory | /workspace/20.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_inter_pkt_delay.987099220 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 2873649954 ps |
| CPU time | 28.69 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:36:13 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-c17cae4c-8105-48db-97c9-7830a740a55d |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=987099220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.987099220 |
| Directory | /workspace/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_length_in_transaction.2368456291 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 296860439 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-7c4a2275-8893-46af-a3ce-dc509b2c92f8 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2368456291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.2368456291 |
| Directory | /workspace/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_length_out_transaction.3140898427 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 187815333 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7a6ef4a9-07f2-4f34-a2eb-dff3795ab2ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31408 98427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.3140898427 |
| Directory | /workspace/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_max_non_iso_usb_traffic.2059298868 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 2532084755 ps |
| CPU time | 19.83 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:36:12 PM PDT 24 |
| Peak memory | 224084 kb |
| Host | smart-69939f3d-a85d-4843-8fe6-771b77e4dafa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20592 98868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.2059298868 |
| Directory | /workspace/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/20.usbdev_min_inter_pkt_delay.2770009699 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 3631163288 ps |
| CPU time | 36.17 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:36:29 PM PDT 24 |
| Peak memory | 217568 kb |
| Host | smart-abb6417e-8ce3-4c1d-933d-0a3400069091 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2770009699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.2770009699 |
| Directory | /workspace/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/20.usbdev_min_length_in_transaction.2293406370 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 173631751 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:54 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-979bce26-44b4-4a6e-92d9-d77eb0c40419 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2293406370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.2293406370 |
| Directory | /workspace/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_min_length_out_transaction.3403835488 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 183474573 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-5d72bd85-aad6-4215-b6b8-6006b35ec1fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34038 35488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.3403835488 |
| Directory | /workspace/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_out_iso.1620089993 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 175241234 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-fb1896aa-48d4-4d89-8f1b-b1331a671e20 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16200 89993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_out_iso.1620089993 |
| Directory | /workspace/20.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/20.usbdev_out_stall.151875413 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 166627627 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:49 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ede1564c-3afd-4989-a9ba-058747d38a51 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15187 5413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_out_stall.151875413 |
| Directory | /workspace/20.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/20.usbdev_out_trans_nak.3670791657 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 163535227 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:36:00 PM PDT 24 |
| Finished | Aug 16 05:36:01 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-25a62e56-931b-4779-b0a0-8d99c5fcaf34 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36707 91657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_out_trans_nak.3670791657 |
| Directory | /workspace/20.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/20.usbdev_pending_in_trans.3106217853 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 159972588 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-7bf7eba2-faef-4f97-af89-356d20a1555c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31062 17853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pending_in_trans.3106217853 |
| Directory | /workspace/20.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_phy_config_pinflip.3578245149 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 310254747 ps |
| CPU time | 1.19 seconds |
| Started | Aug 16 05:35:43 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-bb1c9bd1-a70e-4fb6-a0c3-b897c3f17610 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3578245149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.3578245149 |
| Directory | /workspace/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/20.usbdev_phy_config_usb_ref_disable.1003118981 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 143144405 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:35:44 PM PDT 24 |
| Finished | Aug 16 05:35:45 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-d7ee6e9e-11e3-4cf7-86ad-ff8e69318860 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10031 18981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.1003118981 |
| Directory | /workspace/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/20.usbdev_phy_pins_sense.3901504005 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 76916424 ps |
| CPU time | 0.76 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:35:58 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-644a49ac-0414-436d-ae62-595d5f027853 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39015 04005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.3901504005 |
| Directory | /workspace/20.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/20.usbdev_pkt_buffer.3416506154 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 16437480534 ps |
| CPU time | 41.72 seconds |
| Started | Aug 16 05:35:45 PM PDT 24 |
| Finished | Aug 16 05:36:27 PM PDT 24 |
| Peak memory | 215844 kb |
| Host | smart-2e30427b-c5e8-4d37-9988-56a144094a95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34165 06154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pkt_buffer.3416506154 |
| Directory | /workspace/20.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/20.usbdev_pkt_received.2636415251 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 217182935 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-4f72a86b-8038-476f-9bdb-1d9ce882d664 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26364 15251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pkt_received.2636415251 |
| Directory | /workspace/20.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/20.usbdev_pkt_sent.1515309015 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 235704774 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-4bc5908b-18ae-41e4-9bb2-05f7252a3808 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15153 09015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pkt_sent.1515309015 |
| Directory | /workspace/20.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/20.usbdev_random_length_in_transaction.2899788173 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 247357333 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-d66aef54-b8ec-499e-8086-2530ce26d3d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28997 88173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_in_transaction.2899788173 |
| Directory | /workspace/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_random_length_out_transaction.2029874878 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 166321412 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:36:23 PM PDT 24 |
| Finished | Aug 16 05:36:25 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-705b3789-c224-42e0-97df-278fd7a34e57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20298 74878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.2029874878 |
| Directory | /workspace/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/20.usbdev_rx_crc_err.2813425521 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 155697572 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:35:58 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-35d3485c-24c6-4f84-a180-a2f332f640cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28134 25521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_rx_crc_err.2813425521 |
| Directory | /workspace/20.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/20.usbdev_setup_stage.2098372152 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 147892863 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:35:51 PM PDT 24 |
| Finished | Aug 16 05:35:52 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8077ba3d-4b1d-4e8b-8d85-afa4fe0d9466 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20983 72152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_setup_stage.2098372152 |
| Directory | /workspace/20.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/20.usbdev_setup_trans_ignored.2393667195 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 154819272 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:35:50 PM PDT 24 |
| Finished | Aug 16 05:35:51 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-f2bcc783-8ace-496a-bfee-c20e781da629 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23936 67195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_setup_trans_ignored.2393667195 |
| Directory | /workspace/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/20.usbdev_smoke.82205380 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 250862687 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:35:49 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-b2799256-7c88-4988-87d0-05e6efa7ed21 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82205 380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /works pace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.82205380 |
| Directory | /workspace/20.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/20.usbdev_spurious_pids_ignored.1014984760 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 2730072034 ps |
| CPU time | 81.59 seconds |
| Started | Aug 16 05:35:49 PM PDT 24 |
| Finished | Aug 16 05:37:11 PM PDT 24 |
| Peak memory | 217780 kb |
| Host | smart-09b7b5c6-158c-4efd-82e7-07c13c6c4b75 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1014984760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.1014984760 |
| Directory | /workspace/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/20.usbdev_stall_priority_over_nak.2699906755 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 180122249 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-5e6f8543-950d-467b-807b-7ac1ad263d43 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26999 06755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.2699906755 |
| Directory | /workspace/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/20.usbdev_stall_trans.3475268186 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 162409224 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:49 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-0a636662-d7c9-4296-b74c-bd8de3b82248 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34752 68186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_trans.3475268186 |
| Directory | /workspace/20.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/20.usbdev_stream_len_max.381934806 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 1247452770 ps |
| CPU time | 2.91 seconds |
| Started | Aug 16 05:35:40 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-10df6a39-a29f-43fc-af29-15e8f3b0da61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38193 4806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.381934806 |
| Directory | /workspace/20.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/20.usbdev_streaming_out.3781335290 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 2675478228 ps |
| CPU time | 26.72 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:36:22 PM PDT 24 |
| Peak memory | 217224 kb |
| Host | smart-38473b52-e4e1-410c-861d-153635bca838 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37813 35290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_streaming_out.3781335290 |
| Directory | /workspace/20.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/20.usbdev_timeout_missing_host_handshake.568890678 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 754263950 ps |
| CPU time | 5.05 seconds |
| Started | Aug 16 05:35:47 PM PDT 24 |
| Finished | Aug 16 05:35:52 PM PDT 24 |
| Peak memory | 206588 kb |
| Host | smart-9145e2f0-06ff-4df9-95aa-863d0c401d23 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=568890678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host _handshake.568890678 |
| Directory | /workspace/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/20.usbdev_tx_rx_disruption.960203520 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 517128634 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:50 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-e1f3cbb6-62f9-40e5-8c19-c707e4a5af6d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=960203520 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 20.usbdev_tx_rx_disruption.960203520 |
| Directory | /workspace/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/200.usbdev_tx_rx_disruption.2411394926 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 671140277 ps |
| CPU time | 1.87 seconds |
| Started | Aug 16 05:40:11 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-65a23185-b951-4915-9ad8-b601e6241759 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2411394926 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 200.usbdev_tx_rx_disruption.2411394926 |
| Directory | /workspace/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/201.usbdev_tx_rx_disruption.688096192 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 539005606 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:40:24 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-caefcd05-5f71-4258-8510-aa4f51f05941 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=688096192 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 201.usbdev_tx_rx_disruption.688096192 |
| Directory | /workspace/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/202.usbdev_tx_rx_disruption.3417636345 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 591940753 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:12 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-52cdfbc6-b4c7-4ee8-ab9d-9be573f0129f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3417636345 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 202.usbdev_tx_rx_disruption.3417636345 |
| Directory | /workspace/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/203.usbdev_tx_rx_disruption.1495260253 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 594022531 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:40:27 PM PDT 24 |
| Finished | Aug 16 05:40:28 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-bba95072-763a-4479-963a-a570eb8a3b5d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1495260253 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 203.usbdev_tx_rx_disruption.1495260253 |
| Directory | /workspace/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/204.usbdev_tx_rx_disruption.3799437084 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 475286638 ps |
| CPU time | 1.4 seconds |
| Started | Aug 16 05:40:36 PM PDT 24 |
| Finished | Aug 16 05:40:38 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-d076a2f1-351d-4900-b747-713963b4969f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3799437084 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 204.usbdev_tx_rx_disruption.3799437084 |
| Directory | /workspace/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/205.usbdev_tx_rx_disruption.2788324807 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 464583205 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-aca936aa-3c53-4c51-821f-d0593d450ab5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2788324807 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 205.usbdev_tx_rx_disruption.2788324807 |
| Directory | /workspace/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/206.usbdev_tx_rx_disruption.2396448962 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 554257549 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-73e63c38-e178-4035-b080-28899e2fae77 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2396448962 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 206.usbdev_tx_rx_disruption.2396448962 |
| Directory | /workspace/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/207.usbdev_tx_rx_disruption.2678760170 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 576630634 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-0061f509-44a8-4054-a859-9b02afdd788f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2678760170 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 207.usbdev_tx_rx_disruption.2678760170 |
| Directory | /workspace/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/208.usbdev_tx_rx_disruption.1120140846 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 507812657 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-e9627fdd-a32d-4594-b1f5-bbbe6ca358f3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1120140846 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 208.usbdev_tx_rx_disruption.1120140846 |
| Directory | /workspace/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/209.usbdev_tx_rx_disruption.3061482048 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 490038043 ps |
| CPU time | 1.49 seconds |
| Started | Aug 16 05:40:38 PM PDT 24 |
| Finished | Aug 16 05:40:39 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-0b6abcec-aa2e-4da9-a108-cab55bbd52f0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3061482048 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 209.usbdev_tx_rx_disruption.3061482048 |
| Directory | /workspace/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/21.usbdev_alert_test.2989160742 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 60350604 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-cf66e2f8-2d41-40dd-b036-b7d7a5e9e50d |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2989160742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.2989160742 |
| Directory | /workspace/21.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/21.usbdev_aon_wake_disconnect.4007546864 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 9295891646 ps |
| CPU time | 11.79 seconds |
| Started | Aug 16 05:35:54 PM PDT 24 |
| Finished | Aug 16 05:36:06 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-1aaa6bd9-6f7a-4ca6-9e42-cfaca41f88ef |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4007546864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_a on_wake_disconnect.4007546864 |
| Directory | /workspace/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/21.usbdev_aon_wake_reset.1381735670 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 15798644965 ps |
| CPU time | 22.32 seconds |
| Started | Aug 16 05:36:01 PM PDT 24 |
| Finished | Aug 16 05:36:24 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-c6661435-d3b7-4c09-9bac-0932dc6f9f92 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1381735670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.1381735670 |
| Directory | /workspace/21.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/21.usbdev_aon_wake_resume.2815552761 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 25375444713 ps |
| CPU time | 35.52 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:36:24 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-eccaa54a-3186-4c0c-a47a-669b363b4d6f |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2815552761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_a on_wake_resume.2815552761 |
| Directory | /workspace/21.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/21.usbdev_av_buffer.4131031166 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 195917729 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:54 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-67ec17f1-4476-41c8-951b-238f3f6986d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41310 31166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_av_buffer.4131031166 |
| Directory | /workspace/21.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/21.usbdev_bitstuff_err.403363963 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 141366756 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-f4d3861a-5251-4a2d-b301-e00508756d52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40336 3963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_bitstuff_err.403363963 |
| Directory | /workspace/21.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/21.usbdev_data_toggle_clear.2936093307 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 332799759 ps |
| CPU time | 1.28 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-573ae853-2267-4d76-858d-6951533da04b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29360 93307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_clear.2936093307 |
| Directory | /workspace/21.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/21.usbdev_data_toggle_restore.3610554899 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 920285186 ps |
| CPU time | 2.37 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-dfb0cc74-59cb-4c65-9b81-933a54ea9f00 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3610554899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.3610554899 |
| Directory | /workspace/21.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/21.usbdev_device_address.1939020272 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 38528528022 ps |
| CPU time | 58.65 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:37:01 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-9cedba8f-85e9-4dbd-b9b4-647a42575c1b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19390 20272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.1939020272 |
| Directory | /workspace/21.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/21.usbdev_device_timeout.1834719680 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 1950584876 ps |
| CPU time | 12.77 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:36:06 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-fb93a500-b3b0-4ff6-8ff5-8299952d2576 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1834719680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.1834719680 |
| Directory | /workspace/21.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/21.usbdev_disable_endpoint.4097181639 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 737434891 ps |
| CPU time | 1.82 seconds |
| Started | Aug 16 05:35:51 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-1c1a4418-9043-491c-8531-a6b816c08d38 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40971 81639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_disable_endpoint.4097181639 |
| Directory | /workspace/21.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/21.usbdev_disconnected.242588954 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 181005633 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-b6fa7bbb-4b4d-479e-a5d7-74c902770755 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24258 8954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_disconnected.242588954 |
| Directory | /workspace/21.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/21.usbdev_enable.1715039760 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 49542119 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-41f1754a-5954-4235-a6eb-cae53cc9db51 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17150 39760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_enable.1715039760 |
| Directory | /workspace/21.usbdev_enable/latest |
| Test location | /workspace/coverage/default/21.usbdev_endpoint_access.1759098138 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 884938288 ps |
| CPU time | 2.26 seconds |
| Started | Aug 16 05:35:59 PM PDT 24 |
| Finished | Aug 16 05:36:01 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-b94d7821-bdd1-4aa0-8573-a44f78b105ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17590 98138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.1759098138 |
| Directory | /workspace/21.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/21.usbdev_endpoint_types.2533466562 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 258710187 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4715fe17-2194-4503-81eb-bc2b13723a26 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2533466562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.2533466562 |
| Directory | /workspace/21.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/21.usbdev_fifo_rst.1964635402 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 271516745 ps |
| CPU time | 2.42 seconds |
| Started | Aug 16 05:35:51 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-1d2816e9-65e0-4c2b-b655-9682cee77ad8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19646 35402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_fifo_rst.1964635402 |
| Directory | /workspace/21.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/21.usbdev_in_iso.416158090 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 202404312 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:35:54 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 215788 kb |
| Host | smart-8a684d78-04f4-4041-85e8-d90f4b326cf0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=416158090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.416158090 |
| Directory | /workspace/21.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/21.usbdev_in_stall.517505219 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 141703823 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:00 PM PDT 24 |
| Finished | Aug 16 05:36:01 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-35076c6f-fe56-4f02-a718-97aa39695ae9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51750 5219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_in_stall.517505219 |
| Directory | /workspace/21.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/21.usbdev_in_trans.1829143870 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 162370925 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:48 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-989838bb-55eb-4292-9d7c-b2f777231938 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18291 43870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_in_trans.1829143870 |
| Directory | /workspace/21.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_invalid_sync.3005529700 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 2918691520 ps |
| CPU time | 26.35 seconds |
| Started | Aug 16 05:36:01 PM PDT 24 |
| Finished | Aug 16 05:36:28 PM PDT 24 |
| Peak memory | 217248 kb |
| Host | smart-db7ed3c9-0a55-46ea-aaeb-4c78938fa76f |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3005529700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.3005529700 |
| Directory | /workspace/21.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/21.usbdev_iso_retraction.1179867813 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 4576281406 ps |
| CPU time | 33.21 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:36:30 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-ca4ef956-61f3-4341-b487-8b799aeb3730 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1179867813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.1179867813 |
| Directory | /workspace/21.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/21.usbdev_link_in_err.454077756 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 200501545 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:36:10 PM PDT 24 |
| Finished | Aug 16 05:36:11 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-6c15653b-9e7c-441e-a84f-a92128cd3018 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45407 7756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_link_in_err.454077756 |
| Directory | /workspace/21.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/21.usbdev_link_resume.1619394908 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 13284909817 ps |
| CPU time | 21.99 seconds |
| Started | Aug 16 05:35:59 PM PDT 24 |
| Finished | Aug 16 05:36:21 PM PDT 24 |
| Peak memory | 207844 kb |
| Host | smart-5c98b9d4-582a-446f-a5fa-dffc1f1a6424 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16193 94908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_link_resume.1619394908 |
| Directory | /workspace/21.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/21.usbdev_link_suspend.1145576517 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 4355858717 ps |
| CPU time | 6.25 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:36:04 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-b85fa032-9f43-4ad8-b755-3d3801a69bb1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11455 76517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_link_suspend.1145576517 |
| Directory | /workspace/21.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/21.usbdev_low_speed_traffic.3045641661 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 3702983670 ps |
| CPU time | 28.58 seconds |
| Started | Aug 16 05:36:22 PM PDT 24 |
| Finished | Aug 16 05:36:51 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-cdbc33d2-5a10-4491-9be7-b6924fe3d060 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3045641661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.3045641661 |
| Directory | /workspace/21.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_inter_pkt_delay.263473990 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 3607915753 ps |
| CPU time | 36.29 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:36:29 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-9215ef75-b713-4cac-b009-ba46a999d184 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=263473990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.263473990 |
| Directory | /workspace/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_length_in_transaction.1000227402 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 248073869 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:36:02 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-126052bb-1e78-40c7-8306-97a04dab9aa8 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1000227402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.1000227402 |
| Directory | /workspace/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_length_out_transaction.567760097 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 200367462 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:59 PM PDT 24 |
| Finished | Aug 16 05:36:00 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-5d9280ef-00b5-4656-8774-75203e129b95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56776 0097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.567760097 |
| Directory | /workspace/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_max_non_iso_usb_traffic.2739450580 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 3324147272 ps |
| CPU time | 94.86 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 217428 kb |
| Host | smart-94f790b6-1b07-47db-aa5b-fafcd62b1e3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27394 50580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.2739450580 |
| Directory | /workspace/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/21.usbdev_min_inter_pkt_delay.3284054578 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 4338548646 ps |
| CPU time | 44.75 seconds |
| Started | Aug 16 05:36:01 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 217708 kb |
| Host | smart-79d822e7-cdc3-44f2-8b0e-e8c85ebccf72 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3284054578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.3284054578 |
| Directory | /workspace/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/21.usbdev_min_length_in_transaction.1717395566 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 198621703 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:03 PM PDT 24 |
| Finished | Aug 16 05:36:04 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-31ad1f40-3d3f-4756-83ea-9bb8fe5bd66e |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1717395566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.1717395566 |
| Directory | /workspace/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_min_length_out_transaction.2553114702 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 147778470 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:35:54 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-70219859-06ba-4c7d-8b75-fed9a2e5492f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25531 14702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.2553114702 |
| Directory | /workspace/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_nak_trans.3584226977 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 176833766 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:35:58 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-ef30dde7-18b1-46d5-91c2-14a44ae03f8a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35842 26977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_nak_trans.3584226977 |
| Directory | /workspace/21.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_out_iso.761202714 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 183294153 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-1ef44d87-7ae3-433a-af28-b033235108f9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76120 2714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_out_iso.761202714 |
| Directory | /workspace/21.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/21.usbdev_out_stall.4251357418 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 206187421 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-2f3afc09-cfbd-4217-84f9-3c2c4e9884fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42513 57418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_out_stall.4251357418 |
| Directory | /workspace/21.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/21.usbdev_out_trans_nak.237314566 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 191533477 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:36:13 PM PDT 24 |
| Finished | Aug 16 05:36:14 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-771963bc-00ff-4b7b-a5ca-775c4910a03d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23731 4566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_out_trans_nak.237314566 |
| Directory | /workspace/21.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/21.usbdev_pending_in_trans.2129636118 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 246630469 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:35:59 PM PDT 24 |
| Finished | Aug 16 05:36:00 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-9792736d-656f-4277-9381-be0958caa702 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21296 36118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pending_in_trans.2129636118 |
| Directory | /workspace/21.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_phy_config_pinflip.2942290848 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 240021152 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:35:58 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-feb53c9a-03cc-48dd-b0aa-f8c0d95ceaf2 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2942290848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.2942290848 |
| Directory | /workspace/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/21.usbdev_phy_config_usb_ref_disable.3685107097 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 169753544 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-e935d7e9-2470-4863-997b-31c8d529be1d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36851 07097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.3685107097 |
| Directory | /workspace/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/21.usbdev_pkt_buffer.1360423045 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 9600797739 ps |
| CPU time | 28.18 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:36:22 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-89226c34-8291-4de2-bb9a-b5daae78083c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13604 23045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pkt_buffer.1360423045 |
| Directory | /workspace/21.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/21.usbdev_pkt_received.3482319561 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 172338105 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:36:01 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-76b016cd-f9d0-421e-ad42-3cad5342b267 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34823 19561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pkt_received.3482319561 |
| Directory | /workspace/21.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/21.usbdev_pkt_sent.2939296833 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 225222406 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-292eab1d-5746-4e78-8204-893bdc52b0d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29392 96833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pkt_sent.2939296833 |
| Directory | /workspace/21.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/21.usbdev_random_length_in_transaction.1851816102 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 187138481 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:54 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-908fa88b-dab5-4807-ad1c-7a359a562bd7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18518 16102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_in_transaction.1851816102 |
| Directory | /workspace/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_random_length_out_transaction.2642549828 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 202356797 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:35:54 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-cc6b86f8-bb98-411a-86e8-1d9bd17688d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26425 49828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.2642549828 |
| Directory | /workspace/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/21.usbdev_rx_crc_err.3341358224 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 139619783 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:36:07 PM PDT 24 |
| Finished | Aug 16 05:36:08 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-45e054f6-59c0-437b-a48d-bc71ef4ac43c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33413 58224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_rx_crc_err.3341358224 |
| Directory | /workspace/21.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/21.usbdev_rx_full.1822073287 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 350703753 ps |
| CPU time | 1.23 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-89ae4e62-8dd2-4fe4-bfcd-29e193af38c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18220 73287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_rx_full.1822073287 |
| Directory | /workspace/21.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/21.usbdev_setup_stage.3171042568 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 154554644 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-290abe38-32ff-4c9e-a957-6442a8655cef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31710 42568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_setup_stage.3171042568 |
| Directory | /workspace/21.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/21.usbdev_setup_trans_ignored.1503097803 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 170451975 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-46df85d0-d1b9-4d18-b3d8-832ee0ae0b82 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15030 97803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_setup_trans_ignored.1503097803 |
| Directory | /workspace/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/21.usbdev_smoke.2221205698 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 230979789 ps |
| CPU time | 1.17 seconds |
| Started | Aug 16 05:36:14 PM PDT 24 |
| Finished | Aug 16 05:36:15 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-3dd5cd9e-e23a-46cd-9fa6-64a190643459 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22212 05698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.2221205698 |
| Directory | /workspace/21.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/21.usbdev_spurious_pids_ignored.1019741042 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 1732980907 ps |
| CPU time | 47.86 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 215840 kb |
| Host | smart-34021ce5-9c1e-4382-8a10-375bf181c1f0 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1019741042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.1019741042 |
| Directory | /workspace/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/21.usbdev_stall_priority_over_nak.3747417439 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 165914453 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-7601ed43-b7a6-46ed-9731-d3e7d74e523f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37474 17439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.3747417439 |
| Directory | /workspace/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/21.usbdev_stall_trans.3830587882 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 163141453 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:35:58 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-e2989873-1390-4d47-b9bd-6b732f93816a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38305 87882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_trans.3830587882 |
| Directory | /workspace/21.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/21.usbdev_stream_len_max.1232480816 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 1340116176 ps |
| CPU time | 3.02 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-87a4ca0f-a9d1-4001-8094-53d5a9007b4f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12324 80816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.1232480816 |
| Directory | /workspace/21.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/21.usbdev_streaming_out.2008339216 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 2334066425 ps |
| CPU time | 25.15 seconds |
| Started | Aug 16 05:36:13 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 217672 kb |
| Host | smart-2f62e9a0-06b2-408b-99af-6588bc3dcea7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20083 39216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_streaming_out.2008339216 |
| Directory | /workspace/21.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/21.usbdev_timeout_missing_host_handshake.1086240477 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 760573820 ps |
| CPU time | 15.63 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:36:19 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-4dab1451-fab4-4ddc-9225-de5144f212bd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1086240477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_hos t_handshake.1086240477 |
| Directory | /workspace/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/21.usbdev_tx_rx_disruption.4089012658 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 613355978 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-553ae3ab-8833-4b54-a18d-a8729ab3ec21 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4089012658 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_tx_rx_disruption.4089012658 |
| Directory | /workspace/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/210.usbdev_tx_rx_disruption.2602713465 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 593601444 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-ae8ba27f-e239-47f3-bd40-bf428b193c2c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2602713465 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 210.usbdev_tx_rx_disruption.2602713465 |
| Directory | /workspace/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/211.usbdev_tx_rx_disruption.3694490103 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 505240914 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:50 PM PDT 24 |
| Finished | Aug 16 05:40:52 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-383f5ade-cebc-43ea-9dc8-56b554415388 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3694490103 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 211.usbdev_tx_rx_disruption.3694490103 |
| Directory | /workspace/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/212.usbdev_tx_rx_disruption.452037565 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 623353061 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-dff77273-d430-417c-ad4e-ad2a33df0758 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=452037565 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 212.usbdev_tx_rx_disruption.452037565 |
| Directory | /workspace/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/213.usbdev_tx_rx_disruption.1763714454 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 629771350 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-dceb1e42-8610-4dc3-87ef-6de794a43cfe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1763714454 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 213.usbdev_tx_rx_disruption.1763714454 |
| Directory | /workspace/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/214.usbdev_tx_rx_disruption.951031645 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 531954817 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:40 PM PDT 24 |
| Finished | Aug 16 05:40:41 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-7ad7395a-5f55-4155-86c3-95ebeffe6c19 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=951031645 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 214.usbdev_tx_rx_disruption.951031645 |
| Directory | /workspace/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/215.usbdev_tx_rx_disruption.2923978706 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 581693684 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7891feb4-b792-471a-8417-0b4abefb4939 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2923978706 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 215.usbdev_tx_rx_disruption.2923978706 |
| Directory | /workspace/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/216.usbdev_tx_rx_disruption.2247898456 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 432762161 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-081ae4b8-55f8-4ed3-9de9-8df5b0bc7543 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2247898456 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 216.usbdev_tx_rx_disruption.2247898456 |
| Directory | /workspace/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/217.usbdev_tx_rx_disruption.2923129172 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 499306904 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-50637c8a-b609-441b-a991-cc17429250f6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2923129172 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 217.usbdev_tx_rx_disruption.2923129172 |
| Directory | /workspace/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/218.usbdev_tx_rx_disruption.2666935027 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 532341945 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:29 PM PDT 24 |
| Finished | Aug 16 05:40:31 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-82d50bff-9b33-4502-8050-1384110f682e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2666935027 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 218.usbdev_tx_rx_disruption.2666935027 |
| Directory | /workspace/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/219.usbdev_tx_rx_disruption.923258245 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 579386593 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-dfd0c907-59df-4200-9316-e3391ea3ec0d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=923258245 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 219.usbdev_tx_rx_disruption.923258245 |
| Directory | /workspace/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/22.usbdev_alert_test.540679675 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 55033400 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-47670ff2-1d0d-49b8-aba8-994a7391e38f |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=540679675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.540679675 |
| Directory | /workspace/22.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/22.usbdev_aon_wake_disconnect.4191528507 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 9363358392 ps |
| CPU time | 11.96 seconds |
| Started | Aug 16 05:35:54 PM PDT 24 |
| Finished | Aug 16 05:36:06 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-15d31f2f-6caf-4634-b96b-a032b906c20f |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4191528507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_a on_wake_disconnect.4191528507 |
| Directory | /workspace/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/22.usbdev_aon_wake_reset.3629352630 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 20636619944 ps |
| CPU time | 26.12 seconds |
| Started | Aug 16 05:36:08 PM PDT 24 |
| Finished | Aug 16 05:36:35 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-883780dc-de14-46d4-a9a9-4d03981fcd81 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3629352630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.3629352630 |
| Directory | /workspace/22.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/22.usbdev_aon_wake_resume.310172110 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 29161801399 ps |
| CPU time | 35.02 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:36:33 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-09851ab6-6d57-4581-a2ac-aba5c5009e49 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=310172110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_ao n_wake_resume.310172110 |
| Directory | /workspace/22.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/22.usbdev_av_buffer.3971092756 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 226387800 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:36:13 PM PDT 24 |
| Finished | Aug 16 05:36:14 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-501cce38-a493-4a9b-b6df-e8d18f5fce1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39710 92756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_av_buffer.3971092756 |
| Directory | /workspace/22.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/22.usbdev_bitstuff_err.400659397 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 170680606 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-be594b49-6a42-454c-8680-1cfc53452107 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40065 9397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_bitstuff_err.400659397 |
| Directory | /workspace/22.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/22.usbdev_data_toggle_clear.2429375120 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 318095283 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:54 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-d657e025-b82a-4687-83f3-475c3be44bb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24293 75120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_clear.2429375120 |
| Directory | /workspace/22.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/22.usbdev_data_toggle_restore.3851574085 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 396520695 ps |
| CPU time | 1.4 seconds |
| Started | Aug 16 05:36:02 PM PDT 24 |
| Finished | Aug 16 05:36:04 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-678cd432-430f-479f-8561-58175f262941 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3851574085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.3851574085 |
| Directory | /workspace/22.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/22.usbdev_device_address.2688142322 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 42839909250 ps |
| CPU time | 71.66 seconds |
| Started | Aug 16 05:35:54 PM PDT 24 |
| Finished | Aug 16 05:37:06 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-b926efec-0401-4a3b-9f31-cc75172509c1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26881 42322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_address.2688142322 |
| Directory | /workspace/22.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/22.usbdev_device_timeout.647812858 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 311019614 ps |
| CPU time | 4.36 seconds |
| Started | Aug 16 05:35:52 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-254032bd-d6ca-4509-9413-c37ce98abf75 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=647812858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.647812858 |
| Directory | /workspace/22.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/22.usbdev_disable_endpoint.3198286640 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 574725545 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:35:54 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-f4bd43e0-ee90-4ea3-8143-1d6eb747c33c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31982 86640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_disable_endpoint.3198286640 |
| Directory | /workspace/22.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/22.usbdev_disconnected.837131956 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 144030761 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-1818f4fe-56db-43bf-b89d-18def7b42388 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83713 1956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_disconnected.837131956 |
| Directory | /workspace/22.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/22.usbdev_enable.3728261275 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 75727749 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:35:54 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-7cc4a083-2eee-4d2d-84e7-5d41c728d47e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37282 61275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_enable.3728261275 |
| Directory | /workspace/22.usbdev_enable/latest |
| Test location | /workspace/coverage/default/22.usbdev_endpoint_access.2156081117 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 990536936 ps |
| CPU time | 2.69 seconds |
| Started | Aug 16 05:35:53 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-b8c62cd3-57df-4afb-9b1c-498b3ed33d5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21560 81117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.2156081117 |
| Directory | /workspace/22.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/22.usbdev_endpoint_types.2643163466 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 231421731 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:35:58 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-72959d50-450e-471e-ad81-d60a6e994454 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2643163466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.2643163466 |
| Directory | /workspace/22.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/22.usbdev_fifo_rst.832918695 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 295620796 ps |
| CPU time | 2.39 seconds |
| Started | Aug 16 05:36:04 PM PDT 24 |
| Finished | Aug 16 05:36:07 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-0c567090-fbb6-4564-9a2e-1b28c09ceabf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83291 8695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_fifo_rst.832918695 |
| Directory | /workspace/22.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/22.usbdev_in_iso.1295778409 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 213039832 ps |
| CPU time | 1.16 seconds |
| Started | Aug 16 05:36:13 PM PDT 24 |
| Finished | Aug 16 05:36:15 PM PDT 24 |
| Peak memory | 215872 kb |
| Host | smart-7c20ced4-c099-431d-8e96-b447b3a4e765 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1295778409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.1295778409 |
| Directory | /workspace/22.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/22.usbdev_in_stall.4071155712 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 176163975 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:35:59 PM PDT 24 |
| Finished | Aug 16 05:36:00 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-b36be460-577f-45f7-b4c8-423d8c15a388 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40711 55712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_in_stall.4071155712 |
| Directory | /workspace/22.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/22.usbdev_in_trans.1161506724 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 191876037 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:35:56 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-3c5c8d75-3f09-4c48-a21a-df136dbd1fa9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11615 06724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_in_trans.1161506724 |
| Directory | /workspace/22.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_invalid_sync.1914718294 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 4332417923 ps |
| CPU time | 128.91 seconds |
| Started | Aug 16 05:35:59 PM PDT 24 |
| Finished | Aug 16 05:38:08 PM PDT 24 |
| Peak memory | 216040 kb |
| Host | smart-a8967b7b-b6be-4ff2-8828-d1cbc274fe83 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1914718294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.1914718294 |
| Directory | /workspace/22.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/22.usbdev_iso_retraction.3917926719 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 4015138820 ps |
| CPU time | 26.33 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:36:21 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-847b7cfd-5da4-4cdb-b70a-624c6b7b7d76 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3917926719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.3917926719 |
| Directory | /workspace/22.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/22.usbdev_link_in_err.2744846165 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 225808097 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:35:51 PM PDT 24 |
| Finished | Aug 16 05:35:53 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-17c16530-a9c7-4e2e-9410-9883536a00d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27448 46165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_link_in_err.2744846165 |
| Directory | /workspace/22.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/22.usbdev_link_resume.1237654445 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 14308606946 ps |
| CPU time | 19.79 seconds |
| Started | Aug 16 05:36:00 PM PDT 24 |
| Finished | Aug 16 05:36:19 PM PDT 24 |
| Peak memory | 207844 kb |
| Host | smart-27b566a7-c78d-4839-b593-a113a5281d23 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12376 54445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_link_resume.1237654445 |
| Directory | /workspace/22.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/22.usbdev_link_suspend.1366670082 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 3485929121 ps |
| CPU time | 5.52 seconds |
| Started | Aug 16 05:36:01 PM PDT 24 |
| Finished | Aug 16 05:36:07 PM PDT 24 |
| Peak memory | 216124 kb |
| Host | smart-7a654505-a7c3-463c-b908-b417eb6b1aac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13666 70082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_link_suspend.1366670082 |
| Directory | /workspace/22.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/22.usbdev_low_speed_traffic.2822651990 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 3706450482 ps |
| CPU time | 35.03 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:36:34 PM PDT 24 |
| Peak memory | 224108 kb |
| Host | smart-7da20ff8-0a6d-415b-b800-9fa183ec6ecc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2822651990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.2822651990 |
| Directory | /workspace/22.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_inter_pkt_delay.557899819 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 1875729409 ps |
| CPU time | 19.2 seconds |
| Started | Aug 16 05:36:08 PM PDT 24 |
| Finished | Aug 16 05:36:28 PM PDT 24 |
| Peak memory | 216732 kb |
| Host | smart-e92a8e71-0a8c-4132-ac33-5f0a1a044ab4 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=557899819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.557899819 |
| Directory | /workspace/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_length_in_transaction.2637670239 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 244218496 ps |
| CPU time | 1.11 seconds |
| Started | Aug 16 05:36:20 PM PDT 24 |
| Finished | Aug 16 05:36:21 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-19a10ff0-4a58-493c-b9c4-387b3268e3a9 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2637670239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.2637670239 |
| Directory | /workspace/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_length_out_transaction.2827462902 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 202044451 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-ed385ea0-b638-44c2-8e64-e84bbc9341ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28274 62902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.2827462902 |
| Directory | /workspace/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_max_non_iso_usb_traffic.3138810254 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 2204866987 ps |
| CPU time | 23.29 seconds |
| Started | Aug 16 05:36:00 PM PDT 24 |
| Finished | Aug 16 05:36:24 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-10674553-3186-41f7-aaff-4bb8a900e316 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31388 10254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.3138810254 |
| Directory | /workspace/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/22.usbdev_min_inter_pkt_delay.2817468824 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 3212425749 ps |
| CPU time | 32.71 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:36:31 PM PDT 24 |
| Peak memory | 224032 kb |
| Host | smart-5502feff-98eb-448d-92aa-c528eb6773b6 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2817468824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.2817468824 |
| Directory | /workspace/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/22.usbdev_min_length_in_transaction.2004097980 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 166399663 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:01 PM PDT 24 |
| Finished | Aug 16 05:36:02 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-4dea45c6-8c92-4193-8e2f-a15cdfb87592 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2004097980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.2004097980 |
| Directory | /workspace/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_min_length_out_transaction.3925860174 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 146734858 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:36:07 PM PDT 24 |
| Finished | Aug 16 05:36:08 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-e1c59ace-7cd3-4b6b-9208-2ddf0db6c945 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39258 60174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.3925860174 |
| Directory | /workspace/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_nak_trans.2942134889 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 216545296 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-dd666b3e-4c54-4cf2-a1b1-4fd0af366d68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29421 34889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_nak_trans.2942134889 |
| Directory | /workspace/22.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_out_iso.2448029172 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 180088041 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:36:00 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-9122598c-3fe3-474d-83ce-aca1dbfd279b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24480 29172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_out_iso.2448029172 |
| Directory | /workspace/22.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/22.usbdev_out_stall.3532383068 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 156652369 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:36:13 PM PDT 24 |
| Finished | Aug 16 05:36:14 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-368b656b-7baa-4aa3-8d73-e35aa02f5d56 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35323 83068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_out_stall.3532383068 |
| Directory | /workspace/22.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/22.usbdev_out_trans_nak.126611986 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 188859279 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:36:20 PM PDT 24 |
| Finished | Aug 16 05:36:21 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-7f4af6e7-fb27-4cca-8d65-4811433b3b52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12661 1986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_out_trans_nak.126611986 |
| Directory | /workspace/22.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/22.usbdev_pending_in_trans.3192752742 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 167677442 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:35:58 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-ed097f3c-5b7a-42bc-93f7-78fe7c9cc994 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31927 52742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pending_in_trans.3192752742 |
| Directory | /workspace/22.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_phy_config_pinflip.1300142293 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 213725558 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:35:59 PM PDT 24 |
| Finished | Aug 16 05:36:00 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f31267f4-669b-4eb6-86fa-d4b0eb891484 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1300142293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.1300142293 |
| Directory | /workspace/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/22.usbdev_phy_config_usb_ref_disable.2140343140 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 147410743 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:36:14 PM PDT 24 |
| Finished | Aug 16 05:36:15 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-23df997f-6ce3-4b40-b259-0b157c3e33b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21403 43140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.2140343140 |
| Directory | /workspace/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/22.usbdev_phy_pins_sense.3176065966 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 40479142 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-2edba3e7-c4ae-4e98-b911-834bde9d9545 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31760 65966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.3176065966 |
| Directory | /workspace/22.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/22.usbdev_pkt_buffer.2663879556 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 20350220234 ps |
| CPU time | 53.28 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:36:51 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-64012cff-a5af-416d-a213-b1a2b03995ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26638 79556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pkt_buffer.2663879556 |
| Directory | /workspace/22.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/22.usbdev_pkt_received.36516075 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 173746939 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:02 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-2cca6632-3205-46ba-96ae-f924915f2064 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36516 075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pkt_received.36516075 |
| Directory | /workspace/22.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/22.usbdev_pkt_sent.4047369266 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 202574472 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:36:10 PM PDT 24 |
| Finished | Aug 16 05:36:11 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c2f4505c-636b-4c2d-8271-49b5f5b54285 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40473 69266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pkt_sent.4047369266 |
| Directory | /workspace/22.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/22.usbdev_random_length_in_transaction.1165932398 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 240338150 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:35:59 PM PDT 24 |
| Finished | Aug 16 05:36:00 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-934f5085-f0c8-4d75-b03b-e6ee261d2197 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11659 32398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_in_transaction.1165932398 |
| Directory | /workspace/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_random_length_out_transaction.2220557838 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 160161367 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:36:03 PM PDT 24 |
| Finished | Aug 16 05:36:04 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-79783eff-5a01-4030-b1ae-90950cb80176 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22205 57838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.2220557838 |
| Directory | /workspace/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/22.usbdev_rx_crc_err.1540573992 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 141706808 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:35:57 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-7e6ff5c1-b43c-475b-9cfb-ea98a43370af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15405 73992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_rx_crc_err.1540573992 |
| Directory | /workspace/22.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/22.usbdev_rx_full.2423293238 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 361928427 ps |
| CPU time | 1.36 seconds |
| Started | Aug 16 05:36:07 PM PDT 24 |
| Finished | Aug 16 05:36:09 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-379ce183-7aca-4cd0-8545-2d0a5ae2c95a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24232 93238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_rx_full.2423293238 |
| Directory | /workspace/22.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/22.usbdev_setup_stage.2007653586 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 147850494 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:02 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3f2ac785-3320-4410-bf15-68f8b73910d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20076 53586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_setup_stage.2007653586 |
| Directory | /workspace/22.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/22.usbdev_setup_trans_ignored.730747256 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 147345651 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:36:03 PM PDT 24 |
| Finished | Aug 16 05:36:04 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-895757a8-2081-420c-b03b-b4a90684afee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73074 7256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_setup_trans_ignored.730747256 |
| Directory | /workspace/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/22.usbdev_smoke.284628767 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 193521515 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:36:03 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-68963149-5b69-46c0-8fd8-5ad005b07b7d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28462 8767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.284628767 |
| Directory | /workspace/22.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/22.usbdev_spurious_pids_ignored.1477111645 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 2769884955 ps |
| CPU time | 79.81 seconds |
| Started | Aug 16 05:35:56 PM PDT 24 |
| Finished | Aug 16 05:37:16 PM PDT 24 |
| Peak memory | 217876 kb |
| Host | smart-81682277-09f3-4200-ad47-1a981d59df48 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1477111645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.1477111645 |
| Directory | /workspace/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/22.usbdev_stall_priority_over_nak.3996681198 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 197759073 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:36:01 PM PDT 24 |
| Finished | Aug 16 05:36:02 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-59d01317-0624-488b-85dc-7f7672b701d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39966 81198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.3996681198 |
| Directory | /workspace/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/22.usbdev_stall_trans.1013230820 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 188181639 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:35:58 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-0d8b5022-9968-4cc1-9f92-6ebbd4e60418 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10132 30820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_trans.1013230820 |
| Directory | /workspace/22.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/22.usbdev_stream_len_max.541391922 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 306537529 ps |
| CPU time | 1.14 seconds |
| Started | Aug 16 05:36:15 PM PDT 24 |
| Finished | Aug 16 05:36:16 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a8619341-7446-4f5e-9a1b-23bbfe61c650 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54139 1922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.541391922 |
| Directory | /workspace/22.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/22.usbdev_streaming_out.4173921195 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 2740094560 ps |
| CPU time | 80.71 seconds |
| Started | Aug 16 05:36:12 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 217488 kb |
| Host | smart-c31d046c-747f-400f-b19b-c373102d0253 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41739 21195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_streaming_out.4173921195 |
| Directory | /workspace/22.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/22.usbdev_timeout_missing_host_handshake.1040355867 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 4764084259 ps |
| CPU time | 43.28 seconds |
| Started | Aug 16 05:35:55 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-d30ab2cd-1581-4e16-ae5f-2b26abd10b60 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1040355867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_hos t_handshake.1040355867 |
| Directory | /workspace/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/22.usbdev_tx_rx_disruption.655840350 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 468456060 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:35:59 PM PDT 24 |
| Finished | Aug 16 05:36:01 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-98dcc432-82b6-47d2-806b-54d75bcde398 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=655840350 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 22.usbdev_tx_rx_disruption.655840350 |
| Directory | /workspace/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/220.usbdev_tx_rx_disruption.4154922186 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 504980364 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-390666bf-9d46-4631-8c3b-c31884753e3d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4154922186 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 220.usbdev_tx_rx_disruption.4154922186 |
| Directory | /workspace/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/221.usbdev_tx_rx_disruption.4148825174 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 489049484 ps |
| CPU time | 1.49 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-9ef11fb4-5055-4b44-91dd-8f0cfe1181fc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4148825174 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 221.usbdev_tx_rx_disruption.4148825174 |
| Directory | /workspace/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/222.usbdev_tx_rx_disruption.3120982233 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 550867245 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:52 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-03d419f7-85e3-444d-b9a9-74a0bf2d4598 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3120982233 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 222.usbdev_tx_rx_disruption.3120982233 |
| Directory | /workspace/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/223.usbdev_tx_rx_disruption.2417827083 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 495468013 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-9ea5ec18-7ca0-4bcd-8707-3e999ab349aa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2417827083 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 223.usbdev_tx_rx_disruption.2417827083 |
| Directory | /workspace/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/224.usbdev_tx_rx_disruption.1821650693 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 518995380 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-af97954c-f42a-4c5e-9c1d-79573fa8ff58 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1821650693 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 224.usbdev_tx_rx_disruption.1821650693 |
| Directory | /workspace/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/225.usbdev_tx_rx_disruption.3689507320 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 515448264 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-57768fde-9013-47d6-b2f1-3adf7f663ab5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3689507320 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 225.usbdev_tx_rx_disruption.3689507320 |
| Directory | /workspace/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/226.usbdev_tx_rx_disruption.879769014 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 485861536 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-64b8adfa-00fd-4e2e-af2c-f9217e739a28 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=879769014 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 226.usbdev_tx_rx_disruption.879769014 |
| Directory | /workspace/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/227.usbdev_tx_rx_disruption.258736116 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 669758498 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:40:31 PM PDT 24 |
| Finished | Aug 16 05:40:32 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-b6034d4b-bf69-47da-8262-bec76620aae6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=258736116 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 227.usbdev_tx_rx_disruption.258736116 |
| Directory | /workspace/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/228.usbdev_tx_rx_disruption.1270076388 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 470087198 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-ec5b0f86-f07f-42dc-872f-10ce35b06eb4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1270076388 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 228.usbdev_tx_rx_disruption.1270076388 |
| Directory | /workspace/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/229.usbdev_tx_rx_disruption.4138734605 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 568433592 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:21 PM PDT 24 |
| Finished | Aug 16 05:40:23 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-f85b9c54-4731-4d5f-b8cd-4145cf63cc98 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4138734605 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 229.usbdev_tx_rx_disruption.4138734605 |
| Directory | /workspace/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/23.usbdev_alert_test.3927132579 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 30408593 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:36:26 PM PDT 24 |
| Finished | Aug 16 05:36:27 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-78192462-e711-47a2-9462-f486cab53eb1 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3927132579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.3927132579 |
| Directory | /workspace/23.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/23.usbdev_aon_wake_disconnect.382691613 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 11360401970 ps |
| CPU time | 14.27 seconds |
| Started | Aug 16 05:36:08 PM PDT 24 |
| Finished | Aug 16 05:36:22 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-21878bc4-854f-4a76-b6ac-aa69ee0ea163 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=382691613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_ao n_wake_disconnect.382691613 |
| Directory | /workspace/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/23.usbdev_aon_wake_reset.3494933883 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 15920859855 ps |
| CPU time | 18.88 seconds |
| Started | Aug 16 05:36:02 PM PDT 24 |
| Finished | Aug 16 05:36:21 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-06316b7e-cf4a-4a54-b7ff-cc64838c2341 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3494933883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.3494933883 |
| Directory | /workspace/23.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/23.usbdev_aon_wake_resume.3477756742 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 23883483273 ps |
| CPU time | 26.98 seconds |
| Started | Aug 16 05:36:18 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-8af3e6a1-7de5-479f-a372-0e0fc510a7d7 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3477756742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_a on_wake_resume.3477756742 |
| Directory | /workspace/23.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/23.usbdev_av_buffer.3974203664 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 209769917 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:36:27 PM PDT 24 |
| Finished | Aug 16 05:36:28 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-14b4e22d-769a-484e-98fa-8aff3e37bd09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39742 03664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_av_buffer.3974203664 |
| Directory | /workspace/23.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/23.usbdev_bitstuff_err.3642465006 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 170128207 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:36:14 PM PDT 24 |
| Finished | Aug 16 05:36:15 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-99c4dab3-fc0d-422f-ad33-40711f5cbd09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36424 65006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_bitstuff_err.3642465006 |
| Directory | /workspace/23.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/23.usbdev_data_toggle_clear.1533687469 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 541779130 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:36:02 PM PDT 24 |
| Finished | Aug 16 05:36:04 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-c6e28a6d-7b76-4af1-a2a4-d000aa129b82 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15336 87469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_clear.1533687469 |
| Directory | /workspace/23.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/23.usbdev_data_toggle_restore.1974562681 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 1194658615 ps |
| CPU time | 3.12 seconds |
| Started | Aug 16 05:35:57 PM PDT 24 |
| Finished | Aug 16 05:36:00 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-4d4e977a-0fb9-4ff4-ab69-08129f5efccf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1974562681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.1974562681 |
| Directory | /workspace/23.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/23.usbdev_device_address.3536175611 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 33323371425 ps |
| CPU time | 51.33 seconds |
| Started | Aug 16 05:36:14 PM PDT 24 |
| Finished | Aug 16 05:37:06 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-f07d68ee-c8c5-41d0-8df3-5010515cdc73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35361 75611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.3536175611 |
| Directory | /workspace/23.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/23.usbdev_device_timeout.3184767006 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 3107492972 ps |
| CPU time | 21.51 seconds |
| Started | Aug 16 05:36:13 PM PDT 24 |
| Finished | Aug 16 05:36:35 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-2243db76-fd78-4329-8224-1522fc8eb6d0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3184767006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.3184767006 |
| Directory | /workspace/23.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/23.usbdev_disable_endpoint.1555180910 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 902098874 ps |
| CPU time | 1.96 seconds |
| Started | Aug 16 05:36:00 PM PDT 24 |
| Finished | Aug 16 05:36:02 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-4d676d5d-2e3a-4426-aa07-a482cc485cf9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15551 80910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disable_endpoint.1555180910 |
| Directory | /workspace/23.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/23.usbdev_disconnected.1890520928 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 141765964 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:36:31 PM PDT 24 |
| Finished | Aug 16 05:36:32 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-2bd9a025-5f0d-4e20-8acd-a70b49f16f2f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18905 20928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disconnected.1890520928 |
| Directory | /workspace/23.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/23.usbdev_enable.28816845 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 33060914 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:36:22 PM PDT 24 |
| Finished | Aug 16 05:36:23 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-07c67fa0-b9ba-4b95-8823-8a077b6c10c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28816 845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_enable.28816845 |
| Directory | /workspace/23.usbdev_enable/latest |
| Test location | /workspace/coverage/default/23.usbdev_endpoint_access.330342833 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 956115458 ps |
| CPU time | 2.45 seconds |
| Started | Aug 16 05:36:33 PM PDT 24 |
| Finished | Aug 16 05:36:36 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-9782d7b9-a08b-417f-9889-b57b14928009 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33034 2833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.330342833 |
| Directory | /workspace/23.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/23.usbdev_endpoint_types.1161379438 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 381888132 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:36:12 PM PDT 24 |
| Finished | Aug 16 05:36:13 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-5c038322-ad7a-4c05-95b9-3164906105e9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1161379438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.1161379438 |
| Directory | /workspace/23.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/23.usbdev_fifo_rst.3035689681 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 167285731 ps |
| CPU time | 1.89 seconds |
| Started | Aug 16 05:36:32 PM PDT 24 |
| Finished | Aug 16 05:36:34 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-f9f366aa-1344-465b-a033-b77c548f65d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30356 89681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_fifo_rst.3035689681 |
| Directory | /workspace/23.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/23.usbdev_in_iso.2109648377 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 215299514 ps |
| CPU time | 1.22 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 215848 kb |
| Host | smart-86427a6e-8cb1-4130-825e-d8c882eb8c5e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2109648377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.2109648377 |
| Directory | /workspace/23.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/23.usbdev_in_stall.3201914722 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 141054488 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:36:27 PM PDT 24 |
| Finished | Aug 16 05:36:28 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-255181db-76b4-4145-b600-5ad80b4c453f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32019 14722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_in_stall.3201914722 |
| Directory | /workspace/23.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/23.usbdev_in_trans.2723062542 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 213393749 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:36:18 PM PDT 24 |
| Finished | Aug 16 05:36:20 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-ec3b8919-d3be-4397-bee0-f51e1de61ff9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27230 62542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_in_trans.2723062542 |
| Directory | /workspace/23.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_invalid_sync.3264103932 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 3908292731 ps |
| CPU time | 39.91 seconds |
| Started | Aug 16 05:36:25 PM PDT 24 |
| Finished | Aug 16 05:37:05 PM PDT 24 |
| Peak memory | 218308 kb |
| Host | smart-3575a11f-04b7-45d5-85fc-4e8060f8a0da |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3264103932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.3264103932 |
| Directory | /workspace/23.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/23.usbdev_iso_retraction.3727393642 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 13047160129 ps |
| CPU time | 156.04 seconds |
| Started | Aug 16 05:36:23 PM PDT 24 |
| Finished | Aug 16 05:38:59 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-ea05d24c-6d20-4d1f-a637-fe40b02cf56f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3727393642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.3727393642 |
| Directory | /workspace/23.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/23.usbdev_link_in_err.3927460243 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 169375051 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:17 PM PDT 24 |
| Finished | Aug 16 05:36:18 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-119028d2-85a3-415e-8cc1-42b69e1f3e8c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39274 60243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_link_in_err.3927460243 |
| Directory | /workspace/23.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/23.usbdev_link_resume.2759120522 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 24139736676 ps |
| CPU time | 39.25 seconds |
| Started | Aug 16 05:36:09 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 216076 kb |
| Host | smart-ce722724-07ab-426a-9b38-bb4c933c16ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27591 20522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_link_resume.2759120522 |
| Directory | /workspace/23.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/23.usbdev_link_suspend.2049352292 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 4576250043 ps |
| CPU time | 5.93 seconds |
| Started | Aug 16 05:36:28 PM PDT 24 |
| Finished | Aug 16 05:36:34 PM PDT 24 |
| Peak memory | 216108 kb |
| Host | smart-7c039ca9-2ed9-4891-b87e-eb969b6c44f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20493 52292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_link_suspend.2049352292 |
| Directory | /workspace/23.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/23.usbdev_low_speed_traffic.2742342201 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 4475090068 ps |
| CPU time | 43.78 seconds |
| Started | Aug 16 05:36:30 PM PDT 24 |
| Finished | Aug 16 05:37:14 PM PDT 24 |
| Peak memory | 216076 kb |
| Host | smart-0f91ad8f-94f6-4062-92cf-7938a3c43a1c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2742342201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.2742342201 |
| Directory | /workspace/23.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_inter_pkt_delay.3986633008 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 2304332501 ps |
| CPU time | 66.14 seconds |
| Started | Aug 16 05:36:04 PM PDT 24 |
| Finished | Aug 16 05:37:11 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-acc3641e-b2ad-47d5-a316-00f9df721a1c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3986633008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.3986633008 |
| Directory | /workspace/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_length_in_transaction.47410167 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 268145564 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:36:32 PM PDT 24 |
| Finished | Aug 16 05:36:33 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-c4cecd80-d9df-4183-9c2a-c84dfee20714 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=47410167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.47410167 |
| Directory | /workspace/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_length_out_transaction.4072157531 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 188147195 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:36:11 PM PDT 24 |
| Finished | Aug 16 05:36:12 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-3c4c383d-46b2-4deb-8937-b5827c467263 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40721 57531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.4072157531 |
| Directory | /workspace/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_max_non_iso_usb_traffic.2915708400 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 2809386494 ps |
| CPU time | 22.93 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:37:01 PM PDT 24 |
| Peak memory | 218036 kb |
| Host | smart-3d3a354a-6885-48fd-abe6-be32247b2e39 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29157 08400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.2915708400 |
| Directory | /workspace/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/23.usbdev_min_inter_pkt_delay.4209770764 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 1799809875 ps |
| CPU time | 13.63 seconds |
| Started | Aug 16 05:36:17 PM PDT 24 |
| Finished | Aug 16 05:36:30 PM PDT 24 |
| Peak memory | 217340 kb |
| Host | smart-6cf02703-9da6-43c5-818d-663a7c472c16 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=4209770764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.4209770764 |
| Directory | /workspace/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/23.usbdev_min_length_in_transaction.2904227871 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 161265731 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:36:23 PM PDT 24 |
| Finished | Aug 16 05:36:24 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-4aa212ef-bc6b-4b50-9ac3-15e84b9ec869 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2904227871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.2904227871 |
| Directory | /workspace/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_min_length_out_transaction.1596303099 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 169112414 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:36:21 PM PDT 24 |
| Finished | Aug 16 05:36:22 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-761ddb78-664f-41a9-b401-2dcd1f532dc9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15963 03099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.1596303099 |
| Directory | /workspace/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_nak_trans.495661296 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 189143269 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:36:28 PM PDT 24 |
| Finished | Aug 16 05:36:29 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c6b2189a-bc9c-4c2f-90f9-88fe164135da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49566 1296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_nak_trans.495661296 |
| Directory | /workspace/23.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_out_iso.2433636077 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 173915478 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:36:31 PM PDT 24 |
| Finished | Aug 16 05:36:32 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-7e851ef8-ab10-475f-842f-ce06db1b0f50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24336 36077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_iso.2433636077 |
| Directory | /workspace/23.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/23.usbdev_out_stall.3949652538 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 182814083 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:36:24 PM PDT 24 |
| Finished | Aug 16 05:36:25 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-d196273d-1e96-44dd-98cc-5fdd7b06aede |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39496 52538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_stall.3949652538 |
| Directory | /workspace/23.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/23.usbdev_out_trans_nak.1525275835 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 212517341 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:36:23 PM PDT 24 |
| Finished | Aug 16 05:36:24 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-b9a54095-a975-49bd-88c1-a357f85038c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15252 75835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_out_trans_nak.1525275835 |
| Directory | /workspace/23.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/23.usbdev_pending_in_trans.160962493 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 177670014 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:36:17 PM PDT 24 |
| Finished | Aug 16 05:36:18 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d4ba26ca-8f5c-48b0-aad4-17cc35456dfa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16096 2493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pending_in_trans.160962493 |
| Directory | /workspace/23.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_phy_config_pinflip.3683432676 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 276391489 ps |
| CPU time | 1.14 seconds |
| Started | Aug 16 05:36:20 PM PDT 24 |
| Finished | Aug 16 05:36:21 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-9fcaf30c-f76c-4f48-a569-9cc914f5459b |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3683432676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.3683432676 |
| Directory | /workspace/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/23.usbdev_phy_config_usb_ref_disable.1160488211 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 160034088 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:23 PM PDT 24 |
| Finished | Aug 16 05:36:24 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-07f804fd-2471-4d39-b6c2-bb3fb0b888bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11604 88211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.1160488211 |
| Directory | /workspace/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/23.usbdev_phy_pins_sense.3964404022 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 43823798 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:36:13 PM PDT 24 |
| Finished | Aug 16 05:36:14 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-20b6f8b4-f5b0-41ec-8e31-22cd511de587 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39644 04022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.3964404022 |
| Directory | /workspace/23.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/23.usbdev_pkt_buffer.2508842810 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 19860174107 ps |
| CPU time | 47.62 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:37:24 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-ad5e1425-7bac-40fd-a1b9-c8462880acfb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25088 42810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pkt_buffer.2508842810 |
| Directory | /workspace/23.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/23.usbdev_pkt_received.1709945428 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 181619438 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:36:28 PM PDT 24 |
| Finished | Aug 16 05:36:29 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-99f6f427-840d-445f-b56a-d3c2f680c009 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17099 45428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pkt_received.1709945428 |
| Directory | /workspace/23.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/23.usbdev_pkt_sent.2716626312 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 248507798 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:36:21 PM PDT 24 |
| Finished | Aug 16 05:36:22 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-1e84ba32-67f3-4ca9-bb69-a3a1a1a20ceb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27166 26312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pkt_sent.2716626312 |
| Directory | /workspace/23.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/23.usbdev_random_length_in_transaction.3049891382 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 167948048 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:36:29 PM PDT 24 |
| Finished | Aug 16 05:36:30 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-bc897deb-1aa7-4b61-ab53-354d7b01a979 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30498 91382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_in_transaction.3049891382 |
| Directory | /workspace/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_random_length_out_transaction.1018762663 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 157754093 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:36:35 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3dadcffd-4be4-48d8-8cc3-dbdc4582b908 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10187 62663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.1018762663 |
| Directory | /workspace/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/23.usbdev_rx_crc_err.566620876 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 175855407 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:36:30 PM PDT 24 |
| Finished | Aug 16 05:36:31 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-a5ee5718-6be5-4b72-a61b-0f8a92579746 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56662 0876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_rx_crc_err.566620876 |
| Directory | /workspace/23.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/23.usbdev_rx_full.817535242 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 247685830 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:36:23 PM PDT 24 |
| Finished | Aug 16 05:36:24 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-3c889882-d395-4a00-83f9-afdd71f0c292 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81753 5242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_rx_full.817535242 |
| Directory | /workspace/23.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/23.usbdev_setup_stage.2054839853 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 146127128 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:36:15 PM PDT 24 |
| Finished | Aug 16 05:36:16 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-ae3b4d79-454b-47d6-9368-eb0fbba6cbda |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20548 39853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_setup_stage.2054839853 |
| Directory | /workspace/23.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/23.usbdev_setup_trans_ignored.4010247445 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 152130563 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:36:16 PM PDT 24 |
| Finished | Aug 16 05:36:17 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-b3c68114-4b1e-4e0c-a6ac-62a8b79bc6f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40102 47445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_setup_trans_ignored.4010247445 |
| Directory | /workspace/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/23.usbdev_smoke.708200427 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 250917104 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:36:29 PM PDT 24 |
| Finished | Aug 16 05:36:30 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-02867cf0-6187-43fe-907b-784088d8df88 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70820 0427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.708200427 |
| Directory | /workspace/23.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/23.usbdev_spurious_pids_ignored.715777545 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 2106477105 ps |
| CPU time | 15.82 seconds |
| Started | Aug 16 05:36:30 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 217596 kb |
| Host | smart-89476862-0bf4-48a3-82a9-79ab06f62d6d |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=715777545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.715777545 |
| Directory | /workspace/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/23.usbdev_stall_priority_over_nak.2940929019 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 168378186 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:36:31 PM PDT 24 |
| Finished | Aug 16 05:36:32 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-92703362-11e1-415a-8a59-8ca0ab2cc41e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29409 29019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.2940929019 |
| Directory | /workspace/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/23.usbdev_stall_trans.3358599752 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 175976621 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:36:19 PM PDT 24 |
| Finished | Aug 16 05:36:20 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-52c511a0-6a84-4e75-979d-9765e9370c08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33585 99752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_trans.3358599752 |
| Directory | /workspace/23.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/23.usbdev_stream_len_max.208402148 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 1328613488 ps |
| CPU time | 3.37 seconds |
| Started | Aug 16 05:36:33 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-cf69bbc6-8862-4918-98b2-dbfa9ed4416c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20840 2148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.208402148 |
| Directory | /workspace/23.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/23.usbdev_streaming_out.2775021109 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 3123654176 ps |
| CPU time | 23.54 seconds |
| Started | Aug 16 05:36:12 PM PDT 24 |
| Finished | Aug 16 05:36:35 PM PDT 24 |
| Peak memory | 217748 kb |
| Host | smart-a7c43080-d2dc-460b-9d98-f5f1c1b3ab1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27750 21109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_streaming_out.2775021109 |
| Directory | /workspace/23.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/23.usbdev_timeout_missing_host_handshake.3219214923 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 2887435860 ps |
| CPU time | 18.69 seconds |
| Started | Aug 16 05:36:10 PM PDT 24 |
| Finished | Aug 16 05:36:28 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-736817b3-2dc6-44a7-934e-0e6594dc7004 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3219214923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_hos t_handshake.3219214923 |
| Directory | /workspace/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/23.usbdev_tx_rx_disruption.2825157812 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 633812723 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:36:35 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-8351b432-bead-498f-be9e-848cb11bedfb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2825157812 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_tx_rx_disruption.2825157812 |
| Directory | /workspace/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/230.usbdev_tx_rx_disruption.1688985974 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 489712770 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:51 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-c21e7840-c490-4499-99e8-43f889b65474 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1688985974 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 230.usbdev_tx_rx_disruption.1688985974 |
| Directory | /workspace/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/231.usbdev_tx_rx_disruption.2471280504 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 497749607 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:40:23 PM PDT 24 |
| Finished | Aug 16 05:40:25 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3e099cfc-5d87-42e7-8598-73bba0c236f4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2471280504 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 231.usbdev_tx_rx_disruption.2471280504 |
| Directory | /workspace/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/232.usbdev_tx_rx_disruption.3701343695 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 518836588 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-3fea204e-e1fa-40df-81e6-46b52947d36d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3701343695 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 232.usbdev_tx_rx_disruption.3701343695 |
| Directory | /workspace/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/233.usbdev_tx_rx_disruption.2246996992 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 602559519 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-ca613579-3e11-49a9-a907-373c73b1f75a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2246996992 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 233.usbdev_tx_rx_disruption.2246996992 |
| Directory | /workspace/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/234.usbdev_tx_rx_disruption.1038667537 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 628950554 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-7e5f19af-97ed-4279-a695-dac414142591 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1038667537 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 234.usbdev_tx_rx_disruption.1038667537 |
| Directory | /workspace/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/235.usbdev_tx_rx_disruption.2257327374 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 426670856 ps |
| CPU time | 1.35 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-473e18ff-c45e-4e7c-a27c-71e7332db862 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2257327374 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 235.usbdev_tx_rx_disruption.2257327374 |
| Directory | /workspace/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/236.usbdev_tx_rx_disruption.1955922457 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 594295219 ps |
| CPU time | 1.79 seconds |
| Started | Aug 16 05:40:14 PM PDT 24 |
| Finished | Aug 16 05:40:16 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-f5e03fe3-7a65-43a7-8a29-a02841f72505 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1955922457 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 236.usbdev_tx_rx_disruption.1955922457 |
| Directory | /workspace/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/237.usbdev_tx_rx_disruption.539022244 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 537008803 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-5d2dc43a-7849-4cbb-b370-1519a7ab3a7c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=539022244 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 237.usbdev_tx_rx_disruption.539022244 |
| Directory | /workspace/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/238.usbdev_tx_rx_disruption.3778482509 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 638766935 ps |
| CPU time | 1.8 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-08f7951a-4647-4e40-884a-8380ada2aedd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3778482509 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 238.usbdev_tx_rx_disruption.3778482509 |
| Directory | /workspace/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/239.usbdev_tx_rx_disruption.1863313299 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 612687143 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-dc964f41-99a8-44fb-a4d8-14cec49f8632 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1863313299 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 239.usbdev_tx_rx_disruption.1863313299 |
| Directory | /workspace/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/24.usbdev_alert_test.1223263220 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 42214170 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-62de4a68-36ca-427b-9c1e-4b8c9dcacc8f |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1223263220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.1223263220 |
| Directory | /workspace/24.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/24.usbdev_aon_wake_disconnect.3641813410 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 11351453277 ps |
| CPU time | 13.76 seconds |
| Started | Aug 16 05:36:23 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-6bf6e89d-0fde-45be-a0c2-857ee0971aeb |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3641813410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_a on_wake_disconnect.3641813410 |
| Directory | /workspace/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/24.usbdev_aon_wake_reset.2291413254 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 18771089634 ps |
| CPU time | 22.05 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:59 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-f2d09ebf-e37a-4031-a02c-86ff939be37e |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2291413254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.2291413254 |
| Directory | /workspace/24.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/24.usbdev_aon_wake_resume.2864360593 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 29859914222 ps |
| CPU time | 36.97 seconds |
| Started | Aug 16 05:36:29 PM PDT 24 |
| Finished | Aug 16 05:37:06 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-6fa46267-073e-4d3b-95e8-e2f0c71f37f6 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2864360593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_a on_wake_resume.2864360593 |
| Directory | /workspace/24.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/24.usbdev_av_buffer.2256429890 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 199258166 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:36:33 PM PDT 24 |
| Finished | Aug 16 05:36:34 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-fd660f87-21ca-406d-92a3-e2fed4a5138c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22564 29890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_av_buffer.2256429890 |
| Directory | /workspace/24.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/24.usbdev_bitstuff_err.825997462 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 146559396 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-31a02656-481f-41e0-a80d-4214aafe68fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82599 7462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_bitstuff_err.825997462 |
| Directory | /workspace/24.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/24.usbdev_data_toggle_clear.3332047662 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 263092990 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:36:35 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-6ba3bf01-e7c5-4855-8c46-0fb0bd946863 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33320 47662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_clear.3332047662 |
| Directory | /workspace/24.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/24.usbdev_data_toggle_restore.1240585116 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 1396075161 ps |
| CPU time | 3.8 seconds |
| Started | Aug 16 05:36:32 PM PDT 24 |
| Finished | Aug 16 05:36:36 PM PDT 24 |
| Peak memory | 207816 kb |
| Host | smart-977cdc1b-b7c9-4b79-a128-cb500804f539 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1240585116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.1240585116 |
| Directory | /workspace/24.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/24.usbdev_device_address.2623193267 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 45990735161 ps |
| CPU time | 70.63 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:37:45 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-9ef59501-191e-42ea-89d4-c4b29ffd3e73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26231 93267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.2623193267 |
| Directory | /workspace/24.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/24.usbdev_device_timeout.1082318860 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 3807968674 ps |
| CPU time | 32.69 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:37:07 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-6bf23b53-c4c3-4917-a3c2-3659c8f79eb8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1082318860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.1082318860 |
| Directory | /workspace/24.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/24.usbdev_disable_endpoint.3809664957 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 611216826 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:36:31 PM PDT 24 |
| Finished | Aug 16 05:36:33 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-5808d87b-4328-49de-8fe4-d7c3a5f63f46 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38096 64957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_disable_endpoint.3809664957 |
| Directory | /workspace/24.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/24.usbdev_disconnected.1828004492 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 143698198 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:36:41 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-cb31bb52-5133-4944-be6a-c60749a6f8d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18280 04492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_disconnected.1828004492 |
| Directory | /workspace/24.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/24.usbdev_enable.3155091582 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 33931946 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:36:31 PM PDT 24 |
| Finished | Aug 16 05:36:32 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-e581fdeb-1465-42ec-871d-535d0ad7b24c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31550 91582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_enable.3155091582 |
| Directory | /workspace/24.usbdev_enable/latest |
| Test location | /workspace/coverage/default/24.usbdev_endpoint_access.4025114194 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 918990286 ps |
| CPU time | 2.79 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-8a5f5454-8e25-4bbd-a5c7-497a2905d946 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40251 14194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.4025114194 |
| Directory | /workspace/24.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/24.usbdev_endpoint_types.3833773234 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 306616121 ps |
| CPU time | 1.21 seconds |
| Started | Aug 16 05:36:29 PM PDT 24 |
| Finished | Aug 16 05:36:31 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-8e4db343-bf27-4605-b68e-79a6e67cafcb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3833773234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.3833773234 |
| Directory | /workspace/24.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/24.usbdev_fifo_rst.2166889883 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 345131773 ps |
| CPU time | 2.28 seconds |
| Started | Aug 16 05:36:35 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-369f361c-f44f-4370-a145-3f2256941a2e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21668 89883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_fifo_rst.2166889883 |
| Directory | /workspace/24.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/24.usbdev_in_iso.3887294912 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 187519903 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 215820 kb |
| Host | smart-52989ada-568b-43d7-93c2-72972f96f561 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3887294912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.3887294912 |
| Directory | /workspace/24.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/24.usbdev_in_stall.180085193 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 191471929 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-8d375873-0ddd-4296-b86f-25b522af554d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18008 5193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_in_stall.180085193 |
| Directory | /workspace/24.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/24.usbdev_in_trans.4002253184 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 280454575 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:36:27 PM PDT 24 |
| Finished | Aug 16 05:36:28 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-1788699a-ea23-4efb-9223-76ae735d0058 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40022 53184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_in_trans.4002253184 |
| Directory | /workspace/24.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_invalid_sync.800458997 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 4139477379 ps |
| CPU time | 29.89 seconds |
| Started | Aug 16 05:36:33 PM PDT 24 |
| Finished | Aug 16 05:37:03 PM PDT 24 |
| Peak memory | 224160 kb |
| Host | smart-50f8d09c-4df6-4fe4-8743-74d0ccc1e9aa |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=800458997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.800458997 |
| Directory | /workspace/24.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/24.usbdev_iso_retraction.1325781198 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 4352881701 ps |
| CPU time | 52.1 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:37:29 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-6023dad3-300b-46e6-93ec-3fb37f917a77 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1325781198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.1325781198 |
| Directory | /workspace/24.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/24.usbdev_link_in_err.2841459137 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 196795293 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-da5eae39-6f5c-412b-bd5b-82f14dc4f15b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28414 59137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_link_in_err.2841459137 |
| Directory | /workspace/24.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/24.usbdev_link_resume.2021038863 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 7126351401 ps |
| CPU time | 9.84 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-ae85eb5c-f8b8-4303-a148-b3084fcd96cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20210 38863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_link_resume.2021038863 |
| Directory | /workspace/24.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/24.usbdev_link_suspend.3965708085 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 9680299572 ps |
| CPU time | 14.33 seconds |
| Started | Aug 16 05:36:29 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207828 kb |
| Host | smart-f976f81a-a8b1-4e6d-9034-e9f2f5cc4bb8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39657 08085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_link_suspend.3965708085 |
| Directory | /workspace/24.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/24.usbdev_low_speed_traffic.3634275892 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 3029683779 ps |
| CPU time | 30.39 seconds |
| Started | Aug 16 05:36:33 PM PDT 24 |
| Finished | Aug 16 05:37:04 PM PDT 24 |
| Peak memory | 217480 kb |
| Host | smart-9abc8689-5658-40df-bf6f-0664f2cedeca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3634275892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.3634275892 |
| Directory | /workspace/24.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_inter_pkt_delay.1622183214 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 2633512354 ps |
| CPU time | 27.22 seconds |
| Started | Aug 16 05:36:33 PM PDT 24 |
| Finished | Aug 16 05:37:00 PM PDT 24 |
| Peak memory | 224004 kb |
| Host | smart-e4302aff-f036-4b19-9ef9-3d6c13a09c61 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1622183214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.1622183214 |
| Directory | /workspace/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_length_in_transaction.3772989166 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 266462881 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:36:25 PM PDT 24 |
| Finished | Aug 16 05:36:26 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-c934b045-17e7-4151-9b2d-61078148f55b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3772989166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.3772989166 |
| Directory | /workspace/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_length_out_transaction.3631902401 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 225956914 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:36:24 PM PDT 24 |
| Finished | Aug 16 05:36:25 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-672dc0a8-e640-4934-b5f2-924574116d33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36319 02401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.3631902401 |
| Directory | /workspace/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_max_non_iso_usb_traffic.2103614314 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 2846219796 ps |
| CPU time | 79.26 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:37:56 PM PDT 24 |
| Peak memory | 223996 kb |
| Host | smart-4fc28688-863a-4c04-b680-5384f9077c38 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21036 14314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.2103614314 |
| Directory | /workspace/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/24.usbdev_min_inter_pkt_delay.173712188 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 1865203107 ps |
| CPU time | 52.84 seconds |
| Started | Aug 16 05:36:23 PM PDT 24 |
| Finished | Aug 16 05:37:16 PM PDT 24 |
| Peak memory | 217240 kb |
| Host | smart-2cc2fc98-11f3-45eb-b3a7-287c9e2f8d26 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=173712188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.173712188 |
| Directory | /workspace/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/24.usbdev_min_length_in_transaction.3462353889 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 200789541 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:36:33 PM PDT 24 |
| Finished | Aug 16 05:36:35 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-f48fa169-8124-4ecf-ad4f-4525c507077a |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3462353889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.3462353889 |
| Directory | /workspace/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_min_length_out_transaction.2645460668 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 175666452 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:36:35 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-dad85dc7-3100-4837-802d-d312ba61a843 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26454 60668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.2645460668 |
| Directory | /workspace/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_nak_trans.501965600 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 230471475 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-895b15e4-d124-456b-a5cf-dfa1dc446362 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50196 5600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_nak_trans.501965600 |
| Directory | /workspace/24.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_out_iso.1551181027 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 156925183 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:36:42 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-497e59bd-e1de-482f-a6ec-56382a5c7590 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15511 81027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_out_iso.1551181027 |
| Directory | /workspace/24.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/24.usbdev_out_stall.1862067764 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 225587256 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:36:29 PM PDT 24 |
| Finished | Aug 16 05:36:30 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-b9b73a1e-518d-45f0-9641-5b2ea068bbb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18620 67764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_out_stall.1862067764 |
| Directory | /workspace/24.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/24.usbdev_out_trans_nak.28588195 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 166679335 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:36:31 PM PDT 24 |
| Finished | Aug 16 05:36:32 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-acf9ca75-dd94-4309-8172-7182187505e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28588 195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_out_trans_nak.28588195 |
| Directory | /workspace/24.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/24.usbdev_pending_in_trans.1309772138 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 193349975 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-93306a9d-f246-4516-9000-d593563ebd45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13097 72138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pending_in_trans.1309772138 |
| Directory | /workspace/24.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_phy_config_pinflip.3289845535 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 198772621 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:36:33 PM PDT 24 |
| Finished | Aug 16 05:36:35 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-0d96caf1-6f6d-4b50-9f67-d75a8c73644e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3289845535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.3289845535 |
| Directory | /workspace/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/24.usbdev_phy_config_usb_ref_disable.4144000540 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 189723001 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-5c50923d-5a0b-47e4-9cfe-2873866beb4a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41440 00540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.4144000540 |
| Directory | /workspace/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/24.usbdev_phy_pins_sense.460265501 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 53532922 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:37:12 PM PDT 24 |
| Finished | Aug 16 05:37:13 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-9c4708ab-9167-4679-b8bc-08b7a51927d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46026 5501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.460265501 |
| Directory | /workspace/24.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/24.usbdev_pkt_buffer.2854974710 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 23353653841 ps |
| CPU time | 65.06 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:37:46 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-312b9960-8ca3-4064-bd9a-e836f397cb7c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28549 74710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pkt_buffer.2854974710 |
| Directory | /workspace/24.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/24.usbdev_pkt_received.724259987 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 196672151 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-864c8754-0854-4de9-aeb5-246772fe3157 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72425 9987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pkt_received.724259987 |
| Directory | /workspace/24.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/24.usbdev_pkt_sent.1537681816 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 202213656 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-1b2a9f80-b1eb-48ce-9a0f-186e8338e467 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15376 81816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pkt_sent.1537681816 |
| Directory | /workspace/24.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/24.usbdev_random_length_in_transaction.242228117 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 254683012 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-ec065829-4cdd-4dff-b9ec-dd6f12431974 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24222 8117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_in_transaction.242228117 |
| Directory | /workspace/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_random_length_out_transaction.3385746530 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 158353422 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-56c14ee1-f881-494c-8130-945ac7de9d3b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33857 46530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.3385746530 |
| Directory | /workspace/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/24.usbdev_rx_crc_err.3880812276 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 203397539 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:36:36 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-0f4da353-dcae-4674-aa26-3bfce1b1338f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38808 12276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_rx_crc_err.3880812276 |
| Directory | /workspace/24.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/24.usbdev_rx_full.782704578 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 282218044 ps |
| CPU time | 1.14 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-ba14f16f-af5b-4d54-842c-8f8abad6b2e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78270 4578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_rx_full.782704578 |
| Directory | /workspace/24.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/24.usbdev_setup_stage.2711367343 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 150127679 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-54128ff7-e74d-4ff8-aa22-da8aa1e6e33a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27113 67343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_setup_stage.2711367343 |
| Directory | /workspace/24.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/24.usbdev_setup_trans_ignored.716841300 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 192243341 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:36:41 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-64668c86-1519-4aac-888e-6c0d24c03998 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71684 1300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_setup_trans_ignored.716841300 |
| Directory | /workspace/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/24.usbdev_smoke.1546871654 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 201424624 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:36:35 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-a83b6939-70c3-435a-96b1-c63ddc726ae4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15468 71654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.1546871654 |
| Directory | /workspace/24.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/24.usbdev_spurious_pids_ignored.735624558 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 2166775487 ps |
| CPU time | 20.31 seconds |
| Started | Aug 16 05:36:43 PM PDT 24 |
| Finished | Aug 16 05:37:04 PM PDT 24 |
| Peak memory | 216604 kb |
| Host | smart-e0666809-e95f-4839-8ad3-5e821d33280e |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=735624558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.735624558 |
| Directory | /workspace/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/24.usbdev_stall_priority_over_nak.2060913083 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 200589237 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-560801e5-ec52-4bcb-9e60-900c1533a2eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20609 13083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.2060913083 |
| Directory | /workspace/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/24.usbdev_stall_trans.3756532430 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 183820020 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:36:32 PM PDT 24 |
| Finished | Aug 16 05:36:33 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-51b51bf1-6dbd-4d0c-b625-f1b5145f19e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37565 32430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_trans.3756532430 |
| Directory | /workspace/24.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/24.usbdev_stream_len_max.3609324481 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 563546059 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-ac98fbea-a3f7-4ce4-93b4-126119aaf3d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36093 24481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.3609324481 |
| Directory | /workspace/24.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/24.usbdev_streaming_out.1209973454 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 2503138771 ps |
| CPU time | 73.46 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:37:55 PM PDT 24 |
| Peak memory | 217512 kb |
| Host | smart-a8dd28e2-9923-470c-b3fc-bedf66f955cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12099 73454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_streaming_out.1209973454 |
| Directory | /workspace/24.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/24.usbdev_timeout_missing_host_handshake.2790380571 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 3653351924 ps |
| CPU time | 24 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:37:03 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-53c52dd3-7fe8-4bf4-b086-8df3677a9707 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2790380571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_hos t_handshake.2790380571 |
| Directory | /workspace/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/24.usbdev_tx_rx_disruption.3794145132 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 498530036 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-a41d7bf3-7f4f-4413-b6b0-be5b60e031e0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3794145132 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_tx_rx_disruption.3794145132 |
| Directory | /workspace/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/240.usbdev_tx_rx_disruption.1591917158 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 573919801 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-af706549-eba7-4c48-b974-b040944c327b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1591917158 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 240.usbdev_tx_rx_disruption.1591917158 |
| Directory | /workspace/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/241.usbdev_tx_rx_disruption.619072770 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 631200340 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-702b6f11-7d3d-4723-8234-115f9a1f4de9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=619072770 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 241.usbdev_tx_rx_disruption.619072770 |
| Directory | /workspace/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/242.usbdev_tx_rx_disruption.718210336 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 426983421 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-05979f77-cd9a-40c9-814c-35d740257b9c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=718210336 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 242.usbdev_tx_rx_disruption.718210336 |
| Directory | /workspace/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/243.usbdev_tx_rx_disruption.4154191799 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 648075219 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:40:42 PM PDT 24 |
| Finished | Aug 16 05:40:44 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-11fbfdf8-5f06-41cd-9b16-d7cbccc54eb2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4154191799 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 243.usbdev_tx_rx_disruption.4154191799 |
| Directory | /workspace/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/244.usbdev_tx_rx_disruption.405160726 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 619918586 ps |
| CPU time | 1.75 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-9cbd238d-cf45-472b-afe5-f1b9a9a2ddac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=405160726 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 244.usbdev_tx_rx_disruption.405160726 |
| Directory | /workspace/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/245.usbdev_tx_rx_disruption.2591439195 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 500702551 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-315b41bd-e7df-4318-9687-8fbde4b9e228 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2591439195 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 245.usbdev_tx_rx_disruption.2591439195 |
| Directory | /workspace/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/246.usbdev_tx_rx_disruption.865059635 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 527193762 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:12 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-3959af6d-6309-40d0-bbfc-ecd3d11c3409 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=865059635 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 246.usbdev_tx_rx_disruption.865059635 |
| Directory | /workspace/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/247.usbdev_tx_rx_disruption.2745468052 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 607395109 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-ae8e4af2-5370-4ffc-9203-05ec57ae15cf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2745468052 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 247.usbdev_tx_rx_disruption.2745468052 |
| Directory | /workspace/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/248.usbdev_tx_rx_disruption.424694476 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 515229635 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-8ed42be0-ff4f-40cd-a662-7ca0f6ca4a11 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=424694476 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 248.usbdev_tx_rx_disruption.424694476 |
| Directory | /workspace/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/249.usbdev_tx_rx_disruption.3683273311 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 584201835 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-815ca307-ecb9-4d76-bf05-a8b59a20d6ee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3683273311 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 249.usbdev_tx_rx_disruption.3683273311 |
| Directory | /workspace/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/25.usbdev_alert_test.3788615067 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 46093038 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-7de4cad0-5571-4e2f-a2dd-30bdb0e45e84 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3788615067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.3788615067 |
| Directory | /workspace/25.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/25.usbdev_aon_wake_disconnect.1775364777 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 6930877624 ps |
| CPU time | 10.16 seconds |
| Started | Aug 16 05:36:33 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-2bf80d70-54e5-4c72-9e89-3751f0e9877d |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1775364777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_a on_wake_disconnect.1775364777 |
| Directory | /workspace/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/25.usbdev_aon_wake_reset.1911638901 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 15783137387 ps |
| CPU time | 20.81 seconds |
| Started | Aug 16 05:36:35 PM PDT 24 |
| Finished | Aug 16 05:36:56 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-f0f27b9b-182a-4bd5-8957-beb739ab74a8 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1911638901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.1911638901 |
| Directory | /workspace/25.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/25.usbdev_aon_wake_resume.1262570258 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 30032554887 ps |
| CPU time | 37.5 seconds |
| Started | Aug 16 05:36:35 PM PDT 24 |
| Finished | Aug 16 05:37:12 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-0fc0847a-8a2a-432e-8e0f-424bbbac0ebf |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1262570258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_a on_wake_resume.1262570258 |
| Directory | /workspace/25.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/25.usbdev_av_buffer.3023696595 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 148632101 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:36:35 PM PDT 24 |
| Finished | Aug 16 05:36:36 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-300e6b62-cfca-45fc-bcd1-395404c63e9a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30236 96595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_av_buffer.3023696595 |
| Directory | /workspace/25.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/25.usbdev_bitstuff_err.1211973320 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 147350668 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-5b2c7ba5-21b0-4839-9ed8-18bd762af510 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12119 73320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_bitstuff_err.1211973320 |
| Directory | /workspace/25.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/25.usbdev_data_toggle_clear.3968320155 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 520758530 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-ce1b3259-429a-4ccc-a321-cea2bcdf7e83 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39683 20155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_clear.3968320155 |
| Directory | /workspace/25.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/25.usbdev_data_toggle_restore.3203504758 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 405455598 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-3bb1011e-90a8-4c45-b0ab-0446ce625bfa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3203504758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.3203504758 |
| Directory | /workspace/25.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/25.usbdev_device_timeout.3223153025 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 6149526057 ps |
| CPU time | 58.48 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-40713961-27a0-410f-89e9-237066e8675e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3223153025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.3223153025 |
| Directory | /workspace/25.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/25.usbdev_disable_endpoint.4288337770 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 983265874 ps |
| CPU time | 2.18 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:41 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-34dda0da-988b-4be5-9ec4-136656a9ff02 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42883 37770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_disable_endpoint.4288337770 |
| Directory | /workspace/25.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/25.usbdev_disconnected.4024489322 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 149210986 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:35 PM PDT 24 |
| Finished | Aug 16 05:36:36 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-619b23a9-4ef9-4cbd-ad66-0732f18a4902 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40244 89322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_disconnected.4024489322 |
| Directory | /workspace/25.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/25.usbdev_enable.3480008279 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 37295806 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-d7e7a7b7-392f-411b-9221-c916ca492169 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34800 08279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_enable.3480008279 |
| Directory | /workspace/25.usbdev_enable/latest |
| Test location | /workspace/coverage/default/25.usbdev_endpoint_access.199309716 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 921770941 ps |
| CPU time | 2.44 seconds |
| Started | Aug 16 05:36:35 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-e7d37ec1-7c36-490d-a8ea-f0d8e450f8ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19930 9716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.199309716 |
| Directory | /workspace/25.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/25.usbdev_endpoint_types.998177097 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 616895342 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-baef223f-7a83-4756-8ba0-8250bcc92afa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=998177097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.998177097 |
| Directory | /workspace/25.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/25.usbdev_fifo_rst.710250429 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 208902879 ps |
| CPU time | 2.23 seconds |
| Started | Aug 16 05:37:17 PM PDT 24 |
| Finished | Aug 16 05:37:19 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-a262a720-3959-4026-a6e4-76eaa6ae0a38 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71025 0429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_fifo_rst.710250429 |
| Directory | /workspace/25.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/25.usbdev_in_iso.2198608630 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 260519883 ps |
| CPU time | 1.32 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:36:36 PM PDT 24 |
| Peak memory | 216912 kb |
| Host | smart-54b93cd8-5339-435a-b92f-584aa4dbc094 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2198608630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.2198608630 |
| Directory | /workspace/25.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/25.usbdev_in_stall.2767471230 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 140820559 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-3d16ef1f-faa8-47d1-8ea9-aeb690b25000 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27674 71230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_in_stall.2767471230 |
| Directory | /workspace/25.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/25.usbdev_in_trans.2328601395 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 253800385 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-eff0d0e3-1065-4769-b351-fe55a331af0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23286 01395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_in_trans.2328601395 |
| Directory | /workspace/25.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_invalid_sync.3962496454 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 5727154756 ps |
| CPU time | 60.19 seconds |
| Started | Aug 16 05:37:02 PM PDT 24 |
| Finished | Aug 16 05:38:03 PM PDT 24 |
| Peak memory | 217440 kb |
| Host | smart-e1d0e2ea-336f-436b-a6c4-345aea427137 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3962496454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.3962496454 |
| Directory | /workspace/25.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/25.usbdev_iso_retraction.3384730040 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 6709899665 ps |
| CPU time | 80.64 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:37:58 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-9d3591b2-e534-49b5-965d-6cf50cb8a584 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3384730040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.3384730040 |
| Directory | /workspace/25.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/25.usbdev_link_in_err.2956178825 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 201366051 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-0e048673-7a9a-431c-bf85-229d2cd6f99c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29561 78825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_link_in_err.2956178825 |
| Directory | /workspace/25.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/25.usbdev_link_resume.2008641737 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 7346391063 ps |
| CPU time | 10 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:48 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-bdd27c48-5d2e-431f-9e3e-f0908f5c65da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20086 41737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_link_resume.2008641737 |
| Directory | /workspace/25.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/25.usbdev_link_suspend.3211250219 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 3448318267 ps |
| CPU time | 4.89 seconds |
| Started | Aug 16 05:36:35 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 216004 kb |
| Host | smart-e4a3a84c-de21-40fb-9bb4-1240c012ebf5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32112 50219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_link_suspend.3211250219 |
| Directory | /workspace/25.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/25.usbdev_low_speed_traffic.3900582001 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 3767547101 ps |
| CPU time | 32.44 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:37:09 PM PDT 24 |
| Peak memory | 219260 kb |
| Host | smart-0b4656b4-8cf6-4ad0-a8c2-49b38263002b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3900582001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.3900582001 |
| Directory | /workspace/25.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/25.usbdev_max_inter_pkt_delay.1786868807 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 2640063060 ps |
| CPU time | 75.28 seconds |
| Started | Aug 16 05:36:46 PM PDT 24 |
| Finished | Aug 16 05:38:01 PM PDT 24 |
| Peak memory | 217292 kb |
| Host | smart-8cc67cbc-2c84-4150-8e0f-c5e41dc4ce07 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1786868807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.1786868807 |
| Directory | /workspace/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/25.usbdev_max_length_in_transaction.856149222 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 275430860 ps |
| CPU time | 1.14 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-f86d40eb-7636-4218-9699-aa121f5a1f01 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=856149222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.856149222 |
| Directory | /workspace/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_max_length_out_transaction.3865865657 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 193610679 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-4e876353-9771-49ec-ae66-e85f1cee48ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38658 65657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.3865865657 |
| Directory | /workspace/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_min_inter_pkt_delay.3060123521 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 3199121318 ps |
| CPU time | 93.43 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:38:13 PM PDT 24 |
| Peak memory | 217560 kb |
| Host | smart-d933b781-a62f-4f55-ad56-db1ad6e595c4 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3060123521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.3060123521 |
| Directory | /workspace/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/25.usbdev_min_length_in_transaction.2880419685 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 162822124 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:36:35 PM PDT 24 |
| Finished | Aug 16 05:36:36 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-744f71b3-2295-4ca3-886b-94cc6f5f034a |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2880419685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.2880419685 |
| Directory | /workspace/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_min_length_out_transaction.4019891968 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 186036332 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-85256eff-efd7-4f06-9c84-9cfcd53294f5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40198 91968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.4019891968 |
| Directory | /workspace/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_nak_trans.2666480552 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 213940027 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-49d6d8cf-f85c-404e-a091-36756e786b81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26664 80552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_nak_trans.2666480552 |
| Directory | /workspace/25.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_out_iso.3656536600 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 154436002 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-04cb0769-17fa-4e7c-82fd-99380ee8a574 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36565 36600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_out_iso.3656536600 |
| Directory | /workspace/25.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/25.usbdev_out_stall.693599637 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 181231414 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:54 PM PDT 24 |
| Finished | Aug 16 05:36:55 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-46adba00-be1c-4aee-9ff7-b49aacb90fa7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69359 9637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_out_stall.693599637 |
| Directory | /workspace/25.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/25.usbdev_out_trans_nak.3575206440 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 180431039 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-3a0ed17c-76d8-4acc-8a68-a2f214434440 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35752 06440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_out_trans_nak.3575206440 |
| Directory | /workspace/25.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/25.usbdev_pending_in_trans.735258376 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 171406225 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-5aaf9680-498e-401a-bde1-7fdc14eb2518 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73525 8376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pending_in_trans.735258376 |
| Directory | /workspace/25.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_phy_config_pinflip.161933234 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 197619779 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-a8ef3e7f-8267-4ab3-8527-53fdad784c1f |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=161933234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.161933234 |
| Directory | /workspace/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/25.usbdev_phy_config_usb_ref_disable.184718074 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 154647940 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-06d15f69-a7ae-4aa7-b5ec-3ebb2b5664ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18471 8074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.184718074 |
| Directory | /workspace/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/25.usbdev_phy_pins_sense.2092528121 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 34920727 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:37:07 PM PDT 24 |
| Finished | Aug 16 05:37:08 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-7944d2a5-e85a-4d35-81f6-518802e22f5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20925 28121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.2092528121 |
| Directory | /workspace/25.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/25.usbdev_pkt_buffer.357158199 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 13391635496 ps |
| CPU time | 34.92 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:37:14 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-0eadf5f7-2770-4408-8ac2-5e1ef3c3410a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35715 8199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pkt_buffer.357158199 |
| Directory | /workspace/25.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/25.usbdev_pkt_received.1174921719 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 168207698 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-b9559bd1-eecf-4d47-a670-cddf1c60c5d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11749 21719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pkt_received.1174921719 |
| Directory | /workspace/25.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/25.usbdev_pkt_sent.1783304108 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 249112793 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-a1f58d40-7d32-4076-9755-eb7ed8a9896d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17833 04108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pkt_sent.1783304108 |
| Directory | /workspace/25.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/25.usbdev_random_length_in_transaction.4278329191 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 207190518 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-d5f0184b-7e0e-4136-85eb-0cac88d8a39b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42783 29191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_in_transaction.4278329191 |
| Directory | /workspace/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_random_length_out_transaction.2034396795 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 161626091 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-65822923-f5fb-4866-a59b-866b97c85e5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20343 96795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.2034396795 |
| Directory | /workspace/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/25.usbdev_rx_crc_err.4154408620 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 201911664 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-76fe7edb-3be6-4287-befd-ac0662141c77 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41544 08620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_rx_crc_err.4154408620 |
| Directory | /workspace/25.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/25.usbdev_rx_full.2131207663 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 246292442 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-6836619a-ff19-432f-b901-12c4938a3614 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21312 07663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_rx_full.2131207663 |
| Directory | /workspace/25.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/25.usbdev_setup_stage.3959870355 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 179353033 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-1e3da8ff-fff1-41f3-8652-5d4bbeb6a49c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39598 70355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_setup_stage.3959870355 |
| Directory | /workspace/25.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/25.usbdev_setup_trans_ignored.1577836553 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 158994779 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-4c243d90-7eb7-4a42-b910-df672feb876e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15778 36553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_setup_trans_ignored.1577836553 |
| Directory | /workspace/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/25.usbdev_smoke.2849414206 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 268349130 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-bdafea49-670d-462e-8e33-77b9584b6dae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28494 14206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.2849414206 |
| Directory | /workspace/25.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/25.usbdev_spurious_pids_ignored.1318798097 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 2874341238 ps |
| CPU time | 28.23 seconds |
| Started | Aug 16 05:37:16 PM PDT 24 |
| Finished | Aug 16 05:37:44 PM PDT 24 |
| Peak memory | 224072 kb |
| Host | smart-2deb8ae8-304e-4968-add9-29856f088d3c |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1318798097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.1318798097 |
| Directory | /workspace/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/25.usbdev_stall_priority_over_nak.2048865348 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 157094372 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:36:41 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-5e2b24bd-6d71-4d19-8285-8c1c91f9b9a7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20488 65348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.2048865348 |
| Directory | /workspace/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/25.usbdev_stall_trans.2876662872 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 192431975 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-f50cb1a1-28cf-4520-9845-cc9f11c2af02 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28766 62872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_trans.2876662872 |
| Directory | /workspace/25.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/25.usbdev_stream_len_max.3980424751 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 713819051 ps |
| CPU time | 2.02 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-7850a034-bdbc-44b1-9588-2d9060a5a5fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39804 24751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.3980424751 |
| Directory | /workspace/25.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/25.usbdev_streaming_out.720390871 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 2838203453 ps |
| CPU time | 21.25 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:57 PM PDT 24 |
| Peak memory | 207816 kb |
| Host | smart-2fd62a39-8973-4ac9-a5cc-deed0a3e4eba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72039 0871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_streaming_out.720390871 |
| Directory | /workspace/25.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/25.usbdev_timeout_missing_host_handshake.2189970412 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 2934699278 ps |
| CPU time | 25.38 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:37:01 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-391e2758-dd9f-4a1a-b43c-fc5b76238a74 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2189970412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_hos t_handshake.2189970412 |
| Directory | /workspace/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/25.usbdev_tx_rx_disruption.348168518 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 599467147 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-40cc3b96-84fe-4e21-8f69-849db261caba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=348168518 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 25.usbdev_tx_rx_disruption.348168518 |
| Directory | /workspace/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/250.usbdev_tx_rx_disruption.3324020678 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 461079356 ps |
| CPU time | 1.32 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-6a8a2fed-42cc-4d48-bd92-ab6bb2b02851 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3324020678 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 250.usbdev_tx_rx_disruption.3324020678 |
| Directory | /workspace/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/251.usbdev_tx_rx_disruption.2068027951 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 418795242 ps |
| CPU time | 1.34 seconds |
| Started | Aug 16 05:40:25 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-1369c881-088a-427e-91d5-336c980ab366 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2068027951 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 251.usbdev_tx_rx_disruption.2068027951 |
| Directory | /workspace/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/252.usbdev_tx_rx_disruption.4231997124 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 650066711 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-39a3da06-362e-44bb-a6f4-b8724b87baa9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4231997124 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 252.usbdev_tx_rx_disruption.4231997124 |
| Directory | /workspace/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/253.usbdev_tx_rx_disruption.1770306407 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 570727560 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:25 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-e7dd9ef5-981d-4f48-9bd7-ba262498beb9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1770306407 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 253.usbdev_tx_rx_disruption.1770306407 |
| Directory | /workspace/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/254.usbdev_tx_rx_disruption.856026590 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 555336799 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:24 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-9833c8fd-922b-4693-a7f9-0ee7adbf0cea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=856026590 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 254.usbdev_tx_rx_disruption.856026590 |
| Directory | /workspace/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/255.usbdev_tx_rx_disruption.987406096 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 697304256 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:40:34 PM PDT 24 |
| Finished | Aug 16 05:40:35 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-ecf1ba4b-66ed-4c0d-986b-f5c5cb0e1f4f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=987406096 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 255.usbdev_tx_rx_disruption.987406096 |
| Directory | /workspace/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/256.usbdev_tx_rx_disruption.3593091686 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 469365596 ps |
| CPU time | 1.34 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-5c094f77-6608-445c-a78f-987d83430e5d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3593091686 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 256.usbdev_tx_rx_disruption.3593091686 |
| Directory | /workspace/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/257.usbdev_tx_rx_disruption.3484086344 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 512735623 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:22 PM PDT 24 |
| Finished | Aug 16 05:40:24 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-3c613aae-73d3-4878-ba52-8c1199ffd343 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3484086344 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 257.usbdev_tx_rx_disruption.3484086344 |
| Directory | /workspace/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/258.usbdev_tx_rx_disruption.1142617369 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 602959576 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-9efaff6e-86b2-42e1-b2b6-09cfdce3d173 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1142617369 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 258.usbdev_tx_rx_disruption.1142617369 |
| Directory | /workspace/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/259.usbdev_tx_rx_disruption.1982166588 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 499499770 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:21 PM PDT 24 |
| Finished | Aug 16 05:40:23 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-0e82db21-6615-40ae-99b0-7837dba0409e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1982166588 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 259.usbdev_tx_rx_disruption.1982166588 |
| Directory | /workspace/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/26.usbdev_alert_test.3748616815 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 37512408 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-240ac2f1-51f9-450b-9201-145caec9439c |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3748616815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.3748616815 |
| Directory | /workspace/26.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/26.usbdev_aon_wake_disconnect.3741363657 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 7282782666 ps |
| CPU time | 9.91 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-23728159-efd0-4fbc-8d48-aca24872aa78 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3741363657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_a on_wake_disconnect.3741363657 |
| Directory | /workspace/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/26.usbdev_aon_wake_reset.561259668 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 20300124338 ps |
| CPU time | 26.79 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:37:06 PM PDT 24 |
| Peak memory | 207860 kb |
| Host | smart-d1cbc6d1-3e47-45cb-a97e-c9b7b482521a |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=561259668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.561259668 |
| Directory | /workspace/26.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/26.usbdev_aon_wake_resume.344676151 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 25760115600 ps |
| CPU time | 32.61 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:37:10 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-58e8805c-1656-4509-88e2-d9d4f6d097bc |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=344676151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_ao n_wake_resume.344676151 |
| Directory | /workspace/26.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/26.usbdev_av_buffer.4262078248 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 186785729 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:36:50 PM PDT 24 |
| Finished | Aug 16 05:36:56 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-32789b4a-db02-4003-80b3-b277cb107de8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42620 78248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_av_buffer.4262078248 |
| Directory | /workspace/26.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/26.usbdev_bitstuff_err.2740725737 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 206341424 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-a9f5964b-bbc6-4eda-a748-e80ab2c0836c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27407 25737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_bitstuff_err.2740725737 |
| Directory | /workspace/26.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/26.usbdev_data_toggle_clear.3712988322 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 278077022 ps |
| CPU time | 1.14 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:36:41 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-b7fea3c4-dab7-4a42-bf3d-9eb99323a4e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37129 88322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_clear.3712988322 |
| Directory | /workspace/26.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/26.usbdev_data_toggle_restore.843481081 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 1204874799 ps |
| CPU time | 3.1 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-4c5dc57c-a1f1-40ac-9f72-3e9c3aa23433 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=843481081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.843481081 |
| Directory | /workspace/26.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/26.usbdev_device_address.1112482468 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 26372922523 ps |
| CPU time | 48.79 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-a1f0d7fe-b221-4895-b08a-d2f112fe07fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11124 82468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.1112482468 |
| Directory | /workspace/26.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/26.usbdev_device_timeout.1898774955 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 1526024415 ps |
| CPU time | 13.38 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:52 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-c9708d3c-4867-4b7f-92b6-3ba1ac9e8e07 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1898774955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.1898774955 |
| Directory | /workspace/26.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/26.usbdev_disable_endpoint.394896877 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 1007841911 ps |
| CPU time | 2.33 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:48 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-869da7bc-fe84-4eb9-9139-8847a54d257d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39489 6877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_disable_endpoint.394896877 |
| Directory | /workspace/26.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/26.usbdev_disconnected.1072217490 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 211895347 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f61c9630-1369-405c-a7e7-f5e682ad1a7c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10722 17490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_disconnected.1072217490 |
| Directory | /workspace/26.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/26.usbdev_enable.2289806887 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 98369163 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-ffdbc182-8011-468c-ba87-f05b0ee7ba8d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22898 06887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_enable.2289806887 |
| Directory | /workspace/26.usbdev_enable/latest |
| Test location | /workspace/coverage/default/26.usbdev_endpoint_access.3451534860 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 793267738 ps |
| CPU time | 2.6 seconds |
| Started | Aug 16 05:36:57 PM PDT 24 |
| Finished | Aug 16 05:37:00 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-104fa0f2-dcb1-49b6-a994-fe5146067da9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34515 34860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.3451534860 |
| Directory | /workspace/26.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/26.usbdev_fifo_rst.2217887836 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 345434117 ps |
| CPU time | 2.25 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:51 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-afac3d2a-abcf-4610-9ffb-a76ef424c352 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22178 87836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_fifo_rst.2217887836 |
| Directory | /workspace/26.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/26.usbdev_in_iso.1121617065 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 216732886 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 215868 kb |
| Host | smart-3f49366c-5c3a-44b3-b5a8-ca296665838f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1121617065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.1121617065 |
| Directory | /workspace/26.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/26.usbdev_in_stall.548723408 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 166918187 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:36:56 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-beb54941-859f-4672-85d1-60b7531adf14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54872 3408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_in_stall.548723408 |
| Directory | /workspace/26.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/26.usbdev_in_trans.3167811281 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 162084817 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:54 PM PDT 24 |
| Finished | Aug 16 05:36:55 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bdf6d8dd-5e5c-4572-995f-144b9035cb18 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31678 11281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_in_trans.3167811281 |
| Directory | /workspace/26.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_iso_retraction.2364935303 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 13268813440 ps |
| CPU time | 88.39 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:38:09 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-2e463f95-710d-471a-aa27-3fd43109596e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2364935303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.2364935303 |
| Directory | /workspace/26.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/26.usbdev_link_in_err.2483845334 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 296236837 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:36:41 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-5d74194a-2a82-4c3d-b182-c323d3b251b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24838 45334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_link_in_err.2483845334 |
| Directory | /workspace/26.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/26.usbdev_link_resume.2912320650 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 27880500814 ps |
| CPU time | 43.41 seconds |
| Started | Aug 16 05:37:06 PM PDT 24 |
| Finished | Aug 16 05:37:49 PM PDT 24 |
| Peak memory | 216140 kb |
| Host | smart-a810f619-1177-4521-ac35-f25131a937fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29123 20650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_link_resume.2912320650 |
| Directory | /workspace/26.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/26.usbdev_link_suspend.364647040 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 5460426157 ps |
| CPU time | 9.12 seconds |
| Started | Aug 16 05:36:50 PM PDT 24 |
| Finished | Aug 16 05:36:59 PM PDT 24 |
| Peak memory | 216104 kb |
| Host | smart-91e9cb72-1f41-496c-8d3c-fedf3d31f2d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36464 7040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_link_suspend.364647040 |
| Directory | /workspace/26.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/26.usbdev_low_speed_traffic.2846144334 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 3316722617 ps |
| CPU time | 32.9 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:37:14 PM PDT 24 |
| Peak memory | 218156 kb |
| Host | smart-10c6fbae-defd-401d-a575-d6468dd0e94f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2846144334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.2846144334 |
| Directory | /workspace/26.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/26.usbdev_max_inter_pkt_delay.1541140 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 2385254181 ps |
| CPU time | 19.83 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:58 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-86a3ae12-42ff-4946-9bd2-5538fa6ff9e8 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1541140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.1541140 |
| Directory | /workspace/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/26.usbdev_max_length_in_transaction.2155497535 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 273781730 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-565deb01-3ca7-4845-bb7b-db095c4746f3 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2155497535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.2155497535 |
| Directory | /workspace/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_max_length_out_transaction.2541693957 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 193377948 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-d39b1272-9718-4f41-9a0b-2f620a14b72e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25416 93957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.2541693957 |
| Directory | /workspace/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_min_inter_pkt_delay.2051883478 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 2887018659 ps |
| CPU time | 85.86 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:38:06 PM PDT 24 |
| Peak memory | 215796 kb |
| Host | smart-0c352e56-19e6-48db-93bd-baca28404854 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2051883478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.2051883478 |
| Directory | /workspace/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/26.usbdev_min_length_in_transaction.2186465908 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 159562537 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:36:36 PM PDT 24 |
| Finished | Aug 16 05:36:37 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-807f49e0-521b-4c2e-a496-19a9b7bb9f38 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2186465908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.2186465908 |
| Directory | /workspace/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_min_length_out_transaction.1770801896 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 155346058 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a1d7f172-254e-4d9b-b7aa-4bfe12847804 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17708 01896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.1770801896 |
| Directory | /workspace/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_out_iso.2101703086 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 190863895 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:36:37 PM PDT 24 |
| Finished | Aug 16 05:36:38 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-0fec04b3-63d1-4d8c-984c-9573e7a8570c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21017 03086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_out_iso.2101703086 |
| Directory | /workspace/26.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/26.usbdev_out_stall.483852245 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 155345825 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-af50e261-cbe6-4ea9-89bd-1d7a596f76b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48385 2245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_out_stall.483852245 |
| Directory | /workspace/26.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/26.usbdev_out_trans_nak.1571272833 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 158572154 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-27d33db2-f1ec-4d05-b220-83615e0daf7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15712 72833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_out_trans_nak.1571272833 |
| Directory | /workspace/26.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/26.usbdev_pending_in_trans.3545666745 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 165036217 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:36:42 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-2eb6ad4c-8142-4444-8df7-e0ddefee5da2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35456 66745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pending_in_trans.3545666745 |
| Directory | /workspace/26.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_phy_config_pinflip.2599118817 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 201862130 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-6d4b8680-53ad-4e29-9a91-d0017fcbcdfa |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2599118817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.2599118817 |
| Directory | /workspace/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/26.usbdev_phy_config_usb_ref_disable.2808738646 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 140334743 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:37:04 PM PDT 24 |
| Finished | Aug 16 05:37:05 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-ba450264-a9b5-4043-902c-74247c36eed2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28087 38646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.2808738646 |
| Directory | /workspace/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/26.usbdev_phy_pins_sense.2025636815 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 51910822 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:50 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-21b30dc1-cb95-4d0c-8386-04daba81254f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20256 36815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.2025636815 |
| Directory | /workspace/26.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/26.usbdev_pkt_buffer.1901084679 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 15471398455 ps |
| CPU time | 39.64 seconds |
| Started | Aug 16 05:36:59 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 220400 kb |
| Host | smart-1e023735-e0e1-41b6-8da7-cc7318ef5827 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19010 84679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pkt_buffer.1901084679 |
| Directory | /workspace/26.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/26.usbdev_pkt_received.1572904853 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 166526661 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-e9b4fe08-7c2c-4d07-b704-43df93f8fd01 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15729 04853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pkt_received.1572904853 |
| Directory | /workspace/26.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/26.usbdev_pkt_sent.556876494 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 181962316 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-653b9336-f34a-4ded-a2c3-1d8db13e8bb3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55687 6494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pkt_sent.556876494 |
| Directory | /workspace/26.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/26.usbdev_random_length_in_transaction.3938748832 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 256129096 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:36:41 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-ed5f0a1d-72d0-4b59-9c56-d071b88946a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39387 48832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_in_transaction.3938748832 |
| Directory | /workspace/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_random_length_out_transaction.3684825501 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 150770461 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:51 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-0c8e4d10-49bb-42bb-8c1e-fec05730a226 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36848 25501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.3684825501 |
| Directory | /workspace/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/26.usbdev_rx_crc_err.944699576 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 186177998 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:36:42 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-39f53b5f-46ea-4da8-aebe-7fb986c89f1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=94469 9576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_rx_crc_err.944699576 |
| Directory | /workspace/26.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/26.usbdev_rx_full.374913865 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 386041636 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-9836ed50-24df-4bfd-a2cf-1252ce845510 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37491 3865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_rx_full.374913865 |
| Directory | /workspace/26.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/26.usbdev_setup_stage.4104599061 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 150282974 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-becdaded-8659-4148-81b7-444ad2a2f207 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41045 99061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_setup_stage.4104599061 |
| Directory | /workspace/26.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/26.usbdev_setup_trans_ignored.4211600533 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 157481785 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:48 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-fc5998c6-b23e-476a-90be-5e164b2cf3f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42116 00533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_setup_trans_ignored.4211600533 |
| Directory | /workspace/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/26.usbdev_smoke.3463706602 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 229106900 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-5480eb2b-cccd-4622-8959-9701a0fe07da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34637 06602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.3463706602 |
| Directory | /workspace/26.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/26.usbdev_spurious_pids_ignored.2299134243 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 2212251079 ps |
| CPU time | 65.75 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:37:46 PM PDT 24 |
| Peak memory | 217280 kb |
| Host | smart-990a9545-af26-46c7-98d6-8ab845b24896 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2299134243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.2299134243 |
| Directory | /workspace/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/26.usbdev_stall_priority_over_nak.1523486260 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 182900907 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:36:47 PM PDT 24 |
| Finished | Aug 16 05:36:48 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-952c3b61-137c-4c06-9428-3246a8f57370 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15234 86260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.1523486260 |
| Directory | /workspace/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/26.usbdev_stall_trans.2425354319 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 186919500 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-1d922742-fd2c-4b8e-85a6-c90647a78e6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24253 54319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_trans.2425354319 |
| Directory | /workspace/26.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/26.usbdev_stream_len_max.1171123860 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 755450242 ps |
| CPU time | 2.02 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-fa36c52d-dcdf-4ab2-ac7c-f76b674631a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11711 23860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.1171123860 |
| Directory | /workspace/26.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/26.usbdev_streaming_out.791771372 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 2804979375 ps |
| CPU time | 79.42 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:38:00 PM PDT 24 |
| Peak memory | 217560 kb |
| Host | smart-6ddc9398-f5d2-4022-805d-0e9d186dff5c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=79177 1372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_streaming_out.791771372 |
| Directory | /workspace/26.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/26.usbdev_timeout_missing_host_handshake.3521226142 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 9030425355 ps |
| CPU time | 58.8 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:37:41 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-d907a49c-f823-48e9-a7ae-6e28edf59981 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3521226142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_hos t_handshake.3521226142 |
| Directory | /workspace/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/26.usbdev_tx_rx_disruption.3034011379 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 502229424 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:36:47 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-bdd8bce7-9067-48f1-9f9d-a639973d8811 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3034011379 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_tx_rx_disruption.3034011379 |
| Directory | /workspace/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/260.usbdev_tx_rx_disruption.3227223032 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 623292012 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-dc1cd2f3-d433-4628-87df-d613eecb34ba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3227223032 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 260.usbdev_tx_rx_disruption.3227223032 |
| Directory | /workspace/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/261.usbdev_tx_rx_disruption.2180902056 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 575146218 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d8d62d34-f304-49b9-aa85-5eccc2ccb4af |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2180902056 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 261.usbdev_tx_rx_disruption.2180902056 |
| Directory | /workspace/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/262.usbdev_tx_rx_disruption.973654122 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 657423699 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-bb42bc11-674e-4875-b7cc-b6aad937a230 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=973654122 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 262.usbdev_tx_rx_disruption.973654122 |
| Directory | /workspace/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/263.usbdev_tx_rx_disruption.2135235218 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 532546726 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:23 PM PDT 24 |
| Finished | Aug 16 05:40:25 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-2abc273b-58f9-4cd9-a29e-be21e9dc5a12 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2135235218 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 263.usbdev_tx_rx_disruption.2135235218 |
| Directory | /workspace/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/264.usbdev_tx_rx_disruption.2158303653 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 555447725 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:23 PM PDT 24 |
| Finished | Aug 16 05:40:25 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-404a5bc1-fae9-4526-b938-c856ba29341b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2158303653 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 264.usbdev_tx_rx_disruption.2158303653 |
| Directory | /workspace/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/265.usbdev_tx_rx_disruption.1080550548 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 621030377 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:40:23 PM PDT 24 |
| Finished | Aug 16 05:40:25 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-36a087c5-3d77-4d89-849f-0733f94d621c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1080550548 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 265.usbdev_tx_rx_disruption.1080550548 |
| Directory | /workspace/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/266.usbdev_tx_rx_disruption.2273382551 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 484043149 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:40:32 PM PDT 24 |
| Finished | Aug 16 05:40:33 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-85922291-0a19-4359-bc12-bcf7292f2f32 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2273382551 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 266.usbdev_tx_rx_disruption.2273382551 |
| Directory | /workspace/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/268.usbdev_tx_rx_disruption.1939867047 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 567817018 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:26 PM PDT 24 |
| Finished | Aug 16 05:40:28 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-32d8d739-3a6b-4473-b92f-2d5584820651 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1939867047 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 268.usbdev_tx_rx_disruption.1939867047 |
| Directory | /workspace/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/269.usbdev_tx_rx_disruption.928464156 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 490897435 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-b4a6b339-26de-4436-aedb-0b798ca8c2f0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=928464156 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 269.usbdev_tx_rx_disruption.928464156 |
| Directory | /workspace/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/27.usbdev_alert_test.1379812547 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 39618176 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:36:43 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-05999c8e-d93e-4389-b2fa-a606428a1646 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1379812547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.1379812547 |
| Directory | /workspace/27.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/27.usbdev_aon_wake_disconnect.10837924 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 11591812415 ps |
| CPU time | 14.28 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:56 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-801cd825-5f25-49e7-b1d1-51a96693101f |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10837924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon _wake_disconnect.10837924 |
| Directory | /workspace/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/27.usbdev_aon_wake_reset.518539914 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 19875767048 ps |
| CPU time | 21.43 seconds |
| Started | Aug 16 05:36:47 PM PDT 24 |
| Finished | Aug 16 05:37:08 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-207f9d7a-8fcb-4f9b-a53d-04ad758e1af9 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=518539914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.518539914 |
| Directory | /workspace/27.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/27.usbdev_aon_wake_resume.1741206211 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 30581681449 ps |
| CPU time | 38.29 seconds |
| Started | Aug 16 05:36:55 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-d3ffb1e7-688d-406b-a8f7-8f7f5104e300 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1741206211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_a on_wake_resume.1741206211 |
| Directory | /workspace/27.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/27.usbdev_av_buffer.3267446874 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 148580843 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-c54b34aa-c4d0-44c2-adae-1690c01755ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32674 46874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_av_buffer.3267446874 |
| Directory | /workspace/27.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/27.usbdev_bitstuff_err.4002882725 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 153763484 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:43 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-bbefbc55-2cdf-422a-af52-e4d2d8cc0678 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40028 82725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_bitstuff_err.4002882725 |
| Directory | /workspace/27.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/27.usbdev_data_toggle_clear.4262415987 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 307617181 ps |
| CPU time | 1.28 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-5bc42974-bc1a-475e-84e4-116cce6f85b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42624 15987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_clear.4262415987 |
| Directory | /workspace/27.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/27.usbdev_data_toggle_restore.3481185240 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 905630026 ps |
| CPU time | 2.27 seconds |
| Started | Aug 16 05:36:49 PM PDT 24 |
| Finished | Aug 16 05:36:51 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-af9699ef-1d0b-41e4-9bdb-e278c8478dab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3481185240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.3481185240 |
| Directory | /workspace/27.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/27.usbdev_device_address.1123260303 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 19327896064 ps |
| CPU time | 39.22 seconds |
| Started | Aug 16 05:36:40 PM PDT 24 |
| Finished | Aug 16 05:37:20 PM PDT 24 |
| Peak memory | 207840 kb |
| Host | smart-59289f4a-bf78-4017-a979-cb18e4c9ce7e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11232 60303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_address.1123260303 |
| Directory | /workspace/27.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/27.usbdev_device_timeout.2155857498 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 3354723953 ps |
| CPU time | 30.31 seconds |
| Started | Aug 16 05:36:49 PM PDT 24 |
| Finished | Aug 16 05:37:19 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-db5f7454-3073-40b9-b791-ec3f477b33da |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2155857498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.2155857498 |
| Directory | /workspace/27.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/27.usbdev_disable_endpoint.954930526 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 834544252 ps |
| CPU time | 1.91 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-0709c415-3c31-41a3-a75d-ad2d719644f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95493 0526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_disable_endpoint.954930526 |
| Directory | /workspace/27.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/27.usbdev_disconnected.2180815242 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 138794296 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:36:34 PM PDT 24 |
| Finished | Aug 16 05:36:35 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-0f9ec504-48c2-442a-ae61-926ab12ab791 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21808 15242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_disconnected.2180815242 |
| Directory | /workspace/27.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/27.usbdev_enable.31184841 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 79366231 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-cc816596-a2c3-49d2-9ad7-b55e89a73d41 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31184 841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_enable.31184841 |
| Directory | /workspace/27.usbdev_enable/latest |
| Test location | /workspace/coverage/default/27.usbdev_endpoint_access.4244849564 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 914467726 ps |
| CPU time | 2.3 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:41 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-d4b32ef0-7659-4a1e-8d02-a9383e171db3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42448 49564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.4244849564 |
| Directory | /workspace/27.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/27.usbdev_fifo_rst.2159954510 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 184984412 ps |
| CPU time | 1.79 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-26d78829-f0f6-4b4d-aa45-d497048b171e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21599 54510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_fifo_rst.2159954510 |
| Directory | /workspace/27.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/27.usbdev_in_iso.1273105866 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 238474213 ps |
| CPU time | 1.21 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-812a9494-a72e-4eea-b237-574c563c69c7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1273105866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.1273105866 |
| Directory | /workspace/27.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/27.usbdev_in_stall.131488453 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 135598577 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:37:08 PM PDT 24 |
| Finished | Aug 16 05:37:09 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-40b80b3c-5d85-4695-88eb-066247656b8c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13148 8453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_in_stall.131488453 |
| Directory | /workspace/27.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/27.usbdev_in_trans.1190992095 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 298465374 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:36:53 PM PDT 24 |
| Finished | Aug 16 05:36:54 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-b21f3d3d-4b62-4bac-af45-5413ddc15780 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11909 92095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_in_trans.1190992095 |
| Directory | /workspace/27.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_invalid_sync.2567260985 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 4071485866 ps |
| CPU time | 31.55 seconds |
| Started | Aug 16 05:36:46 PM PDT 24 |
| Finished | Aug 16 05:37:18 PM PDT 24 |
| Peak memory | 224120 kb |
| Host | smart-e1121d43-e6af-4082-9513-73866d14ad5b |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2567260985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.2567260985 |
| Directory | /workspace/27.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/27.usbdev_iso_retraction.715959845 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 6818353690 ps |
| CPU time | 44.22 seconds |
| Started | Aug 16 05:36:46 PM PDT 24 |
| Finished | Aug 16 05:37:30 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-2d3c6a2b-885c-46ad-b8cf-47ea47b86a64 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=715959845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.715959845 |
| Directory | /workspace/27.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/27.usbdev_link_in_err.605442998 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 205427283 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-c0adbc5b-a107-4fb4-bad9-8586fe9d684e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60544 2998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_link_in_err.605442998 |
| Directory | /workspace/27.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/27.usbdev_link_resume.515918481 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 30892146790 ps |
| CPU time | 48.52 seconds |
| Started | Aug 16 05:37:00 PM PDT 24 |
| Finished | Aug 16 05:37:49 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-7ae0041e-fb0f-4cd7-991f-e10314df8389 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51591 8481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_link_resume.515918481 |
| Directory | /workspace/27.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/27.usbdev_link_suspend.1906693847 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 10418021225 ps |
| CPU time | 12.96 seconds |
| Started | Aug 16 05:36:43 PM PDT 24 |
| Finished | Aug 16 05:37:01 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-d206363b-2c44-4077-baba-a6ec677fbf08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19066 93847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_link_suspend.1906693847 |
| Directory | /workspace/27.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/27.usbdev_low_speed_traffic.229563777 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 4056747837 ps |
| CPU time | 115.01 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:38:39 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-dd02ccc1-b09e-400c-9a50-de6268db2549 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=229563777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.229563777 |
| Directory | /workspace/27.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/27.usbdev_max_inter_pkt_delay.2100259826 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 2006783726 ps |
| CPU time | 15.91 seconds |
| Started | Aug 16 05:36:43 PM PDT 24 |
| Finished | Aug 16 05:36:59 PM PDT 24 |
| Peak memory | 216060 kb |
| Host | smart-2a140a0f-ff5d-4a24-8e3b-30b464b22699 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2100259826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.2100259826 |
| Directory | /workspace/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/27.usbdev_max_length_in_transaction.1862308824 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 257255843 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4c911f16-3c7f-4517-98d9-58e9324e29d0 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1862308824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.1862308824 |
| Directory | /workspace/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_max_length_out_transaction.2703898958 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 234993944 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:37:02 PM PDT 24 |
| Finished | Aug 16 05:37:03 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-c7087bf3-6b83-4167-8cc8-61c5b6a9bbe5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27038 98958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.2703898958 |
| Directory | /workspace/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_min_inter_pkt_delay.4186224023 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 2947962392 ps |
| CPU time | 85.33 seconds |
| Started | Aug 16 05:37:09 PM PDT 24 |
| Finished | Aug 16 05:38:35 PM PDT 24 |
| Peak memory | 217256 kb |
| Host | smart-b84c4386-6134-443a-bce6-543a1e2bc3d9 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=4186224023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.4186224023 |
| Directory | /workspace/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/27.usbdev_min_length_in_transaction.3988411931 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 157073511 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:37:16 PM PDT 24 |
| Finished | Aug 16 05:37:17 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-20b5ccee-ee0e-4bb6-a267-911062949d0a |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3988411931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.3988411931 |
| Directory | /workspace/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_min_length_out_transaction.1962995767 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 168956342 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:36:39 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-226b9559-fd5e-45c1-8dc2-920f94ffef7f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19629 95767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.1962995767 |
| Directory | /workspace/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_nak_trans.1904867788 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 275800211 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:36:59 PM PDT 24 |
| Finished | Aug 16 05:37:00 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-f1b0f3d9-b3e5-46be-9503-828fe420cc3f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19048 67788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_nak_trans.1904867788 |
| Directory | /workspace/27.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_out_iso.2769931567 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 174758648 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:37:03 PM PDT 24 |
| Finished | Aug 16 05:37:04 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-85c2abae-9b9e-480e-a031-6508027b0dfa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27699 31567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_out_iso.2769931567 |
| Directory | /workspace/27.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/27.usbdev_out_stall.1988799162 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 187996023 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-589826b2-2761-499f-8f9a-133318df435a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19887 99162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_out_stall.1988799162 |
| Directory | /workspace/27.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/27.usbdev_out_trans_nak.2324807081 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 148941831 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-35fe4343-696d-4256-b040-e8f1a7284fee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23248 07081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_out_trans_nak.2324807081 |
| Directory | /workspace/27.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/27.usbdev_pending_in_trans.3124254000 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 144016309 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:46 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-d14cfe25-2d61-447b-aed6-4cb6aa4b14d4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31242 54000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pending_in_trans.3124254000 |
| Directory | /workspace/27.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_phy_config_pinflip.3487931819 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 215177342 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:37:12 PM PDT 24 |
| Finished | Aug 16 05:37:13 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-5a40cd46-79af-4b94-9c8b-ad0dd4e776ff |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3487931819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.3487931819 |
| Directory | /workspace/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/27.usbdev_phy_config_usb_ref_disable.1369687250 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 193034255 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:50 PM PDT 24 |
| Finished | Aug 16 05:36:51 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-e83df7f1-7069-48e2-9209-e9e0fc5b134c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13696 87250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.1369687250 |
| Directory | /workspace/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/27.usbdev_phy_pins_sense.3144388115 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 36202558 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:37:10 PM PDT 24 |
| Finished | Aug 16 05:37:10 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-372f9c73-a9f0-4fd0-a290-4060f104f907 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31443 88115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.3144388115 |
| Directory | /workspace/27.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/27.usbdev_pkt_buffer.2888837577 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 22882590824 ps |
| CPU time | 56.89 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 224176 kb |
| Host | smart-0111160e-b2ca-4ac1-b70e-35378d510719 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28888 37577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pkt_buffer.2888837577 |
| Directory | /workspace/27.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/27.usbdev_pkt_received.1048547230 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 194098801 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:39 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-8a8d2a4a-ca3e-48e9-aac2-d81cbd93210e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10485 47230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pkt_received.1048547230 |
| Directory | /workspace/27.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/27.usbdev_pkt_sent.1976779663 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 201276412 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-39d69578-f4d5-45be-9839-f1b8dc3ad014 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19767 79663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_pkt_sent.1976779663 |
| Directory | /workspace/27.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/27.usbdev_random_length_in_transaction.683907469 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 179091668 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:03 PM PDT 24 |
| Finished | Aug 16 05:37:04 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-70cb1979-00c6-47b7-a41d-3d2071de5178 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68390 7469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_in_transaction.683907469 |
| Directory | /workspace/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_random_length_out_transaction.3052324117 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 227464099 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-3c20769c-58d8-48c7-b8ba-8e700a053ec3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30523 24117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.3052324117 |
| Directory | /workspace/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/27.usbdev_rx_crc_err.722840750 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 138408865 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:36:43 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-8d6c08b2-1efd-4402-b044-1dd217831586 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72284 0750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_rx_crc_err.722840750 |
| Directory | /workspace/27.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/27.usbdev_rx_full.2531284523 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 262216786 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:36:50 PM PDT 24 |
| Finished | Aug 16 05:36:51 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-ebb6e3a4-cb6d-4767-89da-6e8ad3b27ee7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25312 84523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_rx_full.2531284523 |
| Directory | /workspace/27.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/27.usbdev_setup_stage.2825503850 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 151669283 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-6bd412b0-3c2f-4077-b225-edb3bbbe02dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28255 03850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_setup_stage.2825503850 |
| Directory | /workspace/27.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/27.usbdev_setup_trans_ignored.3023914535 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 220156342 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-cf0c4a6b-9b2e-4396-ac54-0c6ecbda0bdc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30239 14535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_setup_trans_ignored.3023914535 |
| Directory | /workspace/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/27.usbdev_smoke.1837385481 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 239780391 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:37:09 PM PDT 24 |
| Finished | Aug 16 05:37:10 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-1e0be5b5-e74c-4876-8320-87ad2fe1317a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18373 85481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.1837385481 |
| Directory | /workspace/27.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/27.usbdev_spurious_pids_ignored.2849033033 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 2544496436 ps |
| CPU time | 24.26 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:37:03 PM PDT 24 |
| Peak memory | 217868 kb |
| Host | smart-c18224e6-efca-47f3-960a-d4481d4da5cb |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2849033033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.2849033033 |
| Directory | /workspace/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/27.usbdev_stall_priority_over_nak.2830295468 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 194995505 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:17 PM PDT 24 |
| Finished | Aug 16 05:37:18 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-2a591d7f-1a36-4389-85ae-e7272f8c909d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28302 95468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.2830295468 |
| Directory | /workspace/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/27.usbdev_stall_trans.3685441583 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 161986688 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-37327a4c-2a70-4553-ad20-a10ed85a3491 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36854 41583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_trans.3685441583 |
| Directory | /workspace/27.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/27.usbdev_stream_len_max.575246750 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 294885742 ps |
| CPU time | 1.2 seconds |
| Started | Aug 16 05:37:09 PM PDT 24 |
| Finished | Aug 16 05:37:10 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-7ea67932-4467-4355-ae1e-e523c52521aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57524 6750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.575246750 |
| Directory | /workspace/27.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/27.usbdev_streaming_out.3074397601 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 2396272582 ps |
| CPU time | 26.21 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:37:12 PM PDT 24 |
| Peak memory | 216116 kb |
| Host | smart-9a8c8f51-3175-4f8f-a4cb-3d87b9827bdc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30743 97601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_streaming_out.3074397601 |
| Directory | /workspace/27.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/27.usbdev_timeout_missing_host_handshake.469570147 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 292384475 ps |
| CPU time | 4.34 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:48 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-a8e438ec-91da-47d2-a23f-913c9240d4e4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=469570147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host _handshake.469570147 |
| Directory | /workspace/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/27.usbdev_tx_rx_disruption.896833971 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 541044783 ps |
| CPU time | 1.75 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-657a5a07-a4ba-4764-922b-563c00a2c654 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=896833971 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 27.usbdev_tx_rx_disruption.896833971 |
| Directory | /workspace/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/270.usbdev_tx_rx_disruption.4000520784 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 500214814 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-488d160e-260c-4de8-a214-81823496883a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4000520784 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 270.usbdev_tx_rx_disruption.4000520784 |
| Directory | /workspace/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/271.usbdev_tx_rx_disruption.2216331587 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 573630172 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-7b13023a-5ccf-4f63-ac5e-545c2e47123d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2216331587 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 271.usbdev_tx_rx_disruption.2216331587 |
| Directory | /workspace/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/272.usbdev_tx_rx_disruption.3136152252 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 552141038 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:23 PM PDT 24 |
| Finished | Aug 16 05:40:25 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-83197098-e9ad-4b8d-b28f-d9aac5a7e638 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3136152252 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 272.usbdev_tx_rx_disruption.3136152252 |
| Directory | /workspace/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/273.usbdev_tx_rx_disruption.778136493 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 604384926 ps |
| CPU time | 1.75 seconds |
| Started | Aug 16 05:40:50 PM PDT 24 |
| Finished | Aug 16 05:40:52 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-1b7d9e13-6d71-4a52-9d94-7ae494e32897 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=778136493 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 273.usbdev_tx_rx_disruption.778136493 |
| Directory | /workspace/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/274.usbdev_tx_rx_disruption.189223337 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 547945795 ps |
| CPU time | 1.88 seconds |
| Started | Aug 16 05:40:47 PM PDT 24 |
| Finished | Aug 16 05:40:49 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-31834cb8-2d3a-4c19-922a-c8ea04a76c14 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=189223337 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 274.usbdev_tx_rx_disruption.189223337 |
| Directory | /workspace/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/275.usbdev_tx_rx_disruption.3333257283 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 467518861 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:40:48 PM PDT 24 |
| Finished | Aug 16 05:40:50 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-d01a3e37-029e-4c86-b598-f665d4c69f89 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3333257283 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 275.usbdev_tx_rx_disruption.3333257283 |
| Directory | /workspace/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/276.usbdev_tx_rx_disruption.729820898 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 488801821 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:51 PM PDT 24 |
| Finished | Aug 16 05:40:53 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-13c52ead-395f-487a-8cf5-23877910cc63 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=729820898 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 276.usbdev_tx_rx_disruption.729820898 |
| Directory | /workspace/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/277.usbdev_tx_rx_disruption.2455594356 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 480364508 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:48 PM PDT 24 |
| Finished | Aug 16 05:40:50 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-2fceb4f8-c140-438e-8476-5dd00e1794ae |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2455594356 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 277.usbdev_tx_rx_disruption.2455594356 |
| Directory | /workspace/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/278.usbdev_tx_rx_disruption.3434204815 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 523185955 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4dc21657-a7c8-4f62-afdd-6aa2c89dcdbb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3434204815 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 278.usbdev_tx_rx_disruption.3434204815 |
| Directory | /workspace/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/279.usbdev_tx_rx_disruption.773354678 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 595344481 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:40:31 PM PDT 24 |
| Finished | Aug 16 05:40:33 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-576d1670-57a3-46d9-8f5d-020d897d0a10 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=773354678 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 279.usbdev_tx_rx_disruption.773354678 |
| Directory | /workspace/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/28.usbdev_alert_test.3990338732 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 51723959 ps |
| CPU time | 0.66 seconds |
| Started | Aug 16 05:36:50 PM PDT 24 |
| Finished | Aug 16 05:36:51 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-b24f9253-2485-42c5-aae1-8332e9069885 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3990338732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.3990338732 |
| Directory | /workspace/28.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/28.usbdev_aon_wake_disconnect.3778691172 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 5852444501 ps |
| CPU time | 8.27 seconds |
| Started | Aug 16 05:36:57 PM PDT 24 |
| Finished | Aug 16 05:37:06 PM PDT 24 |
| Peak memory | 216024 kb |
| Host | smart-f161a2bd-d7b3-493f-bc8a-02db9de6aa70 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3778691172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_a on_wake_disconnect.3778691172 |
| Directory | /workspace/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/28.usbdev_aon_wake_reset.1326603938 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 21312051670 ps |
| CPU time | 22.95 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-bec80f52-88fe-4f2a-aa1e-df58caf4b930 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1326603938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.1326603938 |
| Directory | /workspace/28.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/28.usbdev_aon_wake_resume.616955331 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 30111846193 ps |
| CPU time | 36.01 seconds |
| Started | Aug 16 05:36:38 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-ed36f771-232d-4a33-be35-4a7d9907b86f |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=616955331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_ao n_wake_resume.616955331 |
| Directory | /workspace/28.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/28.usbdev_av_buffer.4196250287 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 188940689 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:06 PM PDT 24 |
| Finished | Aug 16 05:37:08 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-4a67c067-69da-46e8-ac72-fbf1c76e5c2e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41962 50287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_av_buffer.4196250287 |
| Directory | /workspace/28.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/28.usbdev_bitstuff_err.1232798430 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 151498203 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-0040f39d-4959-4a97-8ba6-d6b8d7fe93fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12327 98430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_bitstuff_err.1232798430 |
| Directory | /workspace/28.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/28.usbdev_data_toggle_clear.1417766244 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 602947426 ps |
| CPU time | 1.91 seconds |
| Started | Aug 16 05:37:15 PM PDT 24 |
| Finished | Aug 16 05:37:17 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-9e2fec41-14ba-4ca3-bc22-d6e6632e3b99 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14177 66244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_clear.1417766244 |
| Directory | /workspace/28.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/28.usbdev_device_address.1026801680 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 24989379568 ps |
| CPU time | 42.21 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:56 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-ff4a26d5-0342-48af-864f-ae8280e26487 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10268 01680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.1026801680 |
| Directory | /workspace/28.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/28.usbdev_device_timeout.2388209257 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 4329714862 ps |
| CPU time | 26.59 seconds |
| Started | Aug 16 05:36:49 PM PDT 24 |
| Finished | Aug 16 05:37:16 PM PDT 24 |
| Peak memory | 207824 kb |
| Host | smart-1e7a52e5-a5a1-4a28-b383-a6a4a8c12ee5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2388209257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.2388209257 |
| Directory | /workspace/28.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/28.usbdev_disable_endpoint.3030343795 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 533660185 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:37:02 PM PDT 24 |
| Finished | Aug 16 05:37:03 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-1de7cee5-1874-4e41-91b9-1e256d4b9ee5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30303 43795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_disable_endpoint.3030343795 |
| Directory | /workspace/28.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/28.usbdev_disconnected.4092809876 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 177923253 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:37:09 PM PDT 24 |
| Finished | Aug 16 05:37:10 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-c407fa32-3cea-49a5-ac0a-f3b7e5d1f59a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40928 09876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_disconnected.4092809876 |
| Directory | /workspace/28.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/28.usbdev_enable.761008055 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 36283238 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-8e7d1269-3ecd-4be8-af44-6f62cc39ba85 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76100 8055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_enable.761008055 |
| Directory | /workspace/28.usbdev_enable/latest |
| Test location | /workspace/coverage/default/28.usbdev_endpoint_access.4225016721 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 725642811 ps |
| CPU time | 1.98 seconds |
| Started | Aug 16 05:37:13 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-62115564-e8c5-4235-b57b-55f99b129d7e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42250 16721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.4225016721 |
| Directory | /workspace/28.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/28.usbdev_fifo_rst.2774512919 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 164232474 ps |
| CPU time | 1.34 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-2e6214de-7998-4f3f-a6db-638d0d9faf4a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27745 12919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_fifo_rst.2774512919 |
| Directory | /workspace/28.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/28.usbdev_in_iso.1335808572 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 212815460 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:37:13 PM PDT 24 |
| Finished | Aug 16 05:37:14 PM PDT 24 |
| Peak memory | 215848 kb |
| Host | smart-426d09ce-fc95-4ed6-b5e6-d0e863018655 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1335808572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.1335808572 |
| Directory | /workspace/28.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/28.usbdev_in_stall.2232435143 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 162812189 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:41 PM PDT 24 |
| Finished | Aug 16 05:36:42 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-70051480-5b63-43f7-99a6-cd2a85ceaa9d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22324 35143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_in_stall.2232435143 |
| Directory | /workspace/28.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/28.usbdev_in_trans.1407104830 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 244662547 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:36:55 PM PDT 24 |
| Finished | Aug 16 05:36:56 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-b5999306-68e3-43e3-8984-4c242a75fe6f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14071 04830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_in_trans.1407104830 |
| Directory | /workspace/28.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_invalid_sync.842854377 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 3540239627 ps |
| CPU time | 102.31 seconds |
| Started | Aug 16 05:36:47 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 224040 kb |
| Host | smart-4089fc39-ab24-42ec-ad18-05d8787ef87d |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=842854377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.842854377 |
| Directory | /workspace/28.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/28.usbdev_iso_retraction.225407933 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 13498488651 ps |
| CPU time | 88.94 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:38:14 PM PDT 24 |
| Peak memory | 207920 kb |
| Host | smart-9964f6f3-f40d-4843-b9d7-e6fa8564c7b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=225407933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.225407933 |
| Directory | /workspace/28.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/28.usbdev_link_in_err.3977158936 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 197346080 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:27 PM PDT 24 |
| Finished | Aug 16 05:37:28 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e67589d8-194d-46e0-aa3d-152c00c7a2bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39771 58936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_link_in_err.3977158936 |
| Directory | /workspace/28.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/28.usbdev_link_resume.3145045828 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 24403666678 ps |
| CPU time | 40.73 seconds |
| Started | Aug 16 05:37:10 PM PDT 24 |
| Finished | Aug 16 05:37:50 PM PDT 24 |
| Peak memory | 216148 kb |
| Host | smart-139f790d-1725-474b-b196-97123fefb859 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31450 45828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_link_resume.3145045828 |
| Directory | /workspace/28.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/28.usbdev_link_suspend.1185236211 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 3552864810 ps |
| CPU time | 6.03 seconds |
| Started | Aug 16 05:37:09 PM PDT 24 |
| Finished | Aug 16 05:37:16 PM PDT 24 |
| Peak memory | 216024 kb |
| Host | smart-1ed31475-fb77-4b95-a4d7-d21c55ffd716 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11852 36211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_link_suspend.1185236211 |
| Directory | /workspace/28.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/28.usbdev_low_speed_traffic.1702878211 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 5113358999 ps |
| CPU time | 159.49 seconds |
| Started | Aug 16 05:36:47 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 218740 kb |
| Host | smart-9a7b6181-3d3c-4896-bd7d-ceaa2d44ad1f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1702878211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.1702878211 |
| Directory | /workspace/28.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/28.usbdev_max_inter_pkt_delay.2143380548 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 2289606768 ps |
| CPU time | 63.99 seconds |
| Started | Aug 16 05:37:01 PM PDT 24 |
| Finished | Aug 16 05:38:10 PM PDT 24 |
| Peak memory | 215844 kb |
| Host | smart-98d972f2-85dd-43d7-8817-73eed8bb33d7 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2143380548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.2143380548 |
| Directory | /workspace/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/28.usbdev_max_length_in_transaction.2178763679 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 240717337 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-21c90282-03ab-4373-8c2d-fe93aa09d010 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2178763679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.2178763679 |
| Directory | /workspace/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_max_length_out_transaction.800967068 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 188434356 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:36:46 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a9aeb011-c549-4d3c-b170-3b79aef43deb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80096 7068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.800967068 |
| Directory | /workspace/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_min_inter_pkt_delay.1130647205 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 2064278216 ps |
| CPU time | 20.82 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:37:06 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-7d83717e-f143-4466-9a05-7a90073c6115 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1130647205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.1130647205 |
| Directory | /workspace/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/28.usbdev_min_length_in_transaction.1813668683 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 158566257 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:36:46 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-18eb8983-2a54-4fcb-b121-6b51b7ec14d9 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1813668683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.1813668683 |
| Directory | /workspace/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_min_length_out_transaction.1396686245 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 141927614 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:09 PM PDT 24 |
| Finished | Aug 16 05:37:10 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-d16cca7f-b19c-446f-a9d1-a5f8b3b7b379 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13966 86245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.1396686245 |
| Directory | /workspace/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_nak_trans.3302722104 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 199743723 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:17 PM PDT 24 |
| Finished | Aug 16 05:37:18 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-d58fd16f-dbc8-45a2-9384-d2fb8a6d100c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33027 22104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_nak_trans.3302722104 |
| Directory | /workspace/28.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_out_iso.2143564888 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 162682486 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:02 PM PDT 24 |
| Finished | Aug 16 05:37:03 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d3d7fc11-da42-4bd6-aafd-e85267ddbe42 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21435 64888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_out_iso.2143564888 |
| Directory | /workspace/28.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/28.usbdev_out_stall.51925386 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 217851836 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:12 PM PDT 24 |
| Finished | Aug 16 05:37:13 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a9721e91-d554-44f3-8dbc-0b448b7b53f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51925 386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_out_stall.51925386 |
| Directory | /workspace/28.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/28.usbdev_out_trans_nak.1478892877 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 221106248 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-334bdc66-e11b-45c7-97ab-70a50fd4d1b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14788 92877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_out_trans_nak.1478892877 |
| Directory | /workspace/28.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/28.usbdev_pending_in_trans.4046044607 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 159236641 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-b27b6ba8-c072-4726-9158-a00227744f79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40460 44607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pending_in_trans.4046044607 |
| Directory | /workspace/28.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_phy_config_pinflip.4254282480 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 216293226 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-fb0cbffd-9a85-4230-9c8e-c8e51c45bec0 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=4254282480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.4254282480 |
| Directory | /workspace/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/28.usbdev_phy_config_usb_ref_disable.2642429292 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 171533338 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cbe310ac-5cec-44a3-add9-3228674f890f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26424 29292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.2642429292 |
| Directory | /workspace/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/28.usbdev_phy_pins_sense.3548302482 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 35252156 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:37:08 PM PDT 24 |
| Finished | Aug 16 05:37:09 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-991a8658-2414-4fd0-b314-0eca845cec49 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35483 02482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.3548302482 |
| Directory | /workspace/28.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/28.usbdev_pkt_buffer.731789698 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 13735346946 ps |
| CPU time | 35.43 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:37:21 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-58e7d961-dbe6-47d5-87b3-3040d61f5794 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73178 9698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pkt_buffer.731789698 |
| Directory | /workspace/28.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/28.usbdev_pkt_received.1981120688 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 174412802 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-e51cc3ff-a48e-4f9a-87fd-feb0264248ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19811 20688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pkt_received.1981120688 |
| Directory | /workspace/28.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/28.usbdev_pkt_sent.3663085173 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 223967751 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-f4584c2a-9079-4f65-bb78-fbbc9cb831b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36630 85173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pkt_sent.3663085173 |
| Directory | /workspace/28.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/28.usbdev_random_length_in_transaction.1863817172 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 188776882 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:17 PM PDT 24 |
| Finished | Aug 16 05:37:18 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-60eb3cd2-e5ff-4cd9-946b-447c3bf6e0fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18638 17172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_in_transaction.1863817172 |
| Directory | /workspace/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_random_length_out_transaction.364909796 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 187346019 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:17 PM PDT 24 |
| Finished | Aug 16 05:37:18 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-51c4e3cc-7951-4d26-a934-34850b3f972d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36490 9796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.364909796 |
| Directory | /workspace/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/28.usbdev_rx_crc_err.3846094211 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 181929859 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-3de7c4bd-2b72-4ad9-a40e-b3956931e06e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38460 94211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_rx_crc_err.3846094211 |
| Directory | /workspace/28.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/28.usbdev_rx_full.3598822843 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 373139223 ps |
| CPU time | 1.35 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-2084a5d9-91b4-425a-9eb4-532b2a2d89c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35988 22843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_rx_full.3598822843 |
| Directory | /workspace/28.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/28.usbdev_setup_stage.3467926822 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 171317040 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-c6ab7b06-0e28-4964-8965-61860d013521 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34679 26822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_setup_stage.3467926822 |
| Directory | /workspace/28.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/28.usbdev_setup_trans_ignored.2054284295 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 162541849 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:18 PM PDT 24 |
| Finished | Aug 16 05:37:19 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-762b64f0-8691-4f71-a2a3-25df6ff0e358 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20542 84295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_setup_trans_ignored.2054284295 |
| Directory | /workspace/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/28.usbdev_smoke.4006843650 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 239159001 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:37:04 PM PDT 24 |
| Finished | Aug 16 05:37:05 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-91117f78-5cdb-4818-a134-0372c766e435 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40068 43650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.4006843650 |
| Directory | /workspace/28.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/28.usbdev_spurious_pids_ignored.788433730 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 2982216523 ps |
| CPU time | 87.69 seconds |
| Started | Aug 16 05:36:50 PM PDT 24 |
| Finished | Aug 16 05:38:18 PM PDT 24 |
| Peak memory | 224104 kb |
| Host | smart-e5dca565-db73-4d75-8065-daa5386f48d6 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=788433730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.788433730 |
| Directory | /workspace/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/28.usbdev_stall_priority_over_nak.3975369331 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 220471181 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:37:00 PM PDT 24 |
| Finished | Aug 16 05:37:02 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-4e1fa109-cdbc-44a8-a960-048fc2b5fd1c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39753 69331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.3975369331 |
| Directory | /workspace/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/28.usbdev_stall_trans.3496578781 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 168052754 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:46 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-34ba9947-da21-4ab6-9686-8cdfe772aa3d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34965 78781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_trans.3496578781 |
| Directory | /workspace/28.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/28.usbdev_stream_len_max.3204467778 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 640544226 ps |
| CPU time | 1.78 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-7969f4d5-ab04-4fd6-93f6-d14dfd34aa5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32044 67778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.3204467778 |
| Directory | /workspace/28.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/28.usbdev_streaming_out.2524858314 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 2526911250 ps |
| CPU time | 25.19 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:37:16 PM PDT 24 |
| Peak memory | 217100 kb |
| Host | smart-120f756a-eb2d-48f6-989c-75d3d2a22524 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25248 58314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_streaming_out.2524858314 |
| Directory | /workspace/28.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/28.usbdev_timeout_missing_host_handshake.595475021 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 4794597271 ps |
| CPU time | 40.82 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:37:25 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-f074a84e-5b1a-4f08-a1de-d5ff2f257b95 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=595475021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host _handshake.595475021 |
| Directory | /workspace/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/28.usbdev_tx_rx_disruption.2274092710 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 625610847 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:36:57 PM PDT 24 |
| Finished | Aug 16 05:36:59 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-028ba3de-e87f-4b7a-8999-c68c9e1506ef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2274092710 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_tx_rx_disruption.2274092710 |
| Directory | /workspace/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/280.usbdev_tx_rx_disruption.2975611695 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 507655401 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-53e02bfc-5e27-49dc-a49d-de5a6c1bd9bb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2975611695 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 280.usbdev_tx_rx_disruption.2975611695 |
| Directory | /workspace/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/281.usbdev_tx_rx_disruption.3354085493 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 587831691 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:31 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-d51110cc-364d-4175-8961-684d8d289496 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3354085493 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 281.usbdev_tx_rx_disruption.3354085493 |
| Directory | /workspace/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/282.usbdev_tx_rx_disruption.1407304231 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 535983639 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:21 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-523894c9-297a-42c7-906a-052aef85f93f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1407304231 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 282.usbdev_tx_rx_disruption.1407304231 |
| Directory | /workspace/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/283.usbdev_tx_rx_disruption.430785398 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 499840395 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:40:51 PM PDT 24 |
| Finished | Aug 16 05:40:53 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-e670dad7-d44d-43fc-a25b-cb48cafe0427 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=430785398 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 283.usbdev_tx_rx_disruption.430785398 |
| Directory | /workspace/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/284.usbdev_tx_rx_disruption.2359916475 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 608341122 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:40:15 PM PDT 24 |
| Finished | Aug 16 05:40:17 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-1c2bb35a-d794-40eb-9e44-b4920fe3f2e1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2359916475 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 284.usbdev_tx_rx_disruption.2359916475 |
| Directory | /workspace/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/285.usbdev_tx_rx_disruption.2117765245 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 485942123 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:25 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-6e4847ea-7393-45a0-8996-0054445eea27 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2117765245 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 285.usbdev_tx_rx_disruption.2117765245 |
| Directory | /workspace/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/286.usbdev_tx_rx_disruption.3472413080 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 581907363 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:32 PM PDT 24 |
| Finished | Aug 16 05:40:33 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-44321844-23ba-417e-93ff-655103925527 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3472413080 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 286.usbdev_tx_rx_disruption.3472413080 |
| Directory | /workspace/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/287.usbdev_tx_rx_disruption.1352653692 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 466848205 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:24 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-b0beac0b-b9c6-49f8-845b-1b56a88511ee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1352653692 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 287.usbdev_tx_rx_disruption.1352653692 |
| Directory | /workspace/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/288.usbdev_tx_rx_disruption.1105900497 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 596333983 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-eb08ab46-ba6f-450d-8a9a-06abece8496e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1105900497 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 288.usbdev_tx_rx_disruption.1105900497 |
| Directory | /workspace/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/289.usbdev_tx_rx_disruption.1507339585 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 591944389 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-f93f229b-9530-43ed-9989-d60bf6982de9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1507339585 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 289.usbdev_tx_rx_disruption.1507339585 |
| Directory | /workspace/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/29.usbdev_alert_test.1140430347 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 36280253 ps |
| CPU time | 0.64 seconds |
| Started | Aug 16 05:37:15 PM PDT 24 |
| Finished | Aug 16 05:37:16 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-4f87e949-94c6-4925-9cd6-097c1836f265 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1140430347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.1140430347 |
| Directory | /workspace/29.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/29.usbdev_aon_wake_disconnect.2807882352 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 3840874355 ps |
| CPU time | 6.33 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:36:52 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-ee79bd90-f654-4bdc-8107-9ba11145af87 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2807882352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_a on_wake_disconnect.2807882352 |
| Directory | /workspace/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/29.usbdev_aon_wake_reset.940423328 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 15342836819 ps |
| CPU time | 18.76 seconds |
| Started | Aug 16 05:37:06 PM PDT 24 |
| Finished | Aug 16 05:37:25 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-9b87a6a3-d3e3-4fd0-9c2b-480b55f2d309 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=940423328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.940423328 |
| Directory | /workspace/29.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/29.usbdev_aon_wake_resume.887700033 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 24981988914 ps |
| CPU time | 28.85 seconds |
| Started | Aug 16 05:37:12 PM PDT 24 |
| Finished | Aug 16 05:37:41 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-5b9b08ca-c4c4-44de-887d-affbf85ead74 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=887700033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_ao n_wake_resume.887700033 |
| Directory | /workspace/29.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/29.usbdev_av_buffer.2733606598 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 148191713 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:36:52 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-72a769b8-391f-4b69-b0ff-29cbcd4b7c09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27336 06598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_av_buffer.2733606598 |
| Directory | /workspace/29.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/29.usbdev_bitstuff_err.955006427 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 165204009 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:36:43 PM PDT 24 |
| Finished | Aug 16 05:36:44 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-9bb7dcee-257b-4196-9774-67b54ce60f61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95500 6427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_bitstuff_err.955006427 |
| Directory | /workspace/29.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/29.usbdev_data_toggle_clear.1785884376 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 248266835 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-71e80585-5150-4d79-9739-97d12dbcce36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17858 84376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_clear.1785884376 |
| Directory | /workspace/29.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/29.usbdev_data_toggle_restore.2890532762 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 816670770 ps |
| CPU time | 2.1 seconds |
| Started | Aug 16 05:37:13 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-4fd8e8ec-2e07-4d15-ac43-4dfe471666dd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2890532762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.2890532762 |
| Directory | /workspace/29.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/29.usbdev_device_address.3523196635 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 35084006964 ps |
| CPU time | 57.86 seconds |
| Started | Aug 16 05:37:09 PM PDT 24 |
| Finished | Aug 16 05:38:07 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-112b1053-18ca-4091-824e-34959dbc8bfc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35231 96635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.3523196635 |
| Directory | /workspace/29.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/29.usbdev_device_timeout.3262745508 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 881651537 ps |
| CPU time | 17.69 seconds |
| Started | Aug 16 05:37:13 PM PDT 24 |
| Finished | Aug 16 05:37:31 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-cea6fdc7-5440-4b5b-b406-23fb85c189f7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3262745508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.3262745508 |
| Directory | /workspace/29.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/29.usbdev_disable_endpoint.969134531 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 909124510 ps |
| CPU time | 1.91 seconds |
| Started | Aug 16 05:37:13 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-67dc2c49-8e57-453a-bd5c-4bd6f691bfe9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=96913 4531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_disable_endpoint.969134531 |
| Directory | /workspace/29.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/29.usbdev_disconnected.142631891 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 172310286 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:44 PM PDT 24 |
| Finished | Aug 16 05:36:45 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-67c6d728-92e5-45b5-9d17-3ef8c09b1e12 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14263 1891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_disconnected.142631891 |
| Directory | /workspace/29.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/29.usbdev_enable.2782589127 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 35507290 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:36:53 PM PDT 24 |
| Finished | Aug 16 05:36:53 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-ea165f76-c54f-40fe-9b62-31f17655a813 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27825 89127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_enable.2782589127 |
| Directory | /workspace/29.usbdev_enable/latest |
| Test location | /workspace/coverage/default/29.usbdev_endpoint_access.2787971838 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 840522864 ps |
| CPU time | 2.43 seconds |
| Started | Aug 16 05:37:10 PM PDT 24 |
| Finished | Aug 16 05:37:18 PM PDT 24 |
| Peak memory | 207820 kb |
| Host | smart-484892df-d22d-41b1-9219-34099012d48f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27879 71838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.2787971838 |
| Directory | /workspace/29.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/29.usbdev_endpoint_types.2841354863 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 381770864 ps |
| CPU time | 1.28 seconds |
| Started | Aug 16 05:37:02 PM PDT 24 |
| Finished | Aug 16 05:37:04 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-a8a9371d-37b9-4fcc-8aa0-4f8d7f8cc7dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2841354863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.2841354863 |
| Directory | /workspace/29.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/29.usbdev_fifo_rst.2283180725 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 302662822 ps |
| CPU time | 2.16 seconds |
| Started | Aug 16 05:36:50 PM PDT 24 |
| Finished | Aug 16 05:36:53 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-79c69362-28e3-4a29-a973-8f7a75fd2670 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22831 80725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_fifo_rst.2283180725 |
| Directory | /workspace/29.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/29.usbdev_in_iso.2005650000 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 183224591 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 215844 kb |
| Host | smart-1c2e96b4-1cd4-4c87-88bb-28e684b7cf97 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2005650000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.2005650000 |
| Directory | /workspace/29.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/29.usbdev_in_stall.3171929903 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 168458845 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:46 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-4131bcd3-41d2-4688-b39a-9dff489067b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31719 29903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_in_stall.3171929903 |
| Directory | /workspace/29.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/29.usbdev_in_trans.3487989138 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 184114188 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:36:53 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-9a65883d-e090-4f51-ac44-14d852a9edc3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34879 89138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_in_trans.3487989138 |
| Directory | /workspace/29.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_invalid_sync.3476436744 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 3440684015 ps |
| CPU time | 33.3 seconds |
| Started | Aug 16 05:37:13 PM PDT 24 |
| Finished | Aug 16 05:37:47 PM PDT 24 |
| Peak memory | 217816 kb |
| Host | smart-9301daf8-3f52-4563-9d1e-6873bbd8f5b2 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3476436744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.3476436744 |
| Directory | /workspace/29.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/29.usbdev_iso_retraction.1567957468 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 6733713203 ps |
| CPU time | 88.59 seconds |
| Started | Aug 16 05:37:01 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-0ecae4e4-b1a8-497f-aec9-be367604efdb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1567957468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.1567957468 |
| Directory | /workspace/29.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/29.usbdev_link_in_err.4138757845 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 224581900 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:50 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-deb6bedf-48d8-485f-b74c-f32c032ac0f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41387 57845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_link_in_err.4138757845 |
| Directory | /workspace/29.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/29.usbdev_link_resume.382567798 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 23544552709 ps |
| CPU time | 37.94 seconds |
| Started | Aug 16 05:37:15 PM PDT 24 |
| Finished | Aug 16 05:37:53 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-26707b1d-32f0-4c2f-88de-cb9b3ad546b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38256 7798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_link_resume.382567798 |
| Directory | /workspace/29.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/29.usbdev_link_suspend.835077014 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 10427486395 ps |
| CPU time | 12.22 seconds |
| Started | Aug 16 05:37:22 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-3d262901-8ae4-41e0-bebd-a1737069964d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83507 7014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_link_suspend.835077014 |
| Directory | /workspace/29.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/29.usbdev_low_speed_traffic.2022283203 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 3956171386 ps |
| CPU time | 114.55 seconds |
| Started | Aug 16 05:36:53 PM PDT 24 |
| Finished | Aug 16 05:38:48 PM PDT 24 |
| Peak memory | 218840 kb |
| Host | smart-cb024b58-13e9-44c9-9911-11d028cbadba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2022283203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.2022283203 |
| Directory | /workspace/29.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/29.usbdev_max_inter_pkt_delay.3374955334 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 2810719498 ps |
| CPU time | 21.63 seconds |
| Started | Aug 16 05:37:04 PM PDT 24 |
| Finished | Aug 16 05:37:26 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-3c5f6db7-69c4-481e-a13f-7b5f6187cfbe |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3374955334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.3374955334 |
| Directory | /workspace/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/29.usbdev_max_length_in_transaction.219488423 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 243444249 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-c3b1a0b5-d6cc-46a2-93c4-c3cd7c342b6c |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=219488423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.219488423 |
| Directory | /workspace/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_max_length_out_transaction.1879791867 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 197059480 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:36:42 PM PDT 24 |
| Finished | Aug 16 05:36:43 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-146d6727-86f2-4bbb-b589-b533fad4215d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18797 91867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.1879791867 |
| Directory | /workspace/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_min_inter_pkt_delay.3098929384 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 3862214422 ps |
| CPU time | 111.01 seconds |
| Started | Aug 16 05:36:45 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-d365b526-0e73-4968-9c7d-865ed692b696 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3098929384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.3098929384 |
| Directory | /workspace/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/29.usbdev_min_length_in_transaction.1398806080 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 196403981 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:37:01 PM PDT 24 |
| Finished | Aug 16 05:37:02 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-5bd8e092-b041-4ac2-b2b4-ea42904de962 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1398806080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.1398806080 |
| Directory | /workspace/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_min_length_out_transaction.935975346 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 154953730 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:36:52 PM PDT 24 |
| Finished | Aug 16 05:36:53 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-642f1b1a-e1db-475c-afc0-c3d60ee11d9b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93597 5346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.935975346 |
| Directory | /workspace/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_nak_trans.1153890476 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 189796636 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:37:10 PM PDT 24 |
| Finished | Aug 16 05:37:11 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-67bc3efd-bf35-49ba-8f02-f19dd852e500 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11538 90476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_nak_trans.1153890476 |
| Directory | /workspace/29.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_out_iso.3151413157 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 185255832 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:12 PM PDT 24 |
| Finished | Aug 16 05:37:13 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-30f8ce3a-7483-49ff-9703-c1587407de8a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31514 13157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_out_iso.3151413157 |
| Directory | /workspace/29.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/29.usbdev_out_stall.65917305 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 177384688 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-bb7a0779-b27a-4fb0-82ab-50162458efb2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65917 305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_out_stall.65917305 |
| Directory | /workspace/29.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/29.usbdev_out_trans_nak.399881335 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 188475866 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:36:49 PM PDT 24 |
| Finished | Aug 16 05:36:50 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-632c2ae5-3658-4e9a-a20b-db3af234ce1d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39988 1335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_out_trans_nak.399881335 |
| Directory | /workspace/29.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/29.usbdev_pending_in_trans.2073017099 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 164493795 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:37:10 PM PDT 24 |
| Finished | Aug 16 05:37:11 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-5bf81555-1701-4f37-b720-8f1d1ceb18d1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20730 17099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pending_in_trans.2073017099 |
| Directory | /workspace/29.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_phy_config_pinflip.1013911631 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 218969075 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:37:08 PM PDT 24 |
| Finished | Aug 16 05:37:09 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-5ddca51a-f0d9-473f-b670-200c794e6723 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1013911631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.1013911631 |
| Directory | /workspace/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/29.usbdev_phy_config_usb_ref_disable.1283384457 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 151557607 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:36:49 PM PDT 24 |
| Finished | Aug 16 05:36:50 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-76b256d6-a285-4abb-a8d0-f8dbcc7d573b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12833 84457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.1283384457 |
| Directory | /workspace/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/29.usbdev_phy_pins_sense.3500698397 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 42997485 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:37:13 PM PDT 24 |
| Finished | Aug 16 05:37:14 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-2cf43afc-7383-4a0c-9fbe-328a9e7d0768 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35006 98397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.3500698397 |
| Directory | /workspace/29.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/29.usbdev_pkt_buffer.1799862835 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 20250166366 ps |
| CPU time | 51.34 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:38:05 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-9ced29e9-f014-4711-aaa2-f839fc70e45b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17998 62835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pkt_buffer.1799862835 |
| Directory | /workspace/29.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/29.usbdev_pkt_received.3120250371 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 148517146 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:37:05 PM PDT 24 |
| Finished | Aug 16 05:37:06 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-9011638c-1181-440b-ad0f-d95a9a1df549 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31202 50371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pkt_received.3120250371 |
| Directory | /workspace/29.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/29.usbdev_pkt_sent.1455348753 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 205447613 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:50 PM PDT 24 |
| Finished | Aug 16 05:36:51 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cc314d3d-61d5-4180-a5bf-2715de88a466 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14553 48753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_pkt_sent.1455348753 |
| Directory | /workspace/29.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/29.usbdev_random_length_in_transaction.2602498701 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 241137789 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:37:09 PM PDT 24 |
| Finished | Aug 16 05:37:10 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-00c9645f-19b9-484c-980f-714dd910b331 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26024 98701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_in_transaction.2602498701 |
| Directory | /workspace/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_random_length_out_transaction.116265930 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 144741437 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:36:53 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-79adf59d-2d05-42d1-bd68-79f749a60329 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11626 5930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.116265930 |
| Directory | /workspace/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/29.usbdev_rx_crc_err.287621498 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 154647440 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:37:13 PM PDT 24 |
| Finished | Aug 16 05:37:14 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-0cea5016-cc88-42bd-a38a-f2b2064b8473 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28762 1498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_rx_crc_err.287621498 |
| Directory | /workspace/29.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/29.usbdev_rx_full.2695004660 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 263273201 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 206376 kb |
| Host | smart-290f1feb-db18-472a-b16f-cb658b0bccc3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26950 04660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_rx_full.2695004660 |
| Directory | /workspace/29.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/29.usbdev_setup_stage.608980645 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 150169237 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:36:52 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-c54858b2-bfc2-4c98-91da-8d796255fc3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60898 0645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_setup_stage.608980645 |
| Directory | /workspace/29.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/29.usbdev_setup_trans_ignored.3371260867 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 167754480 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:36:53 PM PDT 24 |
| Finished | Aug 16 05:36:54 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-1012bec7-bf8d-4c41-99f7-a0628a1a37e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33712 60867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_setup_trans_ignored.3371260867 |
| Directory | /workspace/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/29.usbdev_smoke.1467505759 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 191238483 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:36:52 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-cb066515-d0df-494c-b86c-f24c0b01ff81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14675 05759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.1467505759 |
| Directory | /workspace/29.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/29.usbdev_spurious_pids_ignored.1015569326 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 2634873084 ps |
| CPU time | 73.29 seconds |
| Started | Aug 16 05:37:09 PM PDT 24 |
| Finished | Aug 16 05:38:22 PM PDT 24 |
| Peak memory | 217592 kb |
| Host | smart-d67b219b-6beb-4e2b-b717-9b515695b924 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1015569326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.1015569326 |
| Directory | /workspace/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/29.usbdev_stall_priority_over_nak.1804570093 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 194204155 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:37:23 PM PDT 24 |
| Finished | Aug 16 05:37:24 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5483fb20-018d-4b00-ae91-95aa949dd2f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18045 70093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.1804570093 |
| Directory | /workspace/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/29.usbdev_stall_trans.1720942110 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 196813900 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e2d8bdb8-a256-47ba-bc4b-c0c656091f3a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17209 42110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_trans.1720942110 |
| Directory | /workspace/29.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/29.usbdev_stream_len_max.1117027879 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 1142146240 ps |
| CPU time | 2.69 seconds |
| Started | Aug 16 05:37:18 PM PDT 24 |
| Finished | Aug 16 05:37:21 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-713f5df8-a87c-427e-8cb1-f5cc7ee69ec2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11170 27879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.1117027879 |
| Directory | /workspace/29.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/29.usbdev_streaming_out.1782398679 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 2547825874 ps |
| CPU time | 18.88 seconds |
| Started | Aug 16 05:37:21 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 214872 kb |
| Host | smart-bbc59542-196a-49a9-92ac-1fa98ffcad81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17823 98679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_streaming_out.1782398679 |
| Directory | /workspace/29.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/29.usbdev_timeout_missing_host_handshake.2194421566 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 708419598 ps |
| CPU time | 14.29 seconds |
| Started | Aug 16 05:37:10 PM PDT 24 |
| Finished | Aug 16 05:37:25 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-eabdd294-92ea-4231-9f2e-a85582e7884f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2194421566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_hos t_handshake.2194421566 |
| Directory | /workspace/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/29.usbdev_tx_rx_disruption.2862753204 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 503947443 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:37:08 PM PDT 24 |
| Finished | Aug 16 05:37:10 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-7ae54936-2e66-4d67-b2c2-e3b52f528dbd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2862753204 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_tx_rx_disruption.2862753204 |
| Directory | /workspace/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/291.usbdev_tx_rx_disruption.1082573486 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 550729860 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:44 PM PDT 24 |
| Finished | Aug 16 05:40:46 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-2364902f-612f-475f-b535-ed1d01ab4856 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1082573486 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 291.usbdev_tx_rx_disruption.1082573486 |
| Directory | /workspace/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/292.usbdev_tx_rx_disruption.3529890624 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 531326109 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-e671049c-b142-4cfd-87d3-f0ff513246ac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3529890624 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 292.usbdev_tx_rx_disruption.3529890624 |
| Directory | /workspace/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/293.usbdev_tx_rx_disruption.3979739261 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 582622996 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-09ef4a62-db95-4704-9bb7-e5aa653c96fe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3979739261 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 293.usbdev_tx_rx_disruption.3979739261 |
| Directory | /workspace/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/294.usbdev_tx_rx_disruption.1437143073 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 603907294 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:56 PM PDT 24 |
| Finished | Aug 16 05:40:58 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-daafe1c8-eb58-4d79-adf2-0c9697650117 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1437143073 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 294.usbdev_tx_rx_disruption.1437143073 |
| Directory | /workspace/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/295.usbdev_tx_rx_disruption.3372436253 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 485126197 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-88b22fc0-f112-44c6-b9c4-ba5a30306c3b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3372436253 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 295.usbdev_tx_rx_disruption.3372436253 |
| Directory | /workspace/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/296.usbdev_tx_rx_disruption.2007356456 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 500024226 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-33ed6085-6eba-4363-8439-77769137d439 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2007356456 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 296.usbdev_tx_rx_disruption.2007356456 |
| Directory | /workspace/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/297.usbdev_tx_rx_disruption.3115560273 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 700444986 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:40:27 PM PDT 24 |
| Finished | Aug 16 05:40:29 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-347e0762-1843-490e-93ba-898d1a4a0ec4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3115560273 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 297.usbdev_tx_rx_disruption.3115560273 |
| Directory | /workspace/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/298.usbdev_tx_rx_disruption.2231421446 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 561570730 ps |
| CPU time | 1.83 seconds |
| Started | Aug 16 05:40:52 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-41638643-e80c-46c1-9c62-b42fe852e07c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2231421446 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 298.usbdev_tx_rx_disruption.2231421446 |
| Directory | /workspace/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/299.usbdev_tx_rx_disruption.3320633483 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 632302615 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:48 PM PDT 24 |
| Finished | Aug 16 05:40:50 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-3b43d020-1492-41cb-934b-2d74b55a12bb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3320633483 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 299.usbdev_tx_rx_disruption.3320633483 |
| Directory | /workspace/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/3.usbdev_alert_test.2649368119 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 43217942 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:33:13 PM PDT 24 |
| Finished | Aug 16 05:33:14 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-c9f742d5-9a78-4165-b85b-0a52a8174ded |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2649368119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.2649368119 |
| Directory | /workspace/3.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/3.usbdev_aon_wake_disconnect.3004155779 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 6655659766 ps |
| CPU time | 8.87 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:15 PM PDT 24 |
| Peak memory | 216012 kb |
| Host | smart-b3795644-d3bb-411b-8da4-e0e695be1393 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3004155779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_ao n_wake_disconnect.3004155779 |
| Directory | /workspace/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/3.usbdev_aon_wake_reset.520682737 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 16198295683 ps |
| CPU time | 20.79 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:29 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-4dedd86b-6811-45cb-999c-0de3e881cd1f |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=520682737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.520682737 |
| Directory | /workspace/3.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/3.usbdev_aon_wake_resume.3564141476 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 29519341529 ps |
| CPU time | 39.76 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:33:44 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-9fd967a3-1106-48e6-b13b-3745c491115a |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3564141476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_ao n_wake_resume.3564141476 |
| Directory | /workspace/3.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/3.usbdev_av_buffer.445334128 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 150969832 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:33:07 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-433b7873-51e6-4d8a-9808-0774e319ff68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44533 4128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_av_buffer.445334128 |
| Directory | /workspace/3.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/3.usbdev_av_empty.2267303896 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 162840488 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:10 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-c71b6e89-0ec1-462f-9180-4f2c554ca16f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22673 03896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_av_empty.2267303896 |
| Directory | /workspace/3.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/3.usbdev_bitstuff_err.193038871 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 153055618 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:09 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-20da9a99-9d1d-4e2c-8b20-88e85b49fd62 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19303 8871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_bitstuff_err.193038871 |
| Directory | /workspace/3.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_data_toggle_clear.1558853424 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 418337492 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:09 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-004bc43d-effe-446e-8637-fa91f4f29b0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15588 53424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_clear.1558853424 |
| Directory | /workspace/3.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/3.usbdev_data_toggle_restore.787521166 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 1286852729 ps |
| CPU time | 3.35 seconds |
| Started | Aug 16 05:33:04 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 207836 kb |
| Host | smart-ad7e669b-bf02-42ab-b19e-e6d28dc2e130 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=787521166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.787521166 |
| Directory | /workspace/3.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/3.usbdev_device_timeout.798483633 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 5658708154 ps |
| CPU time | 37.76 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:43 PM PDT 24 |
| Peak memory | 207892 kb |
| Host | smart-b278c0b6-54d9-4801-8132-9f5bb083de51 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=798483633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.798483633 |
| Directory | /workspace/3.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/3.usbdev_disable_endpoint.2447266819 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 944102133 ps |
| CPU time | 2.23 seconds |
| Started | Aug 16 05:33:10 PM PDT 24 |
| Finished | Aug 16 05:33:13 PM PDT 24 |
| Peak memory | 207008 kb |
| Host | smart-685f719d-7ece-4c32-b4c6-254f08f72553 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24472 66819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_disable_endpoint.2447266819 |
| Directory | /workspace/3.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/3.usbdev_disconnected.3592965023 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 200962961 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:09 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2dce922a-da01-40f2-9164-12972b51b3b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35929 65023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_disconnected.3592965023 |
| Directory | /workspace/3.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/3.usbdev_enable.4264211522 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 49008201 ps |
| CPU time | 0.75 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:07 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-2cd60260-77cf-4f7b-ac84-c07af9528758 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42642 11522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_enable.4264211522 |
| Directory | /workspace/3.usbdev_enable/latest |
| Test location | /workspace/coverage/default/3.usbdev_endpoint_access.212984333 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 834779279 ps |
| CPU time | 2.58 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:09 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-2343e512-1dae-44db-90ef-20b805706edb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21298 4333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.212984333 |
| Directory | /workspace/3.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/3.usbdev_endpoint_types.1349525585 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 152910835 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:33:04 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-3791d814-adb5-44c9-9e87-f26cdfc012b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1349525585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.1349525585 |
| Directory | /workspace/3.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/3.usbdev_fifo_rst.191236523 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 174129395 ps |
| CPU time | 2.12 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-1af3e83c-bb1a-4561-97a8-bf60a5ac28ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19123 6523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_fifo_rst.191236523 |
| Directory | /workspace/3.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_hiclk.3225061213 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 98216488725 ps |
| CPU time | 156.27 seconds |
| Started | Aug 16 05:33:03 PM PDT 24 |
| Finished | Aug 16 05:35:39 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-4734fd51-bd53-4d15-8922-fd70a010d927 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3225061213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.3225061213 |
| Directory | /workspace/3.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_hiclk_max.3056251072 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 114072454191 ps |
| CPU time | 170.72 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:35:59 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-587462f1-9235-4fd3-b893-116612e889b0 |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3056251072 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk_max.3056251072 |
| Directory | /workspace/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_loclk.3953396399 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 87113302650 ps |
| CPU time | 144.3 seconds |
| Started | Aug 16 05:33:07 PM PDT 24 |
| Finished | Aug 16 05:35:32 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-6bb2ead6-a02b-43cc-9cb7-6273c0e125f0 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=3953396399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.3953396399 |
| Directory | /workspace/3.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_loclk_max.2591237613 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 116029046815 ps |
| CPU time | 172.71 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:36:02 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-4ab23aaa-4f02-4417-9c42-0ddb027b66ef |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2591237613 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk_max.2591237613 |
| Directory | /workspace/3.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/3.usbdev_freq_phase.1217300610 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 117172158801 ps |
| CPU time | 211.38 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:36:40 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-88e328af-683e-43f6-a7b2-fe320251264c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12173 00610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_phase.1217300610 |
| Directory | /workspace/3.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/3.usbdev_in_iso.1079015067 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 228204042 ps |
| CPU time | 1.22 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:07 PM PDT 24 |
| Peak memory | 216856 kb |
| Host | smart-266692e9-cba6-4aa8-8aa4-e3b1c55fd6df |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1079015067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.1079015067 |
| Directory | /workspace/3.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/3.usbdev_in_stall.216159022 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 153104459 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:33:19 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-4ea8f4c4-831e-4c5c-9e8b-ad6b3308ff1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21615 9022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_in_stall.216159022 |
| Directory | /workspace/3.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/3.usbdev_in_trans.3042769352 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 217194550 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:33:07 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ab2efdaf-6604-4b30-b071-6c9a8b5a6375 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30427 69352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_in_trans.3042769352 |
| Directory | /workspace/3.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_invalid_sync.3071144067 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 3900427789 ps |
| CPU time | 106.1 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:34:55 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-1f46bbe2-f6d2-4be8-a1fb-530877487acc |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3071144067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.3071144067 |
| Directory | /workspace/3.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/3.usbdev_iso_retraction.2172336488 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 11567372800 ps |
| CPU time | 74.85 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-0ac44b86-2f9f-4a4a-8130-479484281616 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2172336488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.2172336488 |
| Directory | /workspace/3.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/3.usbdev_link_in_err.1787086776 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 215905027 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:33:10 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-3656b3ee-f2f7-446e-85de-b00bbc9eb0d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17870 86776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_link_in_err.1787086776 |
| Directory | /workspace/3.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_link_resume.3736612089 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 11324797369 ps |
| CPU time | 18.63 seconds |
| Started | Aug 16 05:33:16 PM PDT 24 |
| Finished | Aug 16 05:33:35 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-bfe71234-82d7-478b-bceb-2d7ea9fbbd67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37366 12089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_link_resume.3736612089 |
| Directory | /workspace/3.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/3.usbdev_link_suspend.287889740 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 9734097842 ps |
| CPU time | 11.8 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:21 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-8eb548bb-0307-459f-a292-f90f8ddd5cca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28788 9740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_link_suspend.287889740 |
| Directory | /workspace/3.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/3.usbdev_low_speed_traffic.2796526267 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 4084185017 ps |
| CPU time | 43.01 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:52 PM PDT 24 |
| Peak memory | 218580 kb |
| Host | smart-0f3b08c9-1f56-410b-b03f-7465b15f29fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2796526267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.2796526267 |
| Directory | /workspace/3.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_inter_pkt_delay.907760840 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 1517766001 ps |
| CPU time | 14.48 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:21 PM PDT 24 |
| Peak memory | 216600 kb |
| Host | smart-2b264201-bb26-4d42-afe7-89c1829c77ae |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=907760840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.907760840 |
| Directory | /workspace/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_length_in_transaction.171223867 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 317539728 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:33:16 PM PDT 24 |
| Finished | Aug 16 05:33:17 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-e5185996-8a6d-484f-a176-e10c8e681081 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=171223867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.171223867 |
| Directory | /workspace/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_length_out_transaction.4156587776 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 228567989 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:33:10 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 207036 kb |
| Host | smart-e058b1ee-3231-4424-83f2-2c1127dc75dc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41565 87776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.4156587776 |
| Directory | /workspace/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_non_iso_usb_traffic.1884037219 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 2545332493 ps |
| CPU time | 74.08 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:34:20 PM PDT 24 |
| Peak memory | 224076 kb |
| Host | smart-72779f5c-1edf-4867-b368-763b00d825c8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18840 37219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.1884037219 |
| Directory | /workspace/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/3.usbdev_max_usb_traffic.2652880465 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 1883423919 ps |
| CPU time | 53.86 seconds |
| Started | Aug 16 05:33:07 PM PDT 24 |
| Finished | Aug 16 05:34:01 PM PDT 24 |
| Peak memory | 217656 kb |
| Host | smart-9af602b6-dc91-4d31-b845-f5d54089c96d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2652880465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.2652880465 |
| Directory | /workspace/3.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/3.usbdev_min_inter_pkt_delay.3818608544 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 1609108796 ps |
| CPU time | 53.55 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 215872 kb |
| Host | smart-0f4d03a0-827f-4c05-a1a7-ef029a72a324 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3818608544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.3818608544 |
| Directory | /workspace/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/3.usbdev_min_length_in_transaction.2218206365 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 171315190 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:33:10 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-cee4d5a5-84bd-447c-991d-bdf09862a5cf |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2218206365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.2218206365 |
| Directory | /workspace/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_min_length_out_transaction.1479857958 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 182241082 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:14 PM PDT 24 |
| Finished | Aug 16 05:33:20 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-65d6d8c4-4627-4767-a8ce-7ebf5cafe3db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14798 57958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.1479857958 |
| Directory | /workspace/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_out_iso.3287003322 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 157782669 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-1a08d411-9944-49d3-b6cd-b11b39e9d830 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32870 03322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_out_iso.3287003322 |
| Directory | /workspace/3.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/3.usbdev_out_stall.68019928 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 186369277 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:33:12 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-34c7db44-8226-42b1-ac13-2aa36d88eb45 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68019 928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_out_stall.68019928 |
| Directory | /workspace/3.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/3.usbdev_out_trans_nak.2242878986 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 143565080 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:33:13 PM PDT 24 |
| Finished | Aug 16 05:33:14 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-0019726b-c933-46dc-ba58-a9b66d994158 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22428 78986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_out_trans_nak.2242878986 |
| Directory | /workspace/3.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/3.usbdev_pending_in_trans.511003656 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 169767324 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:33:12 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-da9288dc-886d-4781-b5bf-7b9f34f625aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51100 3656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pending_in_trans.511003656 |
| Directory | /workspace/3.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_config_pinflip.2276191547 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 220659524 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:33:12 PM PDT 24 |
| Finished | Aug 16 05:33:14 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-4f8cffbb-8a64-47c7-92b2-a32e94fa9267 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2276191547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.2276191547 |
| Directory | /workspace/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_config_rand_bus_type.3576751054 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 229881531 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:33:10 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-3f286b42-4255-4800-8df7-fb015e770e9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35767 51054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.3576751054 |
| Directory | /workspace/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_config_usb_ref_disable.2487714407 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 139669139 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:09 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-c57aba23-3a67-4ce8-b647-24754c4c35ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24877 14407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.2487714407 |
| Directory | /workspace/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/3.usbdev_phy_pins_sense.30586909 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 43457181 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:10 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ae2c8ae8-0778-49f1-8c1e-cde2213216c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30586 909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.30586909 |
| Directory | /workspace/3.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/3.usbdev_pkt_buffer.423619005 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 14303101039 ps |
| CPU time | 35.4 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:44 PM PDT 24 |
| Peak memory | 215904 kb |
| Host | smart-762868ce-04d6-4e2e-b02a-8f5037b35393 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42361 9005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pkt_buffer.423619005 |
| Directory | /workspace/3.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/3.usbdev_pkt_received.3430785435 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 212670374 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:33:10 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-b6c692f8-788d-43ff-a456-87dbdb87395f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34307 85435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pkt_received.3430785435 |
| Directory | /workspace/3.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/3.usbdev_pkt_sent.2116172356 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 199128961 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:33:07 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-4f57ac5a-6769-43b5-8fe8-b795053393a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21161 72356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pkt_sent.2116172356 |
| Directory | /workspace/3.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/3.usbdev_rand_bus_disconnects.1892284949 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 6004512809 ps |
| CPU time | 26.26 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:33 PM PDT 24 |
| Peak memory | 224036 kb |
| Host | smart-58bf6a28-a0a1-412a-9d4f-09cbfd2c66b9 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1892284949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.1892284949 |
| Directory | /workspace/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/3.usbdev_rand_bus_resets.646842529 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 5511724910 ps |
| CPU time | 20.57 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:26 PM PDT 24 |
| Peak memory | 218524 kb |
| Host | smart-a5113d08-6bdf-4dcf-8d1b-8e3219c70bb2 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=646842529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.646842529 |
| Directory | /workspace/3.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/3.usbdev_rand_suspends.2769746329 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 9694346545 ps |
| CPU time | 73.59 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:34:22 PM PDT 24 |
| Peak memory | 224072 kb |
| Host | smart-970773ce-5236-4f3b-b3ce-cefc9ce40855 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2769746329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.2769746329 |
| Directory | /workspace/3.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/3.usbdev_random_length_in_transaction.3471355007 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 235959411 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:10 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-d86300f0-c580-49c7-975e-2c569595f520 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34713 55007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_in_transaction.3471355007 |
| Directory | /workspace/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_random_length_out_transaction.4239201424 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 228314290 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:33:16 PM PDT 24 |
| Finished | Aug 16 05:33:17 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-df1bf659-76f1-4380-a45d-697edd27e86b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42392 01424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.4239201424 |
| Directory | /workspace/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/3.usbdev_resume_link_active.2288395834 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 20167781958 ps |
| CPU time | 25.63 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:35 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-01415c1f-3030-420f-99fc-63351d40bd52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22883 95834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_resume_link_active.2288395834 |
| Directory | /workspace/3.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/3.usbdev_rx_crc_err.1134504247 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 158961018 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:10 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-8ae06fb2-38e4-45eb-bf47-483fe1753e96 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11345 04247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rx_crc_err.1134504247 |
| Directory | /workspace/3.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_rx_full.1407548067 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 351812162 ps |
| CPU time | 1.26 seconds |
| Started | Aug 16 05:33:12 PM PDT 24 |
| Finished | Aug 16 05:33:13 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-0f0440db-2502-4a43-9bcc-a46b68305794 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14075 48067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rx_full.1407548067 |
| Directory | /workspace/3.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/3.usbdev_rx_pid_err.664722868 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 185230670 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:33:12 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-79dbfd36-f52e-4068-a68d-96dcd67df6ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66472 2868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rx_pid_err.664722868 |
| Directory | /workspace/3.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/3.usbdev_sec_cm.3882168916 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 672773897 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:11 PM PDT 24 |
| Peak memory | 224220 kb |
| Host | smart-be2f6d1e-6550-4e78-bd22-961af16f273f |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3882168916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.3882168916 |
| Directory | /workspace/3.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_priority.539196943 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 403531711 ps |
| CPU time | 1.3 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:10 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-d303f3e9-0eda-4e82-bcc9-e89da0e517ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53919 6943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.539196943 |
| Directory | /workspace/3.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_priority_over_stall_response.856806020 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 205276000 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:33:13 PM PDT 24 |
| Finished | Aug 16 05:33:14 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a48f4a93-223d-4234-b2f6-def5d9255e0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=85680 6020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+tg l+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.856806020 |
| Directory | /workspace/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_stage.995778630 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 186268342 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:07 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 206348 kb |
| Host | smart-4b624eb2-33cc-405b-b14d-e3c605622b4c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99577 8630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_stage.995778630 |
| Directory | /workspace/3.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/3.usbdev_setup_trans_ignored.251689670 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 170636431 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:33:17 PM PDT 24 |
| Finished | Aug 16 05:33:18 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-f4368de6-0981-4a7d-8f2e-70c0100b3b1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25168 9670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_trans_ignored.251689670 |
| Directory | /workspace/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/3.usbdev_smoke.2116261090 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 237680390 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:33:12 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-8f4b4ef9-38f9-4035-9cd7-b1ec8cde153a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21162 61090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.2116261090 |
| Directory | /workspace/3.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/3.usbdev_spurious_pids_ignored.2545867071 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 2517401929 ps |
| CPU time | 17.65 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:23 PM PDT 24 |
| Peak memory | 217800 kb |
| Host | smart-322a6dbb-bbab-458d-bfb4-03ccf93011fd |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2545867071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.2545867071 |
| Directory | /workspace/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/3.usbdev_stall_priority_over_nak.2404061672 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 166192966 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:07 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-5062325f-aa13-447f-98ff-2531e66345c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24040 61672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.2404061672 |
| Directory | /workspace/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/3.usbdev_stall_trans.3668950901 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 234457931 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:33:12 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-efa8e6c5-d3f1-459f-8a09-a7d3dfce802b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36689 50901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_trans.3668950901 |
| Directory | /workspace/3.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/3.usbdev_stream_len_max.31707690 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 987024486 ps |
| CPU time | 2.47 seconds |
| Started | Aug 16 05:33:12 PM PDT 24 |
| Finished | Aug 16 05:33:15 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-10d03671-1790-4637-9f47-61761939d737 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31707 690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.31707690 |
| Directory | /workspace/3.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/3.usbdev_streaming_out.56048358 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 2039922944 ps |
| CPU time | 16.09 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:23 PM PDT 24 |
| Peak memory | 224008 kb |
| Host | smart-4e4f56f2-1b58-4af2-ab44-299f137e0ae6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56048 358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_streaming_out.56048358 |
| Directory | /workspace/3.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/3.usbdev_timeout_missing_host_handshake.2632108086 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 3864176461 ps |
| CPU time | 33.48 seconds |
| Started | Aug 16 05:33:05 PM PDT 24 |
| Finished | Aug 16 05:33:39 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-b3bc7e6c-4307-4080-ac97-aef4ed41949e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2632108086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host _handshake.2632108086 |
| Directory | /workspace/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/3.usbdev_tx_rx_disruption.541959648 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 488830821 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:33:12 PM PDT 24 |
| Peak memory | 206460 kb |
| Host | smart-3b519db0-7aa3-446d-8936-648cfe738e39 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=541959648 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 3.usbdev_tx_rx_disruption.541959648 |
| Directory | /workspace/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/30.usbdev_alert_test.2622121892 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 31952805 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:36:56 PM PDT 24 |
| Finished | Aug 16 05:37:01 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-6711b72a-efd8-4f10-8f97-e0da758c6b82 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2622121892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.2622121892 |
| Directory | /workspace/30.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/30.usbdev_aon_wake_disconnect.2738734775 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 4177895875 ps |
| CPU time | 6.41 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:36:58 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-474dea9e-a291-4599-a6fb-0c35d1dfef91 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2738734775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_a on_wake_disconnect.2738734775 |
| Directory | /workspace/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/30.usbdev_aon_wake_reset.1527954546 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 14232755358 ps |
| CPU time | 16.82 seconds |
| Started | Aug 16 05:36:47 PM PDT 24 |
| Finished | Aug 16 05:37:04 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-e2ec67a2-8ccd-4bec-ab82-e7cd9c48f018 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1527954546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.1527954546 |
| Directory | /workspace/30.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/30.usbdev_aon_wake_resume.572095841 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 24949170382 ps |
| CPU time | 30.12 seconds |
| Started | Aug 16 05:37:17 PM PDT 24 |
| Finished | Aug 16 05:37:47 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-1b4d5ff9-c056-424b-8bf6-14f01e16e839 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=572095841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_ao n_wake_resume.572095841 |
| Directory | /workspace/30.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/30.usbdev_av_buffer.1215408124 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 150022731 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:36:52 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-080079fc-3313-42da-a4a9-5a89e10ded7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12154 08124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_av_buffer.1215408124 |
| Directory | /workspace/30.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/30.usbdev_bitstuff_err.1900283136 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 144842341 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:36:47 PM PDT 24 |
| Finished | Aug 16 05:36:48 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-9edff8a5-057e-47a7-a461-9a958ac272ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19002 83136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_bitstuff_err.1900283136 |
| Directory | /workspace/30.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/30.usbdev_data_toggle_clear.2420551809 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 261446238 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 206456 kb |
| Host | smart-82ed1134-a4eb-43a4-a8e4-9244a949cb9d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24205 51809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_clear.2420551809 |
| Directory | /workspace/30.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/30.usbdev_data_toggle_restore.770201501 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 767054576 ps |
| CPU time | 1.99 seconds |
| Started | Aug 16 05:37:04 PM PDT 24 |
| Finished | Aug 16 05:37:06 PM PDT 24 |
| Peak memory | 206676 kb |
| Host | smart-b71b6f56-656a-4395-9516-c02668301d8f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=770201501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.770201501 |
| Directory | /workspace/30.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/30.usbdev_device_address.1249301725 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 28495492891 ps |
| CPU time | 48.44 seconds |
| Started | Aug 16 05:36:53 PM PDT 24 |
| Finished | Aug 16 05:37:42 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-d9ef26d5-1ce2-40f6-9e62-bcad16b37e54 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12493 01725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.1249301725 |
| Directory | /workspace/30.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/30.usbdev_device_timeout.279563934 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 603613015 ps |
| CPU time | 4.8 seconds |
| Started | Aug 16 05:37:19 PM PDT 24 |
| Finished | Aug 16 05:37:24 PM PDT 24 |
| Peak memory | 206628 kb |
| Host | smart-852b1e8f-67f5-4da3-926c-67422045bc96 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=279563934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.279563934 |
| Directory | /workspace/30.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/30.usbdev_disable_endpoint.2753431533 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 621495749 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:36:57 PM PDT 24 |
| Finished | Aug 16 05:36:59 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-dba39b52-5b41-4cf3-ac8b-013e1f37e2c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27534 31533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_disable_endpoint.2753431533 |
| Directory | /workspace/30.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/30.usbdev_disconnected.2089855383 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 145145662 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:36:49 PM PDT 24 |
| Finished | Aug 16 05:36:50 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a8b8bed5-c4a9-46ef-9cf2-9554ea5593d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20898 55383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_disconnected.2089855383 |
| Directory | /workspace/30.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/30.usbdev_enable.6787300 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 29768781 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:37:08 PM PDT 24 |
| Finished | Aug 16 05:37:09 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a8d41672-5fa8-4b75-844a-21b245e3c311 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67873 00 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /works pace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_enable.6787300 |
| Directory | /workspace/30.usbdev_enable/latest |
| Test location | /workspace/coverage/default/30.usbdev_endpoint_access.3983621 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 900529352 ps |
| CPU time | 2.41 seconds |
| Started | Aug 16 05:36:49 PM PDT 24 |
| Finished | Aug 16 05:36:51 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-e572dd98-fdba-4684-9272-b4efb8644079 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39836 21 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.3983621 |
| Directory | /workspace/30.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/30.usbdev_fifo_rst.1092145005 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 164611094 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:37:26 PM PDT 24 |
| Finished | Aug 16 05:37:28 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-35374c50-7cdf-44c3-a466-5414c7d1d426 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10921 45005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_fifo_rst.1092145005 |
| Directory | /workspace/30.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/30.usbdev_in_iso.2501137705 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 208097046 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:36:48 PM PDT 24 |
| Finished | Aug 16 05:36:49 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-3b8bd42b-d918-4632-b042-1dcecb1d3988 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2501137705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.2501137705 |
| Directory | /workspace/30.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/30.usbdev_in_stall.1553967961 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 159189506 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:36:46 PM PDT 24 |
| Finished | Aug 16 05:36:47 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-281e8b24-bb00-4155-bb74-0ffbc9e7d425 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15539 67961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_in_stall.1553967961 |
| Directory | /workspace/30.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/30.usbdev_in_trans.620137633 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 165333198 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:20 PM PDT 24 |
| Finished | Aug 16 05:37:21 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-3392a302-d045-44ff-9d03-55cf16235a3a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62013 7633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_in_trans.620137633 |
| Directory | /workspace/30.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_invalid_sync.3970242780 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 3077564059 ps |
| CPU time | 87.85 seconds |
| Started | Aug 16 05:37:22 PM PDT 24 |
| Finished | Aug 16 05:38:50 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-df871ba1-2269-44e9-8d1e-dda5ffc814b1 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3970242780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.3970242780 |
| Directory | /workspace/30.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/30.usbdev_iso_retraction.1338360147 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 11807432389 ps |
| CPU time | 75.95 seconds |
| Started | Aug 16 05:37:17 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-7d0e45bc-0bc9-4f95-88e6-85ff2577f01b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1338360147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.1338360147 |
| Directory | /workspace/30.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/30.usbdev_link_in_err.1561994413 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 222129026 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:37:07 PM PDT 24 |
| Finished | Aug 16 05:37:08 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-ba8b7cdf-fb02-4600-9d1a-a9bc2672882a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15619 94413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_link_in_err.1561994413 |
| Directory | /workspace/30.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/30.usbdev_link_resume.4132745633 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 10777779994 ps |
| CPU time | 16.41 seconds |
| Started | Aug 16 05:36:52 PM PDT 24 |
| Finished | Aug 16 05:37:08 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-9833ea9e-7164-46cd-81a7-ef2d04d68af5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41327 45633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_link_resume.4132745633 |
| Directory | /workspace/30.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/30.usbdev_link_suspend.1685888970 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 9440306105 ps |
| CPU time | 11.81 seconds |
| Started | Aug 16 05:37:15 PM PDT 24 |
| Finished | Aug 16 05:37:26 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-af21f462-eeb4-4344-bdf8-e1d5a0b99c6d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16858 88970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_link_suspend.1685888970 |
| Directory | /workspace/30.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/30.usbdev_low_speed_traffic.898631078 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 3721720249 ps |
| CPU time | 28.39 seconds |
| Started | Aug 16 05:36:47 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 224012 kb |
| Host | smart-2f4fa0f2-5adb-40cc-8b7a-5d8af9725f60 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=898631078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.898631078 |
| Directory | /workspace/30.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/30.usbdev_max_inter_pkt_delay.314721771 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 2400936020 ps |
| CPU time | 24.95 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:37:17 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-027c01b2-a7ca-461a-9849-bc1df2520ed6 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=314721771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.314721771 |
| Directory | /workspace/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/30.usbdev_max_length_in_transaction.1850627644 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 250681863 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:37:18 PM PDT 24 |
| Finished | Aug 16 05:37:19 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-74202fd3-8297-4b57-8e3a-b7eec4c3872c |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1850627644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.1850627644 |
| Directory | /workspace/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_max_length_out_transaction.2204719695 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 184846077 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:12 PM PDT 24 |
| Finished | Aug 16 05:37:13 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-567a410b-9f1a-4f2e-aef5-b66c093b838a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22047 19695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.2204719695 |
| Directory | /workspace/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_min_inter_pkt_delay.3560928376 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 4001778214 ps |
| CPU time | 118.76 seconds |
| Started | Aug 16 05:36:49 PM PDT 24 |
| Finished | Aug 16 05:38:48 PM PDT 24 |
| Peak memory | 217204 kb |
| Host | smart-f836b308-6365-48c6-9191-8af652699e4d |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3560928376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.3560928376 |
| Directory | /workspace/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/30.usbdev_min_length_in_transaction.3464053246 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 157396624 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:11 PM PDT 24 |
| Finished | Aug 16 05:37:12 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-50f8c1ba-145b-40fd-a069-24663e497afd |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3464053246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.3464053246 |
| Directory | /workspace/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_min_length_out_transaction.3907315446 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 145621139 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:36:51 PM PDT 24 |
| Finished | Aug 16 05:36:52 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-3b236570-64b7-4d58-89bb-be78aa4aad4c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39073 15446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.3907315446 |
| Directory | /workspace/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_nak_trans.4072008459 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 220357052 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:31 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-75e1db23-9267-4ce5-967a-7dac4568266a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40720 08459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_nak_trans.4072008459 |
| Directory | /workspace/30.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_out_iso.1973715361 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 174321978 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:08 PM PDT 24 |
| Finished | Aug 16 05:37:09 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-7f89f42f-1beb-47eb-b14f-717e6ae301a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19737 15361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_out_iso.1973715361 |
| Directory | /workspace/30.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/30.usbdev_out_stall.1059608961 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 150855488 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-664c72fc-9ce7-46fd-9b6f-c3086f02889e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10596 08961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_out_stall.1059608961 |
| Directory | /workspace/30.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/30.usbdev_out_trans_nak.2754906903 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 154808918 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:37:23 PM PDT 24 |
| Finished | Aug 16 05:37:24 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-af24ce39-f700-4dd6-b990-7b169181c6e2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27549 06903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_out_trans_nak.2754906903 |
| Directory | /workspace/30.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/30.usbdev_pending_in_trans.3986419568 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 152414004 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:37:23 PM PDT 24 |
| Finished | Aug 16 05:37:24 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-2365dc6e-e6e2-4227-b780-800799eb15c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39864 19568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pending_in_trans.3986419568 |
| Directory | /workspace/30.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_phy_config_pinflip.1154559763 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 234302825 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:31 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-536310a2-9216-4992-ab35-2ef09bcfd13e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1154559763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.1154559763 |
| Directory | /workspace/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/30.usbdev_phy_config_usb_ref_disable.29495920 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 203329375 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:12 PM PDT 24 |
| Finished | Aug 16 05:37:13 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-eaf59ff9-d281-414a-b65f-0bc88c465d79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29495 920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.29495920 |
| Directory | /workspace/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/30.usbdev_phy_pins_sense.2457445605 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 39184733 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:37:21 PM PDT 24 |
| Finished | Aug 16 05:37:22 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-e1e0b204-acb3-4fbd-a76d-a34e0e65be15 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24574 45605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.2457445605 |
| Directory | /workspace/30.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/30.usbdev_pkt_buffer.3211285753 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 10738372055 ps |
| CPU time | 29.07 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:38:00 PM PDT 24 |
| Peak memory | 216036 kb |
| Host | smart-255dfbbb-db3f-4aae-82ab-3b1cad40d240 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32112 85753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pkt_buffer.3211285753 |
| Directory | /workspace/30.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/30.usbdev_pkt_received.1287075085 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 165799089 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:20 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-b931e9be-dc95-4edb-8116-02ec6d1f8d1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12870 75085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pkt_received.1287075085 |
| Directory | /workspace/30.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/30.usbdev_pkt_sent.462900948 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 252392383 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:37:12 PM PDT 24 |
| Finished | Aug 16 05:37:13 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-26a59bf9-1c65-4e5d-9920-7f4dbb40055a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46290 0948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_pkt_sent.462900948 |
| Directory | /workspace/30.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/30.usbdev_random_length_in_transaction.1139685330 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 281664492 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:37:19 PM PDT 24 |
| Finished | Aug 16 05:37:20 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-440bc654-1ddf-4f2f-bbeb-b13e43daf24e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11396 85330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_in_transaction.1139685330 |
| Directory | /workspace/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_random_length_out_transaction.2760952571 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 224407974 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:37:23 PM PDT 24 |
| Finished | Aug 16 05:37:24 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-86b18cd2-38bf-4827-88d2-d1f850811d0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27609 52571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.2760952571 |
| Directory | /workspace/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/30.usbdev_rx_crc_err.1386796763 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 150479689 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:36:54 PM PDT 24 |
| Finished | Aug 16 05:36:55 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-697cdeb6-1c75-4f2e-8afd-94588b5203cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13867 96763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_rx_crc_err.1386796763 |
| Directory | /workspace/30.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/30.usbdev_rx_full.1729765354 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 423363227 ps |
| CPU time | 1.37 seconds |
| Started | Aug 16 05:37:23 PM PDT 24 |
| Finished | Aug 16 05:37:24 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-03636a0e-794e-4320-84b8-6399e02e5941 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17297 65354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_rx_full.1729765354 |
| Directory | /workspace/30.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/30.usbdev_setup_stage.1438191247 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 202857529 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:37:27 PM PDT 24 |
| Finished | Aug 16 05:37:28 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-43262b80-d9db-4fb9-8acf-95f4349cdc3f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14381 91247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_setup_stage.1438191247 |
| Directory | /workspace/30.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/30.usbdev_setup_trans_ignored.4128608844 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 171833996 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:37:20 PM PDT 24 |
| Finished | Aug 16 05:37:21 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-c897c7e6-fcda-445e-b8d9-1e87976c7aa5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41286 08844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_setup_trans_ignored.4128608844 |
| Directory | /workspace/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/30.usbdev_smoke.1833340145 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 218378977 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:37:27 PM PDT 24 |
| Finished | Aug 16 05:37:28 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-f752496a-dea2-4467-adc8-4477af908adb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18333 40145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.1833340145 |
| Directory | /workspace/30.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/30.usbdev_spurious_pids_ignored.3310200914 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 2766897108 ps |
| CPU time | 82 seconds |
| Started | Aug 16 05:37:19 PM PDT 24 |
| Finished | Aug 16 05:38:41 PM PDT 24 |
| Peak memory | 217824 kb |
| Host | smart-2303e506-fa1d-4f2c-8e63-fdf54a3049c1 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3310200914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.3310200914 |
| Directory | /workspace/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/30.usbdev_stall_priority_over_nak.3465929405 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 182043468 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:37:20 PM PDT 24 |
| Finished | Aug 16 05:37:21 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-a954c992-6b42-4e21-ada2-c87543d8d79a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34659 29405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.3465929405 |
| Directory | /workspace/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/30.usbdev_stall_trans.448829365 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 189133416 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:37:12 PM PDT 24 |
| Finished | Aug 16 05:37:13 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-5832fc62-6d40-4c5c-bb96-a065eba963c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44882 9365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_trans.448829365 |
| Directory | /workspace/30.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/30.usbdev_stream_len_max.2468307591 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 944538251 ps |
| CPU time | 2.32 seconds |
| Started | Aug 16 05:37:01 PM PDT 24 |
| Finished | Aug 16 05:37:03 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-ec552618-d9be-4cd9-883d-9d9d5e798914 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24683 07591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.2468307591 |
| Directory | /workspace/30.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/30.usbdev_streaming_out.1924572467 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 1756007603 ps |
| CPU time | 13.46 seconds |
| Started | Aug 16 05:36:59 PM PDT 24 |
| Finished | Aug 16 05:37:12 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-6880f6c0-b0bf-4317-8f90-754a0fe8ae04 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19245 72467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_streaming_out.1924572467 |
| Directory | /workspace/30.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/30.usbdev_timeout_missing_host_handshake.3526188775 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 621565442 ps |
| CPU time | 5.76 seconds |
| Started | Aug 16 05:37:05 PM PDT 24 |
| Finished | Aug 16 05:37:11 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-35c2825e-6445-489d-aa0a-657e15eef7f0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3526188775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_hos t_handshake.3526188775 |
| Directory | /workspace/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/30.usbdev_tx_rx_disruption.1773132394 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 589613868 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:37:12 PM PDT 24 |
| Finished | Aug 16 05:37:14 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-b15cc02d-f32e-48c5-9556-20550ec18a51 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1773132394 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_tx_rx_disruption.1773132394 |
| Directory | /workspace/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/300.usbdev_tx_rx_disruption.2991514515 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 630163366 ps |
| CPU time | 1.78 seconds |
| Started | Aug 16 05:40:30 PM PDT 24 |
| Finished | Aug 16 05:40:32 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-55452d84-a7ba-4fba-a587-7e7372508eea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2991514515 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 300.usbdev_tx_rx_disruption.2991514515 |
| Directory | /workspace/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/301.usbdev_tx_rx_disruption.1943780703 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 554779493 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:40:43 PM PDT 24 |
| Finished | Aug 16 05:40:45 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-112494e0-e3a6-4f4f-bcf9-db1356d69149 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1943780703 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 301.usbdev_tx_rx_disruption.1943780703 |
| Directory | /workspace/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/302.usbdev_tx_rx_disruption.1604596993 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 416505627 ps |
| CPU time | 1.37 seconds |
| Started | Aug 16 05:40:48 PM PDT 24 |
| Finished | Aug 16 05:40:52 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-eae41596-a64f-4cbd-a1a2-7ceb93005d42 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1604596993 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 302.usbdev_tx_rx_disruption.1604596993 |
| Directory | /workspace/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/303.usbdev_tx_rx_disruption.1108643478 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 598082706 ps |
| CPU time | 1.81 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-58fdd32f-2444-467b-8d84-cb915a9efdc1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1108643478 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 303.usbdev_tx_rx_disruption.1108643478 |
| Directory | /workspace/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/304.usbdev_tx_rx_disruption.1049473887 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 518515792 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:28 PM PDT 24 |
| Finished | Aug 16 05:40:30 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-2360ed5c-ff1f-45f3-b961-175ef965c4ab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1049473887 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 304.usbdev_tx_rx_disruption.1049473887 |
| Directory | /workspace/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/305.usbdev_tx_rx_disruption.2834682703 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 596411332 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:50 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-f22db53a-8e76-4b79-857b-56fe22403f17 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2834682703 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 305.usbdev_tx_rx_disruption.2834682703 |
| Directory | /workspace/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/306.usbdev_tx_rx_disruption.1685180866 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 492741727 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:52 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-836f9e96-d5f6-4203-ab34-089c337d6f22 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1685180866 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 306.usbdev_tx_rx_disruption.1685180866 |
| Directory | /workspace/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/307.usbdev_tx_rx_disruption.157252108 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 657622025 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:40:54 PM PDT 24 |
| Finished | Aug 16 05:40:56 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-5649f9f7-5361-4563-adf5-01029105c591 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=157252108 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 307.usbdev_tx_rx_disruption.157252108 |
| Directory | /workspace/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/308.usbdev_tx_rx_disruption.957297182 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 509763662 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:40:21 PM PDT 24 |
| Finished | Aug 16 05:40:23 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-09265244-4e04-4c0d-96ef-38d2730cd030 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=957297182 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 308.usbdev_tx_rx_disruption.957297182 |
| Directory | /workspace/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/309.usbdev_tx_rx_disruption.2605660416 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 558985881 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-5959bae6-4528-4961-a65b-da91da8e6c5f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2605660416 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 309.usbdev_tx_rx_disruption.2605660416 |
| Directory | /workspace/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/31.usbdev_alert_test.1910837445 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 71134851 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6d28507b-f2ec-4abd-bd9b-46968b9008cc |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1910837445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.1910837445 |
| Directory | /workspace/31.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/31.usbdev_aon_wake_disconnect.10709615 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 5530278739 ps |
| CPU time | 6.97 seconds |
| Started | Aug 16 05:37:29 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-210630b3-20c7-413f-8a3d-6ea55751d71f |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10709615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon _wake_disconnect.10709615 |
| Directory | /workspace/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/31.usbdev_aon_wake_reset.1666388088 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 20766653453 ps |
| CPU time | 23.24 seconds |
| Started | Aug 16 05:37:06 PM PDT 24 |
| Finished | Aug 16 05:37:30 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-f8030b74-e6ee-402b-9a32-d12c5c2af29b |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1666388088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.1666388088 |
| Directory | /workspace/31.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/31.usbdev_aon_wake_resume.4020104477 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 25703884903 ps |
| CPU time | 32.24 seconds |
| Started | Aug 16 05:37:27 PM PDT 24 |
| Finished | Aug 16 05:38:00 PM PDT 24 |
| Peak memory | 215992 kb |
| Host | smart-fae15689-3f4e-42a4-84d2-aa7f8263ab3b |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4020104477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_a on_wake_resume.4020104477 |
| Directory | /workspace/31.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/31.usbdev_av_buffer.2719346326 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 178115835 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:37:25 PM PDT 24 |
| Finished | Aug 16 05:37:27 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-145df803-fc64-485d-a6ca-e8c32c1a720d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27193 46326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_av_buffer.2719346326 |
| Directory | /workspace/31.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/31.usbdev_bitstuff_err.1506483860 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 164827356 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:37:22 PM PDT 24 |
| Finished | Aug 16 05:37:23 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-38c24498-6b6e-4857-96a2-e9cd1fcdcc3d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15064 83860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_bitstuff_err.1506483860 |
| Directory | /workspace/31.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/31.usbdev_data_toggle_clear.4206302171 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 540568022 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:37:26 PM PDT 24 |
| Finished | Aug 16 05:37:28 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-9ca35101-e60d-4eda-839b-5aeabf2d885a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42063 02171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_clear.4206302171 |
| Directory | /workspace/31.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/31.usbdev_data_toggle_restore.4253155800 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 1164351751 ps |
| CPU time | 2.91 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-9caba77c-428d-4bcf-b1cb-2a51428620c1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4253155800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.4253155800 |
| Directory | /workspace/31.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/31.usbdev_device_address.2031481884 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 48874517749 ps |
| CPU time | 72.46 seconds |
| Started | Aug 16 05:37:27 PM PDT 24 |
| Finished | Aug 16 05:38:40 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-545ffae6-e0cb-4b36-8ed5-c90d8df343f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20314 81884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.2031481884 |
| Directory | /workspace/31.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/31.usbdev_device_timeout.3058501996 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 846189545 ps |
| CPU time | 18.67 seconds |
| Started | Aug 16 05:37:16 PM PDT 24 |
| Finished | Aug 16 05:37:34 PM PDT 24 |
| Peak memory | 207680 kb |
| Host | smart-5bafb811-5017-47c9-8846-1919b7026d4d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3058501996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.3058501996 |
| Directory | /workspace/31.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/31.usbdev_disable_endpoint.162732664 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 744527409 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-7d89cf49-3c52-4ae2-a82c-a4c097054bbf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16273 2664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_disable_endpoint.162732664 |
| Directory | /workspace/31.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/31.usbdev_disconnected.1623439462 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 146607613 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:37:20 PM PDT 24 |
| Finished | Aug 16 05:37:21 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9c9f7391-ff08-4c6d-bc07-68e644bb1824 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16234 39462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_disconnected.1623439462 |
| Directory | /workspace/31.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/31.usbdev_enable.2818828995 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 30211640 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:37:17 PM PDT 24 |
| Finished | Aug 16 05:37:18 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-bff03f25-21b2-4053-abde-df8033d4b082 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28188 28995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_enable.2818828995 |
| Directory | /workspace/31.usbdev_enable/latest |
| Test location | /workspace/coverage/default/31.usbdev_endpoint_access.2889846226 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 893819798 ps |
| CPU time | 2.3 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-f59402a5-a42b-4173-8aa2-c8041f9f51d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28898 46226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.2889846226 |
| Directory | /workspace/31.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/31.usbdev_endpoint_types.3839727425 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 395395264 ps |
| CPU time | 1.24 seconds |
| Started | Aug 16 05:37:19 PM PDT 24 |
| Finished | Aug 16 05:37:20 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-8da9e804-5386-4d64-a783-02fb10b9347a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3839727425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.3839727425 |
| Directory | /workspace/31.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/31.usbdev_fifo_rst.458922516 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 277613962 ps |
| CPU time | 2.39 seconds |
| Started | Aug 16 05:37:39 PM PDT 24 |
| Finished | Aug 16 05:37:41 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-00238b43-5ebf-4508-9dec-392d488b3f3d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45892 2516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_fifo_rst.458922516 |
| Directory | /workspace/31.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/31.usbdev_in_iso.276314583 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 229483949 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:31 PM PDT 24 |
| Peak memory | 215872 kb |
| Host | smart-bf34ddfd-102d-45f1-8251-35ebcb0321b8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=276314583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.276314583 |
| Directory | /workspace/31.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/31.usbdev_in_stall.3168998682 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 159234528 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-9dfeae18-c321-4754-9866-570515a240a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31689 98682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_in_stall.3168998682 |
| Directory | /workspace/31.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/31.usbdev_in_trans.1903336034 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 175905308 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-7b098d2a-c861-4d69-ba07-b9764caa5d67 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19033 36034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_in_trans.1903336034 |
| Directory | /workspace/31.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_invalid_sync.1970702336 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 4032907209 ps |
| CPU time | 39.61 seconds |
| Started | Aug 16 05:37:21 PM PDT 24 |
| Finished | Aug 16 05:38:01 PM PDT 24 |
| Peak memory | 218572 kb |
| Host | smart-8f9a726b-9eb7-4a3e-8eb3-2696eb8f4866 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1970702336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.1970702336 |
| Directory | /workspace/31.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/31.usbdev_iso_retraction.601976274 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 5377196677 ps |
| CPU time | 61.99 seconds |
| Started | Aug 16 05:37:22 PM PDT 24 |
| Finished | Aug 16 05:38:25 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-b4dc6614-651a-4170-bdc1-225a64ef1426 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=601976274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.601976274 |
| Directory | /workspace/31.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/31.usbdev_link_in_err.1138834391 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 187121889 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:37:29 PM PDT 24 |
| Finished | Aug 16 05:37:30 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-bac9fb7d-ae34-4f5f-84a7-0f1a6cc6e3d4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11388 34391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_link_in_err.1138834391 |
| Directory | /workspace/31.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/31.usbdev_link_resume.1246961744 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 32652540433 ps |
| CPU time | 52.01 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:38:25 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-4ed20417-0b90-4726-8e8d-43837cccb52e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12469 61744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_link_resume.1246961744 |
| Directory | /workspace/31.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/31.usbdev_link_suspend.18242361 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 10700259613 ps |
| CPU time | 14.37 seconds |
| Started | Aug 16 05:37:27 PM PDT 24 |
| Finished | Aug 16 05:37:42 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-17f2a5e0-49b5-4f62-bcbb-9748ca39a2c8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18242 361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_link_suspend.18242361 |
| Directory | /workspace/31.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/31.usbdev_low_speed_traffic.1725498836 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 3015997160 ps |
| CPU time | 24.23 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:55 PM PDT 24 |
| Peak memory | 218960 kb |
| Host | smart-775717b3-650e-4ce3-ba20-810726ffcf95 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1725498836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.1725498836 |
| Directory | /workspace/31.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/31.usbdev_max_inter_pkt_delay.2504919816 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 3079435655 ps |
| CPU time | 30.09 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:38:01 PM PDT 24 |
| Peak memory | 216812 kb |
| Host | smart-9b86e015-5be5-4ffc-95d5-005d2953d102 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2504919816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.2504919816 |
| Directory | /workspace/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/31.usbdev_max_length_in_transaction.3599289605 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 262149756 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:37:20 PM PDT 24 |
| Finished | Aug 16 05:37:21 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-5996a2bc-3c34-4f75-b2dc-0288564ca5df |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3599289605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.3599289605 |
| Directory | /workspace/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_max_length_out_transaction.2280860941 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 196091312 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:37:29 PM PDT 24 |
| Finished | Aug 16 05:37:30 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-312238b3-608f-4e3e-bcef-c5dc239cf112 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22808 60941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.2280860941 |
| Directory | /workspace/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_min_inter_pkt_delay.2126182464 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 3150637188 ps |
| CPU time | 88.56 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:39:04 PM PDT 24 |
| Peak memory | 217592 kb |
| Host | smart-856c633a-ac1d-4fc8-a707-cce24bd4023c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2126182464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.2126182464 |
| Directory | /workspace/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/31.usbdev_min_length_in_transaction.366387823 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 160333504 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:26 PM PDT 24 |
| Finished | Aug 16 05:37:27 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-df3a15f0-927c-4d9f-8098-942e9c10d872 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=366387823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.366387823 |
| Directory | /workspace/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_min_length_out_transaction.2209389231 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 146963705 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-3b8f2f16-ce09-42f5-a894-74d83b5748ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22093 89231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.2209389231 |
| Directory | /workspace/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_nak_trans.698517837 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 210834107 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-43eaa848-6a3a-40d0-979f-4ee9ee42c360 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69851 7837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_nak_trans.698517837 |
| Directory | /workspace/31.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_out_iso.569145905 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 200426027 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:37:14 PM PDT 24 |
| Finished | Aug 16 05:37:15 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a17ebb38-a468-4e1b-8262-54b28693ca78 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56914 5905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_out_iso.569145905 |
| Directory | /workspace/31.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/31.usbdev_out_stall.167971032 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 257249258 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:31 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-8bd40eca-594a-428b-a011-7d38c78ac8cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16797 1032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_out_stall.167971032 |
| Directory | /workspace/31.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/31.usbdev_out_trans_nak.1372812730 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 192042875 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:24 PM PDT 24 |
| Finished | Aug 16 05:37:25 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-9aad07e2-a525-443f-8455-1ac11baf3375 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13728 12730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_out_trans_nak.1372812730 |
| Directory | /workspace/31.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/31.usbdev_pending_in_trans.451111390 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 184224068 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:37:27 PM PDT 24 |
| Finished | Aug 16 05:37:28 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ffdfe3e6-18f2-4498-afd5-827df57ec455 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45111 1390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pending_in_trans.451111390 |
| Directory | /workspace/31.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_phy_config_pinflip.3088887760 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 216513879 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:37:26 PM PDT 24 |
| Finished | Aug 16 05:37:27 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-e2c97966-6d55-434f-8445-ccfd40cd29b9 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3088887760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.3088887760 |
| Directory | /workspace/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/31.usbdev_phy_config_usb_ref_disable.3231026192 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 148537432 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:21 PM PDT 24 |
| Finished | Aug 16 05:37:22 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-5068c23b-263e-47ad-9f3f-e9f572135860 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32310 26192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.3231026192 |
| Directory | /workspace/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/31.usbdev_phy_pins_sense.283529391 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 114769553 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-2e6495b6-99b1-4d33-beca-18ad3e652b05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28352 9391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_pins_sense.283529391 |
| Directory | /workspace/31.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/31.usbdev_pkt_buffer.697108432 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 6423861928 ps |
| CPU time | 15.46 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:50 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-cff02415-fcb3-40d5-8ed3-a763458703bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69710 8432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pkt_buffer.697108432 |
| Directory | /workspace/31.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/31.usbdev_pkt_received.2549106850 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 176477815 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:28 PM PDT 24 |
| Finished | Aug 16 05:37:29 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-2a92452f-e7a2-47ac-bfd1-3a97ebb30154 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25491 06850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pkt_received.2549106850 |
| Directory | /workspace/31.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/31.usbdev_pkt_sent.2251069435 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 172158705 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:20 PM PDT 24 |
| Finished | Aug 16 05:37:21 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-a3f7a96d-8f16-4bc8-9549-5398ce36cc7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22510 69435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pkt_sent.2251069435 |
| Directory | /workspace/31.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/31.usbdev_random_length_in_transaction.3178691163 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 250362969 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:37:26 PM PDT 24 |
| Finished | Aug 16 05:37:27 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-82ff1831-451f-4ded-bba9-2ba575ea4252 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31786 91163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_in_transaction.3178691163 |
| Directory | /workspace/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_random_length_out_transaction.2931581404 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 174816415 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:29 PM PDT 24 |
| Finished | Aug 16 05:37:30 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-ce6622df-2589-4148-86a2-053b71b5eb77 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29315 81404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.2931581404 |
| Directory | /workspace/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/31.usbdev_rx_crc_err.322944346 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 140925676 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:37:23 PM PDT 24 |
| Finished | Aug 16 05:37:24 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-af932e5f-fe4e-478c-a4f4-d8aa005d2707 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32294 4346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_rx_crc_err.322944346 |
| Directory | /workspace/31.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/31.usbdev_setup_stage.2858076849 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 179480985 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-62bf41d7-58de-40be-b9cf-1f8db526fe0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28580 76849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_setup_stage.2858076849 |
| Directory | /workspace/31.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/31.usbdev_setup_trans_ignored.1284066654 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 159176577 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:19 PM PDT 24 |
| Finished | Aug 16 05:37:20 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-523a8f9b-89a3-4ee9-90b3-471e537cd9bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12840 66654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_setup_trans_ignored.1284066654 |
| Directory | /workspace/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/31.usbdev_smoke.293766334 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 235607967 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:37:29 PM PDT 24 |
| Finished | Aug 16 05:37:30 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-85abdb10-56fb-4c2c-af7d-7e8988b95cee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29376 6334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.293766334 |
| Directory | /workspace/31.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/31.usbdev_stall_priority_over_nak.3528697398 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 246292230 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:31 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-b96e55c7-3b74-40df-826c-385588a5c800 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35286 97398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.3528697398 |
| Directory | /workspace/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/31.usbdev_stall_trans.2783479332 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 194347696 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:37:25 PM PDT 24 |
| Finished | Aug 16 05:37:26 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-24a75afa-77c9-4484-92ac-1a525ff0d701 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27834 79332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_trans.2783479332 |
| Directory | /workspace/31.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/31.usbdev_stream_len_max.1788829789 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 1113592795 ps |
| CPU time | 2.7 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-11f2a285-7115-4d25-9211-10e0ee9940da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17888 29789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.1788829789 |
| Directory | /workspace/31.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/31.usbdev_streaming_out.2847152832 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 2576911757 ps |
| CPU time | 71.08 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:38:45 PM PDT 24 |
| Peak memory | 217348 kb |
| Host | smart-0bca3de7-5544-4e2c-a407-ffadf9109984 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28471 52832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_streaming_out.2847152832 |
| Directory | /workspace/31.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/31.usbdev_timeout_missing_host_handshake.82219622 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 2549970651 ps |
| CPU time | 22.21 seconds |
| Started | Aug 16 05:37:26 PM PDT 24 |
| Finished | Aug 16 05:37:49 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-2da3adc7-2a1c-4088-8f99-e4730d858f65 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82219622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_ handshake.82219622 |
| Directory | /workspace/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/31.usbdev_tx_rx_disruption.4098259797 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 457700908 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:37:25 PM PDT 24 |
| Finished | Aug 16 05:37:26 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-5d2a4089-b390-47dd-b4e3-c4d4b5f27bb7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4098259797 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_tx_rx_disruption.4098259797 |
| Directory | /workspace/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/310.usbdev_tx_rx_disruption.2801206266 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 536274810 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-d6ee6818-8f9f-40c2-87d5-004a553dcbf6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2801206266 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 310.usbdev_tx_rx_disruption.2801206266 |
| Directory | /workspace/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/311.usbdev_tx_rx_disruption.666396278 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 406853103 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:51 PM PDT 24 |
| Finished | Aug 16 05:40:53 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-66534354-2043-499d-aa57-74746130e2ff |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=666396278 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 311.usbdev_tx_rx_disruption.666396278 |
| Directory | /workspace/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/312.usbdev_tx_rx_disruption.1768476332 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 503313784 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:40:29 PM PDT 24 |
| Finished | Aug 16 05:40:31 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-af8823c7-02cf-4602-8a18-acd1059cc16d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1768476332 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 312.usbdev_tx_rx_disruption.1768476332 |
| Directory | /workspace/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/313.usbdev_tx_rx_disruption.2384512615 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 589344097 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c2e9aa3a-583b-4c3f-b1d7-b97f66523fa8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2384512615 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 313.usbdev_tx_rx_disruption.2384512615 |
| Directory | /workspace/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/314.usbdev_tx_rx_disruption.1384950997 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 617423513 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:24 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-1156a89f-9ccb-4c4a-9519-f14e7a7398d8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1384950997 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 314.usbdev_tx_rx_disruption.1384950997 |
| Directory | /workspace/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/315.usbdev_tx_rx_disruption.1256132914 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 485193107 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:46 PM PDT 24 |
| Finished | Aug 16 05:40:48 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7a25668a-3e6a-48cc-a78f-bee75d2d981c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1256132914 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 315.usbdev_tx_rx_disruption.1256132914 |
| Directory | /workspace/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/316.usbdev_tx_rx_disruption.2496157478 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 477637030 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:40:21 PM PDT 24 |
| Finished | Aug 16 05:40:23 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-2cce0077-5ab5-4247-a49a-22fe930df777 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2496157478 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 316.usbdev_tx_rx_disruption.2496157478 |
| Directory | /workspace/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/317.usbdev_tx_rx_disruption.2978611956 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 568652341 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:24 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-0e71019c-b22f-4252-b2f5-c20a79f11d21 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2978611956 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 317.usbdev_tx_rx_disruption.2978611956 |
| Directory | /workspace/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/318.usbdev_tx_rx_disruption.2298648372 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 584040314 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:53 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-cc8ffa41-895a-4cd9-ba21-f04975241f05 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2298648372 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 318.usbdev_tx_rx_disruption.2298648372 |
| Directory | /workspace/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/319.usbdev_tx_rx_disruption.1588118757 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 521419059 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:43 PM PDT 24 |
| Finished | Aug 16 05:40:44 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-3cec70d3-38de-4001-9e5d-60fcc42d9492 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1588118757 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 319.usbdev_tx_rx_disruption.1588118757 |
| Directory | /workspace/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/32.usbdev_alert_test.843618517 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 40076675 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:37:40 PM PDT 24 |
| Finished | Aug 16 05:37:41 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-92cb5349-03d6-44ba-ad94-d6e344fe79f1 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=843618517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.843618517 |
| Directory | /workspace/32.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/32.usbdev_aon_wake_disconnect.329817937 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 6533688810 ps |
| CPU time | 9.45 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 215984 kb |
| Host | smart-95279058-57fb-49da-97e9-212e8cc2f5ce |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=329817937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_ao n_wake_disconnect.329817937 |
| Directory | /workspace/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/32.usbdev_aon_wake_reset.1479988546 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 14753885040 ps |
| CPU time | 17.6 seconds |
| Started | Aug 16 05:37:28 PM PDT 24 |
| Finished | Aug 16 05:37:45 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-f409d023-2171-45cb-8224-654d64d1de19 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1479988546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.1479988546 |
| Directory | /workspace/32.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/32.usbdev_aon_wake_resume.3902594102 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 30106270185 ps |
| CPU time | 37.02 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:38:07 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-90f6c071-4b3d-4e1d-ac66-0b260ad217a5 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3902594102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_a on_wake_resume.3902594102 |
| Directory | /workspace/32.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/32.usbdev_av_buffer.4132112871 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 165732736 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-390fd5fa-52a2-45cf-8a2f-3a0525a794f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41321 12871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_av_buffer.4132112871 |
| Directory | /workspace/32.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/32.usbdev_bitstuff_err.3288656652 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 155394109 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:28 PM PDT 24 |
| Finished | Aug 16 05:37:29 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ca971a3d-d14d-42c4-ab0d-672e39b809b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32886 56652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_bitstuff_err.3288656652 |
| Directory | /workspace/32.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/32.usbdev_data_toggle_clear.1353136968 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 421547311 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:37:24 PM PDT 24 |
| Finished | Aug 16 05:37:26 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-fe15b1a9-a1bd-4b47-9874-a225a51ce795 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13531 36968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_clear.1353136968 |
| Directory | /workspace/32.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/32.usbdev_data_toggle_restore.3516751082 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 1027353620 ps |
| CPU time | 2.67 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-d7aba36d-9550-421a-b962-85510ae7ce9a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3516751082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.3516751082 |
| Directory | /workspace/32.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/32.usbdev_device_address.2323718189 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 28707522986 ps |
| CPU time | 49.98 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:38:24 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-68fe0254-79ef-498d-8081-3783d94ead6f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23237 18189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.2323718189 |
| Directory | /workspace/32.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/32.usbdev_device_timeout.691936384 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 3440868373 ps |
| CPU time | 30.21 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:38:07 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-1ab43e5e-63ee-4de0-a017-cccfd72b51e7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=691936384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.691936384 |
| Directory | /workspace/32.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/32.usbdev_disable_endpoint.2636488838 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 523267438 ps |
| CPU time | 1.36 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-c95a9895-a4fa-436f-8ce0-77764c231570 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26364 88838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_disable_endpoint.2636488838 |
| Directory | /workspace/32.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/32.usbdev_disconnected.3036526713 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 149973777 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:37:34 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-fbc1d949-7144-4f45-8ce8-0ae9067f3d52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30365 26713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_disconnected.3036526713 |
| Directory | /workspace/32.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/32.usbdev_enable.925495058 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 56845154 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-6d9a7b83-5cb3-4b94-8cb1-b7073f0f3f14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92549 5058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_enable.925495058 |
| Directory | /workspace/32.usbdev_enable/latest |
| Test location | /workspace/coverage/default/32.usbdev_endpoint_access.1766514758 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 861818845 ps |
| CPU time | 2.49 seconds |
| Started | Aug 16 05:38:13 PM PDT 24 |
| Finished | Aug 16 05:38:15 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-92b5327d-a75f-4eef-a8cb-2f6ca34a7443 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17665 14758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.1766514758 |
| Directory | /workspace/32.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/32.usbdev_endpoint_types.1583325645 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 202275297 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:28 PM PDT 24 |
| Finished | Aug 16 05:37:29 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-3aa957d6-8e73-43bd-b335-dfcd8a011070 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1583325645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.1583325645 |
| Directory | /workspace/32.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/32.usbdev_fifo_rst.3597999439 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 210217682 ps |
| CPU time | 2.38 seconds |
| Started | Aug 16 05:37:22 PM PDT 24 |
| Finished | Aug 16 05:37:25 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-7a0e1283-6ecc-4c8a-b272-75c664b19888 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35979 99439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_fifo_rst.3597999439 |
| Directory | /workspace/32.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/32.usbdev_in_iso.134726827 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 180394613 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:37:55 PM PDT 24 |
| Finished | Aug 16 05:37:56 PM PDT 24 |
| Peak memory | 215848 kb |
| Host | smart-392e716f-fb44-4e9d-897b-ae81f575a146 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=134726827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.134726827 |
| Directory | /workspace/32.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/32.usbdev_in_stall.3958024860 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 197939143 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:37:34 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-d0d6a5c1-fe5e-42cb-8468-082d50c7cd82 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39580 24860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_in_stall.3958024860 |
| Directory | /workspace/32.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/32.usbdev_in_trans.351242894 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 213098617 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:37:45 PM PDT 24 |
| Finished | Aug 16 05:37:46 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-6b4c3552-946a-4935-9e8f-efd617a6d4a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35124 2894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_in_trans.351242894 |
| Directory | /workspace/32.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_invalid_sync.4017142036 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 2797687753 ps |
| CPU time | 21.57 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:56 PM PDT 24 |
| Peak memory | 216036 kb |
| Host | smart-ad07eab8-a860-4e9a-a145-7f6990e65e9b |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4017142036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.4017142036 |
| Directory | /workspace/32.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/32.usbdev_iso_retraction.4267218745 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 8525992462 ps |
| CPU time | 107.58 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-f1118f54-ca10-49a0-93be-6248a6ce83e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4267218745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.4267218745 |
| Directory | /workspace/32.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/32.usbdev_link_in_err.3948453517 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 176595589 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-c0400f5d-f314-4b53-b513-92dca9f33292 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39484 53517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_link_in_err.3948453517 |
| Directory | /workspace/32.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/32.usbdev_link_resume.1498362265 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 30462931229 ps |
| CPU time | 46.02 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:38:18 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-50b67528-b9d3-48e4-b44a-7325c2181b05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14983 62265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_link_resume.1498362265 |
| Directory | /workspace/32.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/32.usbdev_link_suspend.1351250713 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 10975264627 ps |
| CPU time | 15.3 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:46 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-41ec5d72-e39f-4631-849e-80bca2de3e28 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13512 50713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_link_suspend.1351250713 |
| Directory | /workspace/32.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/32.usbdev_low_speed_traffic.2059093580 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 2638261907 ps |
| CPU time | 71.75 seconds |
| Started | Aug 16 05:37:40 PM PDT 24 |
| Finished | Aug 16 05:38:52 PM PDT 24 |
| Peak memory | 218460 kb |
| Host | smart-7e4e9d18-0a55-447d-adf3-440b48a128a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2059093580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.2059093580 |
| Directory | /workspace/32.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/32.usbdev_max_inter_pkt_delay.3807442823 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 3827849806 ps |
| CPU time | 112.62 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 217256 kb |
| Host | smart-8767ba15-7fdd-474b-b80a-8142b9cf9022 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3807442823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.3807442823 |
| Directory | /workspace/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/32.usbdev_max_length_in_transaction.3678646729 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 262032001 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:37:29 PM PDT 24 |
| Finished | Aug 16 05:37:30 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-70323a2d-6870-4553-9196-fd2363ff3a57 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3678646729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.3678646729 |
| Directory | /workspace/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_max_length_out_transaction.1524971744 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 211765987 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:37:34 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-16563ed7-b92e-4af9-bd93-ccd4082319a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15249 71744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.1524971744 |
| Directory | /workspace/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_min_inter_pkt_delay.2045712324 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 2811693959 ps |
| CPU time | 27.77 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:38:00 PM PDT 24 |
| Peak memory | 217268 kb |
| Host | smart-ecf3948c-c9b1-48c6-9a93-2039efb3d97e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2045712324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.2045712324 |
| Directory | /workspace/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/32.usbdev_min_length_in_transaction.1586413533 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 149283872 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:42 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-165a6b79-220e-4865-be02-e063d31b07ef |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1586413533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.1586413533 |
| Directory | /workspace/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_min_length_out_transaction.596153919 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 152736492 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-0f66cbc6-efdb-4d15-afa5-32793cb4cb17 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59615 3919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.596153919 |
| Directory | /workspace/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_nak_trans.2549502458 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 224747219 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-4c818891-7569-4e47-80db-dbf0f1f52902 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25495 02458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_nak_trans.2549502458 |
| Directory | /workspace/32.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_out_iso.3681148548 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 179269090 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-e3143b17-ba25-46a6-8acf-bbefc2f7ba88 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36811 48548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_iso.3681148548 |
| Directory | /workspace/32.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/32.usbdev_out_stall.3381198688 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 258135058 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-d748037d-281e-4e2c-b021-9d636b95bc0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33811 98688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_stall.3381198688 |
| Directory | /workspace/32.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/32.usbdev_out_trans_nak.677453831 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 224535268 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:37:25 PM PDT 24 |
| Finished | Aug 16 05:37:26 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-146a047e-cf6f-4d23-9e64-ed1484945a58 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67745 3831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_trans_nak.677453831 |
| Directory | /workspace/32.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/32.usbdev_pending_in_trans.4038363849 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 149742649 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-be691940-cfee-4c89-9e55-174326f37ff0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40383 63849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pending_in_trans.4038363849 |
| Directory | /workspace/32.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_phy_config_pinflip.2407634629 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 231190861 ps |
| CPU time | 1.16 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-9796e322-3dc7-4b50-a09d-b77e5410c08d |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2407634629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.2407634629 |
| Directory | /workspace/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/32.usbdev_phy_config_usb_ref_disable.2081759550 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 208498606 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-f6797c4f-4fb5-40b0-b2ab-209237fda6df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20817 59550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.2081759550 |
| Directory | /workspace/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/32.usbdev_phy_pins_sense.2564085003 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 37513983 ps |
| CPU time | 0.66 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-538b195c-4d89-4118-b092-56b1a6bc73fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25640 85003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.2564085003 |
| Directory | /workspace/32.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/32.usbdev_pkt_buffer.3778438994 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 23892461576 ps |
| CPU time | 64.41 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:38:37 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-343d2e0e-5729-4699-b4fc-6eeed6faeecb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37784 38994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pkt_buffer.3778438994 |
| Directory | /workspace/32.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/32.usbdev_pkt_received.404347061 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 213810537 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-ce9d34ed-6415-4527-861a-b814d1c60f22 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40434 7061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pkt_received.404347061 |
| Directory | /workspace/32.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/32.usbdev_pkt_sent.2143920243 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 166121756 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-f580602b-5f59-411d-9dc9-de08ada1a09c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21439 20243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pkt_sent.2143920243 |
| Directory | /workspace/32.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/32.usbdev_random_length_in_transaction.3050548223 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 175299979 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-96496ae9-ccdf-479e-b2ca-deb49ecc2bbd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30505 48223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_in_transaction.3050548223 |
| Directory | /workspace/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_random_length_out_transaction.120428774 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 213096459 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-7a482a84-7ca2-41b7-adbf-966ccddc7e94 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12042 8774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.120428774 |
| Directory | /workspace/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/32.usbdev_rx_crc_err.4183687644 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 161703895 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-2a20813c-baaf-456e-b48f-d72161627126 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41836 87644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_rx_crc_err.4183687644 |
| Directory | /workspace/32.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/32.usbdev_rx_full.2193949832 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 377078081 ps |
| CPU time | 1.36 seconds |
| Started | Aug 16 05:37:46 PM PDT 24 |
| Finished | Aug 16 05:37:48 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-d71041cf-0b68-40c0-b70a-f01eba833741 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21939 49832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_rx_full.2193949832 |
| Directory | /workspace/32.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/32.usbdev_setup_stage.715828900 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 154795367 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-226d09ea-4c01-43be-b155-13dc75b3c297 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71582 8900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_setup_stage.715828900 |
| Directory | /workspace/32.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/32.usbdev_setup_trans_ignored.4110583475 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 181821570 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-cfe5b7db-db01-4c36-9a6c-31b4e090c5a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41105 83475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_setup_trans_ignored.4110583475 |
| Directory | /workspace/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/32.usbdev_smoke.2456696035 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 205104770 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-07513c97-7b0d-4bd7-ad07-cae29409b68b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24566 96035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.2456696035 |
| Directory | /workspace/32.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/32.usbdev_spurious_pids_ignored.82724322 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 3455590655 ps |
| CPU time | 25.47 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:38:02 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-91a64b78-6eae-437b-86c4-104bedc55a1d |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=82724322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.82724322 |
| Directory | /workspace/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/32.usbdev_stall_priority_over_nak.1417078698 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 182352955 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a037d46d-7c56-4d62-bc8e-2ee92e50adb6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14170 78698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.1417078698 |
| Directory | /workspace/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/32.usbdev_stall_trans.4155062223 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 176002091 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:46 PM PDT 24 |
| Finished | Aug 16 05:37:48 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-4a512aed-be94-492a-a187-f84d8855bc9d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41550 62223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_trans.4155062223 |
| Directory | /workspace/32.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/32.usbdev_stream_len_max.4290681315 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 844929485 ps |
| CPU time | 2.21 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:41 PM PDT 24 |
| Peak memory | 207856 kb |
| Host | smart-f12c3fbe-d756-4269-a4dc-a8107ffb2e08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42906 81315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.4290681315 |
| Directory | /workspace/32.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/32.usbdev_streaming_out.4036693131 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 3992059407 ps |
| CPU time | 29.77 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:38:08 PM PDT 24 |
| Peak memory | 215984 kb |
| Host | smart-1db55db1-1c38-47e1-82ea-006ddf1e3fd1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40366 93131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_streaming_out.4036693131 |
| Directory | /workspace/32.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/32.usbdev_timeout_missing_host_handshake.1551983169 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 2473608358 ps |
| CPU time | 22.1 seconds |
| Started | Aug 16 05:37:26 PM PDT 24 |
| Finished | Aug 16 05:37:48 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-1749ac32-b1ae-4904-8ff2-051a705f457f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1551983169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_hos t_handshake.1551983169 |
| Directory | /workspace/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/32.usbdev_tx_rx_disruption.4177011803 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 644249220 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-8d758d8f-d7b8-47e8-8f19-1f2389674f36 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4177011803 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_tx_rx_disruption.4177011803 |
| Directory | /workspace/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/320.usbdev_tx_rx_disruption.2998015967 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 660789557 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:40:21 PM PDT 24 |
| Finished | Aug 16 05:40:33 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-92809f31-7345-43c6-9554-82ceef8a62fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2998015967 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 320.usbdev_tx_rx_disruption.2998015967 |
| Directory | /workspace/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/321.usbdev_tx_rx_disruption.1931433395 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 547774614 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-7b747cfc-2a35-40dd-91c9-a33fdb92f963 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1931433395 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 321.usbdev_tx_rx_disruption.1931433395 |
| Directory | /workspace/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/323.usbdev_tx_rx_disruption.2542786941 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 516676803 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:51 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-7192595d-8521-4f68-a9eb-bcb9a0cec2c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2542786941 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 323.usbdev_tx_rx_disruption.2542786941 |
| Directory | /workspace/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/324.usbdev_tx_rx_disruption.3421170965 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 558605725 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:40:37 PM PDT 24 |
| Finished | Aug 16 05:40:39 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-b47d102a-108a-43d9-82c2-88b7d0865697 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3421170965 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 324.usbdev_tx_rx_disruption.3421170965 |
| Directory | /workspace/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/325.usbdev_tx_rx_disruption.2790245351 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 649621765 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:40:44 PM PDT 24 |
| Finished | Aug 16 05:40:46 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-a3bc411f-7159-4a54-9b42-ee55ef319613 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2790245351 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 325.usbdev_tx_rx_disruption.2790245351 |
| Directory | /workspace/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/326.usbdev_tx_rx_disruption.3474974820 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 540989846 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:26 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-8c4d0c1f-b207-4c22-9190-0126612ec2d5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3474974820 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 326.usbdev_tx_rx_disruption.3474974820 |
| Directory | /workspace/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/327.usbdev_tx_rx_disruption.3263492768 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 657672046 ps |
| CPU time | 1.85 seconds |
| Started | Aug 16 05:40:51 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-432bc83e-6814-4e70-b741-81407d007f8a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3263492768 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 327.usbdev_tx_rx_disruption.3263492768 |
| Directory | /workspace/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/328.usbdev_tx_rx_disruption.1047688275 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 474658931 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-426db683-eec5-492f-92b5-f68661c81a15 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1047688275 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 328.usbdev_tx_rx_disruption.1047688275 |
| Directory | /workspace/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/329.usbdev_tx_rx_disruption.3595766739 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 538654863 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:40:39 PM PDT 24 |
| Finished | Aug 16 05:40:41 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-ebba8673-5f20-43ed-b7e4-f7d7494354cd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3595766739 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 329.usbdev_tx_rx_disruption.3595766739 |
| Directory | /workspace/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/33.usbdev_alert_test.22466302 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 53274831 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c00f8f79-a458-46f8-b942-d94f310582ac |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=22466302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.22466302 |
| Directory | /workspace/33.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/33.usbdev_aon_wake_disconnect.2313627607 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 10782010421 ps |
| CPU time | 16.78 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:49 PM PDT 24 |
| Peak memory | 207880 kb |
| Host | smart-f51946ae-ae23-46c0-8b52-3063bae677b4 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2313627607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_a on_wake_disconnect.2313627607 |
| Directory | /workspace/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/33.usbdev_aon_wake_reset.1416616904 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 14569484878 ps |
| CPU time | 16.38 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:47 PM PDT 24 |
| Peak memory | 216016 kb |
| Host | smart-4dbea651-48e8-4730-8368-585056eee389 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1416616904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.1416616904 |
| Directory | /workspace/33.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/33.usbdev_aon_wake_resume.1597996433 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 29127697186 ps |
| CPU time | 32.52 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:38:10 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-256e6bc2-c8ac-415e-a3b6-3846e1fcecaf |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1597996433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_a on_wake_resume.1597996433 |
| Directory | /workspace/33.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/33.usbdev_av_buffer.72973759 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 196691970 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:37:34 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-71ecddf4-2139-408b-bd5f-dfc83e005c31 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72973 759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_av_buffer.72973759 |
| Directory | /workspace/33.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/33.usbdev_bitstuff_err.3954354250 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 155424952 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-d7bab8c5-1a05-499d-a2c4-323dcfd0ee55 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39543 54250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_bitstuff_err.3954354250 |
| Directory | /workspace/33.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/33.usbdev_data_toggle_clear.891744975 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 562737696 ps |
| CPU time | 1.87 seconds |
| Started | Aug 16 05:37:42 PM PDT 24 |
| Finished | Aug 16 05:37:49 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-ed7e0eab-8ff5-41e5-bbfb-2ef19d73952f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89174 4975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_clear.891744975 |
| Directory | /workspace/33.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/33.usbdev_data_toggle_restore.545260443 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 1018887208 ps |
| CPU time | 2.8 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-9ddda522-09b3-43e9-a021-667c5a89fede |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=545260443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.545260443 |
| Directory | /workspace/33.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/33.usbdev_device_address.1024571387 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 28322277291 ps |
| CPU time | 45.17 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:38:22 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-828b917b-7b41-4f0e-b8af-664bb4ecb4b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10245 71387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.1024571387 |
| Directory | /workspace/33.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/33.usbdev_device_timeout.37591380 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 5601944689 ps |
| CPU time | 41.95 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:38:16 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-ae4bb3f7-c1ec-47be-a9cb-f8db2bdfd901 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37591380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.37591380 |
| Directory | /workspace/33.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/33.usbdev_disable_endpoint.3177603361 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 894672205 ps |
| CPU time | 1.99 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-60f02036-78cc-46e5-81c9-1cfdb905b0d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31776 03361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_disable_endpoint.3177603361 |
| Directory | /workspace/33.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/33.usbdev_disconnected.152910891 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 194793488 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:34 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-aa1b8a62-940c-4f11-b539-db872764ea42 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15291 0891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_disconnected.152910891 |
| Directory | /workspace/33.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/33.usbdev_enable.4205653354 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 42924488 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-53167e48-b56f-4e25-888d-f45781e0d8bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42056 53354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_enable.4205653354 |
| Directory | /workspace/33.usbdev_enable/latest |
| Test location | /workspace/coverage/default/33.usbdev_endpoint_access.1874199260 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 878324562 ps |
| CPU time | 2.45 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207912 kb |
| Host | smart-866cc595-4529-4739-9a8f-5272f07a3f0f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18741 99260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.1874199260 |
| Directory | /workspace/33.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/33.usbdev_endpoint_types.395038742 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 328627463 ps |
| CPU time | 1.24 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c9daad82-b864-442e-bf1b-3387b6e2da62 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=395038742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.395038742 |
| Directory | /workspace/33.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/33.usbdev_fifo_rst.2924687090 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 182428311 ps |
| CPU time | 2.18 seconds |
| Started | Aug 16 05:37:39 PM PDT 24 |
| Finished | Aug 16 05:37:42 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-169c42d4-866e-4bcc-93c6-fe25ff276089 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29246 87090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_fifo_rst.2924687090 |
| Directory | /workspace/33.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/33.usbdev_in_iso.2169856978 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 165975818 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-da297363-4d1e-4ae1-ae00-5fbf8cb8d502 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2169856978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.2169856978 |
| Directory | /workspace/33.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/33.usbdev_in_stall.3522271135 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 137865927 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-1a551f72-4c3d-4892-a47a-d12b0370bef4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35222 71135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_in_stall.3522271135 |
| Directory | /workspace/33.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/33.usbdev_in_trans.3262704838 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 177532407 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-b74e3077-24a8-488e-803b-5d9660a88c7b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32627 04838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_in_trans.3262704838 |
| Directory | /workspace/33.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_invalid_sync.1753472518 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 4867660024 ps |
| CPU time | 49.45 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:38:21 PM PDT 24 |
| Peak memory | 218280 kb |
| Host | smart-8f96ea22-77fd-4ec2-9701-337d0168c833 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1753472518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.1753472518 |
| Directory | /workspace/33.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/33.usbdev_iso_retraction.1410675658 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 14301308514 ps |
| CPU time | 98.45 seconds |
| Started | Aug 16 05:37:29 PM PDT 24 |
| Finished | Aug 16 05:39:07 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-dfe8fdd3-d739-4b17-b423-cec338fd4d67 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1410675658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.1410675658 |
| Directory | /workspace/33.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/33.usbdev_link_in_err.3250550372 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 237911150 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-464653d3-893a-49da-b7be-12dbacd76bf0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32505 50372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_link_in_err.3250550372 |
| Directory | /workspace/33.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/33.usbdev_link_resume.3421181885 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 28707017388 ps |
| CPU time | 48.69 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:38:27 PM PDT 24 |
| Peak memory | 216768 kb |
| Host | smart-9c225a27-0890-4820-abc2-ca51694b4846 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34211 81885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_link_resume.3421181885 |
| Directory | /workspace/33.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/33.usbdev_link_suspend.3491144637 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 3940258284 ps |
| CPU time | 5.58 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:44 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-87399e5a-ab78-46b1-8b5e-511b2233c322 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34911 44637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_link_suspend.3491144637 |
| Directory | /workspace/33.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/33.usbdev_low_speed_traffic.3506240500 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 2889693491 ps |
| CPU time | 81.78 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-03729d33-00e5-489c-9d30-6a82d8fe482c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3506240500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.3506240500 |
| Directory | /workspace/33.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/33.usbdev_max_inter_pkt_delay.217737157 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 2907115630 ps |
| CPU time | 28.63 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:38:07 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-d528fad3-fe26-4a1e-aeaf-b757066f762b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=217737157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.217737157 |
| Directory | /workspace/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/33.usbdev_max_length_in_transaction.2659803279 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 271558009 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:37:42 PM PDT 24 |
| Finished | Aug 16 05:37:43 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-2fa9ef9b-3064-4308-b0d0-84b01580751f |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2659803279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.2659803279 |
| Directory | /workspace/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_max_length_out_transaction.4277602817 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 192541532 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-8dda4e6a-4b36-4a71-876a-9526e805a7b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42776 02817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.4277602817 |
| Directory | /workspace/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_min_inter_pkt_delay.1332048227 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 1954721199 ps |
| CPU time | 13.74 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:53 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-f795f700-de36-414e-9e59-b380ba625e8c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1332048227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.1332048227 |
| Directory | /workspace/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/33.usbdev_min_length_in_transaction.3158363074 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 145407846 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-49b33f50-8bf4-4b9d-a749-74e69ae02054 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3158363074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.3158363074 |
| Directory | /workspace/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_min_length_out_transaction.1516400920 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 167710162 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-8e19513c-4727-4af9-b732-bdb0ecfec10c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15164 00920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.1516400920 |
| Directory | /workspace/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_nak_trans.1247343758 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 201257577 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-9bd87b24-be82-4426-89fc-a2b89fdd7b33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12473 43758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_nak_trans.1247343758 |
| Directory | /workspace/33.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_out_iso.3340762603 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 194823825 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-080af23f-6119-45c3-bf85-4ce7c38f2a3f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33407 62603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_out_iso.3340762603 |
| Directory | /workspace/33.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/33.usbdev_out_stall.1880794090 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 184775642 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c5c2b36c-11a4-4e5a-a54e-0e9022e9eee4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18807 94090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_out_stall.1880794090 |
| Directory | /workspace/33.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/33.usbdev_out_trans_nak.910810196 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 195083362 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9ee2fb9d-23cd-4351-bdf0-c7d8c4a2e756 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91081 0196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_out_trans_nak.910810196 |
| Directory | /workspace/33.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/33.usbdev_pending_in_trans.3106239832 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 219509032 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-73ba2756-6e88-43d0-b38a-35a2c25163c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31062 39832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pending_in_trans.3106239832 |
| Directory | /workspace/33.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_phy_config_pinflip.4137841227 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 261524735 ps |
| CPU time | 1.11 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-54687e27-a937-4b92-8bad-a9a956639911 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=4137841227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.4137841227 |
| Directory | /workspace/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/33.usbdev_phy_config_usb_ref_disable.4129196565 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 162811860 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-45941a39-e57f-4b39-88e7-3465fbc978e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41291 96565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.4129196565 |
| Directory | /workspace/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/33.usbdev_phy_pins_sense.2987137622 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 38195691 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:37:39 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c2e78d5a-5a4b-4ec5-b32c-a1a2d5ab814e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29871 37622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.2987137622 |
| Directory | /workspace/33.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/33.usbdev_pkt_buffer.4267533225 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 11317410754 ps |
| CPU time | 28.07 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:38:04 PM PDT 24 |
| Peak memory | 224112 kb |
| Host | smart-47a0b1c7-255c-41b2-a264-120b266fd6bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42675 33225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pkt_buffer.4267533225 |
| Directory | /workspace/33.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/33.usbdev_pkt_received.4122924798 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 188054422 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-d4b54cf9-2c1d-416e-b066-1b92a545dff7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41229 24798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pkt_received.4122924798 |
| Directory | /workspace/33.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/33.usbdev_pkt_sent.2267193259 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 251416872 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-1ac3d67e-86ee-43fa-a4cb-fbd3dd919041 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22671 93259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pkt_sent.2267193259 |
| Directory | /workspace/33.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/33.usbdev_random_length_in_transaction.4176855986 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 222912043 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:39 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7198cbdf-d3d7-40a3-9f4e-0ed3b7ce1f0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41768 55986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_in_transaction.4176855986 |
| Directory | /workspace/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_random_length_out_transaction.363971787 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 196959230 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-95e81349-5c23-4aed-be76-5bc539ccd677 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36397 1787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.363971787 |
| Directory | /workspace/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/33.usbdev_rx_crc_err.2939187639 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 213482127 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9aa797e1-8bbe-4b73-8a16-7678157e33fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29391 87639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_rx_crc_err.2939187639 |
| Directory | /workspace/33.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/33.usbdev_rx_full.950658260 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 262020695 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-f3b0633b-aaa8-48c1-845d-906cf05a43c6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95065 8260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_rx_full.950658260 |
| Directory | /workspace/33.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/33.usbdev_setup_stage.2479736376 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 148558155 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:37:55 PM PDT 24 |
| Finished | Aug 16 05:37:56 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-0d9e027f-8fe6-4cd4-b6fc-af6433969442 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24797 36376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_setup_stage.2479736376 |
| Directory | /workspace/33.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/33.usbdev_setup_trans_ignored.2953339757 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 143974905 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-b99a7610-a4c3-44c2-b44b-846b5a941ca1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29533 39757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_setup_trans_ignored.2953339757 |
| Directory | /workspace/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/33.usbdev_smoke.4040587929 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 237494253 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-f42b70f6-babf-4f22-91ad-6a979822397d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40405 87929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.4040587929 |
| Directory | /workspace/33.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/33.usbdev_spurious_pids_ignored.1303520531 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 2341275913 ps |
| CPU time | 18 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:54 PM PDT 24 |
| Peak memory | 224040 kb |
| Host | smart-564d4671-fa7b-4a53-9e94-a3bed5ac719d |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1303520531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.1303520531 |
| Directory | /workspace/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/33.usbdev_stall_priority_over_nak.408807875 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 191965037 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-eacadccb-f0f0-4e40-8df8-0806002d0671 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40880 7875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.408807875 |
| Directory | /workspace/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/33.usbdev_stall_trans.3162190324 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 180153871 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-5fd1d47d-c47c-446d-b0dd-012b6177cff6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31621 90324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_trans.3162190324 |
| Directory | /workspace/33.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/33.usbdev_stream_len_max.3135456869 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 1136825863 ps |
| CPU time | 2.86 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:42 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-784a8948-ded1-4f50-b11c-be24ffb7a379 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31354 56869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.3135456869 |
| Directory | /workspace/33.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/33.usbdev_streaming_out.3830372938 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 3417717979 ps |
| CPU time | 34.21 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:38:13 PM PDT 24 |
| Peak memory | 217608 kb |
| Host | smart-5c01d2d7-e54e-45a5-b962-3cd072d01ac2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38303 72938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_streaming_out.3830372938 |
| Directory | /workspace/33.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/33.usbdev_timeout_missing_host_handshake.3522006442 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 4948682585 ps |
| CPU time | 37.51 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:38:10 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-bdc3d660-60ed-40e3-8f7a-225eb4bf3e82 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3522006442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_hos t_handshake.3522006442 |
| Directory | /workspace/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/33.usbdev_tx_rx_disruption.1614881090 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 463715482 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-393273a6-e9a9-4ff5-ab8f-f5185d3f41e9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1614881090 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_tx_rx_disruption.1614881090 |
| Directory | /workspace/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/330.usbdev_tx_rx_disruption.769570134 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 482161115 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:46 PM PDT 24 |
| Finished | Aug 16 05:40:48 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-c7eb02f4-f294-477e-95c7-bb3c2af0a8bf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=769570134 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 330.usbdev_tx_rx_disruption.769570134 |
| Directory | /workspace/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/331.usbdev_tx_rx_disruption.3067630517 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 488362375 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:39 PM PDT 24 |
| Finished | Aug 16 05:40:41 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-4e12cd26-f0b0-4c0b-96c8-754b26c8730c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3067630517 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 331.usbdev_tx_rx_disruption.3067630517 |
| Directory | /workspace/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/332.usbdev_tx_rx_disruption.2259796910 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 516816331 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-c05e2efe-7991-443d-a51e-4ea225f29a13 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2259796910 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 332.usbdev_tx_rx_disruption.2259796910 |
| Directory | /workspace/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/333.usbdev_tx_rx_disruption.3293527212 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 478536411 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:40:25 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-7f4049a4-0bea-4105-817b-3b5f34380dd0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3293527212 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 333.usbdev_tx_rx_disruption.3293527212 |
| Directory | /workspace/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/334.usbdev_tx_rx_disruption.3837125782 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 440178126 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:40:42 PM PDT 24 |
| Finished | Aug 16 05:40:44 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-530a3a36-93ac-4c3d-a567-563592f5275d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3837125782 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 334.usbdev_tx_rx_disruption.3837125782 |
| Directory | /workspace/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/335.usbdev_tx_rx_disruption.3971340985 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 599844965 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-4ce40363-dd47-4211-9a9f-48a59056476d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3971340985 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 335.usbdev_tx_rx_disruption.3971340985 |
| Directory | /workspace/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/336.usbdev_tx_rx_disruption.3227254716 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 572543199 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:22 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-63bcb5ac-ce8f-4959-b8e5-434f71d3ffcd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3227254716 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 336.usbdev_tx_rx_disruption.3227254716 |
| Directory | /workspace/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/337.usbdev_tx_rx_disruption.2104976512 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 498698238 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-3269da61-783a-4821-b2d9-a71b83674ccf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2104976512 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 337.usbdev_tx_rx_disruption.2104976512 |
| Directory | /workspace/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/338.usbdev_tx_rx_disruption.879265051 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 505566917 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:41:01 PM PDT 24 |
| Finished | Aug 16 05:41:03 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-6d894a02-ab18-4cf5-974e-ad948d49fa35 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=879265051 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 338.usbdev_tx_rx_disruption.879265051 |
| Directory | /workspace/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/339.usbdev_tx_rx_disruption.1935576304 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 574469629 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:23 PM PDT 24 |
| Finished | Aug 16 05:40:24 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-4cc4dd65-8332-4b1b-bfe7-9770e4fc4dfd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1935576304 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 339.usbdev_tx_rx_disruption.1935576304 |
| Directory | /workspace/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/34.usbdev_alert_test.12517946 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 38526254 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-d222140f-c622-4d4a-8616-2f8a8c4f3d8f |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=12517946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.12517946 |
| Directory | /workspace/34.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/34.usbdev_aon_wake_disconnect.473903625 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 5207192847 ps |
| CPU time | 6.92 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:42 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-7e477c97-4b31-4210-88e8-00f5ae112dfe |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=473903625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_ao n_wake_disconnect.473903625 |
| Directory | /workspace/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/34.usbdev_aon_wake_reset.2133008031 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 13578301203 ps |
| CPU time | 15.93 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:47 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-79b5df0d-5ef2-4f24-a605-5c17bc019291 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2133008031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.2133008031 |
| Directory | /workspace/34.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/34.usbdev_aon_wake_resume.516946121 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 25218555963 ps |
| CPU time | 31.22 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:38:05 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-f0ce5bfe-5e5e-4210-93dd-6039a1a73ef6 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=516946121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_ao n_wake_resume.516946121 |
| Directory | /workspace/34.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/34.usbdev_av_buffer.305647564 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 216205799 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-0cba3729-44d0-4663-ab74-71c37e4e12d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30564 7564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_av_buffer.305647564 |
| Directory | /workspace/34.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/34.usbdev_bitstuff_err.3027709460 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 169372679 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-50d978b0-c10f-4172-9567-3a6c471c3102 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30277 09460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_bitstuff_err.3027709460 |
| Directory | /workspace/34.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/34.usbdev_data_toggle_clear.3291377366 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 405518699 ps |
| CPU time | 1.4 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:34 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-5dd445ab-266b-4a52-9a2f-acf529ed0544 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32913 77366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_clear.3291377366 |
| Directory | /workspace/34.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/34.usbdev_data_toggle_restore.4284525824 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 725116676 ps |
| CPU time | 2.04 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-ad196b26-89c0-4d74-972c-72fa89caa386 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4284525824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.4284525824 |
| Directory | /workspace/34.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/34.usbdev_device_address.2083227326 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 19953244946 ps |
| CPU time | 34.11 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:38:11 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-297edae8-1aa8-47a7-9a60-5cef6664d825 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20832 27326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.2083227326 |
| Directory | /workspace/34.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/34.usbdev_device_timeout.330853881 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 670165082 ps |
| CPU time | 12.44 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:46 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-07b6a5e5-625f-4995-99a2-1114f5ee2120 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=330853881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.330853881 |
| Directory | /workspace/34.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/34.usbdev_disable_endpoint.1417851440 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 769567218 ps |
| CPU time | 1.8 seconds |
| Started | Aug 16 05:37:42 PM PDT 24 |
| Finished | Aug 16 05:37:44 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6ef6f806-716c-4096-9c8c-f5b7ee9c791e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14178 51440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_disable_endpoint.1417851440 |
| Directory | /workspace/34.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/34.usbdev_disconnected.4200404709 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 148852509 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-91ed4a6b-fae0-4afe-9cd9-1738019bec06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42004 04709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_disconnected.4200404709 |
| Directory | /workspace/34.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/34.usbdev_enable.1748339032 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 45764208 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-1cf83eac-ddfb-4b87-a68c-bba60c4fdc00 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17483 39032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_enable.1748339032 |
| Directory | /workspace/34.usbdev_enable/latest |
| Test location | /workspace/coverage/default/34.usbdev_endpoint_access.15779545 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 936341562 ps |
| CPU time | 2.75 seconds |
| Started | Aug 16 05:37:30 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-ca69a200-d559-4c03-8be1-09fd8d4e7946 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15779 545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.15779545 |
| Directory | /workspace/34.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/34.usbdev_endpoint_types.1276963906 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 297838704 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-bb24a8eb-0d01-42de-972a-1be99c34e50a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1276963906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.1276963906 |
| Directory | /workspace/34.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/34.usbdev_fifo_rst.556888129 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 183111789 ps |
| CPU time | 2.16 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:41 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-95dac32c-833b-438a-963a-7cb76ea4b5e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55688 8129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_fifo_rst.556888129 |
| Directory | /workspace/34.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/34.usbdev_in_iso.3276152571 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 192743774 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 215852 kb |
| Host | smart-168a57bb-51cd-4aeb-971f-91707357e347 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3276152571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.3276152571 |
| Directory | /workspace/34.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/34.usbdev_in_stall.1789909630 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 156102550 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-d9b66b13-8a2b-4c76-a775-b6755348a470 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17899 09630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_in_stall.1789909630 |
| Directory | /workspace/34.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/34.usbdev_in_trans.2387623790 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 199755208 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-933a7887-92fe-4137-b8af-dff16970228a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23876 23790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_in_trans.2387623790 |
| Directory | /workspace/34.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_invalid_sync.521930174 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 3724359267 ps |
| CPU time | 41.68 seconds |
| Started | Aug 16 05:37:49 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 217964 kb |
| Host | smart-040d1bc4-0583-4957-b876-b1ac04333178 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=521930174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.521930174 |
| Directory | /workspace/34.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/34.usbdev_iso_retraction.933222993 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 4112304316 ps |
| CPU time | 30.65 seconds |
| Started | Aug 16 05:37:52 PM PDT 24 |
| Finished | Aug 16 05:38:23 PM PDT 24 |
| Peak memory | 207844 kb |
| Host | smart-e8e39d98-cc1f-4159-9463-69bd29233500 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=933222993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.933222993 |
| Directory | /workspace/34.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/34.usbdev_link_in_err.2168055768 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 196734743 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-d61c4e32-53a2-4fbb-bd04-1db92b033335 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21680 55768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_link_in_err.2168055768 |
| Directory | /workspace/34.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/34.usbdev_link_resume.440588615 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 31491807108 ps |
| CPU time | 51.17 seconds |
| Started | Aug 16 05:37:50 PM PDT 24 |
| Finished | Aug 16 05:38:41 PM PDT 24 |
| Peak memory | 207676 kb |
| Host | smart-6fca523d-83ba-4bb4-bea8-b79b916bc0e1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44058 8615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_link_resume.440588615 |
| Directory | /workspace/34.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/34.usbdev_link_suspend.307213046 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 4378040844 ps |
| CPU time | 6.06 seconds |
| Started | Aug 16 05:37:40 PM PDT 24 |
| Finished | Aug 16 05:37:46 PM PDT 24 |
| Peak memory | 216844 kb |
| Host | smart-de4df1e5-7373-4b6b-90f4-f3c674d77f17 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30721 3046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_link_suspend.307213046 |
| Directory | /workspace/34.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/34.usbdev_low_speed_traffic.213808338 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 3461182190 ps |
| CPU time | 104.12 seconds |
| Started | Aug 16 05:37:42 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-a39e1844-3e03-4ce8-abde-e47c7a2f1c9c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=213808338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.213808338 |
| Directory | /workspace/34.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/34.usbdev_max_inter_pkt_delay.3150232818 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 2166374371 ps |
| CPU time | 66.83 seconds |
| Started | Aug 16 05:37:54 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 217424 kb |
| Host | smart-ae71d412-b382-408a-a5b7-3a07e537536b |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3150232818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.3150232818 |
| Directory | /workspace/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/34.usbdev_max_length_in_transaction.352789159 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 239585948 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-216e25ab-aca6-4c4b-99c7-0fba6cb3f427 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=352789159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.352789159 |
| Directory | /workspace/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_max_length_out_transaction.778280605 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 203650319 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-ae961ad3-5fd0-4c57-bb4a-053a1f5a6961 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=77828 0605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.778280605 |
| Directory | /workspace/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_min_inter_pkt_delay.2407422502 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 3129022877 ps |
| CPU time | 23.96 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:38:02 PM PDT 24 |
| Peak memory | 217636 kb |
| Host | smart-0186d507-262b-4fbc-b536-5eb7b4853ce5 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2407422502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.2407422502 |
| Directory | /workspace/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/34.usbdev_min_length_in_transaction.552578942 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 159678860 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:38:06 PM PDT 24 |
| Finished | Aug 16 05:38:07 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-cf5b4b78-cc38-4298-a101-6161e1c6890b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=552578942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.552578942 |
| Directory | /workspace/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_min_length_out_transaction.685296702 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 151311619 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:04 PM PDT 24 |
| Finished | Aug 16 05:38:05 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-e535341a-dd1b-4667-99ad-5de233e5a3a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=68529 6702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.685296702 |
| Directory | /workspace/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_nak_trans.972551846 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 195570364 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:41 PM PDT 24 |
| Finished | Aug 16 05:37:42 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-a8b06754-4825-456a-8090-c1901ec6a180 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97255 1846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_nak_trans.972551846 |
| Directory | /workspace/34.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_out_iso.1887335033 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 178063539 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:52 PM PDT 24 |
| Finished | Aug 16 05:37:53 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-62c49ce4-966c-4007-84dc-412a3d118b28 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18873 35033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_out_iso.1887335033 |
| Directory | /workspace/34.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/34.usbdev_out_stall.4098091096 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 145711604 ps |
| CPU time | 0.78 seconds |
| Started | Aug 16 05:37:40 PM PDT 24 |
| Finished | Aug 16 05:37:41 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cba7483c-6330-4b8f-8f4d-c249dbee891c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40980 91096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_out_stall.4098091096 |
| Directory | /workspace/34.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/34.usbdev_out_trans_nak.2175526401 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 161544342 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-8391b583-a974-48e3-bbd8-b71a66bc5332 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21755 26401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_out_trans_nak.2175526401 |
| Directory | /workspace/34.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/34.usbdev_pending_in_trans.4197943517 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 163227959 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-61af2ed1-fb9c-45d1-a3c3-5aee615cfe52 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41979 43517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pending_in_trans.4197943517 |
| Directory | /workspace/34.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_phy_config_pinflip.306232689 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 236792337 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-4e48793a-89d6-48cc-b74f-2e3d82f3f427 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=306232689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.306232689 |
| Directory | /workspace/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/34.usbdev_phy_config_usb_ref_disable.3401944402 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 153793341 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-6af70088-528d-4d1b-937e-f389016f340e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34019 44402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.3401944402 |
| Directory | /workspace/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/34.usbdev_phy_pins_sense.2871892952 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 61579710 ps |
| CPU time | 0.76 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-b2ecbda0-5fa7-4442-9146-a88aaf7ec554 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28718 92952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.2871892952 |
| Directory | /workspace/34.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/34.usbdev_pkt_buffer.4161310701 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 17635381923 ps |
| CPU time | 44.45 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:38:18 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-420b1892-434c-4d1b-bf9d-f2dc01522108 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41613 10701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pkt_buffer.4161310701 |
| Directory | /workspace/34.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/34.usbdev_pkt_received.1073733294 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 182636810 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:37:45 PM PDT 24 |
| Finished | Aug 16 05:37:46 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-770c2d2c-91e1-4a4b-b47b-4e6cd3cef541 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10737 33294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pkt_received.1073733294 |
| Directory | /workspace/34.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/34.usbdev_pkt_sent.1864081038 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 176642359 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:38:05 PM PDT 24 |
| Finished | Aug 16 05:38:06 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-3f49692f-4832-4ffb-9fd0-201feecb41ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18640 81038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pkt_sent.1864081038 |
| Directory | /workspace/34.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/34.usbdev_random_length_in_transaction.3119733712 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 181848224 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-fa83d6b5-d41d-4387-bb2d-a8b0ed187037 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31197 33712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_in_transaction.3119733712 |
| Directory | /workspace/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_random_length_out_transaction.2028692413 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 210829728 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:42 PM PDT 24 |
| Finished | Aug 16 05:37:43 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-c6ff6b6a-95f5-40ff-a6cc-cba43a0983f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20286 92413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.2028692413 |
| Directory | /workspace/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/34.usbdev_rx_crc_err.234760777 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 221073513 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:38:01 PM PDT 24 |
| Finished | Aug 16 05:38:02 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-2535690b-c8a5-4a52-a482-2b9cb5fdc4bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23476 0777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_rx_crc_err.234760777 |
| Directory | /workspace/34.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/34.usbdev_rx_full.2070139839 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 248183953 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:37:57 PM PDT 24 |
| Finished | Aug 16 05:37:59 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-2aeb8718-e97b-47bc-a5c7-976f529cddc2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20701 39839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_rx_full.2070139839 |
| Directory | /workspace/34.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/34.usbdev_setup_stage.323375932 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 178754169 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-1ac9bd84-5c93-4ecb-8a6e-65bad5f826a8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32337 5932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_setup_stage.323375932 |
| Directory | /workspace/34.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/34.usbdev_setup_trans_ignored.2437717601 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 167273316 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:04 PM PDT 24 |
| Finished | Aug 16 05:38:05 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-298daa9e-703b-4439-9154-075078bce7ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24377 17601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_setup_trans_ignored.2437717601 |
| Directory | /workspace/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/34.usbdev_smoke.4082340246 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 231504213 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-7d39c7a7-8295-478e-8bd0-8cc860bc2980 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40823 40246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.4082340246 |
| Directory | /workspace/34.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/34.usbdev_spurious_pids_ignored.1524799509 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 2127527798 ps |
| CPU time | 15.82 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:52 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-2d92a268-d10c-4bdb-91be-aafea8095a4e |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1524799509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.1524799509 |
| Directory | /workspace/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/34.usbdev_stall_priority_over_nak.3493755009 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 151686825 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:38:04 PM PDT 24 |
| Finished | Aug 16 05:38:05 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-12560784-7698-4d36-88c4-8106bf1c1bd7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34937 55009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.3493755009 |
| Directory | /workspace/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/34.usbdev_stall_trans.4017111878 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 203134705 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-ae9773dd-ad3b-4eec-867d-cd3d6da5db68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40171 11878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_trans.4017111878 |
| Directory | /workspace/34.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/34.usbdev_stream_len_max.3994340578 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 695555298 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-ae8c46bd-936a-4dc3-b530-218589f4d0e9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39943 40578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.3994340578 |
| Directory | /workspace/34.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/34.usbdev_streaming_out.3721266782 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 4370858633 ps |
| CPU time | 125.88 seconds |
| Started | Aug 16 05:38:05 PM PDT 24 |
| Finished | Aug 16 05:40:11 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-0330d7ca-754e-44cf-bf34-e63b119bfab1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37212 66782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_streaming_out.3721266782 |
| Directory | /workspace/34.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/34.usbdev_timeout_missing_host_handshake.3757457841 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 149344301 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:37:45 PM PDT 24 |
| Finished | Aug 16 05:37:46 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-8dc4e03d-2e7a-475f-acd9-6585e86c5603 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3757457841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_hos t_handshake.3757457841 |
| Directory | /workspace/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/34.usbdev_tx_rx_disruption.530805135 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 451684342 ps |
| CPU time | 1.44 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-aaa0d869-1ac8-48c9-8995-8b8a8388ae3f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=530805135 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 34.usbdev_tx_rx_disruption.530805135 |
| Directory | /workspace/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/340.usbdev_tx_rx_disruption.3419326524 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 483253292 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:40:51 PM PDT 24 |
| Finished | Aug 16 05:40:53 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-2537c340-0269-4c2b-aa7f-3d8d904d6d13 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3419326524 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 340.usbdev_tx_rx_disruption.3419326524 |
| Directory | /workspace/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/341.usbdev_tx_rx_disruption.1730160230 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 539139478 ps |
| CPU time | 1.83 seconds |
| Started | Aug 16 05:40:42 PM PDT 24 |
| Finished | Aug 16 05:40:44 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-1f45e463-fb79-48b0-b057-ac314a63ab8a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1730160230 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 341.usbdev_tx_rx_disruption.1730160230 |
| Directory | /workspace/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/342.usbdev_tx_rx_disruption.2697665894 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 523320474 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:40:27 PM PDT 24 |
| Finished | Aug 16 05:40:29 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-69059329-2ba4-493b-a40a-f441f69febf9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2697665894 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 342.usbdev_tx_rx_disruption.2697665894 |
| Directory | /workspace/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/343.usbdev_tx_rx_disruption.2404238537 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 609563569 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:32 PM PDT 24 |
| Finished | Aug 16 05:40:34 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-3e9b566a-ec64-4382-90d7-2443915cf0c2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2404238537 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 343.usbdev_tx_rx_disruption.2404238537 |
| Directory | /workspace/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/344.usbdev_tx_rx_disruption.2731676439 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 452643414 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:40:42 PM PDT 24 |
| Finished | Aug 16 05:40:43 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-c3b16aeb-3475-45f5-a783-23906502cddf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2731676439 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 344.usbdev_tx_rx_disruption.2731676439 |
| Directory | /workspace/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/345.usbdev_tx_rx_disruption.921934612 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 438602890 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:40:48 PM PDT 24 |
| Finished | Aug 16 05:40:49 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-f56ac347-eb5c-4ee2-9ccf-f761ef02201b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=921934612 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 345.usbdev_tx_rx_disruption.921934612 |
| Directory | /workspace/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/346.usbdev_tx_rx_disruption.1721318887 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 501668201 ps |
| CPU time | 1.49 seconds |
| Started | Aug 16 05:40:26 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-750a44db-5f60-431d-940f-05c211e95619 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1721318887 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 346.usbdev_tx_rx_disruption.1721318887 |
| Directory | /workspace/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/347.usbdev_tx_rx_disruption.3982044723 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 638942064 ps |
| CPU time | 1.84 seconds |
| Started | Aug 16 05:40:51 PM PDT 24 |
| Finished | Aug 16 05:40:53 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-9f0a3f8d-2e9d-4e23-a3a5-66f0ac4d44d0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3982044723 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 347.usbdev_tx_rx_disruption.3982044723 |
| Directory | /workspace/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/348.usbdev_tx_rx_disruption.1435130427 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 533545766 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:34 PM PDT 24 |
| Finished | Aug 16 05:40:36 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-15fa63ab-d171-494d-b204-6c6b1a6e00e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1435130427 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 348.usbdev_tx_rx_disruption.1435130427 |
| Directory | /workspace/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/349.usbdev_tx_rx_disruption.1423262876 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 535649151 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:31 PM PDT 24 |
| Finished | Aug 16 05:40:38 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-bafec638-6d75-4840-a842-74b0fb76e4e7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1423262876 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 349.usbdev_tx_rx_disruption.1423262876 |
| Directory | /workspace/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/35.usbdev_alert_test.1671279675 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 43965036 ps |
| CPU time | 0.66 seconds |
| Started | Aug 16 05:37:39 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-347fa438-296f-4e8f-93b5-127b287ce0d6 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1671279675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.1671279675 |
| Directory | /workspace/35.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/35.usbdev_aon_wake_disconnect.3660293458 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 7449985587 ps |
| CPU time | 9.84 seconds |
| Started | Aug 16 05:37:58 PM PDT 24 |
| Finished | Aug 16 05:38:07 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-f57bf3ee-fea4-4006-b99a-791ff2ff3b20 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3660293458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_a on_wake_disconnect.3660293458 |
| Directory | /workspace/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/35.usbdev_aon_wake_reset.670987084 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 15776941366 ps |
| CPU time | 20.86 seconds |
| Started | Aug 16 05:37:41 PM PDT 24 |
| Finished | Aug 16 05:38:02 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-9b6ee797-80b5-43fa-a7ca-37e957adae08 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=670987084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.670987084 |
| Directory | /workspace/35.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/35.usbdev_aon_wake_resume.1387332031 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 25075372297 ps |
| CPU time | 30.47 seconds |
| Started | Aug 16 05:38:00 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-1f7c42b7-4447-43a3-be4a-d452323e428d |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1387332031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_a on_wake_resume.1387332031 |
| Directory | /workspace/35.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/35.usbdev_av_buffer.3417363436 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 169571714 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-7c8498f7-818d-4472-9c9f-3a4500f3621c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34173 63436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_av_buffer.3417363436 |
| Directory | /workspace/35.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/35.usbdev_bitstuff_err.3891154108 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 154117328 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:38:05 PM PDT 24 |
| Finished | Aug 16 05:38:06 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-857c02b2-f48f-43bb-b977-4181ff3c603c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38911 54108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_bitstuff_err.3891154108 |
| Directory | /workspace/35.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/35.usbdev_data_toggle_clear.72037374 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 225578691 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:37:44 PM PDT 24 |
| Finished | Aug 16 05:37:45 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-9ec8735a-f273-4c7d-bae2-bb4a44a1bec2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72037 374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_clear.72037374 |
| Directory | /workspace/35.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/35.usbdev_data_toggle_restore.1870952576 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 451628656 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-1f83e6af-2e6d-4e44-b96d-305a76f41389 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1870952576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.1870952576 |
| Directory | /workspace/35.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/35.usbdev_device_timeout.2913792108 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 3540053424 ps |
| CPU time | 24.25 seconds |
| Started | Aug 16 05:37:55 PM PDT 24 |
| Finished | Aug 16 05:38:20 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-4485a42f-4db8-46fd-bd1e-b77530bfc0c2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2913792108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.2913792108 |
| Directory | /workspace/35.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/35.usbdev_disable_endpoint.1358657118 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 789808279 ps |
| CPU time | 1.85 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-aa149ecd-659b-453a-9f52-6a3c58b0f4b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13586 57118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_disable_endpoint.1358657118 |
| Directory | /workspace/35.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/35.usbdev_disconnected.468178513 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 145318683 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:33 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-5d059a45-22fc-4783-b0fc-aada8184256a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46817 8513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_disconnected.468178513 |
| Directory | /workspace/35.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/35.usbdev_enable.951242355 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 100154481 ps |
| CPU time | 0.75 seconds |
| Started | Aug 16 05:38:00 PM PDT 24 |
| Finished | Aug 16 05:38:01 PM PDT 24 |
| Peak memory | 206956 kb |
| Host | smart-a9567a7a-64ca-4214-b2c2-6e1b1451ea90 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95124 2355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_enable.951242355 |
| Directory | /workspace/35.usbdev_enable/latest |
| Test location | /workspace/coverage/default/35.usbdev_endpoint_access.1018091885 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 817328408 ps |
| CPU time | 2.2 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-e029275e-7d8a-4f44-93aa-66041e6afde3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10180 91885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.1018091885 |
| Directory | /workspace/35.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/35.usbdev_fifo_rst.2172612754 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 239679631 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:37:42 PM PDT 24 |
| Finished | Aug 16 05:37:44 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-785a57df-31f5-4d64-86b4-04282f052f9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21726 12754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_fifo_rst.2172612754 |
| Directory | /workspace/35.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/35.usbdev_in_iso.1178006895 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 233655372 ps |
| CPU time | 1.16 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-b119a7ea-ba07-4b5b-a76d-4fa87612d993 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1178006895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.1178006895 |
| Directory | /workspace/35.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/35.usbdev_in_stall.900381113 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 196922425 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:04 PM PDT 24 |
| Finished | Aug 16 05:38:05 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-b60bb0e7-7ad3-4346-a59f-b552f280fdf5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90038 1113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_in_stall.900381113 |
| Directory | /workspace/35.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/35.usbdev_in_trans.1840358896 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 214586243 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:37:55 PM PDT 24 |
| Finished | Aug 16 05:37:56 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-7ad24a93-5504-4c43-b2cd-577e37dea914 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18403 58896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_in_trans.1840358896 |
| Directory | /workspace/35.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_invalid_sync.3967992170 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 2579425672 ps |
| CPU time | 18.72 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:55 PM PDT 24 |
| Peak memory | 218296 kb |
| Host | smart-42817622-0fae-42d1-9c75-cce41001234c |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3967992170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.3967992170 |
| Directory | /workspace/35.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/35.usbdev_iso_retraction.2744634996 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 5498335588 ps |
| CPU time | 64.73 seconds |
| Started | Aug 16 05:38:00 PM PDT 24 |
| Finished | Aug 16 05:39:05 PM PDT 24 |
| Peak memory | 207276 kb |
| Host | smart-ba56c446-efb1-46a2-b721-99aed5a6032a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2744634996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.2744634996 |
| Directory | /workspace/35.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/35.usbdev_link_in_err.2323177770 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 200682515 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:37:31 PM PDT 24 |
| Finished | Aug 16 05:37:32 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-519548f1-48cd-4565-b0a3-e8564b62387b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23231 77770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_link_in_err.2323177770 |
| Directory | /workspace/35.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/35.usbdev_link_resume.1359179635 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 31130567833 ps |
| CPU time | 49.47 seconds |
| Started | Aug 16 05:38:18 PM PDT 24 |
| Finished | Aug 16 05:39:08 PM PDT 24 |
| Peak memory | 207836 kb |
| Host | smart-eb781198-7226-46fe-9066-2187afca9d56 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13591 79635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_link_resume.1359179635 |
| Directory | /workspace/35.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/35.usbdev_link_suspend.3800241138 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 3716643706 ps |
| CPU time | 5.51 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 216788 kb |
| Host | smart-76c850a7-59c8-44fc-be47-2c466d3ed9b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38002 41138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_link_suspend.3800241138 |
| Directory | /workspace/35.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/35.usbdev_low_speed_traffic.428928242 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 4131571017 ps |
| CPU time | 33 seconds |
| Started | Aug 16 05:38:01 PM PDT 24 |
| Finished | Aug 16 05:38:35 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-2fc7e29e-5615-4328-8b78-3fa45dd68f80 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=428928242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.428928242 |
| Directory | /workspace/35.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/35.usbdev_max_inter_pkt_delay.3933309498 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 3638712481 ps |
| CPU time | 27.35 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:38:06 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-ffc1335b-7296-4cbc-9f8b-ab1062aa6168 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3933309498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.3933309498 |
| Directory | /workspace/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/35.usbdev_max_length_in_transaction.517497086 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 265568139 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:37:55 PM PDT 24 |
| Finished | Aug 16 05:37:56 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-67bbd0d7-ecea-442f-be6c-a50bcad68645 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=517497086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.517497086 |
| Directory | /workspace/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_max_length_out_transaction.2445019087 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 200420154 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:38:10 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-30c54638-08e3-4278-a63c-e80ca24a345a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24450 19087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.2445019087 |
| Directory | /workspace/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_min_inter_pkt_delay.3001434920 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 3845544166 ps |
| CPU time | 39.81 seconds |
| Started | Aug 16 05:37:59 PM PDT 24 |
| Finished | Aug 16 05:38:39 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-92a9c401-13d2-49db-a0c8-3fa5584554ff |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3001434920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.3001434920 |
| Directory | /workspace/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/35.usbdev_min_length_in_transaction.4008616091 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 182407869 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:41 PM PDT 24 |
| Finished | Aug 16 05:37:42 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-6fe9d552-b9ee-4982-b90c-022034f51c60 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4008616091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.4008616091 |
| Directory | /workspace/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_min_length_out_transaction.2290908476 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 142061590 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:37:32 PM PDT 24 |
| Finished | Aug 16 05:37:34 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-40b7935f-aa5f-4867-8ce9-e31773904a32 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22909 08476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.2290908476 |
| Directory | /workspace/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_nak_trans.4256399627 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 219288305 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:38:02 PM PDT 24 |
| Finished | Aug 16 05:38:03 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f56ecbb1-cfac-47e8-8227-5149a6409396 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42563 99627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_nak_trans.4256399627 |
| Directory | /workspace/35.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_out_iso.123460760 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 167386785 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-02042270-8978-41d8-bde6-f620c19f5f6a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12346 0760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_out_iso.123460760 |
| Directory | /workspace/35.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/35.usbdev_out_stall.4152391972 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 171664806 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:37:39 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-f4b4fec3-b263-4957-8c5c-b4256f8dac76 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41523 91972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_out_stall.4152391972 |
| Directory | /workspace/35.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/35.usbdev_out_trans_nak.1407418701 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 242859509 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-5ab45030-5cfd-4589-b4c9-9ead6268edef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14074 18701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_out_trans_nak.1407418701 |
| Directory | /workspace/35.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/35.usbdev_pending_in_trans.995524177 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 185624348 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:37:39 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-14fa672f-8f49-4cda-8cc0-b32a99f761bd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99552 4177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pending_in_trans.995524177 |
| Directory | /workspace/35.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_phy_config_pinflip.375915004 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 249499257 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:38:02 PM PDT 24 |
| Finished | Aug 16 05:38:03 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-4c19e258-eb1c-4f47-a58e-2e11ee1cbfea |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=375915004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.375915004 |
| Directory | /workspace/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/35.usbdev_phy_config_usb_ref_disable.3139154609 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 150804309 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-eeda9c83-5bbe-41d7-97ec-004283bd1583 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31391 54609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.3139154609 |
| Directory | /workspace/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/35.usbdev_phy_pins_sense.3330182459 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 65567702 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:38:04 PM PDT 24 |
| Finished | Aug 16 05:38:04 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-9ff2b0ea-43f0-4ac8-8149-0f50483b5a9f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33301 82459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.3330182459 |
| Directory | /workspace/35.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/35.usbdev_pkt_buffer.847026249 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 8233575856 ps |
| CPU time | 19.36 seconds |
| Started | Aug 16 05:37:33 PM PDT 24 |
| Finished | Aug 16 05:37:53 PM PDT 24 |
| Peak memory | 216016 kb |
| Host | smart-6dc2fa54-e898-4df3-9586-b9c237dd6b57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84702 6249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pkt_buffer.847026249 |
| Directory | /workspace/35.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/35.usbdev_pkt_received.2283211816 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 177644883 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-741bb506-2d0b-4015-b2b9-4ff60ce78057 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22832 11816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pkt_received.2283211816 |
| Directory | /workspace/35.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/35.usbdev_pkt_sent.1999778063 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 184924343 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-34f9af0e-f649-4ff4-86e5-c9f75dedad65 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19997 78063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pkt_sent.1999778063 |
| Directory | /workspace/35.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/35.usbdev_random_length_in_transaction.164863436 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 189786601 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-d94b4153-bf05-4826-83ba-36947e6cb969 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16486 3436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_in_transaction.164863436 |
| Directory | /workspace/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_random_length_out_transaction.2777119659 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 173021920 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-e78e728b-89fa-40a0-bcda-531b8aba1763 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27771 19659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.2777119659 |
| Directory | /workspace/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/35.usbdev_rx_crc_err.3900700533 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 175642571 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-9012d9f5-c7a9-4732-8b4c-994511840bcf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39007 00533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_rx_crc_err.3900700533 |
| Directory | /workspace/35.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/35.usbdev_rx_full.1435870314 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 394059675 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:38:04 PM PDT 24 |
| Finished | Aug 16 05:38:06 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-5f830637-64d0-455e-8409-bfc911f187c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14358 70314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_rx_full.1435870314 |
| Directory | /workspace/35.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/35.usbdev_setup_stage.2620551623 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 170967426 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:36 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-20fa68e8-79d0-4a37-8527-15814b07ddc7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26205 51623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_setup_stage.2620551623 |
| Directory | /workspace/35.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/35.usbdev_setup_trans_ignored.839455125 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 168406841 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:02 PM PDT 24 |
| Finished | Aug 16 05:38:03 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-ae7f3d64-9fa0-42be-9de1-e2a714826590 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83945 5125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_setup_trans_ignored.839455125 |
| Directory | /workspace/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/35.usbdev_smoke.3834239564 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 216743600 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:38:06 PM PDT 24 |
| Finished | Aug 16 05:38:07 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-075b6ef0-3677-4b7c-a6c9-7d36b60336ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38342 39564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.3834239564 |
| Directory | /workspace/35.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/35.usbdev_spurious_pids_ignored.306161693 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 2405801725 ps |
| CPU time | 69 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:38:47 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-eb3df255-c93c-463c-bc1a-ca6157868882 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=306161693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.306161693 |
| Directory | /workspace/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/35.usbdev_stall_priority_over_nak.3301357291 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 161484973 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-7195f3c4-a879-4a1d-8634-6de288590262 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33013 57291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.3301357291 |
| Directory | /workspace/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/35.usbdev_stall_trans.450762366 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 228643209 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-cfb4fcf0-8fa4-471a-bfe7-9f4f59bcf436 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45076 2366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_trans.450762366 |
| Directory | /workspace/35.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/35.usbdev_stream_len_max.1585770045 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 250775331 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:37:40 PM PDT 24 |
| Finished | Aug 16 05:37:41 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-b361ac9e-a3ff-497b-b899-207bd91fd15a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15857 70045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.1585770045 |
| Directory | /workspace/35.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/35.usbdev_streaming_out.3868255067 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 1537051323 ps |
| CPU time | 42.23 seconds |
| Started | Aug 16 05:37:58 PM PDT 24 |
| Finished | Aug 16 05:38:41 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-fab84302-acb4-460d-b690-a29ed3382917 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38682 55067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_streaming_out.3868255067 |
| Directory | /workspace/35.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/35.usbdev_timeout_missing_host_handshake.2801173624 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 632682268 ps |
| CPU time | 5.02 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:41 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-ddb5fdba-044c-4c24-907a-4b01a51cabd1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2801173624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_hos t_handshake.2801173624 |
| Directory | /workspace/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/35.usbdev_tx_rx_disruption.960024118 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 468068440 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-25cfa583-09f0-4bcc-afc7-fcdefe8426d5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=960024118 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 35.usbdev_tx_rx_disruption.960024118 |
| Directory | /workspace/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/350.usbdev_tx_rx_disruption.1126060189 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 458372868 ps |
| CPU time | 1.4 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-ec0fd27a-210b-4986-9732-898a4c840c4b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1126060189 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 350.usbdev_tx_rx_disruption.1126060189 |
| Directory | /workspace/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/351.usbdev_tx_rx_disruption.2281857894 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 629437620 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:40:22 PM PDT 24 |
| Finished | Aug 16 05:40:24 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-68ea4ca4-997c-4090-af18-33767559c2a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2281857894 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 351.usbdev_tx_rx_disruption.2281857894 |
| Directory | /workspace/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/352.usbdev_tx_rx_disruption.4169808495 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 530374354 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-5006cca5-1231-4691-ab9e-fade191f40bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4169808495 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 352.usbdev_tx_rx_disruption.4169808495 |
| Directory | /workspace/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/353.usbdev_tx_rx_disruption.2011924934 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 553605161 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:40:58 PM PDT 24 |
| Finished | Aug 16 05:41:00 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-8ee163e6-76b1-4eb6-970a-46c72c132cd2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2011924934 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 353.usbdev_tx_rx_disruption.2011924934 |
| Directory | /workspace/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/354.usbdev_tx_rx_disruption.2736267794 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 513622631 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:40:54 PM PDT 24 |
| Finished | Aug 16 05:40:56 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-fe25abdd-a686-4d2b-9652-760ae34ee6fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2736267794 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 354.usbdev_tx_rx_disruption.2736267794 |
| Directory | /workspace/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/355.usbdev_tx_rx_disruption.3179440804 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 532274823 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-0cfe094f-5b0b-42cb-a019-f13752dfcee2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3179440804 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 355.usbdev_tx_rx_disruption.3179440804 |
| Directory | /workspace/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/356.usbdev_tx_rx_disruption.1127880489 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 660996303 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:40:46 PM PDT 24 |
| Finished | Aug 16 05:40:48 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-e21db7a4-db72-4ab0-bb81-94796b38883c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1127880489 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 356.usbdev_tx_rx_disruption.1127880489 |
| Directory | /workspace/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/357.usbdev_tx_rx_disruption.295555375 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 493144774 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:40:56 PM PDT 24 |
| Finished | Aug 16 05:40:57 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-f9711b11-69d8-4b77-abee-52f1c95b88a7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=295555375 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 357.usbdev_tx_rx_disruption.295555375 |
| Directory | /workspace/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/358.usbdev_tx_rx_disruption.4251050422 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 541165408 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:16 PM PDT 24 |
| Finished | Aug 16 05:40:18 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-8ffc969f-0f06-4a59-a943-e35d9f0657c8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4251050422 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 358.usbdev_tx_rx_disruption.4251050422 |
| Directory | /workspace/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/359.usbdev_tx_rx_disruption.3739306962 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 494083665 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:12 PM PDT 24 |
| Finished | Aug 16 05:40:14 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-fc3f32f6-eaea-4d67-82b2-b8a8cf2e21a8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3739306962 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 359.usbdev_tx_rx_disruption.3739306962 |
| Directory | /workspace/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/36.usbdev_alert_test.3050949757 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 51624643 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:38:15 PM PDT 24 |
| Finished | Aug 16 05:38:16 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-4b1faf7d-1528-418b-8aaf-cc5b95ba0c06 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3050949757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.3050949757 |
| Directory | /workspace/36.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/36.usbdev_aon_wake_reset.814301453 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 16173227558 ps |
| CPU time | 19.9 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:55 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-6c7638d9-698d-4bc6-91a6-d7b4f1c6bfdc |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=814301453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.814301453 |
| Directory | /workspace/36.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/36.usbdev_aon_wake_resume.1342642820 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 30190488505 ps |
| CPU time | 38.26 seconds |
| Started | Aug 16 05:37:40 PM PDT 24 |
| Finished | Aug 16 05:38:19 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-f4f3afc9-fa38-4f7a-9487-3bde909490fe |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1342642820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_a on_wake_resume.1342642820 |
| Directory | /workspace/36.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/36.usbdev_av_buffer.3232963641 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 166560973 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:57 PM PDT 24 |
| Finished | Aug 16 05:37:58 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-b94610c6-3b59-4c85-a30b-4a1cb4298b35 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32329 63641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_av_buffer.3232963641 |
| Directory | /workspace/36.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/36.usbdev_bitstuff_err.2958983168 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 156956585 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-a381def7-361e-412b-96e1-ee1c2daf671f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29589 83168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_bitstuff_err.2958983168 |
| Directory | /workspace/36.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/36.usbdev_data_toggle_clear.3625208348 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 223801791 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:37:49 PM PDT 24 |
| Finished | Aug 16 05:37:50 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-9fe197b1-5a59-41d9-8e3d-6f7cf26be8b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36252 08348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_clear.3625208348 |
| Directory | /workspace/36.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/36.usbdev_data_toggle_restore.3767696262 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 1035852591 ps |
| CPU time | 2.85 seconds |
| Started | Aug 16 05:37:45 PM PDT 24 |
| Finished | Aug 16 05:37:48 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-cba95832-7909-447d-ae7f-06a194caefb9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3767696262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.3767696262 |
| Directory | /workspace/36.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/36.usbdev_device_address.3114073948 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 30758763452 ps |
| CPU time | 48.52 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-11f88c18-fc71-4dd3-bb13-24b90b5c6110 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31140 73948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.3114073948 |
| Directory | /workspace/36.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/36.usbdev_device_timeout.3656871039 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 2217216405 ps |
| CPU time | 14.19 seconds |
| Started | Aug 16 05:38:13 PM PDT 24 |
| Finished | Aug 16 05:38:27 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-24fe2b2d-e49c-431c-8211-50a02dae1c46 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3656871039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.3656871039 |
| Directory | /workspace/36.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/36.usbdev_disable_endpoint.3050725139 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 709969579 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:38:14 PM PDT 24 |
| Finished | Aug 16 05:38:16 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-8117d61d-cb5b-4c5a-ab72-c31f4906744a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30507 25139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_disable_endpoint.3050725139 |
| Directory | /workspace/36.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/36.usbdev_disconnected.3735005397 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 141353145 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:38:20 PM PDT 24 |
| Finished | Aug 16 05:38:21 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-58229203-2898-4ee2-99a1-f9cf5d794fc9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37350 05397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_disconnected.3735005397 |
| Directory | /workspace/36.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/36.usbdev_enable.2208719958 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 51912946 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:38:02 PM PDT 24 |
| Finished | Aug 16 05:38:03 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-b521b1f5-26b5-4e93-bafa-c4231eeef176 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22087 19958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_enable.2208719958 |
| Directory | /workspace/36.usbdev_enable/latest |
| Test location | /workspace/coverage/default/36.usbdev_endpoint_access.1602336078 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 829722877 ps |
| CPU time | 2.28 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-bf7ffa23-eb0e-44fd-aa51-c523d09969e8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16023 36078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.1602336078 |
| Directory | /workspace/36.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/36.usbdev_endpoint_types.3771620500 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 360045636 ps |
| CPU time | 1.2 seconds |
| Started | Aug 16 05:38:02 PM PDT 24 |
| Finished | Aug 16 05:38:03 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-9013287f-ed56-4b9f-9761-a82006d46b07 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3771620500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.3771620500 |
| Directory | /workspace/36.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/36.usbdev_fifo_rst.476947422 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 219208461 ps |
| CPU time | 2.21 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:38:11 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-671dc075-a014-43a4-ad2e-ddff42ea1dce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47694 7422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_fifo_rst.476947422 |
| Directory | /workspace/36.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/36.usbdev_in_iso.2291379018 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 179898595 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-b0f1f6ec-80d6-4faa-9d2d-36fe4b98fbe7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2291379018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.2291379018 |
| Directory | /workspace/36.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/36.usbdev_in_stall.3747266476 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 137895257 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:37:49 PM PDT 24 |
| Finished | Aug 16 05:37:50 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-26a7f8c0-f9b4-4d8d-b47b-1f7849d381c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37472 66476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_in_stall.3747266476 |
| Directory | /workspace/36.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/36.usbdev_in_trans.3919506511 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 227087751 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:38 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-5c7a7be7-cf6c-40a8-aa92-bd402d91f39a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39195 06511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_in_trans.3919506511 |
| Directory | /workspace/36.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_invalid_sync.3329478894 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 4774104134 ps |
| CPU time | 142.57 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:40:31 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-13cc9a82-8e13-4924-98bf-7ae9dad79423 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3329478894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.3329478894 |
| Directory | /workspace/36.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/36.usbdev_iso_retraction.2099814824 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 4717748669 ps |
| CPU time | 33.7 seconds |
| Started | Aug 16 05:38:06 PM PDT 24 |
| Finished | Aug 16 05:38:40 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-469b3f9d-9dd2-4637-a3e0-1fc9433eccc4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2099814824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.2099814824 |
| Directory | /workspace/36.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/36.usbdev_link_in_err.617874085 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 252276251 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:38:03 PM PDT 24 |
| Finished | Aug 16 05:38:05 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-940f3a01-96ed-4ec9-a478-e6a7e5430122 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61787 4085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_link_in_err.617874085 |
| Directory | /workspace/36.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/36.usbdev_link_resume.3809913117 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 23916912129 ps |
| CPU time | 36.59 seconds |
| Started | Aug 16 05:37:36 PM PDT 24 |
| Finished | Aug 16 05:38:15 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-1f9842dd-e46e-4a6f-adfd-356745c518e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38099 13117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_link_resume.3809913117 |
| Directory | /workspace/36.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/36.usbdev_link_suspend.2118469572 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 3506758755 ps |
| CPU time | 4.97 seconds |
| Started | Aug 16 05:38:02 PM PDT 24 |
| Finished | Aug 16 05:38:07 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-ace344c3-4799-4ec9-b667-5b493e697278 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21184 69572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_link_suspend.2118469572 |
| Directory | /workspace/36.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/36.usbdev_low_speed_traffic.3567654542 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 3302218552 ps |
| CPU time | 100 seconds |
| Started | Aug 16 05:37:49 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 216004 kb |
| Host | smart-639fc376-9acd-4116-a195-2635babb9274 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3567654542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.3567654542 |
| Directory | /workspace/36.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/36.usbdev_max_inter_pkt_delay.786306523 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 3768744313 ps |
| CPU time | 109.58 seconds |
| Started | Aug 16 05:37:41 PM PDT 24 |
| Finished | Aug 16 05:39:32 PM PDT 24 |
| Peak memory | 217536 kb |
| Host | smart-b7fa093e-7cd2-4c3a-bd8d-9c062b174ecd |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=786306523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.786306523 |
| Directory | /workspace/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/36.usbdev_max_length_in_transaction.1516349964 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 258764459 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:37:56 PM PDT 24 |
| Finished | Aug 16 05:37:57 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-f4c980bb-a1b6-4c17-adff-9936af2bd148 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1516349964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.1516349964 |
| Directory | /workspace/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_max_length_out_transaction.331999781 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 198198215 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:38:04 PM PDT 24 |
| Finished | Aug 16 05:38:06 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-28e3dd78-490f-457a-bbab-cf433327568a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33199 9781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.331999781 |
| Directory | /workspace/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_min_inter_pkt_delay.216399724 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 3043679266 ps |
| CPU time | 24.13 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:35 PM PDT 24 |
| Peak memory | 217680 kb |
| Host | smart-3043290f-8621-4f88-b163-9207962f1844 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=216399724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.216399724 |
| Directory | /workspace/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/36.usbdev_min_length_in_transaction.3334545816 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 210773858 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:37:42 PM PDT 24 |
| Finished | Aug 16 05:37:43 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-18d44543-a090-44a4-8ac1-02ecc9a51e79 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3334545816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.3334545816 |
| Directory | /workspace/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_min_length_out_transaction.2362984183 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 159078168 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:37:50 PM PDT 24 |
| Finished | Aug 16 05:37:51 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-be6defd4-0909-4d11-94cb-a61c7ac773c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23629 84183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.2362984183 |
| Directory | /workspace/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_nak_trans.248219963 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 230870328 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-852f6e14-3843-4fd8-80e0-743f4bafeef9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24821 9963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_nak_trans.248219963 |
| Directory | /workspace/36.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_out_iso.1389470660 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 187402807 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:38:03 PM PDT 24 |
| Finished | Aug 16 05:38:04 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a1ff426a-f6a5-4986-8fc1-a7e4c076f096 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13894 70660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_out_iso.1389470660 |
| Directory | /workspace/36.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/36.usbdev_out_stall.470466058 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 183239414 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:34 PM PDT 24 |
| Finished | Aug 16 05:37:35 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-40109210-f848-4fd9-9f78-b02895072ea3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47046 6058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_out_stall.470466058 |
| Directory | /workspace/36.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/36.usbdev_out_trans_nak.1264127591 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 167023404 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:37:42 PM PDT 24 |
| Finished | Aug 16 05:37:43 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-e16c293d-47c3-44d4-8f3a-f1aef1b8dae3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12641 27591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_out_trans_nak.1264127591 |
| Directory | /workspace/36.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/36.usbdev_pending_in_trans.2549174428 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 237305157 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:37:35 PM PDT 24 |
| Finished | Aug 16 05:37:37 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-86af7e4f-a500-46a7-95b2-49f4e57d7e38 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25491 74428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pending_in_trans.2549174428 |
| Directory | /workspace/36.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_phy_config_pinflip.1689492237 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 208972505 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:38:12 PM PDT 24 |
| Finished | Aug 16 05:38:13 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-0e8408df-5661-49a9-bc49-1c7bff05e532 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1689492237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.1689492237 |
| Directory | /workspace/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/36.usbdev_phy_config_usb_ref_disable.844503969 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 144456060 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:37:39 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-7d5d994d-c241-4634-8786-6a37da6453d3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84450 3969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.844503969 |
| Directory | /workspace/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/36.usbdev_phy_pins_sense.4176299767 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 48278925 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:40 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-040351f0-3bc8-47d1-b696-6d498f00bc15 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41762 99767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.4176299767 |
| Directory | /workspace/36.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/36.usbdev_pkt_received.3507078769 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 182300215 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:38:04 PM PDT 24 |
| Finished | Aug 16 05:38:06 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-552ce4f9-99c2-43f8-bcef-0ad4492325db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35070 78769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pkt_received.3507078769 |
| Directory | /workspace/36.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/36.usbdev_pkt_sent.502813950 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 264114424 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:37:40 PM PDT 24 |
| Finished | Aug 16 05:37:41 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-7645aac3-0be6-4ce5-a9ef-4a39bd4cc779 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50281 3950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pkt_sent.502813950 |
| Directory | /workspace/36.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/36.usbdev_random_length_in_transaction.1932032581 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 217289390 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:37:42 PM PDT 24 |
| Finished | Aug 16 05:37:44 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-07465843-3301-41a9-b5b3-90b665a1e7d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19320 32581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_in_transaction.1932032581 |
| Directory | /workspace/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_random_length_out_transaction.3600848856 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 176407209 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-37aff9ca-885c-43df-a87f-e1e7730e7ddd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36008 48856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.3600848856 |
| Directory | /workspace/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/36.usbdev_rx_crc_err.3493199036 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 175462382 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:16 PM PDT 24 |
| Finished | Aug 16 05:38:17 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-a9e13c3e-92f6-4000-9c88-abcd97e4af1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34931 99036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_rx_crc_err.3493199036 |
| Directory | /workspace/36.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/36.usbdev_rx_full.14599470 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 251393468 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-6f89213b-6420-4f0f-9c7c-de6e0065cd9a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14599 470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_rx_full.14599470 |
| Directory | /workspace/36.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/36.usbdev_setup_stage.3461633270 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 180583536 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:38:13 PM PDT 24 |
| Finished | Aug 16 05:38:14 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-802fc201-2714-4708-8f20-69b65704a5a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34616 33270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_setup_stage.3461633270 |
| Directory | /workspace/36.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/36.usbdev_setup_trans_ignored.3836726796 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 158216755 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:37:37 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-8d466682-5940-4d2b-8a88-20269c173967 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38367 26796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_setup_trans_ignored.3836726796 |
| Directory | /workspace/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/36.usbdev_smoke.2258958223 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 212559582 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:37:49 PM PDT 24 |
| Finished | Aug 16 05:37:51 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-25e84ff4-2c2b-41f0-b54a-8b4bb5e2c43f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22589 58223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.2258958223 |
| Directory | /workspace/36.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/36.usbdev_spurious_pids_ignored.1790681485 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 1971661656 ps |
| CPU time | 54.49 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:39:04 PM PDT 24 |
| Peak memory | 224016 kb |
| Host | smart-eb722a75-1575-4cc7-9a22-e61be90006ff |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1790681485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.1790681485 |
| Directory | /workspace/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/36.usbdev_stall_priority_over_nak.2690994016 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 173445907 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:39 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-6cc54dfc-e28f-4f2e-82df-adcb2674fa60 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26909 94016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.2690994016 |
| Directory | /workspace/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/36.usbdev_stall_trans.3395099139 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 156833721 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:02 PM PDT 24 |
| Finished | Aug 16 05:38:03 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-667b7d9d-8d7e-411f-9cf4-812554563ad6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33950 99139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_trans.3395099139 |
| Directory | /workspace/36.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/36.usbdev_stream_len_max.890524430 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 1362523671 ps |
| CPU time | 3.52 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:42 PM PDT 24 |
| Peak memory | 207644 kb |
| Host | smart-a947b538-afe9-4ad7-a661-6ddccb4746ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89052 4430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.890524430 |
| Directory | /workspace/36.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/36.usbdev_streaming_out.45593699 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 2250681152 ps |
| CPU time | 17.58 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:56 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-015fd9bc-0c8f-4e9e-8054-4fbcb12e3d0f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45593 699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_streaming_out.45593699 |
| Directory | /workspace/36.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/36.usbdev_timeout_missing_host_handshake.1407445335 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 630359282 ps |
| CPU time | 12.06 seconds |
| Started | Aug 16 05:37:38 PM PDT 24 |
| Finished | Aug 16 05:37:51 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-0b985211-115f-4460-8863-544c381a1883 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1407445335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_hos t_handshake.1407445335 |
| Directory | /workspace/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/36.usbdev_tx_rx_disruption.3594333593 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 480186625 ps |
| CPU time | 1.44 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-defcf3a8-07e8-4502-9d20-70f85accd66a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3594333593 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_tx_rx_disruption.3594333593 |
| Directory | /workspace/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/360.usbdev_tx_rx_disruption.3783532416 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 572180371 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-93d26dcf-d4e2-4d94-9248-c14416009e99 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3783532416 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 360.usbdev_tx_rx_disruption.3783532416 |
| Directory | /workspace/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/361.usbdev_tx_rx_disruption.3004617162 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 544378293 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:59 PM PDT 24 |
| Finished | Aug 16 05:41:01 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-99ca56cb-46b6-4ee2-b264-6545f5e9713e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3004617162 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 361.usbdev_tx_rx_disruption.3004617162 |
| Directory | /workspace/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/362.usbdev_tx_rx_disruption.2684705717 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 471717117 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:46 PM PDT 24 |
| Finished | Aug 16 05:40:47 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-2728a81c-bea9-4da6-b97a-19d97ac54bfb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2684705717 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 362.usbdev_tx_rx_disruption.2684705717 |
| Directory | /workspace/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/363.usbdev_tx_rx_disruption.1092692670 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 501900376 ps |
| CPU time | 1.49 seconds |
| Started | Aug 16 05:40:22 PM PDT 24 |
| Finished | Aug 16 05:40:29 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-44ea4fda-8a45-4cc8-b341-5485a8a3c7f7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1092692670 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 363.usbdev_tx_rx_disruption.1092692670 |
| Directory | /workspace/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/364.usbdev_tx_rx_disruption.2603557428 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 462773912 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:40:34 PM PDT 24 |
| Finished | Aug 16 05:40:35 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2775ff67-8bdf-4a85-bd09-e2b85f53f31c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2603557428 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 364.usbdev_tx_rx_disruption.2603557428 |
| Directory | /workspace/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/365.usbdev_tx_rx_disruption.3281148402 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 433165220 ps |
| CPU time | 1.37 seconds |
| Started | Aug 16 05:40:56 PM PDT 24 |
| Finished | Aug 16 05:40:57 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-c8f2b314-abd5-4a0f-b0a0-58019e014e52 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3281148402 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 365.usbdev_tx_rx_disruption.3281148402 |
| Directory | /workspace/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/366.usbdev_tx_rx_disruption.3552506967 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 572029848 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:36 PM PDT 24 |
| Finished | Aug 16 05:40:38 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-fe9fe09a-9df3-41c4-8f26-d62911b50d6b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3552506967 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 366.usbdev_tx_rx_disruption.3552506967 |
| Directory | /workspace/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/367.usbdev_tx_rx_disruption.981647453 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 657527329 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:40:41 PM PDT 24 |
| Finished | Aug 16 05:40:43 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-56c2869b-b464-49d4-af12-2e48f9fbee1a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=981647453 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 367.usbdev_tx_rx_disruption.981647453 |
| Directory | /workspace/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/368.usbdev_tx_rx_disruption.2428930375 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 680377938 ps |
| CPU time | 1.85 seconds |
| Started | Aug 16 05:40:52 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 206464 kb |
| Host | smart-b76dcfe7-35d9-4656-adcb-4580e15a4640 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2428930375 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 368.usbdev_tx_rx_disruption.2428930375 |
| Directory | /workspace/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/369.usbdev_tx_rx_disruption.1250791067 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 457488095 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:40:39 PM PDT 24 |
| Finished | Aug 16 05:40:40 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-57f5dd5e-6122-4223-80fa-288b6213d1b3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1250791067 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 369.usbdev_tx_rx_disruption.1250791067 |
| Directory | /workspace/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/37.usbdev_alert_test.450381939 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 40322981 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:38:24 PM PDT 24 |
| Finished | Aug 16 05:38:25 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-f64dd0d7-e448-466a-9402-096650042119 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=450381939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.450381939 |
| Directory | /workspace/37.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/37.usbdev_aon_wake_disconnect.2505156340 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 5278601866 ps |
| CPU time | 7.26 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:18 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-da8d4738-200c-4b80-8286-d0268963e20c |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2505156340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_a on_wake_disconnect.2505156340 |
| Directory | /workspace/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/37.usbdev_aon_wake_reset.3247856619 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 20781176270 ps |
| CPU time | 25.99 seconds |
| Started | Aug 16 05:38:06 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-179847ec-b32f-4790-beb1-39bc7322fb63 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3247856619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.3247856619 |
| Directory | /workspace/37.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/37.usbdev_aon_wake_resume.1682933234 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 28568316025 ps |
| CPU time | 42.8 seconds |
| Started | Aug 16 05:38:15 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-0ed9b375-3788-4f47-99d7-d051660b9c39 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1682933234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_a on_wake_resume.1682933234 |
| Directory | /workspace/37.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/37.usbdev_av_buffer.1539714914 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 223280356 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:37:56 PM PDT 24 |
| Finished | Aug 16 05:37:57 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6f53da44-9a4c-4c46-8205-088d25bc3400 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15397 14914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_av_buffer.1539714914 |
| Directory | /workspace/37.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/37.usbdev_bitstuff_err.3632420859 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 146839396 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:08 PM PDT 24 |
| Finished | Aug 16 05:38:09 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-d2dd3165-5756-4d67-abd3-b34fcf3c1260 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36324 20859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_bitstuff_err.3632420859 |
| Directory | /workspace/37.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/37.usbdev_data_toggle_clear.1305204871 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 418850991 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:38:08 PM PDT 24 |
| Finished | Aug 16 05:38:10 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-5c6430fa-8708-49ee-bc01-01aaf3d0b783 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13052 04871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_clear.1305204871 |
| Directory | /workspace/37.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/37.usbdev_data_toggle_restore.1273039308 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 419101139 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:38:02 PM PDT 24 |
| Finished | Aug 16 05:38:03 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-00af2a12-082f-42e5-8477-2c03f12e2e19 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1273039308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.1273039308 |
| Directory | /workspace/37.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/37.usbdev_device_address.3478505300 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 39032420211 ps |
| CPU time | 65.25 seconds |
| Started | Aug 16 05:38:10 PM PDT 24 |
| Finished | Aug 16 05:39:15 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-30d39a02-7d6f-43f7-b98e-e6726a7c6c15 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34785 05300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.3478505300 |
| Directory | /workspace/37.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/37.usbdev_device_timeout.3092973872 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 1188412910 ps |
| CPU time | 28.08 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:38:37 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-50148733-e995-47bf-a045-1c7e6ec9a952 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3092973872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.3092973872 |
| Directory | /workspace/37.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/37.usbdev_disable_endpoint.4198917648 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 444598887 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:38:08 PM PDT 24 |
| Finished | Aug 16 05:38:09 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-1d4f5a23-82f9-446f-863d-2d35f982f791 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41989 17648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disable_endpoint.4198917648 |
| Directory | /workspace/37.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/37.usbdev_disconnected.2305435412 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 191203932 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:38:00 PM PDT 24 |
| Finished | Aug 16 05:38:01 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e89bbc24-f637-4420-81f5-8f0a4370cfb2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23054 35412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disconnected.2305435412 |
| Directory | /workspace/37.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/37.usbdev_enable.4073581265 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 35592874 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:38:01 PM PDT 24 |
| Finished | Aug 16 05:38:02 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-2493fd0d-468d-4e3b-937f-76a0cd8d7c90 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40735 81265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_enable.4073581265 |
| Directory | /workspace/37.usbdev_enable/latest |
| Test location | /workspace/coverage/default/37.usbdev_endpoint_access.3128546998 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 920171369 ps |
| CPU time | 2.49 seconds |
| Started | Aug 16 05:38:17 PM PDT 24 |
| Finished | Aug 16 05:38:19 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-9c7bfa43-f6ee-4198-a343-c3fb6caa2050 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31285 46998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.3128546998 |
| Directory | /workspace/37.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/37.usbdev_fifo_rst.3592432559 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 186056900 ps |
| CPU time | 2.24 seconds |
| Started | Aug 16 05:37:55 PM PDT 24 |
| Finished | Aug 16 05:37:57 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-6154c1bc-dd25-4c52-befd-bccdaa936522 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35924 32559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_fifo_rst.3592432559 |
| Directory | /workspace/37.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/37.usbdev_in_iso.1992954876 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 175002580 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:37:48 PM PDT 24 |
| Finished | Aug 16 05:37:49 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-22f6239b-a95e-4b37-9fe3-247a230a96db |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1992954876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.1992954876 |
| Directory | /workspace/37.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/37.usbdev_in_stall.3175155762 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 179922233 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:07 PM PDT 24 |
| Finished | Aug 16 05:38:08 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-29fb60e0-74e5-4394-b23e-046a92c036cf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31751 55762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_in_stall.3175155762 |
| Directory | /workspace/37.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/37.usbdev_in_trans.630134273 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 207496417 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:38:07 PM PDT 24 |
| Finished | Aug 16 05:38:08 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-4d002d23-22a7-4bca-b9f7-4b8d6c981a7c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63013 4273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_in_trans.630134273 |
| Directory | /workspace/37.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_invalid_sync.4140136887 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 3372969657 ps |
| CPU time | 25.87 seconds |
| Started | Aug 16 05:38:07 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 224036 kb |
| Host | smart-c98fb0ae-f8fa-44cc-a20e-e7debf261a16 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4140136887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.4140136887 |
| Directory | /workspace/37.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/37.usbdev_iso_retraction.1387098304 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 3361497602 ps |
| CPU time | 41.72 seconds |
| Started | Aug 16 05:38:00 PM PDT 24 |
| Finished | Aug 16 05:38:42 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-9b34a0aa-3227-4e37-b45d-cf8d86899c6e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1387098304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.1387098304 |
| Directory | /workspace/37.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/37.usbdev_link_in_err.3176073421 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 172841674 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:38:10 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-01ebdab2-aba8-4d16-976d-579e9523d0d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31760 73421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_link_in_err.3176073421 |
| Directory | /workspace/37.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/37.usbdev_link_resume.3483801745 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 29310291388 ps |
| CPU time | 42.85 seconds |
| Started | Aug 16 05:38:05 PM PDT 24 |
| Finished | Aug 16 05:38:48 PM PDT 24 |
| Peak memory | 207824 kb |
| Host | smart-8a9cc3e1-a338-4c6c-8183-d8d87be4ed7d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34838 01745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_link_resume.3483801745 |
| Directory | /workspace/37.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/37.usbdev_link_suspend.1066318880 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 5462406939 ps |
| CPU time | 7.07 seconds |
| Started | Aug 16 05:38:10 PM PDT 24 |
| Finished | Aug 16 05:38:18 PM PDT 24 |
| Peak memory | 215992 kb |
| Host | smart-fcaec01d-184c-4dc6-a371-8d9bf5edfb95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10663 18880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_link_suspend.1066318880 |
| Directory | /workspace/37.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/37.usbdev_low_speed_traffic.2225980199 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 3324817664 ps |
| CPU time | 33.58 seconds |
| Started | Aug 16 05:38:05 PM PDT 24 |
| Finished | Aug 16 05:38:39 PM PDT 24 |
| Peak memory | 216040 kb |
| Host | smart-6b6d4ee8-91d5-4041-9f90-6980b4eccf4c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2225980199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.2225980199 |
| Directory | /workspace/37.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/37.usbdev_max_inter_pkt_delay.1491251659 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 2778840568 ps |
| CPU time | 27.19 seconds |
| Started | Aug 16 05:38:07 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-41fce3c1-d2ab-4312-8591-41d4da835b1a |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1491251659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.1491251659 |
| Directory | /workspace/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/37.usbdev_max_length_in_transaction.2476418358 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 236074013 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:37:59 PM PDT 24 |
| Finished | Aug 16 05:38:00 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-6b7f12c4-7a9f-48b9-899f-ec853dd368a1 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2476418358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.2476418358 |
| Directory | /workspace/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_max_length_out_transaction.2720490659 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 205763732 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:38:16 PM PDT 24 |
| Finished | Aug 16 05:38:17 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-612b55a2-3f1b-4835-8dee-d49d89d5d517 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27204 90659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.2720490659 |
| Directory | /workspace/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_min_inter_pkt_delay.2665192657 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 2778555727 ps |
| CPU time | 28.5 seconds |
| Started | Aug 16 05:38:05 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 217600 kb |
| Host | smart-1e50f8b7-ba40-487b-a118-e17b46fa6951 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2665192657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.2665192657 |
| Directory | /workspace/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/37.usbdev_min_length_in_transaction.1286465092 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 171430056 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:38:08 PM PDT 24 |
| Finished | Aug 16 05:38:09 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-65403e2f-0191-42a2-856d-ef5a2baef3b7 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1286465092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.1286465092 |
| Directory | /workspace/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_min_length_out_transaction.744199921 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 150555883 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:03 PM PDT 24 |
| Finished | Aug 16 05:38:04 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-6fcc1ea9-a67a-4542-affc-33aba7140e5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74419 9921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.744199921 |
| Directory | /workspace/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_nak_trans.1234285621 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 262457648 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:38:08 PM PDT 24 |
| Finished | Aug 16 05:38:10 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-0d5b4852-0354-4cb6-965e-367de42375a0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12342 85621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_nak_trans.1234285621 |
| Directory | /workspace/37.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_out_iso.3122933274 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 163506786 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:38:04 PM PDT 24 |
| Finished | Aug 16 05:38:05 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-95be3457-ee3e-47d1-af62-6bb5b806aa69 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31229 33274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_out_iso.3122933274 |
| Directory | /workspace/37.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/37.usbdev_out_stall.3379538076 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 208259895 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:37:56 PM PDT 24 |
| Finished | Aug 16 05:37:57 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-c93722a2-4ea0-4af6-bbb4-ee23475ca820 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33795 38076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_out_stall.3379538076 |
| Directory | /workspace/37.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/37.usbdev_out_trans_nak.2062942807 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 177092970 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-ef8d830b-d4d5-403d-9702-55b876118b78 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20629 42807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_out_trans_nak.2062942807 |
| Directory | /workspace/37.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/37.usbdev_pending_in_trans.2259741856 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 159139778 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:38:06 PM PDT 24 |
| Finished | Aug 16 05:38:07 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-0b7e089f-ea16-4713-986c-6b777fae20f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22597 41856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pending_in_trans.2259741856 |
| Directory | /workspace/37.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_phy_config_pinflip.2805516032 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 194942972 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:38:07 PM PDT 24 |
| Finished | Aug 16 05:38:08 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-0d68def9-7f55-40a1-b7ea-4b3a55a7c8c1 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2805516032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.2805516032 |
| Directory | /workspace/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/37.usbdev_phy_config_usb_ref_disable.486167930 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 161255334 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:38:08 PM PDT 24 |
| Finished | Aug 16 05:38:09 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-7c5fcfa8-648d-469b-b900-6929760753ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48616 7930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.486167930 |
| Directory | /workspace/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/37.usbdev_phy_pins_sense.596736070 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 41165416 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:38:10 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8199489d-6750-47a7-be83-1f553986a845 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59673 6070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.596736070 |
| Directory | /workspace/37.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/37.usbdev_pkt_buffer.3638659298 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 14294506937 ps |
| CPU time | 35.44 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:46 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-1685474a-4f4f-49a3-87bc-efb9d7a1b998 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36386 59298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pkt_buffer.3638659298 |
| Directory | /workspace/37.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/37.usbdev_pkt_received.2213859472 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 167489757 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:38:10 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-cd62ff43-8913-4962-b032-fac8eff4b12b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22138 59472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pkt_received.2213859472 |
| Directory | /workspace/37.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/37.usbdev_pkt_sent.1265398951 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 184356293 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-06d0a6be-6d81-4672-8012-f212319ef3e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12653 98951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pkt_sent.1265398951 |
| Directory | /workspace/37.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/37.usbdev_random_length_in_transaction.979732554 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 230037860 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:38:07 PM PDT 24 |
| Finished | Aug 16 05:38:08 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-48d74c56-77f4-473f-9ecd-20214ff0abb8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97973 2554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_in_transaction.979732554 |
| Directory | /workspace/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_random_length_out_transaction.70529240 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 184700387 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:38:32 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-63fafa5b-8ec2-4c9c-9423-99c656381784 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70529 240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.70529240 |
| Directory | /workspace/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/37.usbdev_rx_crc_err.3838660722 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 153592008 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:38:08 PM PDT 24 |
| Finished | Aug 16 05:38:09 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-935c1dfa-ffb0-4586-9cb6-1d70fd7ee944 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38386 60722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_rx_crc_err.3838660722 |
| Directory | /workspace/37.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/37.usbdev_rx_full.2872140426 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 375138451 ps |
| CPU time | 1.28 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-eb93990f-b81c-46c2-8b4a-7523ce40452d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28721 40426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_rx_full.2872140426 |
| Directory | /workspace/37.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/37.usbdev_setup_stage.1802980340 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 150422313 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-a5a0e24a-e2f4-49b2-9fc2-9eb4b0323758 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18029 80340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_setup_stage.1802980340 |
| Directory | /workspace/37.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/37.usbdev_setup_trans_ignored.3470679255 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 206073991 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:38:24 PM PDT 24 |
| Finished | Aug 16 05:38:25 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-2e878f1d-5650-401b-958d-478d030fb88e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34706 79255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_setup_trans_ignored.3470679255 |
| Directory | /workspace/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/37.usbdev_smoke.1404921887 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 271603418 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:38:12 PM PDT 24 |
| Finished | Aug 16 05:38:13 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-561d9609-00a6-43c8-81f2-c76f1e120016 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14049 21887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.1404921887 |
| Directory | /workspace/37.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/37.usbdev_spurious_pids_ignored.1176437820 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 3379952165 ps |
| CPU time | 97.84 seconds |
| Started | Aug 16 05:38:10 PM PDT 24 |
| Finished | Aug 16 05:39:47 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-30161b8d-45b6-45ca-97f2-860f2746197a |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1176437820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.1176437820 |
| Directory | /workspace/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/37.usbdev_stall_priority_over_nak.2576449783 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 185757140 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:21 PM PDT 24 |
| Finished | Aug 16 05:38:22 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-3e10c075-e186-42f4-b22a-03f7b1022d3f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25764 49783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.2576449783 |
| Directory | /workspace/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/37.usbdev_stall_trans.277441628 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 167927784 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:10 PM PDT 24 |
| Finished | Aug 16 05:38:11 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-c3c962ea-42e1-4795-9b61-1643194178cc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27744 1628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_trans.277441628 |
| Directory | /workspace/37.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/37.usbdev_stream_len_max.2322823155 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 566191928 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:38:25 PM PDT 24 |
| Finished | Aug 16 05:38:27 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-b67e7639-9239-44e5-86dc-9ccc4e6dd628 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23228 23155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.2322823155 |
| Directory | /workspace/37.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/37.usbdev_streaming_out.361834748 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 2558294245 ps |
| CPU time | 19.62 seconds |
| Started | Aug 16 05:38:17 PM PDT 24 |
| Finished | Aug 16 05:38:37 PM PDT 24 |
| Peak memory | 224112 kb |
| Host | smart-f70a59db-6a42-4c57-8b00-9a30d02983c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36183 4748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_streaming_out.361834748 |
| Directory | /workspace/37.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/37.usbdev_timeout_missing_host_handshake.198390038 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 593477540 ps |
| CPU time | 11.85 seconds |
| Started | Aug 16 05:38:21 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-34b9a253-0a36-4247-a51c-6c69e46e07de |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=198390038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host _handshake.198390038 |
| Directory | /workspace/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/37.usbdev_tx_rx_disruption.1418563853 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 531297528 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-5f01cacb-cb3f-47e0-8b71-a2d9cdc41a66 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1418563853 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_tx_rx_disruption.1418563853 |
| Directory | /workspace/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/370.usbdev_tx_rx_disruption.1289999175 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 448497527 ps |
| CPU time | 1.43 seconds |
| Started | Aug 16 05:40:35 PM PDT 24 |
| Finished | Aug 16 05:40:36 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-f99461cc-b092-418a-b9de-bca7f971d2c9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1289999175 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 370.usbdev_tx_rx_disruption.1289999175 |
| Directory | /workspace/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/371.usbdev_tx_rx_disruption.2020249348 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 483635852 ps |
| CPU time | 1.43 seconds |
| Started | Aug 16 05:40:24 PM PDT 24 |
| Finished | Aug 16 05:40:25 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-f31a40fc-207f-4bda-af83-3dc290fb656e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2020249348 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 371.usbdev_tx_rx_disruption.2020249348 |
| Directory | /workspace/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/372.usbdev_tx_rx_disruption.2757108084 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 584188068 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:40:44 PM PDT 24 |
| Finished | Aug 16 05:40:46 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-290c9036-aba9-4a9f-9214-5bc2ee0a356a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2757108084 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 372.usbdev_tx_rx_disruption.2757108084 |
| Directory | /workspace/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/373.usbdev_tx_rx_disruption.1835593865 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 516141621 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:41:09 PM PDT 24 |
| Finished | Aug 16 05:41:11 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-49703461-40e2-447a-b63d-853e4ca974f1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1835593865 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 373.usbdev_tx_rx_disruption.1835593865 |
| Directory | /workspace/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/374.usbdev_tx_rx_disruption.4128354896 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 478293969 ps |
| CPU time | 1.43 seconds |
| Started | Aug 16 05:40:22 PM PDT 24 |
| Finished | Aug 16 05:40:24 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-0d40c8eb-2502-4900-ac6a-ec2e349f8e3b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4128354896 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 374.usbdev_tx_rx_disruption.4128354896 |
| Directory | /workspace/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/375.usbdev_tx_rx_disruption.1650722755 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 526937291 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:31 PM PDT 24 |
| Finished | Aug 16 05:40:32 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-187e9d67-a0c8-4c20-9a96-a613492f6a22 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1650722755 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 375.usbdev_tx_rx_disruption.1650722755 |
| Directory | /workspace/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/377.usbdev_tx_rx_disruption.1288806125 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 599305832 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:51 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-d5fc64e3-2a5b-4212-b051-8d9d1526a716 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1288806125 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 377.usbdev_tx_rx_disruption.1288806125 |
| Directory | /workspace/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/378.usbdev_tx_rx_disruption.627806184 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 499030539 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:40:36 PM PDT 24 |
| Finished | Aug 16 05:40:38 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-45b905d7-f2a3-4d9f-8874-823ab6dc3d95 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=627806184 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 378.usbdev_tx_rx_disruption.627806184 |
| Directory | /workspace/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/379.usbdev_tx_rx_disruption.2926301114 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 509493431 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:59 PM PDT 24 |
| Finished | Aug 16 05:41:01 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-ed67a1d1-4238-4424-8c1d-de326371ce38 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2926301114 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 379.usbdev_tx_rx_disruption.2926301114 |
| Directory | /workspace/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/38.usbdev_alert_test.275961624 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 51808221 ps |
| CPU time | 0.66 seconds |
| Started | Aug 16 05:38:13 PM PDT 24 |
| Finished | Aug 16 05:38:13 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-f8d41f43-8461-4928-9f8f-d9317858a762 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=275961624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.275961624 |
| Directory | /workspace/38.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/38.usbdev_aon_wake_disconnect.1106844142 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 11839426827 ps |
| CPU time | 15.43 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:38:25 PM PDT 24 |
| Peak memory | 207812 kb |
| Host | smart-803b2970-1f26-4791-b7d2-89b865a79504 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1106844142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_a on_wake_disconnect.1106844142 |
| Directory | /workspace/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/38.usbdev_aon_wake_reset.2153187518 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 13824336198 ps |
| CPU time | 17.07 seconds |
| Started | Aug 16 05:38:14 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 215956 kb |
| Host | smart-b24f133f-1843-4fef-9b04-998729d1efd0 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2153187518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.2153187518 |
| Directory | /workspace/38.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/38.usbdev_aon_wake_resume.1234732333 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 24198274101 ps |
| CPU time | 30.22 seconds |
| Started | Aug 16 05:38:25 PM PDT 24 |
| Finished | Aug 16 05:38:56 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-8e1fb242-e235-43e4-8ad6-7158418ba718 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1234732333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_a on_wake_resume.1234732333 |
| Directory | /workspace/38.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/38.usbdev_av_buffer.749311829 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 162763742 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:14 PM PDT 24 |
| Finished | Aug 16 05:38:15 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-d2e18d9e-ddf1-4b68-b95a-88506fc7c771 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74931 1829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_av_buffer.749311829 |
| Directory | /workspace/38.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/38.usbdev_bitstuff_err.917664313 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 166540555 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:26 PM PDT 24 |
| Finished | Aug 16 05:38:27 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-b124a505-09d7-443b-9503-49770b6e6d12 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=91766 4313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_bitstuff_err.917664313 |
| Directory | /workspace/38.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/38.usbdev_data_toggle_clear.3405372206 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 305969953 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:38:10 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-29824667-17b8-45fd-bc11-a9ddc76b44ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34053 72206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_clear.3405372206 |
| Directory | /workspace/38.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/38.usbdev_data_toggle_restore.3428622206 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 371250876 ps |
| CPU time | 1.23 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-90c194a6-9844-4494-bc87-b8871d4908a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3428622206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.3428622206 |
| Directory | /workspace/38.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/38.usbdev_device_address.358217415 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 47801265195 ps |
| CPU time | 70.66 seconds |
| Started | Aug 16 05:38:12 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-e79175eb-9e10-490a-af4b-69b40d7b3ae7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35821 7415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.358217415 |
| Directory | /workspace/38.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/38.usbdev_device_timeout.226968487 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 1046922160 ps |
| CPU time | 9.05 seconds |
| Started | Aug 16 05:38:17 PM PDT 24 |
| Finished | Aug 16 05:38:26 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-c47b990b-6ebf-4724-a420-c4cdc3e77b14 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=226968487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.226968487 |
| Directory | /workspace/38.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/38.usbdev_disable_endpoint.4286951275 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 540359069 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:38:10 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-72bbee19-c8df-449f-81b5-9db69785d23b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42869 51275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_disable_endpoint.4286951275 |
| Directory | /workspace/38.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/38.usbdev_disconnected.2411374921 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 148606114 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:38:19 PM PDT 24 |
| Finished | Aug 16 05:38:20 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c4f0a621-beb9-4531-a0e1-8aa19eff06e4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24113 74921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_disconnected.2411374921 |
| Directory | /workspace/38.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/38.usbdev_enable.2750171560 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 48594288 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-5e6305ad-342e-431e-a388-992ee04eaf10 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27501 71560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_enable.2750171560 |
| Directory | /workspace/38.usbdev_enable/latest |
| Test location | /workspace/coverage/default/38.usbdev_endpoint_access.1704389048 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 979687942 ps |
| CPU time | 2.58 seconds |
| Started | Aug 16 05:38:12 PM PDT 24 |
| Finished | Aug 16 05:38:15 PM PDT 24 |
| Peak memory | 207892 kb |
| Host | smart-528c9620-7d00-4a1f-96da-9884c1189bc7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17043 89048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.1704389048 |
| Directory | /workspace/38.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/38.usbdev_endpoint_types.251062820 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 665529052 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:38:26 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a2aa5eca-a773-47dc-ba08-6f81c6060c7e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=251062820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.251062820 |
| Directory | /workspace/38.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/38.usbdev_fifo_rst.3927623655 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 432757195 ps |
| CPU time | 2.94 seconds |
| Started | Aug 16 05:38:21 PM PDT 24 |
| Finished | Aug 16 05:38:24 PM PDT 24 |
| Peak memory | 207672 kb |
| Host | smart-768e17e3-e457-468c-843e-e24637f7b17d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39276 23655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_fifo_rst.3927623655 |
| Directory | /workspace/38.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/38.usbdev_in_iso.1556756273 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 178728014 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:38:13 PM PDT 24 |
| Finished | Aug 16 05:38:14 PM PDT 24 |
| Peak memory | 215900 kb |
| Host | smart-29d37485-0493-4724-b90f-3b6ef934a643 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1556756273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.1556756273 |
| Directory | /workspace/38.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/38.usbdev_in_stall.1612197725 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 150225084 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:08 PM PDT 24 |
| Finished | Aug 16 05:38:09 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-ad3af32c-f8a0-4f1b-84ef-4fc546e0e6b3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16121 97725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_in_stall.1612197725 |
| Directory | /workspace/38.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/38.usbdev_in_trans.3721647215 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 185100463 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:06 PM PDT 24 |
| Finished | Aug 16 05:38:07 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-82ac7220-d6e3-45a0-940f-4ce7a867c0fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37216 47215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_in_trans.3721647215 |
| Directory | /workspace/38.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_invalid_sync.2592728526 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 4195019613 ps |
| CPU time | 125.38 seconds |
| Started | Aug 16 05:38:21 PM PDT 24 |
| Finished | Aug 16 05:40:26 PM PDT 24 |
| Peak memory | 218356 kb |
| Host | smart-ca4cb917-99bb-4d59-a107-c5d0ddd27570 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2592728526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.2592728526 |
| Directory | /workspace/38.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/38.usbdev_iso_retraction.3882310234 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 9818795276 ps |
| CPU time | 116.07 seconds |
| Started | Aug 16 05:38:09 PM PDT 24 |
| Finished | Aug 16 05:40:05 PM PDT 24 |
| Peak memory | 207808 kb |
| Host | smart-f1435802-f9f9-4ee9-ac39-c209940840e3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3882310234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.3882310234 |
| Directory | /workspace/38.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/38.usbdev_link_in_err.3246125219 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 232191614 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:38:10 PM PDT 24 |
| Finished | Aug 16 05:38:11 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6424c102-30e9-4d4a-ba3e-65e16e17ecd2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32461 25219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_link_in_err.3246125219 |
| Directory | /workspace/38.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/38.usbdev_link_resume.3337633728 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 30708281471 ps |
| CPU time | 44.08 seconds |
| Started | Aug 16 05:38:22 PM PDT 24 |
| Finished | Aug 16 05:39:06 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-d47e5fcc-eadc-4836-a47b-20b8fe311101 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33376 33728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_link_resume.3337633728 |
| Directory | /workspace/38.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/38.usbdev_link_suspend.1126743206 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 3490779893 ps |
| CPU time | 5.35 seconds |
| Started | Aug 16 05:38:07 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-079531e4-91ee-4aaf-a836-b9a7069f52a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11267 43206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_link_suspend.1126743206 |
| Directory | /workspace/38.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/38.usbdev_low_speed_traffic.549646710 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 3886908424 ps |
| CPU time | 31.83 seconds |
| Started | Aug 16 05:38:25 PM PDT 24 |
| Finished | Aug 16 05:38:57 PM PDT 24 |
| Peak memory | 219264 kb |
| Host | smart-71cf0e92-0460-475d-adec-3eca72e3a038 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=549646710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.549646710 |
| Directory | /workspace/38.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/38.usbdev_max_inter_pkt_delay.4178744408 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 3020157283 ps |
| CPU time | 86.15 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:39:53 PM PDT 24 |
| Peak memory | 217424 kb |
| Host | smart-2b09998d-1ab9-4077-8d2e-79fc31bc934f |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=4178744408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.4178744408 |
| Directory | /workspace/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/38.usbdev_max_length_in_transaction.2007133267 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 239369168 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:38:26 PM PDT 24 |
| Finished | Aug 16 05:38:27 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d12d2caa-2272-435f-90fc-11b22cc0753b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2007133267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.2007133267 |
| Directory | /workspace/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_max_length_out_transaction.2602461585 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 196289470 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:38:22 PM PDT 24 |
| Finished | Aug 16 05:38:23 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-db5270c7-d5e8-4a3b-947f-b140185e3205 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26024 61585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.2602461585 |
| Directory | /workspace/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_min_inter_pkt_delay.1953643168 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 2239524876 ps |
| CPU time | 64.9 seconds |
| Started | Aug 16 05:38:18 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 217476 kb |
| Host | smart-48b4e5a6-34ce-46ac-a084-bd20965f7143 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1953643168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.1953643168 |
| Directory | /workspace/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/38.usbdev_min_length_in_transaction.146448570 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 150005597 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-a002e8a0-f05c-49d7-9bed-f233ff16e171 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=146448570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.146448570 |
| Directory | /workspace/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_min_length_out_transaction.2113706393 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 148379297 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:38:26 PM PDT 24 |
| Finished | Aug 16 05:38:27 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-53802f18-4f03-4405-938b-1ad030da5737 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21137 06393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.2113706393 |
| Directory | /workspace/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_nak_trans.468028399 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 209356969 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-88519aff-8c2b-47dd-bee5-cc01280ebecb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46802 8399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_nak_trans.468028399 |
| Directory | /workspace/38.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_out_iso.2782023742 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 160626870 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:38:25 PM PDT 24 |
| Finished | Aug 16 05:38:26 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-913cc999-82ba-41f5-b084-7ca2ab1407e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27820 23742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_out_iso.2782023742 |
| Directory | /workspace/38.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/38.usbdev_out_stall.1254514676 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 207488712 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:38:14 PM PDT 24 |
| Finished | Aug 16 05:38:15 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-76090ce9-6a84-43cc-bf0d-0d70c04e9171 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12545 14676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_out_stall.1254514676 |
| Directory | /workspace/38.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/38.usbdev_out_trans_nak.2461809411 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 192359752 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-21882080-1ab4-4680-9510-c16d6642d197 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24618 09411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_out_trans_nak.2461809411 |
| Directory | /workspace/38.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/38.usbdev_pending_in_trans.38860223 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 148685315 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:23 PM PDT 24 |
| Finished | Aug 16 05:38:24 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-0295c100-5fbd-4ab5-8895-2f485d4a0b66 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38860 223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pending_in_trans.38860223 |
| Directory | /workspace/38.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_phy_config_pinflip.3987052570 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 283071079 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:38:13 PM PDT 24 |
| Finished | Aug 16 05:38:14 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-7a0584a0-1492-4653-a5b1-e66717bb1191 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3987052570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.3987052570 |
| Directory | /workspace/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/38.usbdev_phy_config_usb_ref_disable.3193461857 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 207883205 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-4371ef5b-dfc5-489f-bb8b-4729d7a9cd11 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31934 61857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.3193461857 |
| Directory | /workspace/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/38.usbdev_phy_pins_sense.1635795886 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 47749331 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:39 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-4d6e963d-f6ad-419a-9948-291c20fc6d6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16357 95886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.1635795886 |
| Directory | /workspace/38.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/38.usbdev_pkt_buffer.360129391 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 6526031566 ps |
| CPU time | 16.74 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:51 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-c9e88791-d0f3-4919-84c6-9b8cd27dfbd5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36012 9391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pkt_buffer.360129391 |
| Directory | /workspace/38.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/38.usbdev_pkt_received.1340228889 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 165371100 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-bac7db25-5af1-4809-b4de-01b1b1ea4e56 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13402 28889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pkt_received.1340228889 |
| Directory | /workspace/38.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/38.usbdev_pkt_sent.1091468799 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 232284980 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207076 kb |
| Host | smart-c7a7a897-bbf4-4eee-8004-90a4c7e22a29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10914 68799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_pkt_sent.1091468799 |
| Directory | /workspace/38.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/38.usbdev_random_length_in_transaction.153404742 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 211345062 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-1b02b6f1-8d43-4c69-ab49-19122577fb1c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15340 4742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_in_transaction.153404742 |
| Directory | /workspace/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_random_length_out_transaction.1016152990 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 174949757 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-1cb28480-754c-4a37-b6cf-a6815e2a03a8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10161 52990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.1016152990 |
| Directory | /workspace/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/38.usbdev_rx_crc_err.971115071 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 148855615 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-88acafec-6e66-4919-83d9-ee1fa7a415f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97111 5071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_rx_crc_err.971115071 |
| Directory | /workspace/38.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/38.usbdev_rx_full.1059689268 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 388564854 ps |
| CPU time | 1.32 seconds |
| Started | Aug 16 05:38:25 PM PDT 24 |
| Finished | Aug 16 05:38:26 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-d1ef57aa-6641-408e-9f64-227982f62e7c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10596 89268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_rx_full.1059689268 |
| Directory | /workspace/38.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/38.usbdev_setup_stage.20376192 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 143562140 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:24 PM PDT 24 |
| Finished | Aug 16 05:38:25 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-34391530-35b9-4726-bfa9-32ef73731c81 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20376 192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_setup_stage.20376192 |
| Directory | /workspace/38.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/38.usbdev_setup_trans_ignored.2128560021 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 194806265 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:18 PM PDT 24 |
| Finished | Aug 16 05:38:19 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-440836f1-9b0f-45c0-b3d5-a42b6b6cab41 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21285 60021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_setup_trans_ignored.2128560021 |
| Directory | /workspace/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/38.usbdev_smoke.1630614295 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 229212660 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-13802c4d-5c41-46f5-8571-b9c9314923c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16306 14295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.1630614295 |
| Directory | /workspace/38.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/38.usbdev_spurious_pids_ignored.3686086869 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 1785521983 ps |
| CPU time | 16.34 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:45 PM PDT 24 |
| Peak memory | 223984 kb |
| Host | smart-c6382cfa-ead0-425a-9db0-c7e5c7276ad8 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3686086869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.3686086869 |
| Directory | /workspace/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/38.usbdev_stall_priority_over_nak.4052547246 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 194148168 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-280de597-2e00-40d3-b6fa-eecd0d8f98d5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40525 47246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.4052547246 |
| Directory | /workspace/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/38.usbdev_stall_trans.3918623807 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 222648158 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:38:24 PM PDT 24 |
| Finished | Aug 16 05:38:25 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3feac2ff-8b57-429e-8194-5cef5b46f418 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39186 23807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_trans.3918623807 |
| Directory | /workspace/38.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/38.usbdev_stream_len_max.2668200585 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 941198124 ps |
| CPU time | 2.58 seconds |
| Started | Aug 16 05:38:25 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-69d690ac-5f06-444d-aa39-edb7be7e958b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26682 00585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.2668200585 |
| Directory | /workspace/38.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/38.usbdev_streaming_out.1973068532 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 2044701093 ps |
| CPU time | 55.53 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 217412 kb |
| Host | smart-822fd2db-644d-4c21-86f0-df2067cb967e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19730 68532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_streaming_out.1973068532 |
| Directory | /workspace/38.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/38.usbdev_timeout_missing_host_handshake.301744862 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 282425093 ps |
| CPU time | 4.27 seconds |
| Started | Aug 16 05:38:26 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-fb9b4859-51f0-4007-b7ac-9ccb03e7d024 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=301744862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host _handshake.301744862 |
| Directory | /workspace/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/38.usbdev_tx_rx_disruption.4053311059 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 545350541 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-4f1ab2f3-e7e1-4736-81fb-843fc72adc24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4053311059 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_tx_rx_disruption.4053311059 |
| Directory | /workspace/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/380.usbdev_tx_rx_disruption.4144463886 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 657214453 ps |
| CPU time | 1.83 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-eecebed5-75ee-4031-9752-3d0f3cea4eab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4144463886 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 380.usbdev_tx_rx_disruption.4144463886 |
| Directory | /workspace/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/381.usbdev_tx_rx_disruption.3723863443 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 474389702 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:54 PM PDT 24 |
| Finished | Aug 16 05:40:56 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c325d500-1425-49f3-b92a-8bd89a88581a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3723863443 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 381.usbdev_tx_rx_disruption.3723863443 |
| Directory | /workspace/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/382.usbdev_tx_rx_disruption.1389878192 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 624448179 ps |
| CPU time | 1.79 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:51 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-d1457240-13fb-4c46-811d-f93741cd8c44 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1389878192 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 382.usbdev_tx_rx_disruption.1389878192 |
| Directory | /workspace/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/383.usbdev_tx_rx_disruption.1458108533 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 697646215 ps |
| CPU time | 1.83 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-c9a58d8e-1800-4660-924a-b6e590046c39 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1458108533 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 383.usbdev_tx_rx_disruption.1458108533 |
| Directory | /workspace/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/384.usbdev_tx_rx_disruption.2926925763 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 564014636 ps |
| CPU time | 1.78 seconds |
| Started | Aug 16 05:40:51 PM PDT 24 |
| Finished | Aug 16 05:40:53 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-28807e53-0a98-4304-9f04-454bab06fcc4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2926925763 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 384.usbdev_tx_rx_disruption.2926925763 |
| Directory | /workspace/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/385.usbdev_tx_rx_disruption.2877406998 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 613832071 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:40:37 PM PDT 24 |
| Finished | Aug 16 05:40:39 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-3e705aa2-bf98-444a-b014-3fc973bcf2c2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2877406998 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 385.usbdev_tx_rx_disruption.2877406998 |
| Directory | /workspace/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/386.usbdev_tx_rx_disruption.3419917539 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 602963524 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:40:47 PM PDT 24 |
| Finished | Aug 16 05:40:49 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-40026e6b-1000-43e7-acc9-f4f260053169 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3419917539 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 386.usbdev_tx_rx_disruption.3419917539 |
| Directory | /workspace/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/387.usbdev_tx_rx_disruption.3183292183 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 539255788 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:40:38 PM PDT 24 |
| Finished | Aug 16 05:40:39 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-e5644134-ae43-4673-949a-e8bd3c6bc26a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3183292183 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 387.usbdev_tx_rx_disruption.3183292183 |
| Directory | /workspace/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/388.usbdev_tx_rx_disruption.2934504560 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 604126044 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-fd8672f4-47b5-4478-aa0e-57b23566ff63 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2934504560 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 388.usbdev_tx_rx_disruption.2934504560 |
| Directory | /workspace/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/389.usbdev_tx_rx_disruption.2533810277 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 629192677 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:40:57 PM PDT 24 |
| Finished | Aug 16 05:40:59 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-f189bc6e-ab7c-40e5-9436-774672fe3ec6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2533810277 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 389.usbdev_tx_rx_disruption.2533810277 |
| Directory | /workspace/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/39.usbdev_alert_test.4283688476 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 82697165 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:38:47 PM PDT 24 |
| Finished | Aug 16 05:38:48 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-4e4b1c1c-75d2-49b7-9aca-da1d945a7da2 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=4283688476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.4283688476 |
| Directory | /workspace/39.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/39.usbdev_aon_wake_disconnect.2101191109 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 11161933272 ps |
| CPU time | 14.84 seconds |
| Started | Aug 16 05:38:20 PM PDT 24 |
| Finished | Aug 16 05:38:35 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-35dd9bc1-7361-4277-a7da-4ee1c4c483a1 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2101191109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_a on_wake_disconnect.2101191109 |
| Directory | /workspace/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/39.usbdev_aon_wake_reset.3262336400 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 15984784177 ps |
| CPU time | 18.58 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:46 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-b8c266c3-5d7c-49d0-91a9-30ee2e7c2839 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3262336400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.3262336400 |
| Directory | /workspace/39.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/39.usbdev_aon_wake_resume.1329950751 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 24538935189 ps |
| CPU time | 30.02 seconds |
| Started | Aug 16 05:38:24 PM PDT 24 |
| Finished | Aug 16 05:38:55 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-5922951a-1ff2-4b2d-8f4e-9f1c691244dc |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1329950751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_a on_wake_resume.1329950751 |
| Directory | /workspace/39.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/39.usbdev_av_buffer.1329624588 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 159777991 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:22 PM PDT 24 |
| Finished | Aug 16 05:38:23 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-f3227e28-be2b-4c3d-837b-a21bb6029919 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13296 24588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_av_buffer.1329624588 |
| Directory | /workspace/39.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/39.usbdev_bitstuff_err.3888506058 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 145576257 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:38:20 PM PDT 24 |
| Finished | Aug 16 05:38:20 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-052bfed8-78bd-4b64-aa3c-d920b61d3029 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38885 06058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_bitstuff_err.3888506058 |
| Directory | /workspace/39.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/39.usbdev_data_toggle_clear.720929425 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 534823295 ps |
| CPU time | 1.8 seconds |
| Started | Aug 16 05:38:23 PM PDT 24 |
| Finished | Aug 16 05:38:25 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-22536f0b-3e44-4b6a-9daf-33753c466283 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72092 9425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_clear.720929425 |
| Directory | /workspace/39.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/39.usbdev_data_toggle_restore.3102946758 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 1132449389 ps |
| CPU time | 2.98 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-92c57a63-9369-4054-be12-e82916597b0d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3102946758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.3102946758 |
| Directory | /workspace/39.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/39.usbdev_device_address.524083695 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 17257590408 ps |
| CPU time | 29.31 seconds |
| Started | Aug 16 05:38:19 PM PDT 24 |
| Finished | Aug 16 05:38:49 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-5037f35a-a40b-45b1-ab90-a0eeb53a2585 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52408 3695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.524083695 |
| Directory | /workspace/39.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/39.usbdev_device_timeout.4224857775 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 623266501 ps |
| CPU time | 4.75 seconds |
| Started | Aug 16 05:38:32 PM PDT 24 |
| Finished | Aug 16 05:38:42 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-a7f74186-cf90-4059-8c1f-9f25493b66b5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4224857775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.4224857775 |
| Directory | /workspace/39.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/39.usbdev_disable_endpoint.2242406803 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 658539127 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-f735b861-3bba-45fa-b554-3057631b00b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22424 06803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_disable_endpoint.2242406803 |
| Directory | /workspace/39.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/39.usbdev_disconnected.442108501 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 186888879 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:23 PM PDT 24 |
| Finished | Aug 16 05:38:24 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-41303065-3f2f-41b8-b0aa-072222204f68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44210 8501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_disconnected.442108501 |
| Directory | /workspace/39.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/39.usbdev_enable.1624167741 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 61896237 ps |
| CPU time | 0.77 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-0b496fd7-16b7-41c2-96ce-06c6e4246bb4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16241 67741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_enable.1624167741 |
| Directory | /workspace/39.usbdev_enable/latest |
| Test location | /workspace/coverage/default/39.usbdev_endpoint_access.1759421979 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 760630873 ps |
| CPU time | 2.17 seconds |
| Started | Aug 16 05:38:25 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-7e5d2506-c451-41d5-8d91-a73df9e4bc96 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17594 21979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.1759421979 |
| Directory | /workspace/39.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/39.usbdev_endpoint_types.270889114 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 651744601 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-d7b61e19-7cf3-421f-8f43-73fad5d2b9f3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=270889114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.270889114 |
| Directory | /workspace/39.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/39.usbdev_fifo_rst.1725890645 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 387541410 ps |
| CPU time | 2.59 seconds |
| Started | Aug 16 05:38:24 PM PDT 24 |
| Finished | Aug 16 05:38:27 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-a6f2934e-448b-4c96-a995-cd47c3565537 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17258 90645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_fifo_rst.1725890645 |
| Directory | /workspace/39.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/39.usbdev_in_iso.1577521889 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 223429554 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-0674b9c3-f38b-4026-b505-fae4c2efa078 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1577521889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.1577521889 |
| Directory | /workspace/39.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/39.usbdev_in_stall.1602034796 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 148927220 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:38:19 PM PDT 24 |
| Finished | Aug 16 05:38:20 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-85a5ebbb-d9bb-4e3f-84fc-ff78c82fb82c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16020 34796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_in_stall.1602034796 |
| Directory | /workspace/39.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/39.usbdev_in_trans.3756193621 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 167943267 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:25 PM PDT 24 |
| Finished | Aug 16 05:38:26 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-abd786eb-7a98-4aec-8770-a54a6f815d6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37561 93621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_in_trans.3756193621 |
| Directory | /workspace/39.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_invalid_sync.2863909269 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 3551361921 ps |
| CPU time | 96.34 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:40:04 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-a30d3a4b-d3fe-4c6d-a5b6-b70a7a3266fe |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2863909269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.2863909269 |
| Directory | /workspace/39.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/39.usbdev_iso_retraction.3058477267 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 7518692225 ps |
| CPU time | 50.38 seconds |
| Started | Aug 16 05:38:26 PM PDT 24 |
| Finished | Aug 16 05:39:17 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-97a989fd-5d6f-4c7f-a86a-7d39b42c1798 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3058477267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.3058477267 |
| Directory | /workspace/39.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/39.usbdev_link_in_err.1541156711 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 222620557 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:38:11 PM PDT 24 |
| Finished | Aug 16 05:38:12 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-a9f10b15-f445-4e4f-9e2f-efde53df3d71 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15411 56711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_link_in_err.1541156711 |
| Directory | /workspace/39.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/39.usbdev_link_resume.1194327831 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 5406611989 ps |
| CPU time | 7.79 seconds |
| Started | Aug 16 05:38:25 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 216228 kb |
| Host | smart-837dd084-dfbf-4cd2-8c71-1c87bc0c8cac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11943 27831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_link_resume.1194327831 |
| Directory | /workspace/39.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/39.usbdev_link_suspend.3371217963 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 4798735193 ps |
| CPU time | 6.88 seconds |
| Started | Aug 16 05:38:17 PM PDT 24 |
| Finished | Aug 16 05:38:24 PM PDT 24 |
| Peak memory | 216788 kb |
| Host | smart-62e41d9c-bbfd-4f72-8430-f412dd5e7f65 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33712 17963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_link_suspend.3371217963 |
| Directory | /workspace/39.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/39.usbdev_max_inter_pkt_delay.1204658994 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 2739757113 ps |
| CPU time | 19.31 seconds |
| Started | Aug 16 05:38:25 PM PDT 24 |
| Finished | Aug 16 05:38:45 PM PDT 24 |
| Peak memory | 217524 kb |
| Host | smart-46a0142d-c2da-4a8d-8d53-58e1127ba0f5 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1204658994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.1204658994 |
| Directory | /workspace/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/39.usbdev_max_length_in_transaction.374796786 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 247727307 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-4a1c140f-5454-427b-836f-fcbdfb517dfa |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=374796786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.374796786 |
| Directory | /workspace/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_max_length_out_transaction.1913549871 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 189299708 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:38:14 PM PDT 24 |
| Finished | Aug 16 05:38:15 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e9d21cb6-3308-4ac0-b990-ee3a51a7168d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19135 49871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.1913549871 |
| Directory | /workspace/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_min_inter_pkt_delay.1196184123 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 3370030960 ps |
| CPU time | 28.4 seconds |
| Started | Aug 16 05:38:26 PM PDT 24 |
| Finished | Aug 16 05:38:54 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-b1b9ad95-4e7c-4255-9534-d68afb41059d |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1196184123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.1196184123 |
| Directory | /workspace/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/39.usbdev_min_length_in_transaction.1800425409 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 174763514 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-d489e706-9cb5-4254-bfc6-65bdbb43c9c4 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1800425409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.1800425409 |
| Directory | /workspace/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_min_length_out_transaction.3820701666 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 207212463 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:38:15 PM PDT 24 |
| Finished | Aug 16 05:38:16 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-086d87f6-7057-44f3-8d69-e94cf3bb9d3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38207 01666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.3820701666 |
| Directory | /workspace/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_nak_trans.493771448 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 279567104 ps |
| CPU time | 1.14 seconds |
| Started | Aug 16 05:38:15 PM PDT 24 |
| Finished | Aug 16 05:38:16 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-39c9933a-1669-40e4-9a2f-a9cee8a785f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49377 1448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_nak_trans.493771448 |
| Directory | /workspace/39.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_out_iso.1298853146 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 185660177 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-1b9e15ba-cf71-4ccc-8f1f-db5ef2b60173 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12988 53146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_out_iso.1298853146 |
| Directory | /workspace/39.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/39.usbdev_out_stall.1981508238 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 170617950 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-fcd47e88-8405-4c1d-b6fb-d77e73513f65 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19815 08238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_out_stall.1981508238 |
| Directory | /workspace/39.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/39.usbdev_out_trans_nak.2294134158 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 160862216 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:26 PM PDT 24 |
| Finished | Aug 16 05:38:27 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-2cfdd40d-d282-4007-b65a-7b51b15b7404 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22941 34158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_out_trans_nak.2294134158 |
| Directory | /workspace/39.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/39.usbdev_pending_in_trans.3988030486 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 148803806 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-1ab9d066-acfe-4251-89ca-dee54ba5c1b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39880 30486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pending_in_trans.3988030486 |
| Directory | /workspace/39.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_phy_config_pinflip.1029142448 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 233195844 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-7fcee125-c541-4f1a-8a4b-8832d5d5e4f9 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1029142448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.1029142448 |
| Directory | /workspace/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/39.usbdev_phy_config_usb_ref_disable.2815005463 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 141738681 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-35dc43d0-21a1-4585-8f06-0ae7363ec277 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28150 05463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.2815005463 |
| Directory | /workspace/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/39.usbdev_phy_pins_sense.3738573891 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 65424423 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-96596734-42af-4b31-aeb4-40e5988ae6df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37385 73891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_pins_sense.3738573891 |
| Directory | /workspace/39.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/39.usbdev_pkt_buffer.2472644859 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 9720628478 ps |
| CPU time | 23.24 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:52 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-807c4cf4-f41d-4084-add3-5aea16d35db3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24726 44859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pkt_buffer.2472644859 |
| Directory | /workspace/39.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/39.usbdev_pkt_received.2889230711 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 159128952 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:23 PM PDT 24 |
| Finished | Aug 16 05:38:24 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-af75c978-3851-4c77-80fb-68f7d9bf4d57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28892 30711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pkt_received.2889230711 |
| Directory | /workspace/39.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/39.usbdev_pkt_sent.1997381759 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 264846515 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-503572c8-a34c-4f99-94ff-74b0ac099a18 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19973 81759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pkt_sent.1997381759 |
| Directory | /workspace/39.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/39.usbdev_random_length_in_transaction.4179204549 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 190518855 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-f9755726-396a-4af6-ae42-5f89987ecaeb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41792 04549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_in_transaction.4179204549 |
| Directory | /workspace/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_random_length_out_transaction.3400145612 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 186739863 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:38:35 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-9d7c7ac3-09ea-49c5-a954-afe814f60f56 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34001 45612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.3400145612 |
| Directory | /workspace/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/39.usbdev_rx_crc_err.185908521 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 137265072 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:38:32 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-41e3d070-cc8b-4eb9-af2f-9dfa843368f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18590 8521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_rx_crc_err.185908521 |
| Directory | /workspace/39.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/39.usbdev_rx_full.2817361699 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 435205157 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a45bd5cf-cd74-46ef-9985-f743b338bab8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28173 61699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_rx_full.2817361699 |
| Directory | /workspace/39.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/39.usbdev_setup_stage.1449574788 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 144203040 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-bedc492e-f912-4498-a9df-5a8422f769d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14495 74788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_setup_stage.1449574788 |
| Directory | /workspace/39.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/39.usbdev_setup_trans_ignored.748019485 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 168104996 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:21 PM PDT 24 |
| Finished | Aug 16 05:38:22 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-b490628f-dbd4-486b-9098-114ef2afc243 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=74801 9485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_setup_trans_ignored.748019485 |
| Directory | /workspace/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/39.usbdev_smoke.444433418 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 214428525 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-0c523291-f9ad-4117-a283-1bca58462e77 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44443 3418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.444433418 |
| Directory | /workspace/39.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/39.usbdev_spurious_pids_ignored.4253914638 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 1816632948 ps |
| CPU time | 51.44 seconds |
| Started | Aug 16 05:38:26 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 217360 kb |
| Host | smart-d656643d-bf38-4cfd-8177-42659b776a53 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4253914638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.4253914638 |
| Directory | /workspace/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/39.usbdev_stall_priority_over_nak.807394953 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 196380043 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-804cba01-dbec-41d6-93a8-259e62363834 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=80739 4953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.807394953 |
| Directory | /workspace/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/39.usbdev_stall_trans.482671420 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 181991381 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:32 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-04823a32-cbdc-49f1-8059-c719660539a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48267 1420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_trans.482671420 |
| Directory | /workspace/39.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/39.usbdev_stream_len_max.2642538572 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 828906096 ps |
| CPU time | 2.3 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-c729a6db-5b69-4f54-ae1c-42d0c47671b2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26425 38572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.2642538572 |
| Directory | /workspace/39.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/39.usbdev_streaming_out.399513732 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 2417888150 ps |
| CPU time | 23.11 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:52 PM PDT 24 |
| Peak memory | 217520 kb |
| Host | smart-973b6ba5-c890-4d7e-8772-831658a0738a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39951 3732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_streaming_out.399513732 |
| Directory | /workspace/39.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/39.usbdev_timeout_missing_host_handshake.4041833391 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 1505067551 ps |
| CPU time | 12.22 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:41 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-0cf74f3e-94b0-4d6b-b32f-9bc40b10e3b3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4041833391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_hos t_handshake.4041833391 |
| Directory | /workspace/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/39.usbdev_tx_rx_disruption.1862755638 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 588860021 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-1bd87289-7815-4e6e-9fd8-0609f23984dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1862755638 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_tx_rx_disruption.1862755638 |
| Directory | /workspace/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/390.usbdev_tx_rx_disruption.2809607342 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 657394837 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:40:43 PM PDT 24 |
| Finished | Aug 16 05:40:45 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-f384fcbc-8939-44ab-9d05-db7141330a9e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2809607342 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 390.usbdev_tx_rx_disruption.2809607342 |
| Directory | /workspace/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/391.usbdev_tx_rx_disruption.2671425622 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 459865115 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:36 PM PDT 24 |
| Finished | Aug 16 05:40:38 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-eb326c81-510e-44c9-ac8c-b4058194de8d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2671425622 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 391.usbdev_tx_rx_disruption.2671425622 |
| Directory | /workspace/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/392.usbdev_tx_rx_disruption.2076409503 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 595777083 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:17 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-29a3adc2-c7b9-43d0-a3fe-678b6eafe016 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2076409503 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 392.usbdev_tx_rx_disruption.2076409503 |
| Directory | /workspace/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/393.usbdev_tx_rx_disruption.3739203264 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 475619718 ps |
| CPU time | 1.4 seconds |
| Started | Aug 16 05:40:22 PM PDT 24 |
| Finished | Aug 16 05:40:33 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-ded01e35-b500-47fa-8d85-b9f1865bd51f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3739203264 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 393.usbdev_tx_rx_disruption.3739203264 |
| Directory | /workspace/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/394.usbdev_tx_rx_disruption.2588758329 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 602944185 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:34 PM PDT 24 |
| Finished | Aug 16 05:40:36 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-8c86e6fe-6dc0-4ea0-9cdb-628fe4499f05 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2588758329 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 394.usbdev_tx_rx_disruption.2588758329 |
| Directory | /workspace/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/395.usbdev_tx_rx_disruption.2366512010 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 488123819 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-a320dfbd-53fc-4d5c-8c61-b6715cdde1a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2366512010 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 395.usbdev_tx_rx_disruption.2366512010 |
| Directory | /workspace/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/396.usbdev_tx_rx_disruption.2526734445 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 634071834 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:41 PM PDT 24 |
| Finished | Aug 16 05:40:42 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-90d8fea2-5323-464f-be8f-d2c9d8a253c1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2526734445 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 396.usbdev_tx_rx_disruption.2526734445 |
| Directory | /workspace/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/397.usbdev_tx_rx_disruption.3300397701 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 594781676 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:40:25 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-ba6e3bc2-7cdc-4d5f-aad0-e222877fac37 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3300397701 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 397.usbdev_tx_rx_disruption.3300397701 |
| Directory | /workspace/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/398.usbdev_tx_rx_disruption.2379748964 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 479036327 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:40:55 PM PDT 24 |
| Finished | Aug 16 05:40:57 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-b0580713-20b0-439d-8536-64750c053354 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2379748964 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 398.usbdev_tx_rx_disruption.2379748964 |
| Directory | /workspace/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/399.usbdev_tx_rx_disruption.3855358290 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 666332842 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:33 PM PDT 24 |
| Finished | Aug 16 05:40:34 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-15582ad1-6bcb-49d1-a125-36d6e26d87f7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3855358290 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 399.usbdev_tx_rx_disruption.3855358290 |
| Directory | /workspace/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/4.usbdev_alert_test.1432908472 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 54615998 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:33:26 PM PDT 24 |
| Finished | Aug 16 05:33:32 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-76ab85b8-788d-46ed-95db-a23a9ee17a60 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1432908472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.1432908472 |
| Directory | /workspace/4.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/4.usbdev_aon_wake_disconnect.2815369277 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 9394851764 ps |
| CPU time | 12.76 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:33:24 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-d2060000-5b95-496b-a72d-bb964e1b6989 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2815369277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_ao n_wake_disconnect.2815369277 |
| Directory | /workspace/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/4.usbdev_aon_wake_reset.1228319499 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 15714407299 ps |
| CPU time | 19.33 seconds |
| Started | Aug 16 05:33:06 PM PDT 24 |
| Finished | Aug 16 05:33:26 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-bc6da1f1-4901-4dab-929e-3106aa6c7662 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1228319499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.1228319499 |
| Directory | /workspace/4.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/4.usbdev_aon_wake_resume.452305505 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 29874101263 ps |
| CPU time | 39.58 seconds |
| Started | Aug 16 05:33:08 PM PDT 24 |
| Finished | Aug 16 05:33:48 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-10cc196c-df36-4e67-b9d4-807203c1faed |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=452305505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon _wake_resume.452305505 |
| Directory | /workspace/4.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/4.usbdev_av_buffer.3986639467 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 152524521 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:07 PM PDT 24 |
| Finished | Aug 16 05:33:08 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-5b3b7c38-151d-4cd7-b536-9124fcd30548 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39866 39467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_av_buffer.3986639467 |
| Directory | /workspace/4.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/4.usbdev_av_empty.2368991602 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 157297220 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:13 PM PDT 24 |
| Finished | Aug 16 05:33:14 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a0a89f74-1f51-4e14-a401-9e0e4a82e7bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23689 91602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_av_empty.2368991602 |
| Directory | /workspace/4.usbdev_av_empty/latest |
| Test location | /workspace/coverage/default/4.usbdev_av_overflow.1984480875 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 178867648 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:12 PM PDT 24 |
| Finished | Aug 16 05:33:13 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-6b3688f1-e5d3-4ee8-9f6b-f90a5add69e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19844 80875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_av_overflow.1984480875 |
| Directory | /workspace/4.usbdev_av_overflow/latest |
| Test location | /workspace/coverage/default/4.usbdev_bitstuff_err.3507703725 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 175895988 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:33:09 PM PDT 24 |
| Finished | Aug 16 05:33:10 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-76491dc5-d51d-42f2-b29c-b672f31d217e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35077 03725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_bitstuff_err.3507703725 |
| Directory | /workspace/4.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_data_toggle_clear.714535031 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 522191476 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:33:15 PM PDT 24 |
| Finished | Aug 16 05:33:16 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-80e40994-ede3-48f7-b11a-8cc47e503631 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71453 5031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_clear.714535031 |
| Directory | /workspace/4.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/4.usbdev_data_toggle_restore.427148628 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 781829053 ps |
| CPU time | 2.31 seconds |
| Started | Aug 16 05:33:17 PM PDT 24 |
| Finished | Aug 16 05:33:19 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-7fccbd11-a089-43f2-b89f-6d2d900b9d0f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=427148628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.427148628 |
| Directory | /workspace/4.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/4.usbdev_device_address.2789588564 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 38360500474 ps |
| CPU time | 61.53 seconds |
| Started | Aug 16 05:33:16 PM PDT 24 |
| Finished | Aug 16 05:34:17 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-3d1a74e8-39ee-4c09-8b28-361978d02e7a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27895 88564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.2789588564 |
| Directory | /workspace/4.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/4.usbdev_device_timeout.3265290909 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 1572251959 ps |
| CPU time | 39.08 seconds |
| Started | Aug 16 05:33:17 PM PDT 24 |
| Finished | Aug 16 05:33:56 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-fa408c4d-58cb-4396-8cce-6ef1762380f5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3265290909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.3265290909 |
| Directory | /workspace/4.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/4.usbdev_disable_endpoint.1625138683 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 561132380 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:33:15 PM PDT 24 |
| Finished | Aug 16 05:33:17 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-9aca2726-d08a-464e-a3d7-bf440597ad3a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16251 38683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_disable_endpoint.1625138683 |
| Directory | /workspace/4.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/4.usbdev_disconnected.1592991437 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 142834708 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:33:15 PM PDT 24 |
| Finished | Aug 16 05:33:16 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-cf4cc8f1-cc9d-41c5-a336-32b186e29be3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15929 91437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_disconnected.1592991437 |
| Directory | /workspace/4.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/4.usbdev_enable.44606881 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 34750383 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:33:17 PM PDT 24 |
| Finished | Aug 16 05:33:18 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-ab4efbe5-8bdc-4d65-8937-4adc00b8f4aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44606 881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_enable.44606881 |
| Directory | /workspace/4.usbdev_enable/latest |
| Test location | /workspace/coverage/default/4.usbdev_endpoint_access.2080466176 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 947927855 ps |
| CPU time | 2.73 seconds |
| Started | Aug 16 05:33:15 PM PDT 24 |
| Finished | Aug 16 05:33:18 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-a582ffe5-d6ff-40f5-8f84-b2d9eb98a381 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20804 66176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.2080466176 |
| Directory | /workspace/4.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/4.usbdev_endpoint_types.345265242 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 160660389 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:15 PM PDT 24 |
| Finished | Aug 16 05:33:16 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-096e877a-c873-4cd0-9f1c-2136a9551214 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=345265242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.345265242 |
| Directory | /workspace/4.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/4.usbdev_fifo_rst.3807663592 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 215009800 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:33:15 PM PDT 24 |
| Finished | Aug 16 05:33:16 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-90cfb541-ce56-4dd2-adfe-1364e3ce9652 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38076 63592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_fifo_rst.3807663592 |
| Directory | /workspace/4.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_hiclk.2642144333 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 101198699143 ps |
| CPU time | 180.89 seconds |
| Started | Aug 16 05:33:19 PM PDT 24 |
| Finished | Aug 16 05:36:20 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-972738ed-088d-437b-b7b2-31a31c93b2fb |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=2642144333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.2642144333 |
| Directory | /workspace/4.usbdev_freq_hiclk/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_hiclk_max.1561112188 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 95339259301 ps |
| CPU time | 147.68 seconds |
| Started | Aug 16 05:33:19 PM PDT 24 |
| Finished | Aug 16 05:35:47 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-95d4fbd7-a53d-4098-a3f0-45b75d6d940f |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1561112188 -assert n opostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspa ce/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk_max.1561112188 |
| Directory | /workspace/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_loclk.746146566 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 99100924044 ps |
| CPU time | 173.43 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:36:11 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-07ce995b-c223-4121-b3cb-fe4e4e896bd0 |
| User | root |
| Command | /workspace/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tc l +ntb_random_seed=746146566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.746146566 |
| Directory | /workspace/4.usbdev_freq_loclk/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_loclk_max.739399677 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 119214881363 ps |
| CPU time | 183.84 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:36:22 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-7d841b33-9a6b-42cf-bb1c-bb0e420d217e |
| User | root |
| Command | /workspace/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_freq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-12 0000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=739399677 -assert no postproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspac e/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk_max.739399677 |
| Directory | /workspace/4.usbdev_freq_loclk_max/latest |
| Test location | /workspace/coverage/default/4.usbdev_freq_phase.1980256002 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 114196444446 ps |
| CPU time | 183.74 seconds |
| Started | Aug 16 05:33:20 PM PDT 24 |
| Finished | Aug 16 05:36:24 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-05bae28d-b602-4f1a-adf4-29df0fef2d59 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19802 56002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_phase.1980256002 |
| Directory | /workspace/4.usbdev_freq_phase/latest |
| Test location | /workspace/coverage/default/4.usbdev_in_iso.1255144704 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 223323253 ps |
| CPU time | 1.21 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:33:19 PM PDT 24 |
| Peak memory | 224040 kb |
| Host | smart-da9f65b5-b7fc-4c80-ae2f-be6e5f968756 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1255144704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.1255144704 |
| Directory | /workspace/4.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/4.usbdev_in_stall.3765778501 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 143361896 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:33:19 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-18c4e72d-b4dc-4610-829e-3bc07639d47e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37657 78501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_in_stall.3765778501 |
| Directory | /workspace/4.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/4.usbdev_in_trans.2959692260 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 231652434 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:33:12 PM PDT 24 |
| Finished | Aug 16 05:33:14 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a65b243b-daae-447c-b943-5df41a6dac58 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29596 92260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_in_trans.2959692260 |
| Directory | /workspace/4.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_invalid_sync.369544404 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 4594880731 ps |
| CPU time | 137.01 seconds |
| Started | Aug 16 05:33:22 PM PDT 24 |
| Finished | Aug 16 05:35:39 PM PDT 24 |
| Peak memory | 218412 kb |
| Host | smart-99ed3cbb-06cb-4cf3-9f83-17c9dfe9e55c |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=369544404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.369544404 |
| Directory | /workspace/4.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/4.usbdev_iso_retraction.2265659046 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 9357290918 ps |
| CPU time | 69.67 seconds |
| Started | Aug 16 05:33:16 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-28420eba-87db-492f-af44-e688510517bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2265659046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.2265659046 |
| Directory | /workspace/4.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/4.usbdev_link_in_err.1169903304 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 203789485 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:15 PM PDT 24 |
| Finished | Aug 16 05:33:16 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-e42535a6-cac4-4269-9012-8c65bda98cc6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11699 03304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_link_in_err.1169903304 |
| Directory | /workspace/4.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_link_resume.3018718834 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 29013060437 ps |
| CPU time | 46.46 seconds |
| Started | Aug 16 05:33:13 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-cee9e023-4dda-4087-884d-b0d0ed69cdec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30187 18834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_link_resume.3018718834 |
| Directory | /workspace/4.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/4.usbdev_link_suspend.1121911613 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 3846356264 ps |
| CPU time | 5.69 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:33:16 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-303e42d1-9b73-437f-aacc-9ce9a91c30ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11219 11613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_link_suspend.1121911613 |
| Directory | /workspace/4.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/4.usbdev_low_speed_traffic.1243467688 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 2760273800 ps |
| CPU time | 29.67 seconds |
| Started | Aug 16 05:33:13 PM PDT 24 |
| Finished | Aug 16 05:33:42 PM PDT 24 |
| Peak memory | 218776 kb |
| Host | smart-d5fd688c-4ac8-483d-a1c8-813ae5237a83 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1243467688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.1243467688 |
| Directory | /workspace/4.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_inter_pkt_delay.4009177885 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 2166178604 ps |
| CPU time | 62.8 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:34:21 PM PDT 24 |
| Peak memory | 217552 kb |
| Host | smart-2e25eed3-8ef4-4826-924d-7a26b9bc63f7 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=4009177885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.4009177885 |
| Directory | /workspace/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_length_in_transaction.2192267892 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 248308719 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:33:12 PM PDT 24 |
| Finished | Aug 16 05:33:13 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-71e8ea84-7d69-40f6-a443-c061d1ffe3c5 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2192267892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.2192267892 |
| Directory | /workspace/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_length_out_transaction.3691675702 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 280815951 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:33:22 PM PDT 24 |
| Finished | Aug 16 05:33:23 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-dca22749-cc5f-48ea-8ea2-38361e7871f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36916 75702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.3691675702 |
| Directory | /workspace/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_non_iso_usb_traffic.441088810 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 1777865209 ps |
| CPU time | 18.24 seconds |
| Started | Aug 16 05:33:17 PM PDT 24 |
| Finished | Aug 16 05:33:36 PM PDT 24 |
| Peak memory | 217572 kb |
| Host | smart-7cd48a44-cb0f-4d09-9098-c55860364fdc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44108 8810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.441088810 |
| Directory | /workspace/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/4.usbdev_max_usb_traffic.2564610312 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 1987476740 ps |
| CPU time | 57.21 seconds |
| Started | Aug 16 05:33:16 PM PDT 24 |
| Finished | Aug 16 05:34:13 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-a945b584-07f2-4dff-9155-e20b27d3d3d2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2564610312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.2564610312 |
| Directory | /workspace/4.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/4.usbdev_min_inter_pkt_delay.2723498067 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 1825546055 ps |
| CPU time | 17.05 seconds |
| Started | Aug 16 05:33:17 PM PDT 24 |
| Finished | Aug 16 05:33:34 PM PDT 24 |
| Peak memory | 217364 kb |
| Host | smart-4f099137-b400-42f8-a76f-96ec0aa5bb0e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2723498067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.2723498067 |
| Directory | /workspace/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/4.usbdev_min_length_in_transaction.4049223425 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 192578757 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:11 PM PDT 24 |
| Finished | Aug 16 05:33:12 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-0ac20eaa-bc28-43be-aeea-8c5eab9c0fa4 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4049223425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.4049223425 |
| Directory | /workspace/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_min_length_out_transaction.1860532513 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 166245790 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:12 PM PDT 24 |
| Finished | Aug 16 05:33:13 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-7a1826d1-80b0-474a-82bc-776966beaa29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18605 32513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.1860532513 |
| Directory | /workspace/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_nak_trans.300119382 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 229601242 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:33:14 PM PDT 24 |
| Finished | Aug 16 05:33:15 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-9fffcc86-e53d-40e2-9757-1620b7c74e3c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30011 9382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_nak_trans.300119382 |
| Directory | /workspace/4.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_out_iso.1742575625 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 192863806 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:19 PM PDT 24 |
| Finished | Aug 16 05:33:20 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-cd712634-a327-4a03-b302-a38281175650 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17425 75625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_out_iso.1742575625 |
| Directory | /workspace/4.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/4.usbdev_out_stall.3974410163 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 182826352 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:19 PM PDT 24 |
| Finished | Aug 16 05:33:20 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-d46de50b-bdf8-41b7-a652-58986063944e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39744 10163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_out_stall.3974410163 |
| Directory | /workspace/4.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/4.usbdev_out_trans_nak.1576473920 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 204861486 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:33:19 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-6ec6db50-3f6b-4512-9b1e-1f86f3d1a527 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15764 73920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_out_trans_nak.1576473920 |
| Directory | /workspace/4.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/4.usbdev_pending_in_trans.142772466 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 164978125 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:33:14 PM PDT 24 |
| Finished | Aug 16 05:33:15 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-ae46b299-7e8b-404b-84e3-3dcd5c486157 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14277 2466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pending_in_trans.142772466 |
| Directory | /workspace/4.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_config_pinflip.3154008732 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 229876749 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:33:20 PM PDT 24 |
| Finished | Aug 16 05:33:21 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-993f3901-ba95-4afa-b255-446f3594370e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3154008732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.3154008732 |
| Directory | /workspace/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_config_rand_bus_type.3503464564 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 278386287 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:33:19 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cf12d0f3-8409-4c5a-9285-64f41c5bb06c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35034 64564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.3503464564 |
| Directory | /workspace/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_config_usb_ref_disable.1126475510 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 144905595 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:33:28 PM PDT 24 |
| Finished | Aug 16 05:33:29 PM PDT 24 |
| Peak memory | 207264 kb |
| Host | smart-840c0b01-413a-47d3-a5ab-8efe817d90b1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11264 75510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.1126475510 |
| Directory | /workspace/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/4.usbdev_phy_pins_sense.3818193080 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 40565687 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:33:22 PM PDT 24 |
| Finished | Aug 16 05:33:23 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-c873cf68-5625-4e93-8cec-203ec91214f5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38181 93080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.3818193080 |
| Directory | /workspace/4.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/4.usbdev_pkt_buffer.1301029564 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 9146842675 ps |
| CPU time | 23.89 seconds |
| Started | Aug 16 05:33:19 PM PDT 24 |
| Finished | Aug 16 05:33:43 PM PDT 24 |
| Peak memory | 215968 kb |
| Host | smart-841fa841-1063-4d37-8878-e98f300f3858 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13010 29564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pkt_buffer.1301029564 |
| Directory | /workspace/4.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/4.usbdev_pkt_received.2928584620 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 161854542 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:33:19 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-41df52af-55ff-45a2-9ed6-198a54e8f6da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29285 84620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pkt_received.2928584620 |
| Directory | /workspace/4.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/4.usbdev_pkt_sent.4107435240 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 227387735 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:33:34 PM PDT 24 |
| Finished | Aug 16 05:33:35 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-ff4d33a6-d2b7-4c36-a7b6-4f8d13f385fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41074 35240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pkt_sent.4107435240 |
| Directory | /workspace/4.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/4.usbdev_rand_bus_disconnects.2092510850 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 3603717766 ps |
| CPU time | 24.45 seconds |
| Started | Aug 16 05:33:23 PM PDT 24 |
| Finished | Aug 16 05:33:47 PM PDT 24 |
| Peak memory | 217456 kb |
| Host | smart-cc401ab0-2228-4452-8534-3bc9a76f2c58 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2092510850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.2092510850 |
| Directory | /workspace/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/4.usbdev_rand_bus_resets.419379765 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 3238396596 ps |
| CPU time | 87.46 seconds |
| Started | Aug 16 05:33:20 PM PDT 24 |
| Finished | Aug 16 05:34:47 PM PDT 24 |
| Peak memory | 218328 kb |
| Host | smart-8a2b1e91-4751-4011-94a6-16fddfab1035 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=419379765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.419379765 |
| Directory | /workspace/4.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/4.usbdev_rand_suspends.234407006 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 13073745849 ps |
| CPU time | 82.65 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:34:41 PM PDT 24 |
| Peak memory | 218416 kb |
| Host | smart-ebc1d5f7-b8d0-4e99-8a68-10362b4a2bda |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=234407006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.234407006 |
| Directory | /workspace/4.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/4.usbdev_random_length_in_transaction.2064462705 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 200488194 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:20 PM PDT 24 |
| Finished | Aug 16 05:33:21 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-60262e1f-a159-4f6a-a86c-feb9fc3c471f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20644 62705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_in_transaction.2064462705 |
| Directory | /workspace/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_random_length_out_transaction.2306792917 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 181777409 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:33:16 PM PDT 24 |
| Finished | Aug 16 05:33:17 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-eee23a26-9cd0-4e04-ba53-f52919a65b89 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23067 92917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.2306792917 |
| Directory | /workspace/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/4.usbdev_resume_link_active.543440815 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 20196542143 ps |
| CPU time | 23.69 seconds |
| Started | Aug 16 05:33:18 PM PDT 24 |
| Finished | Aug 16 05:33:42 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-36ed9f8d-60e4-460f-894b-de5b158682ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54344 0815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_resume_link_active.543440815 |
| Directory | /workspace/4.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/4.usbdev_rx_full.4045897559 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 250140907 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:33:23 PM PDT 24 |
| Finished | Aug 16 05:33:24 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-bec64e24-7ff2-4fd1-bb4e-12706bea6963 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40458 97559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rx_full.4045897559 |
| Directory | /workspace/4.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/4.usbdev_rx_pid_err.1297653468 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 163941054 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:33:16 PM PDT 24 |
| Finished | Aug 16 05:33:17 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-26957a69-e360-4c45-8f9b-e6e589fc1eab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12976 53468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rx_pid_err.1297653468 |
| Directory | /workspace/4.usbdev_rx_pid_err/latest |
| Test location | /workspace/coverage/default/4.usbdev_sec_cm.2261505677 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 768129936 ps |
| CPU time | 1.9 seconds |
| Started | Aug 16 05:33:23 PM PDT 24 |
| Finished | Aug 16 05:33:25 PM PDT 24 |
| Peak memory | 224232 kb |
| Host | smart-f6d494dd-255a-4142-8861-ece19f2e7ee9 |
| User | root |
| Command | /workspace/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2261505677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.2261505677 |
| Directory | /workspace/4.usbdev_sec_cm/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_priority.2226626539 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 468140357 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:33:17 PM PDT 24 |
| Finished | Aug 16 05:33:19 PM PDT 24 |
| Peak memory | 206564 kb |
| Host | smart-253c4781-d965-4d21-bd8c-d7b70ea87372 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22266 26539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.2226626539 |
| Directory | /workspace/4.usbdev_setup_priority/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_priority_over_stall_response.3186887995 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 201179328 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:23 PM PDT 24 |
| Finished | Aug 16 05:33:24 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-df0c23db-9c9e-461f-9e56-e85c94d8c04a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31868 87995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stall_response_vseq +en_cov=1 -cm line+cond+fsm+t gl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.3186887995 |
| Directory | /workspace/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_stage.1303469107 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 159577422 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:33:22 PM PDT 24 |
| Finished | Aug 16 05:33:23 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-3257f6b8-21df-4a43-86db-b318daad6c80 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13034 69107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_stage.1303469107 |
| Directory | /workspace/4.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/4.usbdev_setup_trans_ignored.1558990546 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 159927274 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:20 PM PDT 24 |
| Finished | Aug 16 05:33:21 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-635c3eca-e9ce-4c78-a27d-2249f3ef02ea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15589 90546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_trans_ignored.1558990546 |
| Directory | /workspace/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/4.usbdev_smoke.1278302175 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 188049100 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:33:17 PM PDT 24 |
| Finished | Aug 16 05:33:18 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-9f434f16-d5da-48c1-b437-55925fccd9be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12783 02175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.1278302175 |
| Directory | /workspace/4.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/4.usbdev_spurious_pids_ignored.2561787620 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 2137938310 ps |
| CPU time | 22.12 seconds |
| Started | Aug 16 05:33:14 PM PDT 24 |
| Finished | Aug 16 05:33:37 PM PDT 24 |
| Peak memory | 223972 kb |
| Host | smart-4ff7df06-a7c2-41dd-a1be-07a420c4a42a |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2561787620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.2561787620 |
| Directory | /workspace/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/4.usbdev_stall_priority_over_nak.157825319 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 222157244 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:33:24 PM PDT 24 |
| Finished | Aug 16 05:33:25 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-e5496165-26e4-4a33-bd51-1afb0e1022a8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15782 5319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.157825319 |
| Directory | /workspace/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/4.usbdev_stall_trans.751549131 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 204815805 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:33:23 PM PDT 24 |
| Finished | Aug 16 05:33:24 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-7d41a62e-982e-4b2d-9ec2-386f92e4e2d0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75154 9131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_trans.751549131 |
| Directory | /workspace/4.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/4.usbdev_stream_len_max.494995960 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 962984002 ps |
| CPU time | 2.39 seconds |
| Started | Aug 16 05:33:35 PM PDT 24 |
| Finished | Aug 16 05:33:38 PM PDT 24 |
| Peak memory | 207820 kb |
| Host | smart-887c4013-0b38-457a-a485-cb3a86c65e07 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=49499 5960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.494995960 |
| Directory | /workspace/4.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/4.usbdev_streaming_out.2713562766 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 1733015032 ps |
| CPU time | 46.41 seconds |
| Started | Aug 16 05:33:27 PM PDT 24 |
| Finished | Aug 16 05:34:13 PM PDT 24 |
| Peak memory | 217392 kb |
| Host | smart-e6785295-06b0-4570-8647-a881472a8500 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27135 62766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_streaming_out.2713562766 |
| Directory | /workspace/4.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/4.usbdev_stress_usb_traffic.866476108 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 7239471771 ps |
| CPU time | 30.04 seconds |
| Started | Aug 16 05:33:16 PM PDT 24 |
| Finished | Aug 16 05:33:47 PM PDT 24 |
| Peak memory | 220136 kb |
| Host | smart-ff770e23-c93c-4e09-95e8-3ef9e02a9573 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad _crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/r epo_top/hw/dv/tools/sim.tcl +ntb_random_seed=866476108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.866476108 |
| Directory | /workspace/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspace/coverage/default/4.usbdev_timeout_missing_host_handshake.2331702336 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 5639431661 ps |
| CPU time | 37.52 seconds |
| Started | Aug 16 05:33:12 PM PDT 24 |
| Finished | Aug 16 05:33:50 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-39e65023-161f-48dd-9ff9-60d930e8bc60 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2331702336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host _handshake.2331702336 |
| Directory | /workspace/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/4.usbdev_tx_rx_disruption.2803349617 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 587402247 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:33:23 PM PDT 24 |
| Finished | Aug 16 05:33:25 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-11c6c2d2-3fe3-4415-a1b4-df72f87c6d25 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2803349617 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_tx_rx_disruption.2803349617 |
| Directory | /workspace/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/40.usbdev_alert_test.569490164 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 38956482 ps |
| CPU time | 0.66 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-e1f96de2-cee8-4429-b884-b6ddcd6cbc8b |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=569490164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.569490164 |
| Directory | /workspace/40.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/40.usbdev_aon_wake_disconnect.3393893173 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 9743272393 ps |
| CPU time | 12.49 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:42 PM PDT 24 |
| Peak memory | 207824 kb |
| Host | smart-7a573b98-cfec-493f-9dbb-4887cc168146 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3393893173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_a on_wake_disconnect.3393893173 |
| Directory | /workspace/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/40.usbdev_aon_wake_reset.731819429 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 15422727008 ps |
| CPU time | 18.55 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:50 PM PDT 24 |
| Peak memory | 215924 kb |
| Host | smart-86a7ac7c-f6d8-4b4e-b4f3-db2483c2d031 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=731819429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.731819429 |
| Directory | /workspace/40.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/40.usbdev_aon_wake_resume.766010465 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 29774854615 ps |
| CPU time | 37.17 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:39:07 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-63359b22-227a-4fc7-a974-90d807615846 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=766010465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_ao n_wake_resume.766010465 |
| Directory | /workspace/40.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/40.usbdev_av_buffer.1285530352 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 150808532 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9686ae94-b76c-4fde-82a8-d43b66110e27 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12855 30352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_av_buffer.1285530352 |
| Directory | /workspace/40.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/40.usbdev_bitstuff_err.2205206345 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 153368659 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-c1d5d068-2a24-4342-9783-df51944d73d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22052 06345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_bitstuff_err.2205206345 |
| Directory | /workspace/40.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/40.usbdev_data_toggle_clear.1494581399 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 335518410 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-03b82931-c68e-4d85-9231-e5371a8545cf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14945 81399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_clear.1494581399 |
| Directory | /workspace/40.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/40.usbdev_data_toggle_restore.3020190090 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 973042583 ps |
| CPU time | 2.58 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-7fd6f94c-b3a6-469b-a70d-46c3b697e758 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3020190090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.3020190090 |
| Directory | /workspace/40.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/40.usbdev_device_address.4142343762 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 17290276541 ps |
| CPU time | 28.84 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207828 kb |
| Host | smart-428b97ef-b784-473e-aa52-1a9c9a4f0150 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41423 43762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.4142343762 |
| Directory | /workspace/40.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/40.usbdev_device_timeout.3091354563 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 1073256469 ps |
| CPU time | 9.21 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:44 PM PDT 24 |
| Peak memory | 207728 kb |
| Host | smart-7d965b6a-efa3-403a-a92c-b37549f8607a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3091354563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.3091354563 |
| Directory | /workspace/40.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/40.usbdev_disable_endpoint.2270948963 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 667953658 ps |
| CPU time | 1.82 seconds |
| Started | Aug 16 05:38:26 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-b8dc0770-02a8-4646-9bc0-9251175b656c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22709 48963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_disable_endpoint.2270948963 |
| Directory | /workspace/40.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/40.usbdev_disconnected.2056776395 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 150128221 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:39:00 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-2e064f40-13a6-45d3-80b3-0136c5462441 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20567 76395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_disconnected.2056776395 |
| Directory | /workspace/40.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/40.usbdev_enable.1395821441 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 53111760 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-2a03470c-150d-4e9f-bf27-e6a927cd780e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13958 21441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_enable.1395821441 |
| Directory | /workspace/40.usbdev_enable/latest |
| Test location | /workspace/coverage/default/40.usbdev_endpoint_access.2708504912 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 879943561 ps |
| CPU time | 2.45 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-600f77d7-b275-419f-b95b-f4dd5a587039 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27085 04912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.2708504912 |
| Directory | /workspace/40.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/40.usbdev_endpoint_types.3649093526 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 635704449 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:38:41 PM PDT 24 |
| Finished | Aug 16 05:38:48 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-77b87826-fb91-4bd3-97d7-52e0c2936ba5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3649093526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.3649093526 |
| Directory | /workspace/40.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/40.usbdev_fifo_rst.2760202983 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 296710744 ps |
| CPU time | 2.08 seconds |
| Started | Aug 16 05:38:35 PM PDT 24 |
| Finished | Aug 16 05:38:37 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-15220f6e-de82-4035-8132-dfaf3e858b26 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27602 02983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_fifo_rst.2760202983 |
| Directory | /workspace/40.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/40.usbdev_in_iso.182757471 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 206167543 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:38:35 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 216872 kb |
| Host | smart-2011e260-7401-4dfb-895c-a28e08addfe2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=182757471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.182757471 |
| Directory | /workspace/40.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/40.usbdev_in_stall.2214877 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 168140340 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-2daf0dbf-f28e-4fcf-ad8f-74133dcc93ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22148 77 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_in_stall.2214877 |
| Directory | /workspace/40.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/40.usbdev_in_trans.1768140141 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 162693688 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:38:37 PM PDT 24 |
| Finished | Aug 16 05:38:38 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-e6044678-354e-4cd2-ab14-eba312a983ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17681 40141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_in_trans.1768140141 |
| Directory | /workspace/40.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_invalid_sync.3320811723 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 4337134740 ps |
| CPU time | 35.44 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:39:06 PM PDT 24 |
| Peak memory | 218380 kb |
| Host | smart-39474ebf-58fb-4f42-b1f5-ba9b375388c5 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3320811723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.3320811723 |
| Directory | /workspace/40.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/40.usbdev_iso_retraction.1721613555 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 14329592659 ps |
| CPU time | 94.12 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:40:05 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-d5b7fb06-606d-4f8a-9db2-ff47d5430932 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1721613555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.1721613555 |
| Directory | /workspace/40.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/40.usbdev_link_in_err.186310972 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 245390223 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:37 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-9e0471d7-7819-4473-8c41-27ebb8ceace4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18631 0972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_link_in_err.186310972 |
| Directory | /workspace/40.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/40.usbdev_link_resume.4177070241 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 30779899154 ps |
| CPU time | 50.39 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:39:21 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-df783193-87d4-4080-b3b5-ded8a2281f1d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41770 70241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_link_resume.4177070241 |
| Directory | /workspace/40.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/40.usbdev_link_suspend.595779252 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 4937365782 ps |
| CPU time | 6.77 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:40 PM PDT 24 |
| Peak memory | 216156 kb |
| Host | smart-bd38aa67-de55-4655-81f3-9c5b6c09106a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59577 9252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_link_suspend.595779252 |
| Directory | /workspace/40.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/40.usbdev_low_speed_traffic.4026258349 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 2777839064 ps |
| CPU time | 21.02 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:55 PM PDT 24 |
| Peak memory | 224108 kb |
| Host | smart-da3a322e-1eaa-45c5-b530-789e3bd6e7e2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4026258349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.4026258349 |
| Directory | /workspace/40.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/40.usbdev_max_inter_pkt_delay.1459979549 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 2072412069 ps |
| CPU time | 19.32 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 224040 kb |
| Host | smart-fcc5c1dd-5380-45bc-a135-2d26bd239657 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1459979549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.1459979549 |
| Directory | /workspace/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/40.usbdev_max_length_in_transaction.1916216962 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 253073975 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-68c3b4e2-2689-4efe-8d7e-4ce4290955fb |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1916216962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.1916216962 |
| Directory | /workspace/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_max_length_out_transaction.897525487 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 247033962 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d0b5918f-a04c-4f18-9f19-2f8f74c07607 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89752 5487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.897525487 |
| Directory | /workspace/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_min_inter_pkt_delay.1701488534 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 3758378209 ps |
| CPU time | 107.94 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:40:19 PM PDT 24 |
| Peak memory | 217544 kb |
| Host | smart-d34c5b05-db05-4633-b47a-84f5e1970952 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1701488534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.1701488534 |
| Directory | /workspace/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/40.usbdev_min_length_in_transaction.4076531074 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 152760359 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-5e51d6fa-7d78-49d1-93ca-a3a5cc22fa06 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=4076531074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.4076531074 |
| Directory | /workspace/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_min_length_out_transaction.2730821585 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 163049713 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:24 PM PDT 24 |
| Finished | Aug 16 05:38:25 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d0d1a9f5-fac6-4047-afed-8e81b88ca334 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27308 21585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.2730821585 |
| Directory | /workspace/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_nak_trans.2785539270 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 206036706 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-c8e8de80-f929-49f6-8792-4cd11778a191 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27855 39270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_nak_trans.2785539270 |
| Directory | /workspace/40.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_out_iso.2501975729 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 198561288 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:35 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-3189f6ec-76fe-4dd1-8b7d-ad05b8bffe68 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25019 75729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_out_iso.2501975729 |
| Directory | /workspace/40.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/40.usbdev_out_stall.1939184529 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 151169978 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-dedfd2a4-e6d2-48c4-8308-f6f85471e822 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19391 84529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_out_stall.1939184529 |
| Directory | /workspace/40.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/40.usbdev_out_trans_nak.3761389911 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 189206993 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-1cd9dc71-abbc-4d6a-893c-a93f611a35f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37613 89911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_out_trans_nak.3761389911 |
| Directory | /workspace/40.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/40.usbdev_pending_in_trans.3162611937 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 160835147 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-32d7c8bf-f3f7-4973-a0ee-1f23e6044343 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31626 11937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pending_in_trans.3162611937 |
| Directory | /workspace/40.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_phy_config_pinflip.3391229016 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 218381688 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-b09b1db3-c5c1-42ba-a2d0-3462a4106e51 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=3391229016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.3391229016 |
| Directory | /workspace/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/40.usbdev_phy_config_usb_ref_disable.986680979 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 166611910 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-9e84341a-a1ea-4661-b372-280d6488c5b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=98668 0979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.986680979 |
| Directory | /workspace/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/40.usbdev_phy_pins_sense.4292471312 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 38486844 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-a4fb0efb-0155-4357-adea-ac82a760e52a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42924 71312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.4292471312 |
| Directory | /workspace/40.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/40.usbdev_pkt_buffer.2379555733 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 7019730207 ps |
| CPU time | 16.62 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:47 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-bb977436-ac1c-4f98-966b-fcc61c79628c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23795 55733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pkt_buffer.2379555733 |
| Directory | /workspace/40.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/40.usbdev_pkt_received.4028779395 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 182885868 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-e5ee8b6e-dea1-4339-b6f2-12944aa7f148 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40287 79395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pkt_received.4028779395 |
| Directory | /workspace/40.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/40.usbdev_pkt_sent.2550881205 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 155875910 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-0ce80527-6aae-4f18-b26e-c96b18959018 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25508 81205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pkt_sent.2550881205 |
| Directory | /workspace/40.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/40.usbdev_random_length_in_transaction.884301514 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 182973542 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:32 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-63aab4f2-0983-4411-94af-e9bb7963e013 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88430 1514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_in_transaction.884301514 |
| Directory | /workspace/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_random_length_out_transaction.2064611038 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 178964052 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-b415e240-4972-4c07-ab79-ad1400e2747d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20646 11038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.2064611038 |
| Directory | /workspace/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/40.usbdev_rx_crc_err.1028413559 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 147130393 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-a14abbf4-4f3b-41dc-9837-7a35c3a062c3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10284 13559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_rx_crc_err.1028413559 |
| Directory | /workspace/40.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/40.usbdev_rx_full.3402324800 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 396499127 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-43f1ede9-d1f5-469e-b47a-48031d42648f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34023 24800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_rx_full.3402324800 |
| Directory | /workspace/40.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/40.usbdev_setup_stage.1454032767 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 148042084 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:35 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-f389f61d-f116-4488-8e75-ff8200823134 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14540 32767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_setup_stage.1454032767 |
| Directory | /workspace/40.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/40.usbdev_setup_trans_ignored.1397924438 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 168024867 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-6ce260d4-8e1c-4aac-921f-16b5c3ca2c4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13979 24438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_setup_trans_ignored.1397924438 |
| Directory | /workspace/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/40.usbdev_smoke.3674984661 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 212465520 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-9392f094-42a1-4a68-b652-f004ec41bd24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36749 84661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.3674984661 |
| Directory | /workspace/40.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/40.usbdev_spurious_pids_ignored.932142585 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 2881206278 ps |
| CPU time | 28.56 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:56 PM PDT 24 |
| Peak memory | 217696 kb |
| Host | smart-1161ebb6-d04c-4da7-9b67-93aab985070a |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=932142585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.932142585 |
| Directory | /workspace/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/40.usbdev_stall_priority_over_nak.985459704 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 224809800 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-e4204b61-ad3a-48de-8f80-fa94be633764 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=98545 9704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.985459704 |
| Directory | /workspace/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/40.usbdev_stall_trans.347632353 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 194443180 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-0ad1b89f-6b89-4945-a5ff-0ba0964d2fbc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34763 2353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_trans.347632353 |
| Directory | /workspace/40.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/40.usbdev_stream_len_max.2186629789 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 617520813 ps |
| CPU time | 1.84 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-0f99f4cd-1c45-4eb5-b962-9aed61a836fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21866 29789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.2186629789 |
| Directory | /workspace/40.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/40.usbdev_streaming_out.300517005 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 1972379944 ps |
| CPU time | 55.64 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-e30e3373-ff51-40e9-9fd0-23889eba5273 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30051 7005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_streaming_out.300517005 |
| Directory | /workspace/40.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/40.usbdev_timeout_missing_host_handshake.1811449975 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 1943642213 ps |
| CPU time | 46.47 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:39:15 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-694cee16-56fd-4e97-85e7-bde9d37be9ad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1811449975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_hos t_handshake.1811449975 |
| Directory | /workspace/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/40.usbdev_tx_rx_disruption.1187855882 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 445542183 ps |
| CPU time | 1.42 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:35 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-7a685a43-808b-4bc6-8e29-4ef422c678ec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1187855882 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_tx_rx_disruption.1187855882 |
| Directory | /workspace/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/400.usbdev_tx_rx_disruption.2827490764 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 560853023 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-81eed557-52fe-4621-84f5-34ee27b7fcae |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2827490764 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 400.usbdev_tx_rx_disruption.2827490764 |
| Directory | /workspace/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/401.usbdev_tx_rx_disruption.2198817969 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 489449390 ps |
| CPU time | 1.42 seconds |
| Started | Aug 16 05:40:42 PM PDT 24 |
| Finished | Aug 16 05:40:43 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-caca85a5-fa43-46b4-a499-ec992f2c2790 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2198817969 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 401.usbdev_tx_rx_disruption.2198817969 |
| Directory | /workspace/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/402.usbdev_tx_rx_disruption.3555345577 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 635060771 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:44 PM PDT 24 |
| Finished | Aug 16 05:40:46 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-7a7c0f6c-eeae-4ec6-a4b2-febd2017f695 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3555345577 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 402.usbdev_tx_rx_disruption.3555345577 |
| Directory | /workspace/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/403.usbdev_tx_rx_disruption.2024040475 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 649483788 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:46 PM PDT 24 |
| Finished | Aug 16 05:40:48 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-02cb3fe3-dcac-4e05-bca7-8295f011f24e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2024040475 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 403.usbdev_tx_rx_disruption.2024040475 |
| Directory | /workspace/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/404.usbdev_tx_rx_disruption.1940326481 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 578050331 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:40:46 PM PDT 24 |
| Finished | Aug 16 05:40:48 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-dda2ffab-592e-4364-8e24-436510d31d77 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1940326481 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 404.usbdev_tx_rx_disruption.1940326481 |
| Directory | /workspace/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/405.usbdev_tx_rx_disruption.293724689 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 439315525 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:57 PM PDT 24 |
| Finished | Aug 16 05:40:59 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-7aad72d6-9755-4330-846d-6e84e707d365 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=293724689 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 405.usbdev_tx_rx_disruption.293724689 |
| Directory | /workspace/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/406.usbdev_tx_rx_disruption.2745004823 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 483280670 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:26 PM PDT 24 |
| Finished | Aug 16 05:40:28 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-4f24bda8-e104-4435-89ae-add0882e0bb0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2745004823 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 406.usbdev_tx_rx_disruption.2745004823 |
| Directory | /workspace/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/407.usbdev_tx_rx_disruption.3607863963 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 444715772 ps |
| CPU time | 1.34 seconds |
| Started | Aug 16 05:40:53 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-d3146944-479e-4d3e-8bc8-b60ae9be9c47 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3607863963 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 407.usbdev_tx_rx_disruption.3607863963 |
| Directory | /workspace/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/408.usbdev_tx_rx_disruption.1760129493 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 637104137 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:40:19 PM PDT 24 |
| Finished | Aug 16 05:40:21 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-53c6419f-5ba9-47f5-8f7f-89501b5c1e88 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1760129493 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 408.usbdev_tx_rx_disruption.1760129493 |
| Directory | /workspace/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/409.usbdev_tx_rx_disruption.3070293475 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 654001923 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:39 PM PDT 24 |
| Finished | Aug 16 05:40:41 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-285b9717-1074-4221-b3c2-48bac747a7e9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3070293475 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 409.usbdev_tx_rx_disruption.3070293475 |
| Directory | /workspace/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/41.usbdev_alert_test.2479012384 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 49797000 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:39:01 PM PDT 24 |
| Finished | Aug 16 05:39:02 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-e5da24af-499c-4109-a4e9-c7c5e015ed42 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2479012384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.2479012384 |
| Directory | /workspace/41.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/41.usbdev_aon_wake_disconnect.4002076038 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 6129217113 ps |
| CPU time | 9.03 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:43 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-c0781039-df29-4d75-9e9e-bfb5a92531f8 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4002076038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_a on_wake_disconnect.4002076038 |
| Directory | /workspace/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/41.usbdev_aon_wake_reset.1116207347 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 21425852326 ps |
| CPU time | 29.1 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:57 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-f3a92029-2249-407a-bd9c-d1dbe4094756 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1116207347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.1116207347 |
| Directory | /workspace/41.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/41.usbdev_aon_wake_resume.2310643489 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 29334149495 ps |
| CPU time | 36.49 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:39:10 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-45a81fa2-4fce-4d36-bba7-de5b8d574490 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2310643489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_a on_wake_resume.2310643489 |
| Directory | /workspace/41.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/41.usbdev_av_buffer.1668874242 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 186142180 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:28 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-4c79caed-8431-43a2-bc14-6c2fbb338460 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16688 74242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_av_buffer.1668874242 |
| Directory | /workspace/41.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/41.usbdev_bitstuff_err.3987333816 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 147764461 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:13 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-cf062839-81aa-4c54-8cf2-88b8286f67fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39873 33816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_bitstuff_err.3987333816 |
| Directory | /workspace/41.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/41.usbdev_data_toggle_clear.488211412 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 479828066 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-dee76ef2-2223-4b23-9b80-cfed3c386583 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48821 1412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_clear.488211412 |
| Directory | /workspace/41.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/41.usbdev_device_address.1868012855 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 40246806692 ps |
| CPU time | 66.95 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:39:38 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-fee192ce-60a9-4a21-8f36-71e61bdaab39 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18680 12855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.1868012855 |
| Directory | /workspace/41.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/41.usbdev_device_timeout.3298806516 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 624249719 ps |
| CPU time | 4.67 seconds |
| Started | Aug 16 05:38:35 PM PDT 24 |
| Finished | Aug 16 05:38:40 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-da0df3a4-2f34-4e5e-ad7a-075cf794f12b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3298806516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.3298806516 |
| Directory | /workspace/41.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/41.usbdev_disable_endpoint.1498871943 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 699178685 ps |
| CPU time | 1.75 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 206780 kb |
| Host | smart-13fcd3c6-b5ff-4b46-b142-2e057cc68f85 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14988 71943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_disable_endpoint.1498871943 |
| Directory | /workspace/41.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/41.usbdev_disconnected.3828735059 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 140677128 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-b8db442f-8be6-4e43-82d6-8585861016ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38287 35059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_disconnected.3828735059 |
| Directory | /workspace/41.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/41.usbdev_enable.3295340853 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 44981592 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-3015c56a-a280-4bb1-a84f-33067c68f1ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32953 40853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_enable.3295340853 |
| Directory | /workspace/41.usbdev_enable/latest |
| Test location | /workspace/coverage/default/41.usbdev_endpoint_access.3380967579 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 957914109 ps |
| CPU time | 2.49 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-4fa82062-cd52-4f02-9061-e3b78dabd049 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33809 67579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.3380967579 |
| Directory | /workspace/41.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/41.usbdev_endpoint_types.3840853400 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 540991772 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-a2a1747d-d9cb-4ab7-a639-a89d0d80f2bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3840853400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.3840853400 |
| Directory | /workspace/41.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/41.usbdev_fifo_rst.2378562498 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 191341006 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-346b99cc-3e03-4c30-847e-a4ca19545271 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23785 62498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_fifo_rst.2378562498 |
| Directory | /workspace/41.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/41.usbdev_in_iso.2590033797 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 236894191 ps |
| CPU time | 1.14 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-72019452-e0df-43a1-96b6-54485eddf0d0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2590033797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.2590033797 |
| Directory | /workspace/41.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/41.usbdev_in_stall.2725076541 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 181246582 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-84787b92-bffa-4493-8dd6-0204c925778e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27250 76541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_in_stall.2725076541 |
| Directory | /workspace/41.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/41.usbdev_in_trans.2512688403 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 232887823 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-d50de7fd-93f5-403b-9032-53f3846d74d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25126 88403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_in_trans.2512688403 |
| Directory | /workspace/41.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_invalid_sync.3419739823 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 2596183300 ps |
| CPU time | 24.22 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:57 PM PDT 24 |
| Peak memory | 217512 kb |
| Host | smart-cf45d020-fa8b-4716-8d16-b9adb7bec4e0 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3419739823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.3419739823 |
| Directory | /workspace/41.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/41.usbdev_iso_retraction.3224942073 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 10232229351 ps |
| CPU time | 74.29 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:39:44 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-1f9ad95d-1ff9-4bc3-ba91-3e147a2660ea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3224942073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.3224942073 |
| Directory | /workspace/41.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/41.usbdev_link_in_err.396338213 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 172188118 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:35 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-88a774e5-0157-431c-8ce2-d391a6a2a7da |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39633 8213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_link_in_err.396338213 |
| Directory | /workspace/41.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/41.usbdev_link_resume.2982463573 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 10687251014 ps |
| CPU time | 16.67 seconds |
| Started | Aug 16 05:38:38 PM PDT 24 |
| Finished | Aug 16 05:38:55 PM PDT 24 |
| Peak memory | 207876 kb |
| Host | smart-35c4befb-0458-452d-a4e8-65fac0c07a3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29824 63573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_link_resume.2982463573 |
| Directory | /workspace/41.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/41.usbdev_link_suspend.1640898233 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 8556189823 ps |
| CPU time | 10.72 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:39:07 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-025196da-8dab-44df-9cb8-c19e0e802d09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16408 98233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_link_suspend.1640898233 |
| Directory | /workspace/41.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/41.usbdev_low_speed_traffic.1442250635 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 2990892975 ps |
| CPU time | 80.99 seconds |
| Started | Aug 16 05:38:27 PM PDT 24 |
| Finished | Aug 16 05:39:49 PM PDT 24 |
| Peak memory | 218228 kb |
| Host | smart-733e051f-eedb-4fbe-bc41-e1c7f9bf8fc6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1442250635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.1442250635 |
| Directory | /workspace/41.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/41.usbdev_max_inter_pkt_delay.2302477727 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 2287781323 ps |
| CPU time | 59.88 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 215728 kb |
| Host | smart-443f2e03-a48a-44a5-b148-aa3d39e9d7d7 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2302477727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.2302477727 |
| Directory | /workspace/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/41.usbdev_max_length_in_transaction.1027196313 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 239174833 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:39 PM PDT 24 |
| Peak memory | 207320 kb |
| Host | smart-382c7996-01be-4562-8d16-e86a78ecd072 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1027196313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.1027196313 |
| Directory | /workspace/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_max_length_out_transaction.935971394 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 218989391 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:38:36 PM PDT 24 |
| Finished | Aug 16 05:38:48 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-b95530b2-fcb1-4e40-a5ba-374c6ecb2c08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93597 1394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.935971394 |
| Directory | /workspace/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_min_inter_pkt_delay.1481646915 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 4116253918 ps |
| CPU time | 33.56 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:39:03 PM PDT 24 |
| Peak memory | 217544 kb |
| Host | smart-a253f8ac-20a5-4989-8c04-92dedb9ddaf9 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1481646915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.1481646915 |
| Directory | /workspace/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/41.usbdev_min_length_in_transaction.3015885727 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 193866091 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-d53f8659-be59-439e-88f5-ef7f23afa1dc |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3015885727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.3015885727 |
| Directory | /workspace/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_min_length_out_transaction.645896010 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 191426149 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-4455f1d2-89c9-4a45-8ea7-a0fa2a979833 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64589 6010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.645896010 |
| Directory | /workspace/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_nak_trans.1484570564 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 224675724 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-09624f7e-cb39-4b15-aff3-cff2c7d0df95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14845 70564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_nak_trans.1484570564 |
| Directory | /workspace/41.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_out_iso.208941186 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 158420416 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:38:32 PM PDT 24 |
| Finished | Aug 16 05:38:38 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-f709be3e-8031-4bfd-9bfc-16a2ee9c7c9e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20894 1186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_out_iso.208941186 |
| Directory | /workspace/41.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/41.usbdev_out_stall.3414128265 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 170551793 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e482655f-1100-4e32-96b3-c490f4291d99 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34141 28265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_out_stall.3414128265 |
| Directory | /workspace/41.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/41.usbdev_out_trans_nak.1003309615 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 188113876 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:38:36 PM PDT 24 |
| Finished | Aug 16 05:38:37 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-32218d68-85c2-4626-8fa3-7962d70e85de |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10033 09615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_out_trans_nak.1003309615 |
| Directory | /workspace/41.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/41.usbdev_pending_in_trans.3853671648 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 163267040 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-519a8900-e4cf-4c76-a822-0b4968e99429 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38536 71648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pending_in_trans.3853671648 |
| Directory | /workspace/41.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_phy_config_pinflip.2861304108 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 248553526 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-83ceaf9b-d2dd-4818-b56e-a14cd8f32322 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2861304108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.2861304108 |
| Directory | /workspace/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/41.usbdev_phy_config_usb_ref_disable.1906817447 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 175977777 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207012 kb |
| Host | smart-a7eca3d7-44a7-4847-8ff2-fa4595df521f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19068 17447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.1906817447 |
| Directory | /workspace/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/41.usbdev_phy_pins_sense.2501314102 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 41734791 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-76dc1e9c-2a55-460c-8e18-0448430b31ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25013 14102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.2501314102 |
| Directory | /workspace/41.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/41.usbdev_pkt_buffer.408602531 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 14729743667 ps |
| CPU time | 39.83 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:39:10 PM PDT 24 |
| Peak memory | 224108 kb |
| Host | smart-89010aa0-2e71-4211-b5dd-2891cf0cf00e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40860 2531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pkt_buffer.408602531 |
| Directory | /workspace/41.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/41.usbdev_pkt_received.3166693101 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 160690348 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-fe9bfa7c-74da-4d51-82da-10e59ec67727 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31666 93101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pkt_received.3166693101 |
| Directory | /workspace/41.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/41.usbdev_pkt_sent.2311129865 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 267691133 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:38:36 PM PDT 24 |
| Finished | Aug 16 05:38:37 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-da53f288-a6e3-4be9-9293-5200f4b298a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23111 29865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pkt_sent.2311129865 |
| Directory | /workspace/41.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/41.usbdev_random_length_in_transaction.979933333 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 195454188 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-e6a8774a-a424-4c93-b69c-e11b3e0c6e18 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97993 3333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_in_transaction.979933333 |
| Directory | /workspace/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_random_length_out_transaction.206840999 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 188213191 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:35 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-f6a32291-b36b-42d1-b99b-66a8387df0ab |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20684 0999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.206840999 |
| Directory | /workspace/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/41.usbdev_rx_crc_err.2879763053 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 145560815 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-c8f88974-fadb-4d84-b7c6-d7ca58aaa9d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28797 63053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_rx_crc_err.2879763053 |
| Directory | /workspace/41.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/41.usbdev_rx_full.1989993901 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 316687738 ps |
| CPU time | 1.19 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-8916a58a-db00-4198-88fd-8b18ecc834d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19899 93901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_rx_full.1989993901 |
| Directory | /workspace/41.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/41.usbdev_setup_stage.3302981499 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 181307276 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:36 PM PDT 24 |
| Finished | Aug 16 05:38:37 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-f34606e9-345c-40be-bbf0-9e5dc91a47eb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33029 81499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_setup_stage.3302981499 |
| Directory | /workspace/41.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/41.usbdev_setup_trans_ignored.561122002 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 175496112 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:38:34 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-ab324739-ae1e-4209-b318-6b629b81f03e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=56112 2002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_setup_trans_ignored.561122002 |
| Directory | /workspace/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/41.usbdev_smoke.2653311061 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 218582722 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-4549f66e-3d2a-4a59-b9da-b0de20778ed6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26533 11061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.2653311061 |
| Directory | /workspace/41.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/41.usbdev_spurious_pids_ignored.418974502 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 2934895302 ps |
| CPU time | 22.94 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:52 PM PDT 24 |
| Peak memory | 224040 kb |
| Host | smart-ee549fd4-2bb0-418e-b498-d74a804a3be7 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=418974502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.418974502 |
| Directory | /workspace/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/41.usbdev_stall_priority_over_nak.2580083861 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 170146623 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 207372 kb |
| Host | smart-348281cb-8d75-402a-9b82-0c51175c76dd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25800 83861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.2580083861 |
| Directory | /workspace/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/41.usbdev_stall_trans.50961013 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 181836414 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:41 PM PDT 24 |
| Finished | Aug 16 05:38:42 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-a62361df-e676-4bfc-9316-0e92544d254a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50961 013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_trans.50961013 |
| Directory | /workspace/41.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/41.usbdev_stream_len_max.1129179578 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 353749260 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-88651318-7d05-497e-9091-2fde0bfee498 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11291 79578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.1129179578 |
| Directory | /workspace/41.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/41.usbdev_streaming_out.262790456 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 2860309364 ps |
| CPU time | 22.02 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:52 PM PDT 24 |
| Peak memory | 216004 kb |
| Host | smart-eca38446-0251-4739-aa81-fa4ce8f861ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26279 0456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_streaming_out.262790456 |
| Directory | /workspace/41.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/41.usbdev_timeout_missing_host_handshake.1413854813 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 2916104547 ps |
| CPU time | 18.78 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:49 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-a00765ec-f8fa-492d-b1ce-ed551ae7440d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1413854813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_hos t_handshake.1413854813 |
| Directory | /workspace/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/41.usbdev_tx_rx_disruption.131976108 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 578361822 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-62cf0e01-5e0b-4c7c-a6f8-17027a0459e0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=131976108 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 41.usbdev_tx_rx_disruption.131976108 |
| Directory | /workspace/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/410.usbdev_tx_rx_disruption.823978327 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 624395487 ps |
| CPU time | 1.82 seconds |
| Started | Aug 16 05:40:57 PM PDT 24 |
| Finished | Aug 16 05:40:59 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-50430709-997a-4cc9-be0b-371e17c25d14 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=823978327 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 410.usbdev_tx_rx_disruption.823978327 |
| Directory | /workspace/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/411.usbdev_tx_rx_disruption.3232983119 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 640810959 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:45 PM PDT 24 |
| Finished | Aug 16 05:40:47 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-15d228f3-141c-41f4-8733-c2fa446b50ce |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3232983119 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 411.usbdev_tx_rx_disruption.3232983119 |
| Directory | /workspace/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/412.usbdev_tx_rx_disruption.3941894202 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 448636087 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:54 PM PDT 24 |
| Finished | Aug 16 05:40:56 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-61b0e6d8-a139-45d3-83d3-2370b1e99cd8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3941894202 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 412.usbdev_tx_rx_disruption.3941894202 |
| Directory | /workspace/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/413.usbdev_tx_rx_disruption.2308511930 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 532433671 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:55 PM PDT 24 |
| Finished | Aug 16 05:40:56 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-23b985c2-51c8-4274-b0eb-17c21c32f72b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2308511930 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 413.usbdev_tx_rx_disruption.2308511930 |
| Directory | /workspace/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/414.usbdev_tx_rx_disruption.1586303504 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 669624865 ps |
| CPU time | 1.81 seconds |
| Started | Aug 16 05:40:34 PM PDT 24 |
| Finished | Aug 16 05:40:36 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-a49f5ce6-8333-4070-a493-e7141d5430b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1586303504 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 414.usbdev_tx_rx_disruption.1586303504 |
| Directory | /workspace/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/415.usbdev_tx_rx_disruption.3798454974 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 552404143 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:41:02 PM PDT 24 |
| Finished | Aug 16 05:41:03 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-726abc5f-d267-4203-bc66-7571aa50833c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3798454974 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 415.usbdev_tx_rx_disruption.3798454974 |
| Directory | /workspace/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/416.usbdev_tx_rx_disruption.414364679 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 479498853 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:53 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-f96c2354-0b36-4897-9ad6-3039ffa36f8d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=414364679 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 416.usbdev_tx_rx_disruption.414364679 |
| Directory | /workspace/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/417.usbdev_tx_rx_disruption.4032419605 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 511336760 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:25 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-fadc5953-e052-40b8-8f5c-c1456f68d2b8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4032419605 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 417.usbdev_tx_rx_disruption.4032419605 |
| Directory | /workspace/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/418.usbdev_tx_rx_disruption.624419214 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 597863464 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:40:50 PM PDT 24 |
| Finished | Aug 16 05:40:52 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-3239188d-ebcd-4512-b5eb-3626e4a43836 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=624419214 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 418.usbdev_tx_rx_disruption.624419214 |
| Directory | /workspace/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/419.usbdev_tx_rx_disruption.3849609394 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 574816509 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:40:54 PM PDT 24 |
| Finished | Aug 16 05:40:56 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-9487d0e7-7430-4048-80cf-76ade09e0ef4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3849609394 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 419.usbdev_tx_rx_disruption.3849609394 |
| Directory | /workspace/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/42.usbdev_alert_test.1671529101 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 43333120 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:38:35 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-565b2d43-5b20-45fd-85c0-84e671ad8787 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1671529101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.1671529101 |
| Directory | /workspace/42.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/42.usbdev_aon_wake_reset.3998316598 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 20747320153 ps |
| CPU time | 25.7 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:57 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-6b31d654-8f5b-4cad-bffe-b1798f8e4391 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3998316598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.3998316598 |
| Directory | /workspace/42.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/42.usbdev_aon_wake_resume.3133311401 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 28561464219 ps |
| CPU time | 35.26 seconds |
| Started | Aug 16 05:38:33 PM PDT 24 |
| Finished | Aug 16 05:39:09 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-6a5324cf-f6dc-42e8-9195-97eaf8a14b78 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3133311401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_a on_wake_resume.3133311401 |
| Directory | /workspace/42.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/42.usbdev_av_buffer.614975842 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 170091694 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-70efe980-89fe-4718-a256-8a77f72d67fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61497 5842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_av_buffer.614975842 |
| Directory | /workspace/42.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/42.usbdev_bitstuff_err.3297633593 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 154173825 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:47 PM PDT 24 |
| Finished | Aug 16 05:38:48 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-cc1aa36e-f80a-4f31-8944-405e7d872e5a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32976 33593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_bitstuff_err.3297633593 |
| Directory | /workspace/42.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/42.usbdev_data_toggle_clear.2964616178 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 402773962 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-51a15617-7ab6-46d7-a293-54c20624ed6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29646 16178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_clear.2964616178 |
| Directory | /workspace/42.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/42.usbdev_data_toggle_restore.571256891 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 1076259978 ps |
| CPU time | 2.96 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-e02dafe9-390c-4fd5-b7eb-954bdc905e93 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=571256891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.571256891 |
| Directory | /workspace/42.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/42.usbdev_device_address.610794687 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 37378401064 ps |
| CPU time | 74.23 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:40:11 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-9cf3a239-0f6e-4aaa-b613-90bf76e712ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61079 4687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.610794687 |
| Directory | /workspace/42.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/42.usbdev_device_timeout.697438787 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 884602990 ps |
| CPU time | 19.02 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:31 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-d4a10ea5-c880-4f03-979c-511d4cbbfbac |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=697438787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.697438787 |
| Directory | /workspace/42.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/42.usbdev_disable_endpoint.71176517 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 841938037 ps |
| CPU time | 2.09 seconds |
| Started | Aug 16 05:38:38 PM PDT 24 |
| Finished | Aug 16 05:38:40 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6941e355-f296-4ec2-bc6b-d0ea8566dde4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71176 517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_disable_endpoint.71176517 |
| Directory | /workspace/42.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/42.usbdev_disconnected.895613874 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 141116757 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:04 PM PDT 24 |
| Finished | Aug 16 05:39:06 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d0173414-6fbf-4a55-a6f2-9740229e4c19 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=89561 3874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_disconnected.895613874 |
| Directory | /workspace/42.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/42.usbdev_enable.1798368206 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 58080658 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-4bc04829-1c23-434b-a5bc-a48ec8897c72 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17983 68206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_enable.1798368206 |
| Directory | /workspace/42.usbdev_enable/latest |
| Test location | /workspace/coverage/default/42.usbdev_endpoint_access.4069360902 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 961509193 ps |
| CPU time | 2.85 seconds |
| Started | Aug 16 05:39:02 PM PDT 24 |
| Finished | Aug 16 05:39:05 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-e9f9cd71-2c9e-4c68-8754-63758baf8ab9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40693 60902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.4069360902 |
| Directory | /workspace/42.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/42.usbdev_endpoint_types.2439716195 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 507344284 ps |
| CPU time | 1.35 seconds |
| Started | Aug 16 05:38:32 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-fde79b69-fa7e-45e0-9e02-731520a52eee |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2439716195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.2439716195 |
| Directory | /workspace/42.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/42.usbdev_fifo_rst.2171016394 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 183182513 ps |
| CPU time | 2.04 seconds |
| Started | Aug 16 05:38:38 PM PDT 24 |
| Finished | Aug 16 05:38:40 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-f30ccffa-de37-440d-9d8f-eea95b689db9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21710 16394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_fifo_rst.2171016394 |
| Directory | /workspace/42.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/42.usbdev_in_iso.2162478462 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 280669267 ps |
| CPU time | 1.22 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 215876 kb |
| Host | smart-8769493e-3c3c-4072-a73a-a4a6eaba9847 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2162478462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.2162478462 |
| Directory | /workspace/42.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/42.usbdev_in_stall.1265140491 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 163433134 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 206736 kb |
| Host | smart-242bbf1b-178f-4ac7-bc3b-05ef4a501bcd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12651 40491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_in_stall.1265140491 |
| Directory | /workspace/42.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/42.usbdev_in_trans.2141926504 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 270086196 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:38:50 PM PDT 24 |
| Finished | Aug 16 05:38:51 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-b709d003-a982-4e95-acbc-3d216d55939e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21419 26504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_in_trans.2141926504 |
| Directory | /workspace/42.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_invalid_sync.3162699900 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 5605511261 ps |
| CPU time | 42.77 seconds |
| Started | Aug 16 05:38:57 PM PDT 24 |
| Finished | Aug 16 05:39:40 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-baa272e9-26ed-43c0-80aa-74e0be46a250 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3162699900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.3162699900 |
| Directory | /workspace/42.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/42.usbdev_iso_retraction.2713899734 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 9054323644 ps |
| CPU time | 113.24 seconds |
| Started | Aug 16 05:39:01 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-f8b5db80-0129-4b63-9c14-403c2dbaa1d4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2713899734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.2713899734 |
| Directory | /workspace/42.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/42.usbdev_link_in_err.3683234884 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 234967630 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-6207373b-0b1d-46b1-a5b2-7a4c8c34a8e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36832 34884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_link_in_err.3683234884 |
| Directory | /workspace/42.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/42.usbdev_link_resume.1522284517 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 33823303747 ps |
| CPU time | 49.1 seconds |
| Started | Aug 16 05:39:00 PM PDT 24 |
| Finished | Aug 16 05:39:49 PM PDT 24 |
| Peak memory | 207836 kb |
| Host | smart-e86e73a6-21e1-4f83-9b4f-00f50441d3b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15222 84517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_link_resume.1522284517 |
| Directory | /workspace/42.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/42.usbdev_link_suspend.1276123311 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 5168260767 ps |
| CPU time | 7.48 seconds |
| Started | Aug 16 05:38:35 PM PDT 24 |
| Finished | Aug 16 05:38:43 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-6e5fbcc7-7f28-41c0-b9f4-ca29393d86ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12761 23311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_link_suspend.1276123311 |
| Directory | /workspace/42.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/42.usbdev_low_speed_traffic.1080146174 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 5281185023 ps |
| CPU time | 149.41 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:41:26 PM PDT 24 |
| Peak memory | 218712 kb |
| Host | smart-86897b3d-e63b-4866-91ac-acf4728493cd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1080146174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.1080146174 |
| Directory | /workspace/42.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/42.usbdev_max_inter_pkt_delay.2210295373 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 3508559086 ps |
| CPU time | 97.1 seconds |
| Started | Aug 16 05:39:07 PM PDT 24 |
| Finished | Aug 16 05:40:44 PM PDT 24 |
| Peak memory | 217628 kb |
| Host | smart-f094e7c1-ca5e-4a4e-968d-f4f72ed8614e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=2210295373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.2210295373 |
| Directory | /workspace/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/42.usbdev_max_length_in_transaction.2955146344 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 244250206 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:38:35 PM PDT 24 |
| Finished | Aug 16 05:38:36 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-a04219ef-6c03-4bb5-a9bc-b26c7e5a8797 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2955146344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.2955146344 |
| Directory | /workspace/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_max_length_out_transaction.4044374838 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 195217363 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:38:57 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-cd7ff1e1-feee-459e-ac96-a630d46dca0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40443 74838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.4044374838 |
| Directory | /workspace/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_min_inter_pkt_delay.4172642472 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 2682107322 ps |
| CPU time | 74.59 seconds |
| Started | Aug 16 05:38:41 PM PDT 24 |
| Finished | Aug 16 05:39:56 PM PDT 24 |
| Peak memory | 217368 kb |
| Host | smart-d168be31-368e-4d1b-bf44-349e0eefdf32 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=4172642472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.4172642472 |
| Directory | /workspace/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/42.usbdev_min_length_in_transaction.1204629333 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 163168262 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-de55685a-e124-41d5-825a-c285a39993e3 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1204629333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.1204629333 |
| Directory | /workspace/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_min_length_out_transaction.3071599257 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 164796965 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:59 PM PDT 24 |
| Finished | Aug 16 05:39:00 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-39e06878-e7e1-4b5d-bf7a-e27dd6d66394 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30715 99257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.3071599257 |
| Directory | /workspace/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_nak_trans.3566496664 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 199380600 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:30 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-c8454cc2-4efb-4bfa-b004-49caddf548a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35664 96664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_nak_trans.3566496664 |
| Directory | /workspace/42.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_out_iso.2404406801 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 172512544 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:38:57 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-279e5d8b-efba-4f8b-ab91-d104506da488 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24044 06801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_out_iso.2404406801 |
| Directory | /workspace/42.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/42.usbdev_out_stall.3215292657 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 186837093 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:01 PM PDT 24 |
| Finished | Aug 16 05:39:02 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-7695c33f-9156-4ad2-a13c-22ab275f96ad |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32152 92657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_out_stall.3215292657 |
| Directory | /workspace/42.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/42.usbdev_out_trans_nak.2070326951 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 171474349 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:32 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-01922b16-e7e9-4174-bca0-bf51f7737f50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20703 26951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_out_trans_nak.2070326951 |
| Directory | /workspace/42.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/42.usbdev_pending_in_trans.4284818230 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 196343587 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:00 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-a682df20-f6d1-455a-a564-fffe3bd7a337 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42848 18230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pending_in_trans.4284818230 |
| Directory | /workspace/42.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_phy_config_pinflip.1376289083 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 264834152 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:40 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-acc62f92-da17-4b50-9737-1032dedfc0d3 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1376289083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.1376289083 |
| Directory | /workspace/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/42.usbdev_phy_config_usb_ref_disable.3320962647 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 141371952 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:13 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-06adfd55-1ba5-4ecc-8be7-a768a339d4c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33209 62647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.3320962647 |
| Directory | /workspace/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/42.usbdev_phy_pins_sense.512909598 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 37444474 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:38:29 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-0079f23a-5c33-4ad9-b81e-4d2b48d75c73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51290 9598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.512909598 |
| Directory | /workspace/42.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/42.usbdev_pkt_buffer.2793475248 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 11319346276 ps |
| CPU time | 33.06 seconds |
| Started | Aug 16 05:38:47 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-21235c01-1e84-404c-b02c-08eb1e4e7f34 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27934 75248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pkt_buffer.2793475248 |
| Directory | /workspace/42.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/42.usbdev_pkt_received.1541221663 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 167581674 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:29 PM PDT 24 |
| Finished | Aug 16 05:38:31 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-e6bb26f7-b5d9-49dd-a180-556c3e3a6af8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15412 21663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pkt_received.1541221663 |
| Directory | /workspace/42.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/42.usbdev_pkt_sent.597167005 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 192472488 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:38:31 PM PDT 24 |
| Finished | Aug 16 05:38:33 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-425e8af1-687e-486f-b344-a446a06a1766 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=59716 7005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pkt_sent.597167005 |
| Directory | /workspace/42.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/42.usbdev_random_length_in_transaction.1672504447 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 200650924 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:38:53 PM PDT 24 |
| Finished | Aug 16 05:38:54 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-2e5c0749-a869-4123-b88f-2ede0e433fd1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16725 04447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_in_transaction.1672504447 |
| Directory | /workspace/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_random_length_out_transaction.877903744 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 174404780 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:39:02 PM PDT 24 |
| Finished | Aug 16 05:39:03 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-77edbd24-9cd9-469c-a843-573f707c5eeb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=87790 3744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.877903744 |
| Directory | /workspace/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/42.usbdev_rx_crc_err.457460882 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 144341137 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:09 PM PDT 24 |
| Finished | Aug 16 05:39:10 PM PDT 24 |
| Peak memory | 207316 kb |
| Host | smart-b30d51fe-42de-4b27-9a78-694ffbcdc3a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45746 0882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_rx_crc_err.457460882 |
| Directory | /workspace/42.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/42.usbdev_rx_full.4150290760 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 336381727 ps |
| CPU time | 1.19 seconds |
| Started | Aug 16 05:38:37 PM PDT 24 |
| Finished | Aug 16 05:38:38 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-a6d7ab97-c92b-4e5f-9caa-4b027ae0d961 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41502 90760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_rx_full.4150290760 |
| Directory | /workspace/42.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/42.usbdev_setup_stage.1842118119 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 177763510 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:39:06 PM PDT 24 |
| Finished | Aug 16 05:39:07 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-c26982bc-2bcc-4747-9a99-dc585d48fd1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18421 18119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_setup_stage.1842118119 |
| Directory | /workspace/42.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/42.usbdev_setup_trans_ignored.1203509123 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 145045764 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:38:58 PM PDT 24 |
| Finished | Aug 16 05:38:59 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-14ebda9c-3b87-471e-ae11-7a4ae4ecb7e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12035 09123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_setup_trans_ignored.1203509123 |
| Directory | /workspace/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/42.usbdev_smoke.3268192576 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 276286946 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:38:39 PM PDT 24 |
| Finished | Aug 16 05:38:40 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-cc903940-5e5c-419e-ad2e-05bc178c522f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32681 92576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.3268192576 |
| Directory | /workspace/42.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/42.usbdev_spurious_pids_ignored.745435417 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 2775804129 ps |
| CPU time | 26.39 seconds |
| Started | Aug 16 05:38:35 PM PDT 24 |
| Finished | Aug 16 05:39:02 PM PDT 24 |
| Peak memory | 217896 kb |
| Host | smart-fd08bcd2-1b77-4558-af96-33c132bb2a2b |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=745435417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.745435417 |
| Directory | /workspace/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/42.usbdev_stall_priority_over_nak.3605409998 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 161810510 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:34 PM PDT 24 |
| Finished | Aug 16 05:38:35 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6460885a-cb7b-42ca-9fcf-a73ff70ad464 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36054 09998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.3605409998 |
| Directory | /workspace/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/42.usbdev_stall_trans.1609605093 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 175833863 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:00 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-05de1f1a-3d85-4199-9380-aed6b766416c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16096 05093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_trans.1609605093 |
| Directory | /workspace/42.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/42.usbdev_stream_len_max.3824145099 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 781711069 ps |
| CPU time | 2.02 seconds |
| Started | Aug 16 05:39:06 PM PDT 24 |
| Finished | Aug 16 05:39:08 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-a7534047-7ba7-4495-9dd0-06cc53f5e2ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38241 45099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.3824145099 |
| Directory | /workspace/42.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/42.usbdev_streaming_out.621147547 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 3320488076 ps |
| CPU time | 98.43 seconds |
| Started | Aug 16 05:38:28 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 217376 kb |
| Host | smart-82a2b305-b175-45c5-ba89-3fb55879f0bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=62114 7547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_streaming_out.621147547 |
| Directory | /workspace/42.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/42.usbdev_timeout_missing_host_handshake.1375743307 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 3688841936 ps |
| CPU time | 23.32 seconds |
| Started | Aug 16 05:38:30 PM PDT 24 |
| Finished | Aug 16 05:38:54 PM PDT 24 |
| Peak memory | 207664 kb |
| Host | smart-83f2b8a6-4fa8-4ad7-96e2-199ac06b09c5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1375743307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_hos t_handshake.1375743307 |
| Directory | /workspace/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/42.usbdev_tx_rx_disruption.3687248966 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 584980818 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:38:57 PM PDT 24 |
| Finished | Aug 16 05:38:59 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-73e1dfbd-54ff-4c90-a847-3e4cb60e54b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3687248966 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_tx_rx_disruption.3687248966 |
| Directory | /workspace/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/420.usbdev_tx_rx_disruption.1004804288 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 504499597 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:41:01 PM PDT 24 |
| Finished | Aug 16 05:41:02 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-3a9652c7-6006-49a4-80f9-0db8986b380a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1004804288 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 420.usbdev_tx_rx_disruption.1004804288 |
| Directory | /workspace/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/421.usbdev_tx_rx_disruption.3756036495 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 652724899 ps |
| CPU time | 1.8 seconds |
| Started | Aug 16 05:40:22 PM PDT 24 |
| Finished | Aug 16 05:40:24 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-64c684fa-ee88-41e4-9b61-299fa33122dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3756036495 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 421.usbdev_tx_rx_disruption.3756036495 |
| Directory | /workspace/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/422.usbdev_tx_rx_disruption.4230985814 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 580604600 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:40:52 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-5c071b0b-27ea-4b31-a0d0-115c6403006c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4230985814 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 422.usbdev_tx_rx_disruption.4230985814 |
| Directory | /workspace/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/423.usbdev_tx_rx_disruption.1740063873 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 668231106 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:40:20 PM PDT 24 |
| Finished | Aug 16 05:40:22 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-89044135-0c67-4250-aa17-d1c4b4c49731 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1740063873 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 423.usbdev_tx_rx_disruption.1740063873 |
| Directory | /workspace/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/424.usbdev_tx_rx_disruption.2752096124 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 479759536 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:40:53 PM PDT 24 |
| Finished | Aug 16 05:40:55 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-9bb7943d-7087-4634-a424-04af69d28c0c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2752096124 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 424.usbdev_tx_rx_disruption.2752096124 |
| Directory | /workspace/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/425.usbdev_tx_rx_disruption.3992084282 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 599588695 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:41:02 PM PDT 24 |
| Finished | Aug 16 05:41:04 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-ae1ed015-47e4-40e2-a0c2-2b510864eeed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3992084282 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 425.usbdev_tx_rx_disruption.3992084282 |
| Directory | /workspace/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/426.usbdev_tx_rx_disruption.1113515616 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 625617487 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:41 PM PDT 24 |
| Finished | Aug 16 05:40:43 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-cab5d776-1658-41cf-bbf2-ffe958fd6987 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1113515616 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 426.usbdev_tx_rx_disruption.1113515616 |
| Directory | /workspace/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/427.usbdev_tx_rx_disruption.3228895435 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 499128127 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:40:18 PM PDT 24 |
| Finished | Aug 16 05:40:20 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-9d3f46a0-f9e5-457b-bc98-7d2892e07d0f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3228895435 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 427.usbdev_tx_rx_disruption.3228895435 |
| Directory | /workspace/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/428.usbdev_tx_rx_disruption.262733018 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 720897560 ps |
| CPU time | 1.82 seconds |
| Started | Aug 16 05:40:41 PM PDT 24 |
| Finished | Aug 16 05:40:43 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-33627f4e-d0b4-419c-848d-460641e848fd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=262733018 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 428.usbdev_tx_rx_disruption.262733018 |
| Directory | /workspace/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/429.usbdev_tx_rx_disruption.2386055507 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 526180313 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:50 PM PDT 24 |
| Finished | Aug 16 05:40:52 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-5a2ca247-85d3-42a9-b70b-ebd3f85e4c62 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2386055507 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 429.usbdev_tx_rx_disruption.2386055507 |
| Directory | /workspace/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/43.usbdev_alert_test.3468460557 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 48827402 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:38:57 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-d8ce6706-f313-4e44-85b6-30dc91eb69ee |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3468460557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.3468460557 |
| Directory | /workspace/43.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/43.usbdev_aon_wake_disconnect.4061653273 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 11776768730 ps |
| CPU time | 14.8 seconds |
| Started | Aug 16 05:38:46 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-2f09c6d3-8cec-44a0-8250-7fc9c1625cd7 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4061653273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_a on_wake_disconnect.4061653273 |
| Directory | /workspace/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/43.usbdev_aon_wake_reset.1148154751 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 14703424799 ps |
| CPU time | 18.53 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:39:14 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-e5690d9e-cf60-4b3d-9a34-8255be4e05c3 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1148154751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.1148154751 |
| Directory | /workspace/43.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/43.usbdev_aon_wake_resume.717089305 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 24749656265 ps |
| CPU time | 33.03 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:54 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-31e5a89f-d172-42a7-b79d-cb3ee7e99fde |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=717089305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_ao n_wake_resume.717089305 |
| Directory | /workspace/43.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/43.usbdev_av_buffer.3777581202 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 182236177 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:38:45 PM PDT 24 |
| Finished | Aug 16 05:38:46 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-384df127-2f83-422a-b745-1f5bc3711f9c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37775 81202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_av_buffer.3777581202 |
| Directory | /workspace/43.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/43.usbdev_bitstuff_err.2555725018 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 162153947 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:38:42 PM PDT 24 |
| Finished | Aug 16 05:38:43 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-2cd6344e-f619-4ef1-a918-5f69edeb2162 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25557 25018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_bitstuff_err.2555725018 |
| Directory | /workspace/43.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/43.usbdev_data_toggle_clear.2138413461 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 312624423 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:39:01 PM PDT 24 |
| Finished | Aug 16 05:39:02 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-b8557716-a000-458f-9f9c-2726f6e6fcd6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21384 13461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_clear.2138413461 |
| Directory | /workspace/43.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/43.usbdev_data_toggle_restore.3486946570 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 1011618081 ps |
| CPU time | 2.81 seconds |
| Started | Aug 16 05:39:06 PM PDT 24 |
| Finished | Aug 16 05:39:09 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-fe84704f-d5aa-4010-abf5-6853ae4fd049 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3486946570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.3486946570 |
| Directory | /workspace/43.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/43.usbdev_device_address.1206394843 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 48543895006 ps |
| CPU time | 76.63 seconds |
| Started | Aug 16 05:38:44 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-50c81a7f-8cc5-4202-91e2-9c7450cae9e5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12063 94843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.1206394843 |
| Directory | /workspace/43.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/43.usbdev_device_timeout.620081407 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 824070008 ps |
| CPU time | 19.08 seconds |
| Started | Aug 16 05:39:10 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-e8a14459-3581-47ca-a5fa-efd4567da964 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=620081407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.620081407 |
| Directory | /workspace/43.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/43.usbdev_disable_endpoint.3735531154 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 1257541987 ps |
| CPU time | 2.46 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-3b8fe7e0-a90b-4469-b97d-a0db49dedb47 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37355 31154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_disable_endpoint.3735531154 |
| Directory | /workspace/43.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/43.usbdev_disconnected.3990137240 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 138010390 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:39:09 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-70eea2c2-276e-4207-abb7-d77854212e37 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39901 37240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_disconnected.3990137240 |
| Directory | /workspace/43.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/43.usbdev_enable.702013575 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 51898302 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:38:57 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-ab9ee5e8-1736-41de-989b-33ec61e842b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70201 3575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_enable.702013575 |
| Directory | /workspace/43.usbdev_enable/latest |
| Test location | /workspace/coverage/default/43.usbdev_endpoint_access.580506928 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 1108656327 ps |
| CPU time | 3.09 seconds |
| Started | Aug 16 05:38:45 PM PDT 24 |
| Finished | Aug 16 05:38:49 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-8dc4e9ab-2c72-4c9e-a6b1-33049a6bc7ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=58050 6928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.580506928 |
| Directory | /workspace/43.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/43.usbdev_endpoint_types.1337197653 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 374285405 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:39:07 PM PDT 24 |
| Finished | Aug 16 05:39:09 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-f6b8480d-0dfb-4a02-812f-1baaff27f031 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1337197653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.1337197653 |
| Directory | /workspace/43.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/43.usbdev_fifo_rst.4072831555 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 184772221 ps |
| CPU time | 2.21 seconds |
| Started | Aug 16 05:39:18 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-3486b7c5-f7a5-42b6-9e3d-681a5998fae3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40728 31555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_fifo_rst.4072831555 |
| Directory | /workspace/43.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/43.usbdev_in_iso.2714314807 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 229006248 ps |
| CPU time | 1.19 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 215868 kb |
| Host | smart-b9d1a298-2ca8-4615-a790-9bea8372d3df |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2714314807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.2714314807 |
| Directory | /workspace/43.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/43.usbdev_in_stall.2002988492 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 149791847 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:38:46 PM PDT 24 |
| Finished | Aug 16 05:38:47 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-ed1a5e2b-90ae-469a-9b5f-6c78ce333769 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20029 88492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_in_stall.2002988492 |
| Directory | /workspace/43.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/43.usbdev_in_trans.3201476117 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 228697935 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:38:59 PM PDT 24 |
| Finished | Aug 16 05:39:00 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-44bf6aea-acd6-4d43-bbb0-f4d4b71ff07a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32014 76117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_in_trans.3201476117 |
| Directory | /workspace/43.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_invalid_sync.1392163365 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 3483636943 ps |
| CPU time | 25.69 seconds |
| Started | Aug 16 05:39:05 PM PDT 24 |
| Finished | Aug 16 05:39:31 PM PDT 24 |
| Peak memory | 217284 kb |
| Host | smart-294b8dc9-3ce8-455c-8594-3b024569f97a |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1392163365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.1392163365 |
| Directory | /workspace/43.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/43.usbdev_iso_retraction.3188872336 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 10164411773 ps |
| CPU time | 65.78 seconds |
| Started | Aug 16 05:39:01 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-6c87f7c4-c31c-42d5-9d6b-410da21545b0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3188872336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.3188872336 |
| Directory | /workspace/43.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/43.usbdev_link_in_err.1817206602 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 209554083 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:13 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-8f200bd3-8156-4630-932c-5dab5a4f1c53 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18172 06602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_link_in_err.1817206602 |
| Directory | /workspace/43.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/43.usbdev_link_resume.813701383 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 12936060912 ps |
| CPU time | 19.01 seconds |
| Started | Aug 16 05:38:45 PM PDT 24 |
| Finished | Aug 16 05:39:05 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-db4128f7-ca6b-4516-aefd-cbbe40a7ad6b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81370 1383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_link_resume.813701383 |
| Directory | /workspace/43.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/43.usbdev_link_suspend.3155362865 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 3627847304 ps |
| CPU time | 4.97 seconds |
| Started | Aug 16 05:39:13 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-0fa9350d-dbd0-4d91-83d6-0d8389789a26 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31553 62865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_link_suspend.3155362865 |
| Directory | /workspace/43.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/43.usbdev_low_speed_traffic.4101730908 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 2293083104 ps |
| CPU time | 23.56 seconds |
| Started | Aug 16 05:38:38 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 224060 kb |
| Host | smart-35566f79-d3e9-4697-a7bc-21f3ef591e5f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4101730908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.4101730908 |
| Directory | /workspace/43.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/43.usbdev_max_inter_pkt_delay.3462895848 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 2815898266 ps |
| CPU time | 25.22 seconds |
| Started | Aug 16 05:39:09 PM PDT 24 |
| Finished | Aug 16 05:39:35 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-d88eb7f4-7d99-4b98-9972-b7c47087f6c1 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3462895848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.3462895848 |
| Directory | /workspace/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/43.usbdev_max_length_in_transaction.3407746648 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 307038865 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:39:06 PM PDT 24 |
| Finished | Aug 16 05:39:07 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-f2e8ccc9-e1e4-4180-a31d-f31b87862560 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3407746648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.3407746648 |
| Directory | /workspace/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_max_length_out_transaction.1111601345 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 199477207 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:38:51 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-1222631e-8360-4d54-8185-037896b4890c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11116 01345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.1111601345 |
| Directory | /workspace/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_min_inter_pkt_delay.4055702863 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 2998902702 ps |
| CPU time | 24.04 seconds |
| Started | Aug 16 05:39:16 PM PDT 24 |
| Finished | Aug 16 05:39:41 PM PDT 24 |
| Peak memory | 217548 kb |
| Host | smart-6ff7f0b0-2496-42ec-a420-59aa16fa64c5 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=4055702863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.4055702863 |
| Directory | /workspace/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/43.usbdev_min_length_in_transaction.317671900 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 157661273 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:38:52 PM PDT 24 |
| Finished | Aug 16 05:38:53 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-1c54ff1a-a6d7-4a19-a38b-ba9df6a643e4 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=317671900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.317671900 |
| Directory | /workspace/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_min_length_out_transaction.344497152 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 159933814 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:00 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-dee9a96a-e301-4fa9-8eee-175e21475d56 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34449 7152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.344497152 |
| Directory | /workspace/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_nak_trans.928144838 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 183886981 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:39:01 PM PDT 24 |
| Finished | Aug 16 05:39:02 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-69d454c4-de71-4163-99b0-9ed2f15cbf36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92814 4838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_nak_trans.928144838 |
| Directory | /workspace/43.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_out_iso.1881836948 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 182083005 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:39:00 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-e24bf82f-3b86-43dd-8821-6a06b6742c2d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18818 36948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_out_iso.1881836948 |
| Directory | /workspace/43.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/43.usbdev_out_stall.886039695 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 229086590 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:39:06 PM PDT 24 |
| Finished | Aug 16 05:39:07 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-546d8ee9-370e-434a-9ed4-cdd750e4f1b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88603 9695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_out_stall.886039695 |
| Directory | /workspace/43.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/43.usbdev_out_trans_nak.2146977696 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 187167074 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:58 PM PDT 24 |
| Finished | Aug 16 05:38:59 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-9111f508-ba1d-4fcd-b454-d30e6066bd44 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21469 77696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_out_trans_nak.2146977696 |
| Directory | /workspace/43.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/43.usbdev_pending_in_trans.3896939980 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 166019730 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:55 PM PDT 24 |
| Finished | Aug 16 05:38:56 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-b0b18a92-6c74-4e89-a27b-3a66b011b8f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38969 39980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pending_in_trans.3896939980 |
| Directory | /workspace/43.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_phy_config_pinflip.1216752555 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 218456707 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:39:04 PM PDT 24 |
| Finished | Aug 16 05:39:05 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-de35ed89-bd68-4559-bcbe-1da1e8dd69fe |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1216752555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.1216752555 |
| Directory | /workspace/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/43.usbdev_phy_config_usb_ref_disable.2912244825 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 167133022 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:05 PM PDT 24 |
| Finished | Aug 16 05:39:06 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-be788ba1-6bd4-46d1-a262-c9b3a9adda24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29122 44825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.2912244825 |
| Directory | /workspace/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/43.usbdev_phy_pins_sense.1877869446 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 28850940 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:39:06 PM PDT 24 |
| Finished | Aug 16 05:39:07 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-f5426c1b-cf79-4e14-8081-490f428dbd01 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18778 69446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.1877869446 |
| Directory | /workspace/43.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/43.usbdev_pkt_buffer.2332395392 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 20051956161 ps |
| CPU time | 49.07 seconds |
| Started | Aug 16 05:39:05 PM PDT 24 |
| Finished | Aug 16 05:39:54 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-ac2daa27-7bc5-4a91-8f53-df10fa28faa4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23323 95392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pkt_buffer.2332395392 |
| Directory | /workspace/43.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/43.usbdev_pkt_received.3905618651 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 161945692 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:14 PM PDT 24 |
| Finished | Aug 16 05:39:15 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-2f92d425-30bd-416d-90aa-3bbe43d84179 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39056 18651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pkt_received.3905618651 |
| Directory | /workspace/43.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/43.usbdev_pkt_sent.1983033108 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 165116451 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:04 PM PDT 24 |
| Finished | Aug 16 05:39:05 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-c8bf7897-618e-4241-89f2-9c773a48ee61 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19830 33108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pkt_sent.1983033108 |
| Directory | /workspace/43.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/43.usbdev_random_length_in_transaction.1661668473 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 201945180 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:39:11 PM PDT 24 |
| Finished | Aug 16 05:39:12 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-bd33232f-1b6a-4c6e-95dc-b629822970fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16616 68473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_in_transaction.1661668473 |
| Directory | /workspace/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_random_length_out_transaction.2683346413 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 148095174 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:49 PM PDT 24 |
| Finished | Aug 16 05:38:50 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-9e7c7e11-c0e4-45e3-aedb-e3bb3a0a9d0f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26833 46413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.2683346413 |
| Directory | /workspace/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/43.usbdev_rx_crc_err.3146738192 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 127637656 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:57 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-bce3655a-e829-443e-ae82-f2fc7c148272 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31467 38192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_rx_crc_err.3146738192 |
| Directory | /workspace/43.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/43.usbdev_rx_full.1372606491 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 261787822 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:38:36 PM PDT 24 |
| Finished | Aug 16 05:38:39 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-36200d63-630c-435f-a5bd-a172e6ebbf06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13726 06491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_rx_full.1372606491 |
| Directory | /workspace/43.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/43.usbdev_setup_stage.1829759621 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 169162518 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:38:48 PM PDT 24 |
| Finished | Aug 16 05:38:49 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-2b7db00b-1abf-4da2-a476-bb7b4230c4b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18297 59621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_setup_stage.1829759621 |
| Directory | /workspace/43.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/43.usbdev_setup_trans_ignored.1365853426 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 168848582 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:00 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 207400 kb |
| Host | smart-53837b23-e72f-46b9-9b7f-47c3551fdc9d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13658 53426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_setup_trans_ignored.1365853426 |
| Directory | /workspace/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/43.usbdev_smoke.2048381449 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 241683703 ps |
| CPU time | 1.17 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:13 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-71dde000-81e9-4921-a6a6-59ca725d9411 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20483 81449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.2048381449 |
| Directory | /workspace/43.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/43.usbdev_spurious_pids_ignored.2583505975 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 2424378416 ps |
| CPU time | 18.55 seconds |
| Started | Aug 16 05:38:52 PM PDT 24 |
| Finished | Aug 16 05:39:11 PM PDT 24 |
| Peak memory | 217960 kb |
| Host | smart-7dd3ae38-122a-42b6-81ba-c18f1d06e037 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2583505975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.2583505975 |
| Directory | /workspace/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/43.usbdev_stall_priority_over_nak.2033194064 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 156664907 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:38:57 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-462a4b2b-0364-4a4d-82d6-afa930ce52f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20331 94064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.2033194064 |
| Directory | /workspace/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/43.usbdev_stall_trans.1927476725 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 142477815 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:16 PM PDT 24 |
| Finished | Aug 16 05:39:17 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-d6eda3bf-5bf6-42c1-9a8a-c1e1ebe24407 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19274 76725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_trans.1927476725 |
| Directory | /workspace/43.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/43.usbdev_stream_len_max.2927675674 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 1072047135 ps |
| CPU time | 2.58 seconds |
| Started | Aug 16 05:38:48 PM PDT 24 |
| Finished | Aug 16 05:38:55 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-15c50689-cb8b-47f1-9ff0-406cfa45a7e4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29276 75674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.2927675674 |
| Directory | /workspace/43.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/43.usbdev_streaming_out.2324342057 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 2126626004 ps |
| CPU time | 21.3 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:39:17 PM PDT 24 |
| Peak memory | 216004 kb |
| Host | smart-ad113b9b-2ca4-4dcf-880b-1ebd40464559 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23243 42057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_streaming_out.2324342057 |
| Directory | /workspace/43.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/43.usbdev_timeout_missing_host_handshake.1956426804 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 6432232259 ps |
| CPU time | 43.28 seconds |
| Started | Aug 16 05:38:51 PM PDT 24 |
| Finished | Aug 16 05:39:34 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-78916a5e-f52e-43c8-96eb-919902768dfc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1956426804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_hos t_handshake.1956426804 |
| Directory | /workspace/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/43.usbdev_tx_rx_disruption.1803430243 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 638651911 ps |
| CPU time | 1.75 seconds |
| Started | Aug 16 05:38:37 PM PDT 24 |
| Finished | Aug 16 05:38:39 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-44d15310-df1b-43ed-83a7-4e38ef42ce48 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1803430243 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_tx_rx_disruption.1803430243 |
| Directory | /workspace/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/430.usbdev_tx_rx_disruption.749949993 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 595528399 ps |
| CPU time | 2.08 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:51 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-07d495f4-e8bd-4f67-afec-81591563f362 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=749949993 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 430.usbdev_tx_rx_disruption.749949993 |
| Directory | /workspace/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/431.usbdev_tx_rx_disruption.2340454460 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 523865149 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:48 PM PDT 24 |
| Finished | Aug 16 05:40:50 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-0faa6cf1-e247-4f3a-a005-3e1882a49209 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2340454460 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 431.usbdev_tx_rx_disruption.2340454460 |
| Directory | /workspace/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/432.usbdev_tx_rx_disruption.3439654545 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 549715328 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:41:12 PM PDT 24 |
| Finished | Aug 16 05:41:15 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-e7184b47-9a59-45a8-843d-3231a6fc1563 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3439654545 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 432.usbdev_tx_rx_disruption.3439654545 |
| Directory | /workspace/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/433.usbdev_tx_rx_disruption.923702107 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 666204303 ps |
| CPU time | 1.85 seconds |
| Started | Aug 16 05:40:46 PM PDT 24 |
| Finished | Aug 16 05:40:48 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-f64daecf-218c-4278-bf95-2252a9a850b2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=923702107 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 433.usbdev_tx_rx_disruption.923702107 |
| Directory | /workspace/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/434.usbdev_tx_rx_disruption.2457114013 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 554846309 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:40:52 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-e106141a-9549-445a-b213-b61c4bef5564 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2457114013 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 434.usbdev_tx_rx_disruption.2457114013 |
| Directory | /workspace/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/435.usbdev_tx_rx_disruption.238714651 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 581559573 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:46 PM PDT 24 |
| Finished | Aug 16 05:40:48 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-82a050fd-3d90-4b49-a082-e66085113c38 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=238714651 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 435.usbdev_tx_rx_disruption.238714651 |
| Directory | /workspace/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/436.usbdev_tx_rx_disruption.3181664226 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 585864089 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:40:53 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-99e4350e-daf5-481f-b24e-b965c44e80f5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3181664226 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 436.usbdev_tx_rx_disruption.3181664226 |
| Directory | /workspace/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/437.usbdev_tx_rx_disruption.913608222 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 594111680 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:41:00 PM PDT 24 |
| Finished | Aug 16 05:41:01 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-fb380ac9-b20a-4188-a6ad-3b7f1aeea8ed |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=913608222 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 437.usbdev_tx_rx_disruption.913608222 |
| Directory | /workspace/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/438.usbdev_tx_rx_disruption.2441234830 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 474646224 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:40:47 PM PDT 24 |
| Finished | Aug 16 05:40:49 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-2b9cef05-0251-45da-8b77-275fb1023d63 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2441234830 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 438.usbdev_tx_rx_disruption.2441234830 |
| Directory | /workspace/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/439.usbdev_tx_rx_disruption.1564996285 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 462297473 ps |
| CPU time | 1.36 seconds |
| Started | Aug 16 05:40:50 PM PDT 24 |
| Finished | Aug 16 05:40:52 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-0490c546-3266-4d7a-9875-5d8b32e849b3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1564996285 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 439.usbdev_tx_rx_disruption.1564996285 |
| Directory | /workspace/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/44.usbdev_alert_test.4044790051 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 56814832 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:39:16 PM PDT 24 |
| Finished | Aug 16 05:39:16 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-40096cc6-dcca-4066-8885-957bb164eecb |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=4044790051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.4044790051 |
| Directory | /workspace/44.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/44.usbdev_aon_wake_disconnect.3219731438 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 9270970132 ps |
| CPU time | 12.05 seconds |
| Started | Aug 16 05:38:59 PM PDT 24 |
| Finished | Aug 16 05:39:11 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-6b67d4c1-3920-4e7a-849f-c79fd5957468 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3219731438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_a on_wake_disconnect.3219731438 |
| Directory | /workspace/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/44.usbdev_aon_wake_reset.2110687199 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 15462812602 ps |
| CPU time | 18.87 seconds |
| Started | Aug 16 05:38:35 PM PDT 24 |
| Finished | Aug 16 05:38:54 PM PDT 24 |
| Peak memory | 215912 kb |
| Host | smart-770455bd-0319-4b7b-817b-280d3e17fa2a |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2110687199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.2110687199 |
| Directory | /workspace/44.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/44.usbdev_aon_wake_resume.1700258963 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 24134066943 ps |
| CPU time | 32.13 seconds |
| Started | Aug 16 05:39:06 PM PDT 24 |
| Finished | Aug 16 05:39:38 PM PDT 24 |
| Peak memory | 215936 kb |
| Host | smart-933fce0f-8dd7-4d57-907c-4636b483fe4a |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1700258963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_a on_wake_resume.1700258963 |
| Directory | /workspace/44.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/44.usbdev_av_buffer.3727856920 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 169131959 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:38:41 PM PDT 24 |
| Finished | Aug 16 05:38:43 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6714deec-58c1-45d5-8038-3d570d8c6df0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37278 56920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_av_buffer.3727856920 |
| Directory | /workspace/44.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/44.usbdev_bitstuff_err.4010306755 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 153623851 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:59 PM PDT 24 |
| Finished | Aug 16 05:39:00 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-bd037cd1-7ea7-4dbc-b1fb-cc7891345ab4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40103 06755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_bitstuff_err.4010306755 |
| Directory | /workspace/44.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/44.usbdev_data_toggle_clear.250516107 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 301025214 ps |
| CPU time | 1.17 seconds |
| Started | Aug 16 05:39:03 PM PDT 24 |
| Finished | Aug 16 05:39:05 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-7aa72c70-5563-4af5-b1ed-341541fb7c1e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25051 6107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_clear.250516107 |
| Directory | /workspace/44.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/44.usbdev_data_toggle_restore.2451959646 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 486949411 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:38:48 PM PDT 24 |
| Finished | Aug 16 05:38:50 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-ae49dc28-4ff7-4910-a063-f2324a9ad70a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2451959646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.2451959646 |
| Directory | /workspace/44.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/44.usbdev_device_address.3140213090 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 28729847237 ps |
| CPU time | 46.05 seconds |
| Started | Aug 16 05:38:47 PM PDT 24 |
| Finished | Aug 16 05:39:34 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-dc0c7716-5043-421b-8158-5206b97c9740 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31402 13090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.3140213090 |
| Directory | /workspace/44.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/44.usbdev_device_timeout.591631824 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 706492873 ps |
| CPU time | 15.33 seconds |
| Started | Aug 16 05:38:57 PM PDT 24 |
| Finished | Aug 16 05:39:12 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-bb4c446d-a50e-42fe-b30b-5a2111d9eb16 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=591631824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.591631824 |
| Directory | /workspace/44.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/44.usbdev_disable_endpoint.1375293248 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 517377797 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:38:57 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-07955a6f-eb43-4242-9c47-db608d030524 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13752 93248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_disable_endpoint.1375293248 |
| Directory | /workspace/44.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/44.usbdev_disconnected.2489858039 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 174301532 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:03 PM PDT 24 |
| Finished | Aug 16 05:39:04 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-ca219d27-c86b-4952-bce2-4091003debff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24898 58039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_disconnected.2489858039 |
| Directory | /workspace/44.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/44.usbdev_enable.428821538 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 38564374 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:38:50 PM PDT 24 |
| Finished | Aug 16 05:38:51 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-258bb83c-c2c6-4801-9699-48695c38cb05 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42882 1538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_enable.428821538 |
| Directory | /workspace/44.usbdev_enable/latest |
| Test location | /workspace/coverage/default/44.usbdev_endpoint_access.2721777939 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 877086510 ps |
| CPU time | 2.34 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:14 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-f17fb638-383d-4dd6-8c6e-b83e3fcc913f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27217 77939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.2721777939 |
| Directory | /workspace/44.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/44.usbdev_endpoint_types.669818682 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 274978677 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:38:53 PM PDT 24 |
| Finished | Aug 16 05:38:55 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-7d69e268-eb20-4463-a0d3-a82a51082588 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=669818682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.669818682 |
| Directory | /workspace/44.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/44.usbdev_fifo_rst.1555585687 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 199688760 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:38:59 PM PDT 24 |
| Finished | Aug 16 05:39:01 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-c1a0ddf8-6ca9-4302-a538-5e522086b786 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15555 85687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_fifo_rst.1555585687 |
| Directory | /workspace/44.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/44.usbdev_in_iso.2320381040 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 223438371 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:38:40 PM PDT 24 |
| Finished | Aug 16 05:38:41 PM PDT 24 |
| Peak memory | 215848 kb |
| Host | smart-fde91171-42fa-4e81-9919-5e58a589e0f2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2320381040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.2320381040 |
| Directory | /workspace/44.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/44.usbdev_in_stall.1693610395 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 141292907 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:38:50 PM PDT 24 |
| Finished | Aug 16 05:38:56 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-5dbef2dc-93b8-4133-9190-a67f54273fcd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16936 10395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_in_stall.1693610395 |
| Directory | /workspace/44.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/44.usbdev_in_trans.4053950456 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 164543965 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:38:55 PM PDT 24 |
| Finished | Aug 16 05:38:56 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-f78276c8-903a-4476-9d5f-361f6afbbf1a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40539 50456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_in_trans.4053950456 |
| Directory | /workspace/44.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_invalid_sync.3589367020 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 4232401482 ps |
| CPU time | 33.31 seconds |
| Started | Aug 16 05:38:57 PM PDT 24 |
| Finished | Aug 16 05:39:31 PM PDT 24 |
| Peak memory | 224144 kb |
| Host | smart-c96dd487-9353-49c3-b6dc-aea187da1175 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3589367020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.3589367020 |
| Directory | /workspace/44.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/44.usbdev_iso_retraction.4291853461 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 9250820936 ps |
| CPU time | 110.16 seconds |
| Started | Aug 16 05:38:57 PM PDT 24 |
| Finished | Aug 16 05:40:47 PM PDT 24 |
| Peak memory | 207820 kb |
| Host | smart-1899a89d-9fcb-4d56-9428-0d1e536d31bd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4291853461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.4291853461 |
| Directory | /workspace/44.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/44.usbdev_link_in_err.1307634013 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 242280431 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:39:09 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-dcf93d9e-4991-4515-97e1-61490c5dc7a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13076 34013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_link_in_err.1307634013 |
| Directory | /workspace/44.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/44.usbdev_link_resume.2265420699 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 24604747076 ps |
| CPU time | 43.74 seconds |
| Started | Aug 16 05:38:54 PM PDT 24 |
| Finished | Aug 16 05:39:38 PM PDT 24 |
| Peak memory | 216140 kb |
| Host | smart-b42490c8-4282-4459-9ec1-9baa0db720fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22654 20699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_link_resume.2265420699 |
| Directory | /workspace/44.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/44.usbdev_link_suspend.1684529849 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 3960426254 ps |
| CPU time | 5.66 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:39:02 PM PDT 24 |
| Peak memory | 216084 kb |
| Host | smart-8943e905-3b66-403b-98ff-1b4a3f3fab0f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16845 29849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_link_suspend.1684529849 |
| Directory | /workspace/44.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/44.usbdev_low_speed_traffic.1461673784 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 2628428752 ps |
| CPU time | 77.27 seconds |
| Started | Aug 16 05:38:50 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 224124 kb |
| Host | smart-c8a6694a-47af-4bd5-81fc-2a20f0b73715 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1461673784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.1461673784 |
| Directory | /workspace/44.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/44.usbdev_max_inter_pkt_delay.1846954126 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 1617557330 ps |
| CPU time | 15.91 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:39:24 PM PDT 24 |
| Peak memory | 217308 kb |
| Host | smart-a05317ee-d4d8-4a3f-bdc8-2f87b607ba66 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1846954126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.1846954126 |
| Directory | /workspace/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/44.usbdev_max_length_in_transaction.1728977346 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 264260131 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:39:16 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-2e784e3c-4476-49ab-bcca-d40316bf8c18 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1728977346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.1728977346 |
| Directory | /workspace/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_max_length_out_transaction.3838194699 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 209054120 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:38:38 PM PDT 24 |
| Finished | Aug 16 05:38:39 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-85a67386-967e-4ad9-8ce4-c36a189e8d86 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38381 94699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.3838194699 |
| Directory | /workspace/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_min_inter_pkt_delay.3268833483 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 4074510346 ps |
| CPU time | 39.69 seconds |
| Started | Aug 16 05:39:01 PM PDT 24 |
| Finished | Aug 16 05:39:40 PM PDT 24 |
| Peak memory | 215896 kb |
| Host | smart-b8c86cfe-5442-4fe3-9c9e-d155f4b11a39 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3268833483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.3268833483 |
| Directory | /workspace/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/44.usbdev_min_length_in_transaction.2066587666 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 152379908 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:38:57 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-71aa7b62-6127-4ee7-a292-4e128503b8e7 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2066587666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.2066587666 |
| Directory | /workspace/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_min_length_out_transaction.2926925325 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 160042022 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:05 PM PDT 24 |
| Finished | Aug 16 05:39:06 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-a2868733-ec2a-4b92-a0d7-13676a476922 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29269 25325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.2926925325 |
| Directory | /workspace/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_nak_trans.2190574729 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 192804110 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:38:57 PM PDT 24 |
| Finished | Aug 16 05:38:58 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-93cb09b3-8ea7-409c-8fe4-844eea8b7d57 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21905 74729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_nak_trans.2190574729 |
| Directory | /workspace/44.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_out_iso.2560523186 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 166152864 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:04 PM PDT 24 |
| Finished | Aug 16 05:39:05 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-ac29f82d-58cc-4d0d-ae75-9f0be6706402 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25605 23186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_out_iso.2560523186 |
| Directory | /workspace/44.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/44.usbdev_out_stall.2292383929 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 189809338 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:01 PM PDT 24 |
| Finished | Aug 16 05:39:02 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-8b6d3a5d-30e3-49e1-a34a-80efe1af8729 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22923 83929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_out_stall.2292383929 |
| Directory | /workspace/44.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/44.usbdev_out_trans_nak.3094487487 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 190720075 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:39:09 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-3fe80c96-0f66-40be-8c88-75a505de126c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30944 87487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_out_trans_nak.3094487487 |
| Directory | /workspace/44.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/44.usbdev_pending_in_trans.3227606825 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 146612121 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:38:57 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-e797f272-109f-4901-84f7-2d6681cc4007 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32276 06825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pending_in_trans.3227606825 |
| Directory | /workspace/44.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_phy_config_pinflip.4126176043 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 186829270 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:38:54 PM PDT 24 |
| Finished | Aug 16 05:38:55 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-f0aec2ed-2da1-4837-8cad-58dfe748f88f |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=4126176043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.4126176043 |
| Directory | /workspace/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/44.usbdev_phy_config_usb_ref_disable.902884698 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 148502615 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:38:58 PM PDT 24 |
| Finished | Aug 16 05:38:59 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-6212d9ba-d093-4514-8729-3a0b1f233f43 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=90288 4698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.902884698 |
| Directory | /workspace/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/44.usbdev_phy_pins_sense.2675242522 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 54428656 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:39:05 PM PDT 24 |
| Finished | Aug 16 05:39:06 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-8b76cd16-ec13-4444-8a77-eee0101013c0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26752 42522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.2675242522 |
| Directory | /workspace/44.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/44.usbdev_pkt_buffer.559587900 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 7868262503 ps |
| CPU time | 22.28 seconds |
| Started | Aug 16 05:39:15 PM PDT 24 |
| Finished | Aug 16 05:39:38 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-d72c8b62-1b5b-4a2e-b82c-51c6b404b8ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=55958 7900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pkt_buffer.559587900 |
| Directory | /workspace/44.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/44.usbdev_pkt_received.3299773517 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 184846349 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:38:50 PM PDT 24 |
| Finished | Aug 16 05:38:52 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ae46c25d-e772-431e-b01d-b0adbeea38cf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32997 73517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pkt_received.3299773517 |
| Directory | /workspace/44.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/44.usbdev_pkt_sent.350946376 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 167998926 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:04 PM PDT 24 |
| Finished | Aug 16 05:39:05 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-0e69e9f5-a068-4ef9-aabb-41e49195c8f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35094 6376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_pkt_sent.350946376 |
| Directory | /workspace/44.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/44.usbdev_random_length_in_transaction.3853020853 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 210354484 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:38:58 PM PDT 24 |
| Finished | Aug 16 05:38:59 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-139dae9d-1ebd-4a93-944c-016834aa2031 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38530 20853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_in_transaction.3853020853 |
| Directory | /workspace/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_random_length_out_transaction.1101733574 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 198281442 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:39:19 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-022b4702-c6c9-41a6-bf3f-2f4629729f0a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11017 33574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.1101733574 |
| Directory | /workspace/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/44.usbdev_rx_crc_err.2541456771 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 161862174 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:13 PM PDT 24 |
| Finished | Aug 16 05:39:14 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-db60802a-53f3-4164-9db8-bb01e8941f06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25414 56771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_rx_crc_err.2541456771 |
| Directory | /workspace/44.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/44.usbdev_rx_full.702144046 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 346077910 ps |
| CPU time | 1.16 seconds |
| Started | Aug 16 05:39:04 PM PDT 24 |
| Finished | Aug 16 05:39:05 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-f3cf2c33-8155-4d75-8824-62602362a06e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=70214 4046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_rx_full.702144046 |
| Directory | /workspace/44.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/44.usbdev_setup_stage.2230929419 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 143586980 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:18 PM PDT 24 |
| Finished | Aug 16 05:39:19 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-cf3d4e7f-a66f-4a16-a857-23d8642e2b33 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22309 29419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_setup_stage.2230929419 |
| Directory | /workspace/44.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/44.usbdev_setup_trans_ignored.3975854029 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 150285382 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:38:59 PM PDT 24 |
| Finished | Aug 16 05:39:00 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-2fb25fc3-1deb-48e2-bf10-ce8e537aa4cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39758 54029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_setup_trans_ignored.3975854029 |
| Directory | /workspace/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/44.usbdev_smoke.4185503264 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 198725464 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:39:03 PM PDT 24 |
| Finished | Aug 16 05:39:04 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-25612b2f-e25a-4e4e-8895-0232a6c215bf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41855 03264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.4185503264 |
| Directory | /workspace/44.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/44.usbdev_spurious_pids_ignored.2725821555 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 2918173938 ps |
| CPU time | 83.22 seconds |
| Started | Aug 16 05:38:47 PM PDT 24 |
| Finished | Aug 16 05:40:11 PM PDT 24 |
| Peak memory | 224064 kb |
| Host | smart-17b27e07-6828-4948-b845-07c58e17803f |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2725821555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.2725821555 |
| Directory | /workspace/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/44.usbdev_stall_priority_over_nak.2652626010 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 221883024 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:39:15 PM PDT 24 |
| Finished | Aug 16 05:39:16 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-a08ff6df-76d0-43ef-a7b5-d728ec10e34a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26526 26010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.2652626010 |
| Directory | /workspace/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/44.usbdev_stall_trans.780095189 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 158832673 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:16 PM PDT 24 |
| Finished | Aug 16 05:39:17 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-cddb46b2-1290-4fb6-a5de-805b6b17dc49 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=78009 5189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_trans.780095189 |
| Directory | /workspace/44.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/44.usbdev_stream_len_max.2940937959 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 1154790546 ps |
| CPU time | 2.7 seconds |
| Started | Aug 16 05:39:06 PM PDT 24 |
| Finished | Aug 16 05:39:09 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-7b4b0132-11c5-475e-9d16-309c77f83211 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29409 37959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.2940937959 |
| Directory | /workspace/44.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/44.usbdev_streaming_out.669394694 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 3191303244 ps |
| CPU time | 23.71 seconds |
| Started | Aug 16 05:38:55 PM PDT 24 |
| Finished | Aug 16 05:39:19 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-ff7c8a92-1b58-448f-b63d-0be448f5a385 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=66939 4694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_streaming_out.669394694 |
| Directory | /workspace/44.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/44.usbdev_timeout_missing_host_handshake.2346874072 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 1060090260 ps |
| CPU time | 8.71 seconds |
| Started | Aug 16 05:38:51 PM PDT 24 |
| Finished | Aug 16 05:39:00 PM PDT 24 |
| Peak memory | 207596 kb |
| Host | smart-80ba913e-0232-478d-9652-88a74c1f7536 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2346874072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_hos t_handshake.2346874072 |
| Directory | /workspace/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/44.usbdev_tx_rx_disruption.4059435512 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 513084138 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:39:01 PM PDT 24 |
| Finished | Aug 16 05:39:03 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-bd2a3754-cf28-4513-b277-b8e23483a192 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4059435512 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_tx_rx_disruption.4059435512 |
| Directory | /workspace/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/440.usbdev_tx_rx_disruption.4276500928 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 494932570 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:51 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-eb75efe8-dfc6-4587-b87a-05cf1e07f547 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4276500928 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 440.usbdev_tx_rx_disruption.4276500928 |
| Directory | /workspace/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/441.usbdev_tx_rx_disruption.905159481 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 679596402 ps |
| CPU time | 1.86 seconds |
| Started | Aug 16 05:40:22 PM PDT 24 |
| Finished | Aug 16 05:40:24 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-39139e9b-d40a-41e8-b048-13c60145b376 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=905159481 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 441.usbdev_tx_rx_disruption.905159481 |
| Directory | /workspace/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/442.usbdev_tx_rx_disruption.3222446339 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 531569299 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:33 PM PDT 24 |
| Finished | Aug 16 05:40:35 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-0eed72f5-ff92-40ca-89a9-bd5bca5b5dab |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3222446339 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 442.usbdev_tx_rx_disruption.3222446339 |
| Directory | /workspace/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/443.usbdev_tx_rx_disruption.4165503740 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 638600765 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:40:48 PM PDT 24 |
| Finished | Aug 16 05:40:49 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-6adf7608-c128-4535-92e8-44bfe659cffe |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4165503740 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 443.usbdev_tx_rx_disruption.4165503740 |
| Directory | /workspace/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/444.usbdev_tx_rx_disruption.475781430 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 623415850 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:41:04 PM PDT 24 |
| Finished | Aug 16 05:41:05 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-3227ac7d-eeb0-4a42-bc5b-f900efabeccf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=475781430 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 444.usbdev_tx_rx_disruption.475781430 |
| Directory | /workspace/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/445.usbdev_tx_rx_disruption.3713064112 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 548558301 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:51 PM PDT 24 |
| Finished | Aug 16 05:40:53 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-01856638-77d3-4f02-bf82-f5a61bd9af4e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3713064112 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 445.usbdev_tx_rx_disruption.3713064112 |
| Directory | /workspace/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/446.usbdev_tx_rx_disruption.1157057719 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 631136903 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:40:40 PM PDT 24 |
| Finished | Aug 16 05:40:42 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-33c7a313-c46a-4f1a-b19a-8fb53a06ef9e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1157057719 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 446.usbdev_tx_rx_disruption.1157057719 |
| Directory | /workspace/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/447.usbdev_tx_rx_disruption.3860483501 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 366190491 ps |
| CPU time | 1.24 seconds |
| Started | Aug 16 05:40:50 PM PDT 24 |
| Finished | Aug 16 05:40:56 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-82e7eb3c-7322-4353-9c8c-fcde06300900 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3860483501 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 447.usbdev_tx_rx_disruption.3860483501 |
| Directory | /workspace/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/448.usbdev_tx_rx_disruption.993564340 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 538118488 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:54 PM PDT 24 |
| Finished | Aug 16 05:40:55 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-7f47a838-843f-4ce1-8c0d-d6bb25fc46b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=993564340 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 448.usbdev_tx_rx_disruption.993564340 |
| Directory | /workspace/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/449.usbdev_tx_rx_disruption.1081421695 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 543175190 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:50 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-7781cba9-3c4f-4c0b-8942-5bef16cc11cf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1081421695 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 449.usbdev_tx_rx_disruption.1081421695 |
| Directory | /workspace/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/45.usbdev_alert_test.2870843991 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 44174205 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:12 PM PDT 24 |
| Peak memory | 207336 kb |
| Host | smart-bbbebbc2-fb6a-419d-9f64-b11f6c2d8da7 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2870843991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.2870843991 |
| Directory | /workspace/45.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/45.usbdev_aon_wake_disconnect.1737702026 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 10905389068 ps |
| CPU time | 13.93 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:36 PM PDT 24 |
| Peak memory | 207836 kb |
| Host | smart-7072da60-5e4e-461e-bd0a-83807bf3190a |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1737702026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_a on_wake_disconnect.1737702026 |
| Directory | /workspace/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/45.usbdev_aon_wake_reset.860716019 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 14157416568 ps |
| CPU time | 19.96 seconds |
| Started | Aug 16 05:39:17 PM PDT 24 |
| Finished | Aug 16 05:39:38 PM PDT 24 |
| Peak memory | 215992 kb |
| Host | smart-28fc3803-6864-497a-b854-1ea92ecea3e1 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=860716019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.860716019 |
| Directory | /workspace/45.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/45.usbdev_aon_wake_resume.2499133282 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 25648217054 ps |
| CPU time | 31 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:43 PM PDT 24 |
| Peak memory | 216120 kb |
| Host | smart-50d14baa-31d7-4104-822b-179eddddd630 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2499133282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_a on_wake_resume.2499133282 |
| Directory | /workspace/45.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/45.usbdev_av_buffer.2062718766 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 170986463 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:11 PM PDT 24 |
| Finished | Aug 16 05:39:12 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-bf8abaff-3832-48a8-9945-ff38961299cb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20627 18766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_av_buffer.2062718766 |
| Directory | /workspace/45.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/45.usbdev_bitstuff_err.3328006353 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 187440538 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:04 PM PDT 24 |
| Finished | Aug 16 05:39:05 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-265278cf-9c06-44e1-8352-94b66a5dc4e6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33280 06353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_bitstuff_err.3328006353 |
| Directory | /workspace/45.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/45.usbdev_data_toggle_clear.3899017773 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 472502294 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:39:11 PM PDT 24 |
| Finished | Aug 16 05:39:13 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-05dabab5-7069-4297-a932-48c8c12f672c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38990 17773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_clear.3899017773 |
| Directory | /workspace/45.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/45.usbdev_data_toggle_restore.1237710796 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 307927246 ps |
| CPU time | 1.17 seconds |
| Started | Aug 16 05:39:19 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-c66001d5-a760-4cc3-97a0-851f2de67122 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1237710796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.1237710796 |
| Directory | /workspace/45.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/45.usbdev_device_address.3627809880 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 17153741814 ps |
| CPU time | 27.79 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:39:24 PM PDT 24 |
| Peak memory | 207832 kb |
| Host | smart-8d0ba5e8-95c2-4a47-acbf-7d9d774a5c22 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36278 09880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_address.3627809880 |
| Directory | /workspace/45.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/45.usbdev_device_timeout.1071869804 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 470893623 ps |
| CPU time | 7.92 seconds |
| Started | Aug 16 05:39:03 PM PDT 24 |
| Finished | Aug 16 05:39:11 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-e2b1ffd7-f319-4248-98eb-195ace030024 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1071869804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.1071869804 |
| Directory | /workspace/45.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/45.usbdev_disable_endpoint.3179445199 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 1142418586 ps |
| CPU time | 2.35 seconds |
| Started | Aug 16 05:39:06 PM PDT 24 |
| Finished | Aug 16 05:39:08 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-4d443f2e-5fd2-4b47-8881-0e9c54f9b995 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31794 45199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_disable_endpoint.3179445199 |
| Directory | /workspace/45.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/45.usbdev_disconnected.3598100979 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 153326884 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:01 PM PDT 24 |
| Finished | Aug 16 05:39:02 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-20801bcd-fc5c-4105-b63b-7f293a8378e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35981 00979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_disconnected.3598100979 |
| Directory | /workspace/45.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/45.usbdev_enable.414536594 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 47186408 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:39:11 PM PDT 24 |
| Finished | Aug 16 05:39:12 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-9252c116-f6b5-4b37-a0b4-a42d1826f5ce |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41453 6594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_enable.414536594 |
| Directory | /workspace/45.usbdev_enable/latest |
| Test location | /workspace/coverage/default/45.usbdev_endpoint_access.3711885231 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 644392037 ps |
| CPU time | 1.91 seconds |
| Started | Aug 16 05:39:15 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-f8b1e2f2-5f15-4b95-abad-59dc62d3b6f9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37118 85231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.3711885231 |
| Directory | /workspace/45.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/45.usbdev_endpoint_types.4133888320 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 697656096 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:39:10 PM PDT 24 |
| Finished | Aug 16 05:39:12 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-261ac25f-3105-4d21-99bc-e3671b7dcb12 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4133888320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.4133888320 |
| Directory | /workspace/45.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/45.usbdev_fifo_rst.1018349404 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 293950097 ps |
| CPU time | 2.04 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:39:10 PM PDT 24 |
| Peak memory | 207640 kb |
| Host | smart-45ff97ce-261c-4c83-88bb-67fef8be5ad7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10183 49404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_fifo_rst.1018349404 |
| Directory | /workspace/45.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/45.usbdev_in_iso.3114244716 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 256241014 ps |
| CPU time | 1.28 seconds |
| Started | Aug 16 05:39:05 PM PDT 24 |
| Finished | Aug 16 05:39:07 PM PDT 24 |
| Peak memory | 216024 kb |
| Host | smart-5dcf8fd2-7d1e-4381-8ff0-db36670215c5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3114244716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.3114244716 |
| Directory | /workspace/45.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/45.usbdev_in_stall.2533305291 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 138724709 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:07 PM PDT 24 |
| Finished | Aug 16 05:39:08 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-4b03ea71-e6ef-4781-af73-49c12a93e242 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25333 05291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_in_stall.2533305291 |
| Directory | /workspace/45.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/45.usbdev_in_trans.4010349973 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 233539227 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:39:14 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-65d46694-6cd8-42f0-885d-47de50165a09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40103 49973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_in_trans.4010349973 |
| Directory | /workspace/45.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_invalid_sync.2847315102 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 4035461686 ps |
| CPU time | 30.47 seconds |
| Started | Aug 16 05:39:16 PM PDT 24 |
| Finished | Aug 16 05:39:47 PM PDT 24 |
| Peak memory | 218080 kb |
| Host | smart-ff3ad109-ade4-4294-83f0-f98217d609d6 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2847315102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.2847315102 |
| Directory | /workspace/45.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/45.usbdev_iso_retraction.2966536660 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 7534181092 ps |
| CPU time | 48.15 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:39:57 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-9fc41e77-3d0f-419f-bb90-178a439312b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2966536660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.2966536660 |
| Directory | /workspace/45.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/45.usbdev_link_in_err.1283355963 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 208104607 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:39:15 PM PDT 24 |
| Finished | Aug 16 05:39:16 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-35b9362b-387d-4b9c-9ded-959bbcea53a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12833 55963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_link_in_err.1283355963 |
| Directory | /workspace/45.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/45.usbdev_link_resume.1593639749 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 6645216332 ps |
| CPU time | 9.93 seconds |
| Started | Aug 16 05:39:04 PM PDT 24 |
| Finished | Aug 16 05:39:14 PM PDT 24 |
| Peak memory | 216120 kb |
| Host | smart-957c0ba4-ff8e-49fb-883d-5a330040f064 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15936 39749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_link_resume.1593639749 |
| Directory | /workspace/45.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/45.usbdev_link_suspend.365424345 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 11049883205 ps |
| CPU time | 14.74 seconds |
| Started | Aug 16 05:39:18 PM PDT 24 |
| Finished | Aug 16 05:39:33 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-50d28218-56de-491a-bc77-e4e8d718068f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36542 4345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_link_suspend.365424345 |
| Directory | /workspace/45.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/45.usbdev_low_speed_traffic.29912294 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 3993079573 ps |
| CPU time | 118.17 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:41:18 PM PDT 24 |
| Peak memory | 215932 kb |
| Host | smart-34e7b7f2-74a1-48a3-b252-58385252a5b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=29912294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.29912294 |
| Directory | /workspace/45.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/45.usbdev_max_inter_pkt_delay.586195468 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 3360119330 ps |
| CPU time | 25.63 seconds |
| Started | Aug 16 05:39:18 PM PDT 24 |
| Finished | Aug 16 05:39:44 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-6e29eb22-b18d-4549-92ac-e445d6c3eb2d |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=586195468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.586195468 |
| Directory | /workspace/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/45.usbdev_max_length_in_transaction.2502912841 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 246649975 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:39:11 PM PDT 24 |
| Finished | Aug 16 05:39:12 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-5f805b7b-5c6a-431e-8e21-cce927a1aa4d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2502912841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.2502912841 |
| Directory | /workspace/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_max_length_out_transaction.515229589 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 205150824 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:39:19 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-59b7a502-633f-4844-8b9c-7c1fdb65a5e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51522 9589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.515229589 |
| Directory | /workspace/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_min_inter_pkt_delay.1386066348 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 4060959446 ps |
| CPU time | 119.74 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:41:08 PM PDT 24 |
| Peak memory | 217384 kb |
| Host | smart-30170288-b94f-441a-921c-970b4fb0fb28 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1386066348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.1386066348 |
| Directory | /workspace/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/45.usbdev_min_length_in_transaction.2409356144 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 164959731 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:39:13 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a51a6c4d-0013-4305-9123-2e7cb2ad574b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2409356144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.2409356144 |
| Directory | /workspace/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_min_length_out_transaction.1853538433 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 139938228 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:39:14 PM PDT 24 |
| Finished | Aug 16 05:39:15 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-a1915e97-c727-48a7-9f55-f6022d898b87 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18535 38433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.1853538433 |
| Directory | /workspace/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_nak_trans.2359629489 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 240592182 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:39:17 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-43d859ea-4a97-4d1d-bab2-dcdef810ff29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23596 29489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_nak_trans.2359629489 |
| Directory | /workspace/45.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_out_iso.4227121335 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 170356316 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:16 PM PDT 24 |
| Finished | Aug 16 05:39:17 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c1d46379-8e8c-40bb-aa68-b9a6ec80f2a3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42271 21335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_out_iso.4227121335 |
| Directory | /workspace/45.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/45.usbdev_out_stall.1480865701 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 170361803 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:39:11 PM PDT 24 |
| Finished | Aug 16 05:39:12 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-3a2106ff-3499-4f24-a954-8c5fdd063a12 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14808 65701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_out_stall.1480865701 |
| Directory | /workspace/45.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/45.usbdev_out_trans_nak.2493855326 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 167674628 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:16 PM PDT 24 |
| Finished | Aug 16 05:39:17 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-66f54d7e-c1d0-455c-867d-648d0549c918 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24938 55326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_out_trans_nak.2493855326 |
| Directory | /workspace/45.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/45.usbdev_pending_in_trans.849190991 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 157374754 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:06 PM PDT 24 |
| Finished | Aug 16 05:39:07 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-cdd2caa9-1548-48a7-a7c8-7cedcd377e90 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84919 0991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pending_in_trans.849190991 |
| Directory | /workspace/45.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_phy_config_pinflip.2703142639 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 215588469 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:39:09 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-6f4b7ed7-ee86-419e-b1c9-127c8f9bf96f |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2703142639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.2703142639 |
| Directory | /workspace/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/45.usbdev_phy_config_usb_ref_disable.922106012 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 199253939 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:17 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-17c9b311-3d6f-40ee-b0e5-3420c9e7d1a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92210 6012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.922106012 |
| Directory | /workspace/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/45.usbdev_pkt_buffer.1156316691 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 16512333941 ps |
| CPU time | 42 seconds |
| Started | Aug 16 05:39:17 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 224076 kb |
| Host | smart-6294d900-34dd-4e3b-b48f-12849f3b39fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11563 16691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pkt_buffer.1156316691 |
| Directory | /workspace/45.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/45.usbdev_pkt_received.1311774331 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 154734317 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-ddde0c6c-a793-4fbf-9cff-e8a4d948b5ec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13117 74331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pkt_received.1311774331 |
| Directory | /workspace/45.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/45.usbdev_pkt_sent.1263697279 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 161598890 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-7840e1e5-1b75-4a98-892e-350d72a42fa4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12636 97279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_pkt_sent.1263697279 |
| Directory | /workspace/45.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/45.usbdev_random_length_in_transaction.539278419 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 182267194 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:39:18 PM PDT 24 |
| Finished | Aug 16 05:39:19 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-c973df26-a297-4341-ae18-82139fcb8023 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53927 8419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_in_transaction.539278419 |
| Directory | /workspace/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_random_length_out_transaction.500914044 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 181135777 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:39:16 PM PDT 24 |
| Finished | Aug 16 05:39:17 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-4eeab19f-ea28-4530-8b2b-2af05330df4c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=50091 4044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.500914044 |
| Directory | /workspace/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/45.usbdev_rx_crc_err.354887938 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 156909063 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:21 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-3f75d7ef-309b-41d0-975f-bdbe9c7311f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35488 7938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_rx_crc_err.354887938 |
| Directory | /workspace/45.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/45.usbdev_rx_full.1535278283 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 325967038 ps |
| CPU time | 1.17 seconds |
| Started | Aug 16 05:39:04 PM PDT 24 |
| Finished | Aug 16 05:39:06 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-5c54da7f-9528-43e3-863b-6f433b206284 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15352 78283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_rx_full.1535278283 |
| Directory | /workspace/45.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/45.usbdev_setup_stage.1196317052 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 150587267 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-50a3460b-0db7-4437-9563-56b2f7ffedb9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11963 17052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_setup_stage.1196317052 |
| Directory | /workspace/45.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/45.usbdev_setup_trans_ignored.4120745962 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 154523107 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:39:07 PM PDT 24 |
| Finished | Aug 16 05:39:08 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-5d70d403-5514-40f1-9880-2e5e12423995 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41207 45962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_setup_trans_ignored.4120745962 |
| Directory | /workspace/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/45.usbdev_smoke.461340101 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 269461660 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-3dec0ba2-9fea-4e96-929c-2d72f9d5b4a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46134 0101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.461340101 |
| Directory | /workspace/45.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/45.usbdev_spurious_pids_ignored.777678116 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 2599150543 ps |
| CPU time | 23.17 seconds |
| Started | Aug 16 05:39:03 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 224000 kb |
| Host | smart-e758bfdc-6245-429e-9b6d-c73b1e691f1f |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=777678116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.777678116 |
| Directory | /workspace/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/45.usbdev_stall_priority_over_nak.4208938954 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 170804751 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-2c2eac5b-1a03-4546-8249-10598f325240 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42089 38954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.4208938954 |
| Directory | /workspace/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/45.usbdev_stall_trans.4127103315 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 155663232 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:39:15 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-07dddac8-432e-4775-b17c-de65174d4d6c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41271 03315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_trans.4127103315 |
| Directory | /workspace/45.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/45.usbdev_stream_len_max.690229168 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 700662271 ps |
| CPU time | 1.89 seconds |
| Started | Aug 16 05:39:07 PM PDT 24 |
| Finished | Aug 16 05:39:09 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-331e75ee-2c54-4e54-af01-14ea11ec755b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69022 9168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.690229168 |
| Directory | /workspace/45.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/45.usbdev_streaming_out.1266885737 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 1932556244 ps |
| CPU time | 13.85 seconds |
| Started | Aug 16 05:39:13 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 224072 kb |
| Host | smart-b960b5e3-842a-4232-b2f7-d9245fce7049 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12668 85737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_streaming_out.1266885737 |
| Directory | /workspace/45.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/45.usbdev_timeout_missing_host_handshake.4131513109 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 2496138443 ps |
| CPU time | 21.49 seconds |
| Started | Aug 16 05:39:19 PM PDT 24 |
| Finished | Aug 16 05:39:41 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-34490c24-f4e8-405e-b195-8580140b0e0e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4131513109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_hos t_handshake.4131513109 |
| Directory | /workspace/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/45.usbdev_tx_rx_disruption.243916965 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 550666915 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:39:17 PM PDT 24 |
| Finished | Aug 16 05:39:19 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-40b130e0-b9ef-4032-ad5a-cab3b4a542e5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=243916965 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 45.usbdev_tx_rx_disruption.243916965 |
| Directory | /workspace/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/450.usbdev_tx_rx_disruption.1304495297 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 633379508 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:40:35 PM PDT 24 |
| Finished | Aug 16 05:40:37 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-d2ac2e8a-ba50-476c-a5ef-bb0371ff9ee4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1304495297 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 450.usbdev_tx_rx_disruption.1304495297 |
| Directory | /workspace/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/451.usbdev_tx_rx_disruption.1112846968 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 445114334 ps |
| CPU time | 1.36 seconds |
| Started | Aug 16 05:40:55 PM PDT 24 |
| Finished | Aug 16 05:40:57 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-c6fda805-98c7-4899-968d-e6328d49df27 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1112846968 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 451.usbdev_tx_rx_disruption.1112846968 |
| Directory | /workspace/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/452.usbdev_tx_rx_disruption.1226837989 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 529810745 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:40:59 PM PDT 24 |
| Finished | Aug 16 05:41:01 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-e7a03593-f425-4dca-af8d-d357538407dc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1226837989 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 452.usbdev_tx_rx_disruption.1226837989 |
| Directory | /workspace/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/453.usbdev_tx_rx_disruption.435719852 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 472695122 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:40:54 PM PDT 24 |
| Finished | Aug 16 05:40:56 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-ca2d1ae2-0f66-467e-b1be-ab8d758710ca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=435719852 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 453.usbdev_tx_rx_disruption.435719852 |
| Directory | /workspace/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/454.usbdev_tx_rx_disruption.775489101 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 536312139 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:54 PM PDT 24 |
| Finished | Aug 16 05:40:55 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-d6dadb5a-d409-43fd-933c-2c9044fbb02b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=775489101 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 454.usbdev_tx_rx_disruption.775489101 |
| Directory | /workspace/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/455.usbdev_tx_rx_disruption.4083886862 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 502939951 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:40:57 PM PDT 24 |
| Finished | Aug 16 05:40:59 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-44ab0bc3-b85c-484a-a8aa-56bfd275d937 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4083886862 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 455.usbdev_tx_rx_disruption.4083886862 |
| Directory | /workspace/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/456.usbdev_tx_rx_disruption.2833156033 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 478769839 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:41:01 PM PDT 24 |
| Finished | Aug 16 05:41:03 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-ecc89a91-4aaa-416a-b0f0-5de40e0b2a99 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2833156033 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 456.usbdev_tx_rx_disruption.2833156033 |
| Directory | /workspace/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/457.usbdev_tx_rx_disruption.3439039844 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 612678299 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:53 PM PDT 24 |
| Finished | Aug 16 05:40:55 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-0d2b3506-4ff4-4e8c-820e-921163ce810e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3439039844 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 457.usbdev_tx_rx_disruption.3439039844 |
| Directory | /workspace/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/458.usbdev_tx_rx_disruption.2382857734 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 590583312 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:41:02 PM PDT 24 |
| Finished | Aug 16 05:41:04 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-cea44c12-8f04-4cfb-b158-b3d50830dba7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2382857734 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 458.usbdev_tx_rx_disruption.2382857734 |
| Directory | /workspace/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/459.usbdev_tx_rx_disruption.1158658760 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 466638712 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:40:45 PM PDT 24 |
| Finished | Aug 16 05:40:47 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-157cac38-9958-4f6a-87eb-64ad69a3cd2a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1158658760 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 459.usbdev_tx_rx_disruption.1158658760 |
| Directory | /workspace/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/46.usbdev_alert_test.3163981347 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 95588828 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:39:17 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-40a7b225-ba90-4d31-9ce0-10cbd70f9f3c |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3163981347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.3163981347 |
| Directory | /workspace/46.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/46.usbdev_aon_wake_disconnect.2350814642 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 10733986993 ps |
| CPU time | 13.53 seconds |
| Started | Aug 16 05:39:07 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 207816 kb |
| Host | smart-055dd12e-09f0-48f6-b8b5-ddd2ee9ebe32 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2350814642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_a on_wake_disconnect.2350814642 |
| Directory | /workspace/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/46.usbdev_aon_wake_reset.721736526 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 15698840100 ps |
| CPU time | 19.83 seconds |
| Started | Aug 16 05:39:11 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-6dabb927-b4b9-4ea5-8063-46e3242c3718 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=721736526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.721736526 |
| Directory | /workspace/46.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/46.usbdev_aon_wake_resume.1686810176 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 23520200255 ps |
| CPU time | 27.84 seconds |
| Started | Aug 16 05:39:07 PM PDT 24 |
| Finished | Aug 16 05:39:35 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-73f46a97-6c53-4638-821b-4a6aa5b9f6a5 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1686810176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_a on_wake_resume.1686810176 |
| Directory | /workspace/46.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/46.usbdev_av_buffer.714814564 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 159417227 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:14 PM PDT 24 |
| Finished | Aug 16 05:39:15 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-689ce50d-e86d-4233-bb6e-5f90c36512d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71481 4564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_av_buffer.714814564 |
| Directory | /workspace/46.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/46.usbdev_bitstuff_err.4232030424 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 179602939 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-d7975c44-5a17-4999-a9d8-382f5da3590e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42320 30424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_bitstuff_err.4232030424 |
| Directory | /workspace/46.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/46.usbdev_data_toggle_clear.2062467584 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 243998483 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:21 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-7e1103bb-b938-4b69-a6a6-81c3133a061a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20624 67584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_clear.2062467584 |
| Directory | /workspace/46.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/46.usbdev_data_toggle_restore.356319737 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 923545071 ps |
| CPU time | 2.69 seconds |
| Started | Aug 16 05:38:56 PM PDT 24 |
| Finished | Aug 16 05:38:59 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-56869a8a-d642-43f5-ada5-4c0529b540c2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=356319737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.356319737 |
| Directory | /workspace/46.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/46.usbdev_device_timeout.1908198924 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 648669690 ps |
| CPU time | 5.13 seconds |
| Started | Aug 16 05:39:13 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-d959fe5b-2b72-4259-8444-93c814ad479d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1908198924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.1908198924 |
| Directory | /workspace/46.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/46.usbdev_disable_endpoint.2450329495 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 798690344 ps |
| CPU time | 2.06 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:15 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-ae800d19-3437-4174-a508-bd5b7b4ebf40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24503 29495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_disable_endpoint.2450329495 |
| Directory | /workspace/46.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/46.usbdev_disconnected.2884234192 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 152625852 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:39:17 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-b032647d-2757-4302-ab9b-94fc73a1db2d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28842 34192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_disconnected.2884234192 |
| Directory | /workspace/46.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/46.usbdev_enable.1182061845 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 55467708 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:39:15 PM PDT 24 |
| Finished | Aug 16 05:39:16 PM PDT 24 |
| Peak memory | 207376 kb |
| Host | smart-1399ff2c-2554-4662-b1e5-a5295d8a50e3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11820 61845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_enable.1182061845 |
| Directory | /workspace/46.usbdev_enable/latest |
| Test location | /workspace/coverage/default/46.usbdev_endpoint_access.574776735 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 823709609 ps |
| CPU time | 2.09 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-c4169df4-84bd-4d3f-8324-54d8fccd976b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=57477 6735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.574776735 |
| Directory | /workspace/46.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/46.usbdev_endpoint_types.2958539260 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 440839650 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:39:18 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-358fa7f7-702f-4315-96f1-be5baf51520d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2958539260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.2958539260 |
| Directory | /workspace/46.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/46.usbdev_fifo_rst.3168567731 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 330306878 ps |
| CPU time | 2.29 seconds |
| Started | Aug 16 05:39:05 PM PDT 24 |
| Finished | Aug 16 05:39:07 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-214518c4-c15f-4d50-ac15-951752d02d69 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31685 67731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_fifo_rst.3168567731 |
| Directory | /workspace/46.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/46.usbdev_in_iso.31639922 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 248169603 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:39:11 PM PDT 24 |
| Finished | Aug 16 05:39:13 PM PDT 24 |
| Peak memory | 215860 kb |
| Host | smart-3cb16394-a731-432f-b32a-cb6d3f21046f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=31639922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.31639922 |
| Directory | /workspace/46.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/46.usbdev_in_stall.3405600236 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 150425672 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:09 PM PDT 24 |
| Finished | Aug 16 05:39:10 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-0b9eb5e7-8ea3-4f5f-b89d-8c582611c8d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34056 00236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_in_stall.3405600236 |
| Directory | /workspace/46.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/46.usbdev_in_trans.3377871897 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 212945436 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:39:10 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-8ab4192c-f894-454e-92c5-babb015e3ca4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33778 71897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_in_trans.3377871897 |
| Directory | /workspace/46.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_invalid_sync.1878673019 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 2972563665 ps |
| CPU time | 29.56 seconds |
| Started | Aug 16 05:39:09 PM PDT 24 |
| Finished | Aug 16 05:39:39 PM PDT 24 |
| Peak memory | 224292 kb |
| Host | smart-ba33b8f3-7339-4364-844d-7eb3b13cddfc |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1878673019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.1878673019 |
| Directory | /workspace/46.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/46.usbdev_iso_retraction.1737790114 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 8366913358 ps |
| CPU time | 55.23 seconds |
| Started | Aug 16 05:39:11 PM PDT 24 |
| Finished | Aug 16 05:40:06 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-5825dad3-4d25-465f-a85e-9379cc64686b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1737790114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.1737790114 |
| Directory | /workspace/46.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/46.usbdev_link_in_err.1002575215 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 160825682 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:24 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-b2557c48-a4a3-41ce-b5ec-45d26b302148 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10025 75215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_link_in_err.1002575215 |
| Directory | /workspace/46.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/46.usbdev_link_resume.3091668257 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 8068711530 ps |
| CPU time | 11.99 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:33 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-048d56f5-5769-4e32-8a00-533cc305375f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30916 68257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_link_resume.3091668257 |
| Directory | /workspace/46.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/46.usbdev_link_suspend.1164472650 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 9554578035 ps |
| CPU time | 13.42 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:33 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-9db9833e-289d-4180-8a74-d2191fc6c06c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11644 72650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_link_suspend.1164472650 |
| Directory | /workspace/46.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/46.usbdev_low_speed_traffic.2110226794 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 4842403731 ps |
| CPU time | 50.94 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:40:11 PM PDT 24 |
| Peak memory | 224208 kb |
| Host | smart-adc98b2a-e18c-4fb5-a07c-193eb5a2f359 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2110226794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.2110226794 |
| Directory | /workspace/46.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/46.usbdev_max_inter_pkt_delay.1930063535 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 4018434360 ps |
| CPU time | 115.67 seconds |
| Started | Aug 16 05:39:13 PM PDT 24 |
| Finished | Aug 16 05:41:08 PM PDT 24 |
| Peak memory | 217200 kb |
| Host | smart-30dbc3cf-6824-4785-9f78-97bdd8d37825 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1930063535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.1930063535 |
| Directory | /workspace/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/46.usbdev_max_length_in_transaction.555289358 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 237979377 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-276f0361-9f7e-4e65-8cb5-f8249cc1a45d |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=555289358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.555289358 |
| Directory | /workspace/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_max_length_out_transaction.2220250641 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 216971348 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:39:15 PM PDT 24 |
| Finished | Aug 16 05:39:16 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e7a6255f-50e6-4b0d-a5b9-a8cbc3e720db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22202 50641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.2220250641 |
| Directory | /workspace/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_min_inter_pkt_delay.4278611926 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 1777482485 ps |
| CPU time | 18.04 seconds |
| Started | Aug 16 05:39:15 PM PDT 24 |
| Finished | Aug 16 05:39:33 PM PDT 24 |
| Peak memory | 215824 kb |
| Host | smart-84189512-3090-4c64-9e61-2fb15efbd313 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=4278611926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.4278611926 |
| Directory | /workspace/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/46.usbdev_min_length_in_transaction.118848227 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 200595512 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-47978263-db38-4259-ac50-317848e2833b |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=118848227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.118848227 |
| Directory | /workspace/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_min_length_out_transaction.1049850095 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 161897182 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-041720ca-c3a0-4562-a49e-6558ca280023 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10498 50095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.1049850095 |
| Directory | /workspace/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_nak_trans.1013729231 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 192044296 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-535b552f-4164-4ea7-a794-dc03f7c90761 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10137 29231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_nak_trans.1013729231 |
| Directory | /workspace/46.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_out_iso.3936670455 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 256847982 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-1d0d772c-285e-42fb-a638-e79f26da1dac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39366 70455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_out_iso.3936670455 |
| Directory | /workspace/46.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/46.usbdev_out_stall.4243055250 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 185740381 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:21 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-25ac7b27-969b-4cc9-a8ce-ad658b7ce5f8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42430 55250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_out_stall.4243055250 |
| Directory | /workspace/46.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/46.usbdev_out_trans_nak.1785901422 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 170604815 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-84ae69eb-21bf-47c8-a3a0-2db4c3857c12 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17859 01422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_out_trans_nak.1785901422 |
| Directory | /workspace/46.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/46.usbdev_pending_in_trans.3799756337 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 213568111 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:39:18 PM PDT 24 |
| Finished | Aug 16 05:39:19 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-96fdebd8-13fa-4b65-95fe-e96d9160ab4d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37997 56337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pending_in_trans.3799756337 |
| Directory | /workspace/46.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_phy_config_pinflip.2676250070 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 302086157 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-94f5f23b-53ca-40e8-b78d-3d974904ad60 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2676250070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.2676250070 |
| Directory | /workspace/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/46.usbdev_phy_config_usb_ref_disable.287530906 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 144210425 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:18 PM PDT 24 |
| Finished | Aug 16 05:39:19 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-4ea0d381-3a40-4feb-904a-6d8891f923fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28753 0906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.287530906 |
| Directory | /workspace/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/46.usbdev_phy_pins_sense.3515026747 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 58928491 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-d5d92927-2943-46a2-9d59-b3c855c986c5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35150 26747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.3515026747 |
| Directory | /workspace/46.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/46.usbdev_pkt_buffer.1099506389 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 14437440524 ps |
| CPU time | 36.52 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:40:01 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-d5e6956a-e1b1-41cb-989b-06445b91e28e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10995 06389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pkt_buffer.1099506389 |
| Directory | /workspace/46.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/46.usbdev_pkt_received.2322600346 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 206272611 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-7b58f772-aaa6-4c85-9581-6e0326e89fe6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23226 00346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pkt_received.2322600346 |
| Directory | /workspace/46.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/46.usbdev_pkt_sent.2711436717 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 221592712 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:13 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-f97d50c1-2b4f-4e8e-9b72-7fb8d04a7f95 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27114 36717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pkt_sent.2711436717 |
| Directory | /workspace/46.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/46.usbdev_random_length_in_transaction.2737290283 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 160062836 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:39:18 PM PDT 24 |
| Finished | Aug 16 05:39:19 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-30ca4d71-914c-48ae-8e0e-7a67de72ebf0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27372 90283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_in_transaction.2737290283 |
| Directory | /workspace/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_random_length_out_transaction.3608574393 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 154770484 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:24 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-342699f6-5e17-4a30-bcef-6e90b9604715 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36085 74393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.3608574393 |
| Directory | /workspace/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/46.usbdev_rx_crc_err.2342155453 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 139346667 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:24 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-eab4d774-ce48-4523-bd17-393ba7dbd15a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23421 55453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_rx_crc_err.2342155453 |
| Directory | /workspace/46.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/46.usbdev_rx_full.1249380038 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 292293873 ps |
| CPU time | 1.14 seconds |
| Started | Aug 16 05:39:19 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-1656093b-1048-4b26-a5a3-925e4951c23c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12493 80038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_rx_full.1249380038 |
| Directory | /workspace/46.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/46.usbdev_setup_stage.477723867 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 154084343 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-440e270d-3882-4b28-95d6-1eaad7b18101 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47772 3867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_setup_stage.477723867 |
| Directory | /workspace/46.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/46.usbdev_setup_trans_ignored.2730205008 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 153312131 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-fe7c17bb-7c76-410a-931a-94ad7425a789 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27302 05008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_setup_trans_ignored.2730205008 |
| Directory | /workspace/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/46.usbdev_smoke.847535165 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 203164984 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-53b8478c-f2d1-4036-a7c0-0a7c89c05869 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84753 5165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.847535165 |
| Directory | /workspace/46.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/46.usbdev_spurious_pids_ignored.3458367496 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 1750384241 ps |
| CPU time | 48.53 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:40:09 PM PDT 24 |
| Peak memory | 215856 kb |
| Host | smart-09c0eab3-5f52-4338-8463-1f1de2830f0a |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3458367496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.3458367496 |
| Directory | /workspace/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/46.usbdev_stall_priority_over_nak.2378663982 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 140895014 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-87d9302d-07ee-4a7c-8183-e3aa812be6a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23786 63982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.2378663982 |
| Directory | /workspace/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/46.usbdev_stall_trans.1187817361 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 174086032 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:19 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-b7dc4b36-26ba-42af-ba09-f035f0aaf5ae |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11878 17361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_trans.1187817361 |
| Directory | /workspace/46.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/46.usbdev_stream_len_max.930055646 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 287652764 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-f8cec39d-5cfa-4911-af1c-d98305e8eff3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93005 5646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.930055646 |
| Directory | /workspace/46.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/46.usbdev_streaming_out.1851805308 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 2784190534 ps |
| CPU time | 76.21 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:40:39 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-014a0343-bd4b-4e87-972d-7d9082f92306 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18518 05308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_streaming_out.1851805308 |
| Directory | /workspace/46.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/46.usbdev_timeout_missing_host_handshake.2737544753 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 721422011 ps |
| CPU time | 15.17 seconds |
| Started | Aug 16 05:39:08 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-01fa83f5-ebca-478f-99e3-b14c8d98330a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2737544753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_hos t_handshake.2737544753 |
| Directory | /workspace/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/46.usbdev_tx_rx_disruption.1251988154 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 491824726 ps |
| CPU time | 1.49 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-50b7eada-1891-4839-855e-41eeb28e4d1c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1251988154 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_tx_rx_disruption.1251988154 |
| Directory | /workspace/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/460.usbdev_tx_rx_disruption.2487365377 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 476244712 ps |
| CPU time | 1.44 seconds |
| Started | Aug 16 05:40:40 PM PDT 24 |
| Finished | Aug 16 05:40:41 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-c95899ca-8af1-487a-9829-ef64b971ad5a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2487365377 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 460.usbdev_tx_rx_disruption.2487365377 |
| Directory | /workspace/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/461.usbdev_tx_rx_disruption.999209712 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 634700546 ps |
| CPU time | 1.75 seconds |
| Started | Aug 16 05:40:46 PM PDT 24 |
| Finished | Aug 16 05:40:47 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-68e4cc26-4f50-4913-b74b-04322651e431 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=999209712 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 461.usbdev_tx_rx_disruption.999209712 |
| Directory | /workspace/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/462.usbdev_tx_rx_disruption.2091765382 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 498158212 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:40:46 PM PDT 24 |
| Finished | Aug 16 05:40:47 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-794ff00d-ebeb-4376-9e51-3a90f2690aa9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2091765382 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 462.usbdev_tx_rx_disruption.2091765382 |
| Directory | /workspace/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/463.usbdev_tx_rx_disruption.3714464008 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 493528719 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:40:48 PM PDT 24 |
| Finished | Aug 16 05:40:50 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-a6608691-a89c-4272-be6d-6ab437c66b42 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3714464008 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 463.usbdev_tx_rx_disruption.3714464008 |
| Directory | /workspace/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/464.usbdev_tx_rx_disruption.3656233987 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 560632663 ps |
| CPU time | 1.8 seconds |
| Started | Aug 16 05:40:56 PM PDT 24 |
| Finished | Aug 16 05:40:58 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-aea1fe4e-c9b5-4882-91f2-a2a5039b7a49 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3656233987 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 464.usbdev_tx_rx_disruption.3656233987 |
| Directory | /workspace/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/465.usbdev_tx_rx_disruption.3893470311 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 555535429 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:40:59 PM PDT 24 |
| Finished | Aug 16 05:41:01 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-ce868ad7-a392-4029-9c57-44ffc0d921a6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3893470311 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 465.usbdev_tx_rx_disruption.3893470311 |
| Directory | /workspace/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/466.usbdev_tx_rx_disruption.748551633 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 537157645 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:51 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-7c596cac-3af1-4a13-bd31-71679731f88a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=748551633 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 466.usbdev_tx_rx_disruption.748551633 |
| Directory | /workspace/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/467.usbdev_tx_rx_disruption.2451307892 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 470983409 ps |
| CPU time | 1.54 seconds |
| Started | Aug 16 05:40:54 PM PDT 24 |
| Finished | Aug 16 05:40:56 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-8fc2cad8-a75d-451c-a521-ed2d22281928 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2451307892 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 467.usbdev_tx_rx_disruption.2451307892 |
| Directory | /workspace/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/468.usbdev_tx_rx_disruption.952583328 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 622600196 ps |
| CPU time | 1.81 seconds |
| Started | Aug 16 05:40:52 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-9a108041-2040-487b-a1c4-19bd4f744557 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=952583328 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 468.usbdev_tx_rx_disruption.952583328 |
| Directory | /workspace/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/469.usbdev_tx_rx_disruption.2773534483 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 617859415 ps |
| CPU time | 1.91 seconds |
| Started | Aug 16 05:40:50 PM PDT 24 |
| Finished | Aug 16 05:40:52 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-6b349403-829a-461c-bb95-87c71436412e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2773534483 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 469.usbdev_tx_rx_disruption.2773534483 |
| Directory | /workspace/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/47.usbdev_alert_test.1447356945 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 42816253 ps |
| CPU time | 0.67 seconds |
| Started | Aug 16 05:39:39 PM PDT 24 |
| Finished | Aug 16 05:39:40 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-187fd5e2-cea7-4928-901a-d56c5203c16e |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1447356945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.1447356945 |
| Directory | /workspace/47.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/47.usbdev_aon_wake_disconnect.1614519312 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 4326139488 ps |
| CPU time | 6.51 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:33 PM PDT 24 |
| Peak memory | 216028 kb |
| Host | smart-73faa438-e281-4690-a1ca-e3f9b110d3aa |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1614519312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_a on_wake_disconnect.1614519312 |
| Directory | /workspace/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/47.usbdev_aon_wake_reset.367792338 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 15007352231 ps |
| CPU time | 17.87 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:43 PM PDT 24 |
| Peak memory | 216088 kb |
| Host | smart-d6580ee7-4cfe-4f83-bafc-a2d90eaf06f7 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=367792338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.367792338 |
| Directory | /workspace/47.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/47.usbdev_aon_wake_resume.1272530223 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 28766358406 ps |
| CPU time | 32.09 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:55 PM PDT 24 |
| Peak memory | 207884 kb |
| Host | smart-c9a8587b-8d41-4c8b-aa6d-33ab0ae45740 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1272530223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_a on_wake_resume.1272530223 |
| Directory | /workspace/47.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/47.usbdev_av_buffer.3182771012 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 148308626 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:39:18 PM PDT 24 |
| Finished | Aug 16 05:39:20 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-033ce0d5-f643-43de-ab6e-f32b760a91ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31827 71012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_av_buffer.3182771012 |
| Directory | /workspace/47.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/47.usbdev_bitstuff_err.2324347797 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 200190854 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-a4223bb8-78d7-40fe-ab7a-bad128fadebd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23243 47797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_bitstuff_err.2324347797 |
| Directory | /workspace/47.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/47.usbdev_data_toggle_clear.1566102728 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 625245434 ps |
| CPU time | 2.31 seconds |
| Started | Aug 16 05:39:13 PM PDT 24 |
| Finished | Aug 16 05:39:15 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-5c77e884-54de-4e44-9692-1d8e4119ebee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15661 02728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_clear.1566102728 |
| Directory | /workspace/47.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/47.usbdev_data_toggle_restore.530406943 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 485288803 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-e05ca9f8-ac89-48b8-ad57-1a31485ba486 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=530406943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.530406943 |
| Directory | /workspace/47.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/47.usbdev_device_address.1056988611 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 48805429036 ps |
| CPU time | 77.72 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:40:41 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-b9f0b31e-9492-4e1a-ae40-8b04dd65e0f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10569 88611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.1056988611 |
| Directory | /workspace/47.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/47.usbdev_device_timeout.1924511165 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 3417868589 ps |
| CPU time | 29.18 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:50 PM PDT 24 |
| Peak memory | 207792 kb |
| Host | smart-193ac069-f8b1-408c-9617-486c461f77ad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1924511165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.1924511165 |
| Directory | /workspace/47.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/47.usbdev_disable_endpoint.976457989 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 831900993 ps |
| CPU time | 1.9 seconds |
| Started | Aug 16 05:39:12 PM PDT 24 |
| Finished | Aug 16 05:39:14 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-eeabbaaf-3828-4076-bc35-591a283e2389 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97645 7989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_disable_endpoint.976457989 |
| Directory | /workspace/47.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/47.usbdev_disconnected.3210966149 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 145410247 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-f3ccf1b1-9ae6-439c-bfa7-846be72e8f88 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32109 66149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_disconnected.3210966149 |
| Directory | /workspace/47.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/47.usbdev_enable.1795146848 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 66924331 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207308 kb |
| Host | smart-a1408e18-47d9-47e3-a574-09e55cde61b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17951 46848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_enable.1795146848 |
| Directory | /workspace/47.usbdev_enable/latest |
| Test location | /workspace/coverage/default/47.usbdev_endpoint_access.4039153043 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 888003029 ps |
| CPU time | 2.46 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-577540af-99b3-4e73-b865-e8a8cd3778db |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40391 53043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.4039153043 |
| Directory | /workspace/47.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/47.usbdev_fifo_rst.532508017 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 200650541 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:39:19 PM PDT 24 |
| Finished | Aug 16 05:39:21 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-7c1709d0-59f4-4b7d-bf2b-fd0238b13995 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53250 8017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_fifo_rst.532508017 |
| Directory | /workspace/47.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/47.usbdev_in_iso.2519263023 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 169726050 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:39:17 PM PDT 24 |
| Finished | Aug 16 05:39:18 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-e6d4e445-2f58-47b2-989b-ca7ea6c64dcd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2519263023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.2519263023 |
| Directory | /workspace/47.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/47.usbdev_in_stall.2809203693 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 147142064 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-af8c96cd-fcaa-4827-8995-8ca93ef90f7d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28092 03693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_in_stall.2809203693 |
| Directory | /workspace/47.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/47.usbdev_in_trans.120893926 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 166109283 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-a772ac8a-b322-4e99-87f1-6e5dc616b993 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12089 3926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_in_trans.120893926 |
| Directory | /workspace/47.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_invalid_sync.2169580048 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 4842291468 ps |
| CPU time | 141.92 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:41:44 PM PDT 24 |
| Peak memory | 224120 kb |
| Host | smart-8f56663c-85fe-4848-8ab6-c8014b388a81 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2169580048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.2169580048 |
| Directory | /workspace/47.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/47.usbdev_iso_retraction.876435647 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 8887219248 ps |
| CPU time | 62.95 seconds |
| Started | Aug 16 05:39:30 PM PDT 24 |
| Finished | Aug 16 05:40:33 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-6a951de1-6b4a-4ad3-89d3-435aed94e965 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=876435647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.876435647 |
| Directory | /workspace/47.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/47.usbdev_link_in_err.314050851 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 157514261 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-b9802d73-8906-4840-9ae9-3148ecd23525 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31405 0851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_link_in_err.314050851 |
| Directory | /workspace/47.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/47.usbdev_link_resume.828310750 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 27044854914 ps |
| CPU time | 32.7 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:55 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-2edb72f8-aae9-4ed5-bced-6dd45830de93 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=82831 0750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_link_resume.828310750 |
| Directory | /workspace/47.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/47.usbdev_link_suspend.472466612 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 4266144489 ps |
| CPU time | 5.79 seconds |
| Started | Aug 16 05:39:19 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-982f2b21-4fc2-438f-b1d1-fa90065f10a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47246 6612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_link_suspend.472466612 |
| Directory | /workspace/47.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/47.usbdev_low_speed_traffic.1306487133 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 3005362315 ps |
| CPU time | 25.46 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:54 PM PDT 24 |
| Peak memory | 219352 kb |
| Host | smart-3b0b8793-9ebf-47cb-ac1a-65d42eea991d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1306487133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.1306487133 |
| Directory | /workspace/47.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/47.usbdev_max_inter_pkt_delay.1041381798 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 2966443782 ps |
| CPU time | 86.79 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:40:53 PM PDT 24 |
| Peak memory | 215916 kb |
| Host | smart-54125097-02af-4799-b8ec-678f096a3758 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1041381798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.1041381798 |
| Directory | /workspace/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/47.usbdev_max_length_in_transaction.3505770550 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 251260390 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:39:50 PM PDT 24 |
| Finished | Aug 16 05:39:51 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-1bcc9fe4-b1b9-4664-9a68-fdd71613bd50 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3505770550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.3505770550 |
| Directory | /workspace/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_max_length_out_transaction.2110318798 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 189119112 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-dff34590-6df3-4d1c-86b6-e2bccbf7e23e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21103 18798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.2110318798 |
| Directory | /workspace/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_min_inter_pkt_delay.1747340650 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 2194690370 ps |
| CPU time | 15.95 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:41 PM PDT 24 |
| Peak memory | 224028 kb |
| Host | smart-58d18525-b3ab-45c9-b435-00713162c77c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1747340650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.1747340650 |
| Directory | /workspace/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/47.usbdev_min_length_in_transaction.1209508096 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 171929645 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-78ba8072-5e3e-4213-b95e-ae70c33a03e3 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1209508096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.1209508096 |
| Directory | /workspace/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_min_length_out_transaction.3822192188 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 153243281 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-e9e0dc91-656a-4950-ae52-0dcf1a0b96d8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38221 92188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.3822192188 |
| Directory | /workspace/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_nak_trans.3728149772 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 181835765 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-8017cd28-de3c-430c-ad02-48c796955d40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37281 49772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_nak_trans.3728149772 |
| Directory | /workspace/47.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_out_iso.2312147917 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 164367823 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:35 PM PDT 24 |
| Finished | Aug 16 05:39:36 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-378aa33b-7785-4ce4-b43a-ea029b1e18a1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23121 47917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_out_iso.2312147917 |
| Directory | /workspace/47.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/47.usbdev_out_stall.228299830 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 181127086 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:39:19 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-4291d7e2-d3d4-465e-a021-6a2dd8b23cb1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22829 9830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_out_stall.228299830 |
| Directory | /workspace/47.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/47.usbdev_out_trans_nak.1238824249 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 153381889 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-2bda2eb6-6651-45a8-89d6-5d9f7d60a3a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12388 24249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_out_trans_nak.1238824249 |
| Directory | /workspace/47.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/47.usbdev_pending_in_trans.176193289 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 176903890 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-2e562909-f6b6-4ae2-9603-82fb6e8d45cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17619 3289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pending_in_trans.176193289 |
| Directory | /workspace/47.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_phy_config_pinflip.167082749 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 192078695 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-19d0f703-af00-46d3-93f5-fdd9413405d6 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=167082749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.167082749 |
| Directory | /workspace/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/47.usbdev_phy_config_usb_ref_disable.1786002347 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 154092116 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-e7d8dc18-efa4-4bd3-9754-d1113c5e711b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17860 02347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.1786002347 |
| Directory | /workspace/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/47.usbdev_phy_pins_sense.3408853850 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 42215056 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-d1309ba1-d38c-4d7e-80fd-5e814dc1f551 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34088 53850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.3408853850 |
| Directory | /workspace/47.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/47.usbdev_pkt_buffer.692319725 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 18033902277 ps |
| CPU time | 43.46 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:40:11 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-fa28a987-73a7-4ef3-bd48-0e17a584753f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=69231 9725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pkt_buffer.692319725 |
| Directory | /workspace/47.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/47.usbdev_pkt_received.3985383725 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 149930264 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-b605b2bb-58f6-43c8-97aa-fe729ac6c3ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39853 83725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pkt_received.3985383725 |
| Directory | /workspace/47.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/47.usbdev_pkt_sent.1070992903 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 200392463 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:21 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-bef9324b-ccb1-4e78-96e6-ccc6dd5b17a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10709 92903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pkt_sent.1070992903 |
| Directory | /workspace/47.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/47.usbdev_random_length_in_transaction.632386011 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 240552837 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-f0033f52-eef7-491c-87b1-5c00c8dcaf5f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=63238 6011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_in_transaction.632386011 |
| Directory | /workspace/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_random_length_out_transaction.3792786754 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 162148286 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:24 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-e04e8318-d8ee-4a50-804a-75638e4e65af |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37927 86754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.3792786754 |
| Directory | /workspace/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/47.usbdev_rx_crc_err.2474173747 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 154479541 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6e220904-bcce-4f7e-b2bf-6c86d2643efa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24741 73747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_rx_crc_err.2474173747 |
| Directory | /workspace/47.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/47.usbdev_rx_full.3190797921 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 369518064 ps |
| CPU time | 1.24 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207348 kb |
| Host | smart-71f078a9-cc7a-4617-b56d-1d63814a31d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31907 97921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_rx_full.3190797921 |
| Directory | /workspace/47.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/47.usbdev_setup_stage.286132307 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 158626741 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-8e07b17e-c852-49fd-b24b-9fdf63656cd5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28613 2307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_setup_stage.286132307 |
| Directory | /workspace/47.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/47.usbdev_setup_trans_ignored.886400735 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 244702780 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-3c9a1de3-98ec-497e-b84f-44f3c803dd5d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=88640 0735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_setup_trans_ignored.886400735 |
| Directory | /workspace/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/47.usbdev_smoke.3330311875 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 326213915 ps |
| CPU time | 1.24 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-7078066b-2eb1-47f1-a262-cd075b2314f0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33303 11875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.3330311875 |
| Directory | /workspace/47.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/47.usbdev_spurious_pids_ignored.3649031113 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 2088993033 ps |
| CPU time | 58.98 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:40:27 PM PDT 24 |
| Peak memory | 217320 kb |
| Host | smart-e67bb6a9-87a3-4c67-86bc-ce885245e910 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3649031113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.3649031113 |
| Directory | /workspace/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/47.usbdev_stall_priority_over_nak.2451917325 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 193572501 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:44 PM PDT 24 |
| Finished | Aug 16 05:39:45 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-bc4c5672-1484-45b7-bf79-d13ccecb03c7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24519 17325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.2451917325 |
| Directory | /workspace/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/47.usbdev_stall_trans.3556861914 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 170035457 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-b45013ab-6771-467d-baf3-edb6408664d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35568 61914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_trans.3556861914 |
| Directory | /workspace/47.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/47.usbdev_stream_len_max.1240235582 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 954090950 ps |
| CPU time | 2.38 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-18062f8f-855d-412c-bb78-78d05c8c7c22 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12402 35582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.1240235582 |
| Directory | /workspace/47.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/47.usbdev_streaming_out.4038588674 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 2043833394 ps |
| CPU time | 15.18 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:40 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-935ab6e9-697c-4696-9aa8-498eb318afd9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40385 88674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_streaming_out.4038588674 |
| Directory | /workspace/47.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/47.usbdev_timeout_missing_host_handshake.1501316393 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 2484773271 ps |
| CPU time | 20.21 seconds |
| Started | Aug 16 05:39:17 PM PDT 24 |
| Finished | Aug 16 05:39:38 PM PDT 24 |
| Peak memory | 207736 kb |
| Host | smart-37e95582-8dfb-4a7a-a915-1ce8bb428cb6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1501316393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_hos t_handshake.1501316393 |
| Directory | /workspace/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/47.usbdev_tx_rx_disruption.752889544 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 580868103 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-c6a925f9-6035-441d-8958-c0df5126366b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=752889544 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 47.usbdev_tx_rx_disruption.752889544 |
| Directory | /workspace/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/470.usbdev_tx_rx_disruption.1237303645 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 569280179 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:40:49 PM PDT 24 |
| Finished | Aug 16 05:40:51 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-14d6b453-ce61-4349-abbf-cf0ec8374302 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1237303645 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 470.usbdev_tx_rx_disruption.1237303645 |
| Directory | /workspace/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/471.usbdev_tx_rx_disruption.2161010478 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 513779680 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:40:45 PM PDT 24 |
| Finished | Aug 16 05:40:46 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-45e4a6f4-c4c5-40dd-b50c-7d2dac809c56 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2161010478 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 471.usbdev_tx_rx_disruption.2161010478 |
| Directory | /workspace/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/472.usbdev_tx_rx_disruption.1246690477 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 586360017 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:48 PM PDT 24 |
| Finished | Aug 16 05:40:50 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-78587f97-4221-490a-8e77-10a1ecb883b3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1246690477 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 472.usbdev_tx_rx_disruption.1246690477 |
| Directory | /workspace/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/473.usbdev_tx_rx_disruption.1221643629 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 549791874 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:41:03 PM PDT 24 |
| Finished | Aug 16 05:41:05 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-5669d619-6a01-4a3f-84d3-6e4098cbd246 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1221643629 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 473.usbdev_tx_rx_disruption.1221643629 |
| Directory | /workspace/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/474.usbdev_tx_rx_disruption.1126655983 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 649442047 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:40:50 PM PDT 24 |
| Finished | Aug 16 05:40:52 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-618f7ad8-762b-4b0f-822b-47be0d450359 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1126655983 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 474.usbdev_tx_rx_disruption.1126655983 |
| Directory | /workspace/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/475.usbdev_tx_rx_disruption.4012676808 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 567122423 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:41:08 PM PDT 24 |
| Finished | Aug 16 05:41:10 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-6dc2ba11-4bfe-4f61-97c7-52537a66581e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4012676808 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 475.usbdev_tx_rx_disruption.4012676808 |
| Directory | /workspace/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/476.usbdev_tx_rx_disruption.2226756004 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 545473227 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:40:53 PM PDT 24 |
| Finished | Aug 16 05:40:55 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-093ef90d-62ee-496c-80aa-ed97269accff |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2226756004 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 476.usbdev_tx_rx_disruption.2226756004 |
| Directory | /workspace/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/477.usbdev_tx_rx_disruption.2219306840 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 452598751 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:41:03 PM PDT 24 |
| Finished | Aug 16 05:41:09 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-9585a98f-7fb6-4bc7-a915-581703591f01 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2219306840 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 477.usbdev_tx_rx_disruption.2219306840 |
| Directory | /workspace/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/478.usbdev_tx_rx_disruption.1313578981 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 635833640 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:40:59 PM PDT 24 |
| Finished | Aug 16 05:41:00 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-d7e9a8e6-145e-42f5-b27d-5acfe10373c4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1313578981 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 478.usbdev_tx_rx_disruption.1313578981 |
| Directory | /workspace/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/479.usbdev_tx_rx_disruption.1307940791 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 567642357 ps |
| CPU time | 1.84 seconds |
| Started | Aug 16 05:40:55 PM PDT 24 |
| Finished | Aug 16 05:40:57 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-03b1b446-e084-4800-af4a-c93d68217049 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1307940791 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 479.usbdev_tx_rx_disruption.1307940791 |
| Directory | /workspace/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/48.usbdev_alert_test.3029301206 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 59018082 ps |
| CPU time | 0.7 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-9a73bc38-5ec0-4edb-9cf2-3622427f6623 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3029301206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.3029301206 |
| Directory | /workspace/48.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/48.usbdev_aon_wake_disconnect.3649553800 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 4404619612 ps |
| CPU time | 5.86 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:34 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-b5894136-d1b8-44c0-bb18-f6060cf29a3e |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3649553800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_a on_wake_disconnect.3649553800 |
| Directory | /workspace/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/48.usbdev_aon_wake_reset.3543856429 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 14616701022 ps |
| CPU time | 17.79 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:42 PM PDT 24 |
| Peak memory | 215976 kb |
| Host | smart-973573e2-6335-4443-882a-c86e578a3b6a |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3543856429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.3543856429 |
| Directory | /workspace/48.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/48.usbdev_aon_wake_resume.2961626430 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 31116205804 ps |
| CPU time | 40.53 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:40:03 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-ab530b7f-0b96-46b1-b2bc-4c01e6d00a0e |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2961626430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_a on_wake_resume.2961626430 |
| Directory | /workspace/48.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/48.usbdev_av_buffer.731114057 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 177392120 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:50 PM PDT 24 |
| Finished | Aug 16 05:39:51 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-c612dd94-3c0b-497b-9ea9-6b495788339c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73111 4057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_av_buffer.731114057 |
| Directory | /workspace/48.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/48.usbdev_bitstuff_err.2788854769 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 171126129 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-6db4d088-4cd4-4a4b-8ad3-b00f3889a0bc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27888 54769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_bitstuff_err.2788854769 |
| Directory | /workspace/48.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/48.usbdev_data_toggle_clear.752776640 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 280846071 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-165b2425-453b-4de2-a777-145031958f8a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=75277 6640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_clear.752776640 |
| Directory | /workspace/48.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/48.usbdev_data_toggle_restore.1801643796 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 623910694 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:39:47 PM PDT 24 |
| Finished | Aug 16 05:39:48 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-a0310bad-4cb3-478d-94c3-f0cdeec28123 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1801643796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.1801643796 |
| Directory | /workspace/48.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/48.usbdev_device_address.2334145182 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 18408134814 ps |
| CPU time | 27.75 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:40:02 PM PDT 24 |
| Peak memory | 207920 kb |
| Host | smart-8b10d77a-f876-438e-b5ac-5d4108008364 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23341 45182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.2334145182 |
| Directory | /workspace/48.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/48.usbdev_device_timeout.2720581437 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 3872974720 ps |
| CPU time | 33.49 seconds |
| Started | Aug 16 05:39:40 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-7020cf64-fa1c-40f9-987c-561d7af731ef |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2720581437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.2720581437 |
| Directory | /workspace/48.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/48.usbdev_disable_endpoint.2075696114 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 653277503 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-14d836e4-9b0a-47fd-b40f-68283970fef4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20756 96114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disable_endpoint.2075696114 |
| Directory | /workspace/48.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/48.usbdev_disconnected.3582801326 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 135969409 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-3dea5cd2-1c56-4168-a25f-f4c53c22c99f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35828 01326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disconnected.3582801326 |
| Directory | /workspace/48.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/48.usbdev_enable.2823288350 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 33535053 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-dd9cbb02-b034-49d6-b14d-47b256be70b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28232 88350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_enable.2823288350 |
| Directory | /workspace/48.usbdev_enable/latest |
| Test location | /workspace/coverage/default/48.usbdev_endpoint_access.3167290032 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 950957322 ps |
| CPU time | 2.43 seconds |
| Started | Aug 16 05:39:33 PM PDT 24 |
| Finished | Aug 16 05:39:36 PM PDT 24 |
| Peak memory | 207760 kb |
| Host | smart-5e57d9ff-3258-4c59-8464-922fb5dee556 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31672 90032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.3167290032 |
| Directory | /workspace/48.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/48.usbdev_endpoint_types.1246636754 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 159202483 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-7cf20d65-8782-48a0-9b7a-91b7e012d955 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1246636754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.1246636754 |
| Directory | /workspace/48.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/48.usbdev_fifo_rst.3699912048 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 229402985 ps |
| CPU time | 1.88 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207616 kb |
| Host | smart-94e7b814-d927-4316-9576-ec216cb3284d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36999 12048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_fifo_rst.3699912048 |
| Directory | /workspace/48.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/48.usbdev_in_iso.3884966923 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 265978227 ps |
| CPU time | 1.3 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-1773429b-b41d-46d7-addf-cdea4c002b97 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3884966923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.3884966923 |
| Directory | /workspace/48.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/48.usbdev_in_stall.3994329855 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 182292710 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207332 kb |
| Host | smart-ae4df7c8-c0f3-4f63-b31a-ee590280102d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39943 29855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_in_stall.3994329855 |
| Directory | /workspace/48.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/48.usbdev_in_trans.1738524208 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 218167232 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-cf4ab42e-ef7a-4086-89c6-c6a607614ebb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17385 24208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_in_trans.1738524208 |
| Directory | /workspace/48.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_invalid_sync.3423350910 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 5404707578 ps |
| CPU time | 163.9 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:42:09 PM PDT 24 |
| Peak memory | 216016 kb |
| Host | smart-8f69d46f-002f-44e1-a232-94e827eafe24 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3423350910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.3423350910 |
| Directory | /workspace/48.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/48.usbdev_iso_retraction.1968762659 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 6530906629 ps |
| CPU time | 80.03 seconds |
| Started | Aug 16 05:40:04 PM PDT 24 |
| Finished | Aug 16 05:41:25 PM PDT 24 |
| Peak memory | 207848 kb |
| Host | smart-16b2b385-ed49-4566-a3cb-601fc3c6d7c9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1968762659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.1968762659 |
| Directory | /workspace/48.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/48.usbdev_link_in_err.3051856519 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 196573841 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-2e367ccc-ba0a-4962-af45-cfa7d728ef4e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30518 56519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_link_in_err.3051856519 |
| Directory | /workspace/48.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/48.usbdev_link_resume.428549167 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 6963964959 ps |
| CPU time | 9.73 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:32 PM PDT 24 |
| Peak memory | 216660 kb |
| Host | smart-5cad3a4b-2261-49fe-a9f3-1f5dffd0c8be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42854 9167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_link_resume.428549167 |
| Directory | /workspace/48.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/48.usbdev_link_suspend.374676505 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 3256824699 ps |
| CPU time | 4.97 seconds |
| Started | Aug 16 05:39:30 PM PDT 24 |
| Finished | Aug 16 05:39:36 PM PDT 24 |
| Peak memory | 216700 kb |
| Host | smart-9ace3649-65d4-49f3-90e6-b6a084eb473e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37467 6505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_link_suspend.374676505 |
| Directory | /workspace/48.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/48.usbdev_low_speed_traffic.682407398 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 2715726165 ps |
| CPU time | 27.82 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:52 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-71099f10-593d-4791-9a45-3d526eddc6b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=682407398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.682407398 |
| Directory | /workspace/48.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/48.usbdev_max_inter_pkt_delay.132662905 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 2644296998 ps |
| CPU time | 26.16 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:50 PM PDT 24 |
| Peak memory | 216836 kb |
| Host | smart-0dad7142-0ba3-4277-99d8-94b6c71e7c38 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=132662905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.132662905 |
| Directory | /workspace/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/48.usbdev_max_length_in_transaction.2287542180 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 244503210 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:39:32 PM PDT 24 |
| Finished | Aug 16 05:39:33 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-f7c4a197-c0d9-49f7-97d8-e610007c06d8 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2287542180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.2287542180 |
| Directory | /workspace/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_max_length_out_transaction.2856509031 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 186587199 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-afb2238d-ea0a-447c-b9dd-f2a5c6c114ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28565 09031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.2856509031 |
| Directory | /workspace/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_min_inter_pkt_delay.24654402 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 2500438745 ps |
| CPU time | 24.82 seconds |
| Started | Aug 16 05:39:30 PM PDT 24 |
| Finished | Aug 16 05:39:55 PM PDT 24 |
| Peak memory | 217684 kb |
| Host | smart-d3eef5ac-bdc0-438d-a88c-95c21ef67d44 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=24654402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line +cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.24654402 |
| Directory | /workspace/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/48.usbdev_min_length_in_transaction.643948551 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 227057302 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:39:33 PM PDT 24 |
| Finished | Aug 16 05:39:34 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-649d0f0a-b981-4522-8ce4-577658070a73 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=643948551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.643948551 |
| Directory | /workspace/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_min_length_out_transaction.3311056845 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 150062946 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:40 PM PDT 24 |
| Finished | Aug 16 05:39:41 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-f463cde7-b2dd-4217-878d-1f1f25e8da92 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33110 56845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.3311056845 |
| Directory | /workspace/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_nak_trans.3119403393 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 201651259 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:32 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-d2b13656-e5a3-4ec7-9dba-4e1104257c79 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31194 03393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_nak_trans.3119403393 |
| Directory | /workspace/48.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_out_iso.4271297488 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 186157431 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-6e62f519-c908-41c0-bc9d-72685d69d326 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42712 97488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_out_iso.4271297488 |
| Directory | /workspace/48.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/48.usbdev_out_stall.715411194 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 210704680 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:21 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-8f958e41-0e68-4dc2-bb7a-ca2dcf61b970 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71541 1194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_out_stall.715411194 |
| Directory | /workspace/48.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/48.usbdev_out_trans_nak.1760264772 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 185799735 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:51 PM PDT 24 |
| Finished | Aug 16 05:39:52 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-e8fc1b90-1527-4fe9-a466-0bc3307789df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17602 64772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_out_trans_nak.1760264772 |
| Directory | /workspace/48.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/48.usbdev_pending_in_trans.2667902395 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 148007254 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-6cd16cf6-a3b2-4c94-a84a-d4e722ae946f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26679 02395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pending_in_trans.2667902395 |
| Directory | /workspace/48.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_phy_config_pinflip.343853534 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 185619148 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-e2ca85bc-b4da-47c5-b65e-0b820e2c11b7 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=343853534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.343853534 |
| Directory | /workspace/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/48.usbdev_phy_config_usb_ref_disable.488868633 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 138516817 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-f23b5be4-e149-4e49-8f8c-5fa63c7dfd6f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48886 8633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.488868633 |
| Directory | /workspace/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/48.usbdev_phy_pins_sense.1704688468 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 36844208 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-247b720c-be26-4b49-ac50-c86f5959fbc1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17046 88468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.1704688468 |
| Directory | /workspace/48.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/48.usbdev_pkt_buffer.3867788507 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 10469615421 ps |
| CPU time | 27.35 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:55 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-3314f061-0a4e-498a-8029-bb914961805a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38677 88507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pkt_buffer.3867788507 |
| Directory | /workspace/48.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/48.usbdev_pkt_received.1121146680 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 170019163 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-02980c2b-6499-409d-9fab-42de2760965c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11211 46680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pkt_received.1121146680 |
| Directory | /workspace/48.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/48.usbdev_pkt_sent.525523157 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 224789998 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:39:52 PM PDT 24 |
| Finished | Aug 16 05:39:53 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-f1c24b6c-0ce2-4d4a-95e1-845bf00c3c23 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52552 3157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pkt_sent.525523157 |
| Directory | /workspace/48.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/48.usbdev_random_length_in_transaction.3174986190 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 167966237 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:20 PM PDT 24 |
| Finished | Aug 16 05:39:22 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-9bca0c98-202a-4ae7-b3fc-9d7fe0c49526 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31749 86190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_in_transaction.3174986190 |
| Directory | /workspace/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_random_length_out_transaction.2857362393 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 169533546 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:46 PM PDT 24 |
| Finished | Aug 16 05:39:47 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-93764f76-525c-4086-957b-e81d46941f40 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28573 62393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.2857362393 |
| Directory | /workspace/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/48.usbdev_rx_crc_err.2312790175 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 141878749 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:55 PM PDT 24 |
| Finished | Aug 16 05:40:01 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-7b95e4b5-3d20-4485-99be-9e8d07ea4930 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23127 90175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_rx_crc_err.2312790175 |
| Directory | /workspace/48.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/48.usbdev_rx_full.3760628632 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 260143708 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-48570d7c-fa33-4698-a245-7c43d5839ac3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37606 28632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_rx_full.3760628632 |
| Directory | /workspace/48.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/48.usbdev_setup_stage.2453950506 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 153402544 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-45e977c4-0470-4941-b1c1-2eccb9e57528 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24539 50506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_setup_stage.2453950506 |
| Directory | /workspace/48.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/48.usbdev_setup_trans_ignored.1199607694 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 147946133 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:57 PM PDT 24 |
| Finished | Aug 16 05:39:58 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6fbf0a01-ce75-46c5-bc83-d87614a97e82 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11996 07694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_setup_trans_ignored.1199607694 |
| Directory | /workspace/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/48.usbdev_smoke.3296247765 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 236634400 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207368 kb |
| Host | smart-3cac0bd3-f088-401a-bfd0-e514777fc87d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32962 47765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.3296247765 |
| Directory | /workspace/48.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/48.usbdev_spurious_pids_ignored.4222231263 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 2747143706 ps |
| CPU time | 21.49 seconds |
| Started | Aug 16 05:39:48 PM PDT 24 |
| Finished | Aug 16 05:40:09 PM PDT 24 |
| Peak memory | 217764 kb |
| Host | smart-d873bb00-cd9a-48b8-8d74-f8919dde5888 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=4222231263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.4222231263 |
| Directory | /workspace/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/48.usbdev_stall_priority_over_nak.2281220817 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 207172225 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-d363dcd6-fe6e-492f-8de0-8f2574543049 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22812 20817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.2281220817 |
| Directory | /workspace/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/48.usbdev_stall_trans.994300846 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 140017861 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-d6c80e41-00e8-453d-ab41-8fe2bface4d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=99430 0846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_trans.994300846 |
| Directory | /workspace/48.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/48.usbdev_stream_len_max.3054260506 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 807224713 ps |
| CPU time | 2.27 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207636 kb |
| Host | smart-5dd6e129-edd1-4db6-bd98-d40345ea010d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30542 60506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.3054260506 |
| Directory | /workspace/48.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/48.usbdev_streaming_out.1765358385 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 4397804425 ps |
| CPU time | 34.75 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:40:02 PM PDT 24 |
| Peak memory | 217728 kb |
| Host | smart-f5c9f294-6df3-4cff-82b0-939a6b001649 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17653 58385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_streaming_out.1765358385 |
| Directory | /workspace/48.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/48.usbdev_timeout_missing_host_handshake.4153202112 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 4979530170 ps |
| CPU time | 31.82 seconds |
| Started | Aug 16 05:39:34 PM PDT 24 |
| Finished | Aug 16 05:40:06 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-78a8ae2f-caf0-4c46-90cd-74178f949555 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4153202112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_hos t_handshake.4153202112 |
| Directory | /workspace/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/48.usbdev_tx_rx_disruption.2183615761 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 510600812 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:39:29 PM PDT 24 |
| Finished | Aug 16 05:39:31 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-1dc7628c-bcd5-46d0-a63c-69f73b1bd061 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2183615761 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_tx_rx_disruption.2183615761 |
| Directory | /workspace/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/480.usbdev_tx_rx_disruption.3961421656 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 634527973 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:40:51 PM PDT 24 |
| Finished | Aug 16 05:40:53 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-9b11ccb1-5bc6-40c8-b8e2-3b83efa6b68e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3961421656 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 480.usbdev_tx_rx_disruption.3961421656 |
| Directory | /workspace/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/481.usbdev_tx_rx_disruption.3913099192 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 627317435 ps |
| CPU time | 1.91 seconds |
| Started | Aug 16 05:41:02 PM PDT 24 |
| Finished | Aug 16 05:41:04 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-bb8418ed-b51b-4a61-b7a7-2bb32cdd8253 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3913099192 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 481.usbdev_tx_rx_disruption.3913099192 |
| Directory | /workspace/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/482.usbdev_tx_rx_disruption.4062831177 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 561488668 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:40:59 PM PDT 24 |
| Finished | Aug 16 05:41:01 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-e8b78695-37f6-4e69-8a90-416d84faa188 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4062831177 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 482.usbdev_tx_rx_disruption.4062831177 |
| Directory | /workspace/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/483.usbdev_tx_rx_disruption.3849055750 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 455018807 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:41:02 PM PDT 24 |
| Finished | Aug 16 05:41:03 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-cdb95685-113a-4c88-b7d8-2048a9eaf2bc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3849055750 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 483.usbdev_tx_rx_disruption.3849055750 |
| Directory | /workspace/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/484.usbdev_tx_rx_disruption.3753603265 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 518357254 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:41:04 PM PDT 24 |
| Finished | Aug 16 05:41:06 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-77ce62cb-aab5-4424-b6d9-cbef645d30db |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3753603265 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 484.usbdev_tx_rx_disruption.3753603265 |
| Directory | /workspace/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/485.usbdev_tx_rx_disruption.3718096836 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 576380339 ps |
| CPU time | 1.75 seconds |
| Started | Aug 16 05:40:58 PM PDT 24 |
| Finished | Aug 16 05:41:00 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-d43bdc5f-aae7-4f77-bd1a-ffc84096fcc4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3718096836 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 485.usbdev_tx_rx_disruption.3718096836 |
| Directory | /workspace/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/487.usbdev_tx_rx_disruption.4059934309 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 559523368 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:41:23 PM PDT 24 |
| Finished | Aug 16 05:41:25 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-6b20f00e-5088-4e08-b4b9-720219ee40e0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4059934309 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 487.usbdev_tx_rx_disruption.4059934309 |
| Directory | /workspace/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/488.usbdev_tx_rx_disruption.3051360792 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 592515690 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:41:02 PM PDT 24 |
| Finished | Aug 16 05:41:04 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-d0eb9b41-e71f-4644-8c83-aef866926c50 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3051360792 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 488.usbdev_tx_rx_disruption.3051360792 |
| Directory | /workspace/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/489.usbdev_tx_rx_disruption.666513298 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 720578412 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:41:14 PM PDT 24 |
| Finished | Aug 16 05:41:16 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-935f720a-4756-4f04-949d-a1bf3a514dc2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=666513298 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 489.usbdev_tx_rx_disruption.666513298 |
| Directory | /workspace/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/49.usbdev_alert_test.297760239 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 35492990 ps |
| CPU time | 0.66 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-eda4c91a-6ef5-4bd5-b5dc-b35ff2a9657e |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=297760239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.297760239 |
| Directory | /workspace/49.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/49.usbdev_aon_wake_disconnect.3236373153 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 6607646096 ps |
| CPU time | 8.29 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:33 PM PDT 24 |
| Peak memory | 215864 kb |
| Host | smart-7194c437-512b-4dd6-896a-72d7bf68f98b |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3236373153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_a on_wake_disconnect.3236373153 |
| Directory | /workspace/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/49.usbdev_aon_wake_reset.2943544687 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 21471428991 ps |
| CPU time | 27 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:53 PM PDT 24 |
| Peak memory | 207704 kb |
| Host | smart-cb893cd2-af55-4efe-9f1c-c37956740759 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2943544687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.2943544687 |
| Directory | /workspace/49.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/49.usbdev_aon_wake_resume.1359794777 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 23958065565 ps |
| CPU time | 29.12 seconds |
| Started | Aug 16 05:40:01 PM PDT 24 |
| Finished | Aug 16 05:40:30 PM PDT 24 |
| Peak memory | 215972 kb |
| Host | smart-aaa7746b-d3ae-4174-84cd-af6e5998122a |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1359794777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_a on_wake_resume.1359794777 |
| Directory | /workspace/49.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/49.usbdev_av_buffer.1872431525 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 189166315 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:39 PM PDT 24 |
| Finished | Aug 16 05:39:40 PM PDT 24 |
| Peak memory | 207444 kb |
| Host | smart-f1c0fbbc-9f58-427d-b4eb-e6bfcf72b4b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18724 31525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_av_buffer.1872431525 |
| Directory | /workspace/49.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/49.usbdev_bitstuff_err.1351819790 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 143512348 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:39:44 PM PDT 24 |
| Finished | Aug 16 05:39:45 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-9862c443-51c1-47b4-9573-62d6e48cd604 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13518 19790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_bitstuff_err.1351819790 |
| Directory | /workspace/49.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/49.usbdev_data_toggle_clear.4273616452 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 476057251 ps |
| CPU time | 1.48 seconds |
| Started | Aug 16 05:39:30 PM PDT 24 |
| Finished | Aug 16 05:39:32 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-24286670-56fa-46ca-820f-fce4218abca1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42736 16452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_clear.4273616452 |
| Directory | /workspace/49.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/49.usbdev_data_toggle_restore.1541410176 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 831791863 ps |
| CPU time | 2.12 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207652 kb |
| Host | smart-e03d6e6a-cf1c-4791-9048-567c26213f86 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1541410176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.1541410176 |
| Directory | /workspace/49.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/49.usbdev_device_address.3812035514 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 22197717025 ps |
| CPU time | 32.84 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:40:01 PM PDT 24 |
| Peak memory | 207748 kb |
| Host | smart-137b37cd-66ab-4bb0-9f8d-0c5b44d4b91f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38120 35514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.3812035514 |
| Directory | /workspace/49.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/49.usbdev_device_timeout.431156799 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 150500133 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:04 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-49119770-f33a-4ae8-a8a1-0b4b674212d0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=431156799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.431156799 |
| Directory | /workspace/49.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/49.usbdev_disable_endpoint.651954840 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 606588496 ps |
| CPU time | 1.55 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-7119421f-fc86-4c0b-813d-cd72c49e3c07 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=65195 4840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_disable_endpoint.651954840 |
| Directory | /workspace/49.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/49.usbdev_disconnected.1259309089 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 136072565 ps |
| CPU time | 0.8 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-8a8e0ed3-2b7f-4d05-a94a-aab236aaedec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12593 09089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_disconnected.1259309089 |
| Directory | /workspace/49.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/49.usbdev_enable.2253420316 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 33809573 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:24 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-eb00d312-4169-4bf0-bb8c-216a6bfe7809 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22534 20316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_enable.2253420316 |
| Directory | /workspace/49.usbdev_enable/latest |
| Test location | /workspace/coverage/default/49.usbdev_endpoint_access.406317730 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 725944812 ps |
| CPU time | 2.14 seconds |
| Started | Aug 16 05:39:36 PM PDT 24 |
| Finished | Aug 16 05:39:39 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-99c59c7d-75a6-4eec-ad09-de2525014fba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40631 7730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.406317730 |
| Directory | /workspace/49.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/49.usbdev_endpoint_types.4028742702 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 297296948 ps |
| CPU time | 1.03 seconds |
| Started | Aug 16 05:39:38 PM PDT 24 |
| Finished | Aug 16 05:39:39 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-f334bca7-b525-4f25-bcd5-3f8ce0f06a2d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4028742702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.4028742702 |
| Directory | /workspace/49.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/49.usbdev_fifo_rst.1808074903 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 190147725 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-fb4b7e6e-0877-4797-a970-3e581f1024f6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18080 74903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_fifo_rst.1808074903 |
| Directory | /workspace/49.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/49.usbdev_in_iso.2049768457 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 179438906 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:39:37 PM PDT 24 |
| Finished | Aug 16 05:39:38 PM PDT 24 |
| Peak memory | 215848 kb |
| Host | smart-e5b69da2-0434-498e-9345-efea209140c8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2049768457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.2049768457 |
| Directory | /workspace/49.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/49.usbdev_in_stall.3070927459 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 136766615 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-0a5e1788-2f9b-4ef0-a961-792ad5fd0a06 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30709 27459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_in_stall.3070927459 |
| Directory | /workspace/49.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/49.usbdev_in_trans.3147816935 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 196724719 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:04 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-2a36cfd2-77fa-47d6-a264-f3ced73d426a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31478 16935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_in_trans.3147816935 |
| Directory | /workspace/49.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_invalid_sync.3530123752 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 3391787280 ps |
| CPU time | 33.12 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:56 PM PDT 24 |
| Peak memory | 224068 kb |
| Host | smart-c8ada8d5-36c3-4650-a125-7689fdaea0c4 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=3530123752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.3530123752 |
| Directory | /workspace/49.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/49.usbdev_iso_retraction.3064446630 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 8425658931 ps |
| CPU time | 106.82 seconds |
| Started | Aug 16 05:40:06 PM PDT 24 |
| Finished | Aug 16 05:41:53 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-4ba78999-f044-4a46-976e-a3dfd6809952 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3064446630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.3064446630 |
| Directory | /workspace/49.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/49.usbdev_link_in_err.2678461834 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 195663578 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:34 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-b951bab7-66bc-47b0-aa59-38ba47044147 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26784 61834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_link_in_err.2678461834 |
| Directory | /workspace/49.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/49.usbdev_link_suspend.3121384267 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 5948538308 ps |
| CPU time | 7.54 seconds |
| Started | Aug 16 05:39:55 PM PDT 24 |
| Finished | Aug 16 05:40:08 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-5dcc27d6-bb47-48c2-8d36-7e3c471b81be |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31213 84267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_link_suspend.3121384267 |
| Directory | /workspace/49.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/49.usbdev_low_speed_traffic.209920122 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 4050624400 ps |
| CPU time | 116.94 seconds |
| Started | Aug 16 05:39:55 PM PDT 24 |
| Finished | Aug 16 05:41:52 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-59ce769b-71b2-4f17-be2e-7280f6d04254 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=209920122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+con d+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.209920122 |
| Directory | /workspace/49.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/49.usbdev_max_inter_pkt_delay.4081236047 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 3060687090 ps |
| CPU time | 25.18 seconds |
| Started | Aug 16 05:39:41 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 214804 kb |
| Host | smart-35c5256b-e602-4313-bc26-66e1f807b6f7 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=4081236047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.4081236047 |
| Directory | /workspace/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/49.usbdev_max_length_in_transaction.1385348834 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 268519397 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-e797add7-14c4-48a4-bd71-0949fc38a8a2 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1385348834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.1385348834 |
| Directory | /workspace/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_max_length_out_transaction.14730342 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 191893018 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-09c4ed65-99d5-42b4-8517-0d2834f4d033 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14730 342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+ assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.14730342 |
| Directory | /workspace/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_min_inter_pkt_delay.3962417648 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 3912131317 ps |
| CPU time | 114.58 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:41:22 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-8e3ce3dc-0063-4b1b-b5a4-a22dd9af0550 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3962417648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.3962417648 |
| Directory | /workspace/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/49.usbdev_min_length_in_transaction.120286030 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 157231213 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-3e7b31b1-430e-4fb7-abab-731f55b24991 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=120286030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.120286030 |
| Directory | /workspace/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_min_length_out_transaction.2303270697 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 174270498 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:59 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-d6900749-eaab-4d6a-8df8-3d39d9f76301 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23032 70697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.2303270697 |
| Directory | /workspace/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_nak_trans.2369887120 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 192729353 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207416 kb |
| Host | smart-98ba14e1-fccc-4f31-8349-5c6af3a22ef4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23698 87120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_nak_trans.2369887120 |
| Directory | /workspace/49.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_out_iso.1592968277 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 182975111 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:40:06 PM PDT 24 |
| Finished | Aug 16 05:40:07 PM PDT 24 |
| Peak memory | 206376 kb |
| Host | smart-14521789-0616-43e3-9d5d-09f8d33a64a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15929 68277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_out_iso.1592968277 |
| Directory | /workspace/49.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/49.usbdev_out_stall.531020209 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 191832313 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-2a44ae9f-8638-4e30-bfcd-332baedd6604 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53102 0209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_out_stall.531020209 |
| Directory | /workspace/49.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/49.usbdev_out_trans_nak.2838005159 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 206317277 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:39:31 PM PDT 24 |
| Finished | Aug 16 05:39:32 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-8c6cc7d1-7d0d-4719-898c-3a47fea10e0e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28380 05159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_out_trans_nak.2838005159 |
| Directory | /workspace/49.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/49.usbdev_pending_in_trans.1198492440 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 150746195 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-d51076ba-1555-48d6-8f54-f649dd98a8d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11984 92440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pending_in_trans.1198492440 |
| Directory | /workspace/49.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_phy_config_pinflip.1736726547 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 235995708 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:39:29 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 206444 kb |
| Host | smart-d638f898-7e3a-42a6-be71-86ffae88b89e |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1736726547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.1736726547 |
| Directory | /workspace/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/49.usbdev_phy_config_usb_ref_disable.731920266 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 152759218 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:39:49 PM PDT 24 |
| Finished | Aug 16 05:39:50 PM PDT 24 |
| Peak memory | 206344 kb |
| Host | smart-1cbdbb25-59df-4ad0-9ba0-35f748703f14 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73192 0266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.731920266 |
| Directory | /workspace/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/49.usbdev_phy_pins_sense.523384903 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 46691068 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:39:48 PM PDT 24 |
| Finished | Aug 16 05:39:49 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-801b6f3d-6bca-4c10-9490-55bf02f19065 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52338 4903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.523384903 |
| Directory | /workspace/49.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/49.usbdev_pkt_buffer.1112111779 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 16845046744 ps |
| CPU time | 39.84 seconds |
| Started | Aug 16 05:39:53 PM PDT 24 |
| Finished | Aug 16 05:40:33 PM PDT 24 |
| Peak memory | 215944 kb |
| Host | smart-36bc63cf-cb2a-495d-8355-bcefa8a7e359 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11121 11779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pkt_buffer.1112111779 |
| Directory | /workspace/49.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/49.usbdev_pkt_received.1691014380 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 196815785 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-50ab25ea-5015-4b42-8a02-84b36b944d42 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16910 14380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pkt_received.1691014380 |
| Directory | /workspace/49.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/49.usbdev_pkt_sent.1707925859 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 181792595 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:30 PM PDT 24 |
| Finished | Aug 16 05:39:31 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-99a67a47-ce6e-4126-b28b-038311d8e0e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17079 25859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pkt_sent.1707925859 |
| Directory | /workspace/49.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/49.usbdev_random_length_in_transaction.2139517090 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 172927106 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:31 PM PDT 24 |
| Finished | Aug 16 05:39:32 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-4c83b1de-f259-495d-b0a8-793d04047433 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21395 17090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_in_transaction.2139517090 |
| Directory | /workspace/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_random_length_out_transaction.52633093 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 159710167 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-5478e7f5-3bec-409c-b2ff-a2d406ed88ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=52633 093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.52633093 |
| Directory | /workspace/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/49.usbdev_rx_crc_err.2199316355 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 133929175 ps |
| CPU time | 0.77 seconds |
| Started | Aug 16 05:39:33 PM PDT 24 |
| Finished | Aug 16 05:39:34 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-86fd02cf-e073-41af-a86f-7cad3d8d8cdf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21993 16355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_rx_crc_err.2199316355 |
| Directory | /workspace/49.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/49.usbdev_rx_full.1206049752 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 259283138 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:04 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-006a0161-285d-4364-8be6-3a684674897e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12060 49752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_rx_full.1206049752 |
| Directory | /workspace/49.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/49.usbdev_setup_stage.530167112 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 161526093 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-4429c24e-d990-462c-9cca-62cb5b357a29 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53016 7112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_setup_stage.530167112 |
| Directory | /workspace/49.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/49.usbdev_setup_trans_ignored.1904318662 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 174506079 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-f841c66d-f9df-472c-828b-20d7ddb8a930 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19043 18662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_setup_trans_ignored.1904318662 |
| Directory | /workspace/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/49.usbdev_smoke.2719072844 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 267228525 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-45f86bf3-c4f0-4440-bd43-ad11c56c4493 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27190 72844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.2719072844 |
| Directory | /workspace/49.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/49.usbdev_spurious_pids_ignored.2013486797 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 2620771713 ps |
| CPU time | 73.82 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:40:37 PM PDT 24 |
| Peak memory | 217824 kb |
| Host | smart-203aa297-75c3-4e6a-aece-939fe260b04f |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=2013486797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.2013486797 |
| Directory | /workspace/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/49.usbdev_stall_priority_over_nak.3431318562 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 194642351 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:39:48 PM PDT 24 |
| Finished | Aug 16 05:39:49 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-5c8cf3e3-aec8-4f45-8b95-9edfcf9dfb3e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34313 18562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.3431318562 |
| Directory | /workspace/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/49.usbdev_stall_trans.4227061539 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 165724791 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-90f86bf8-3fc1-426b-9e2d-48acf6a29480 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42270 61539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_trans.4227061539 |
| Directory | /workspace/49.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/49.usbdev_stream_len_max.472963731 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 1208152975 ps |
| CPU time | 2.68 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207800 kb |
| Host | smart-246e7729-3149-4d47-9556-a3c1eb6808f2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47296 3731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.472963731 |
| Directory | /workspace/49.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/49.usbdev_streaming_out.3851890222 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 1555171505 ps |
| CPU time | 16.48 seconds |
| Started | Aug 16 05:39:57 PM PDT 24 |
| Finished | Aug 16 05:40:13 PM PDT 24 |
| Peak memory | 217336 kb |
| Host | smart-6ae1c6e7-cb11-496e-9b32-3599706b62a6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38518 90222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_streaming_out.3851890222 |
| Directory | /workspace/49.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/49.usbdev_timeout_missing_host_handshake.4133396884 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 1991126148 ps |
| CPU time | 17.49 seconds |
| Started | Aug 16 05:39:22 PM PDT 24 |
| Finished | Aug 16 05:39:39 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-d85aa2ba-7b82-4026-84d2-53aacb619302 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4133396884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_hos t_handshake.4133396884 |
| Directory | /workspace/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/49.usbdev_tx_rx_disruption.3410488133 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 508060389 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:39:21 PM PDT 24 |
| Finished | Aug 16 05:39:23 PM PDT 24 |
| Peak memory | 207604 kb |
| Host | smart-75284fc8-a1f3-47a4-be78-a70538bb8c7c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3410488133 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_tx_rx_disruption.3410488133 |
| Directory | /workspace/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/490.usbdev_tx_rx_disruption.923078291 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 454218912 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:40:57 PM PDT 24 |
| Finished | Aug 16 05:40:59 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-c77d0ca3-235b-48f3-ac3b-4a8587ffb547 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=923078291 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 490.usbdev_tx_rx_disruption.923078291 |
| Directory | /workspace/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/491.usbdev_tx_rx_disruption.1672914686 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 705358537 ps |
| CPU time | 1.79 seconds |
| Started | Aug 16 05:41:10 PM PDT 24 |
| Finished | Aug 16 05:41:12 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-b08e5f94-2e32-4809-bc86-21732d41b493 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1672914686 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 491.usbdev_tx_rx_disruption.1672914686 |
| Directory | /workspace/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/492.usbdev_tx_rx_disruption.4190925104 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 592639720 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:52 PM PDT 24 |
| Finished | Aug 16 05:40:54 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-bf664aa1-fb52-434e-a9cc-2c5f45822d5d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4190925104 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 492.usbdev_tx_rx_disruption.4190925104 |
| Directory | /workspace/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/493.usbdev_tx_rx_disruption.3949530768 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 546011521 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:41:05 PM PDT 24 |
| Finished | Aug 16 05:41:07 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-69389aae-26d1-4f67-a26a-7dcc9ea6429e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3949530768 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 493.usbdev_tx_rx_disruption.3949530768 |
| Directory | /workspace/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/494.usbdev_tx_rx_disruption.2893711667 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 452243913 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:41:11 PM PDT 24 |
| Finished | Aug 16 05:41:15 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-f979f3ca-ce20-4b0f-b1b0-29796780ceba |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2893711667 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 494.usbdev_tx_rx_disruption.2893711667 |
| Directory | /workspace/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/495.usbdev_tx_rx_disruption.3381537801 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 579671458 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:41:13 PM PDT 24 |
| Finished | Aug 16 05:41:15 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-d122a206-2258-48d0-afd0-02afc05cb18c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3381537801 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 495.usbdev_tx_rx_disruption.3381537801 |
| Directory | /workspace/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/496.usbdev_tx_rx_disruption.2432652686 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 571718129 ps |
| CPU time | 1.52 seconds |
| Started | Aug 16 05:41:28 PM PDT 24 |
| Finished | Aug 16 05:41:35 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-6f0875d6-0baf-4283-87c9-348cf83e3ab1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2432652686 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 496.usbdev_tx_rx_disruption.2432652686 |
| Directory | /workspace/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/497.usbdev_tx_rx_disruption.693665915 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 540683023 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:41:10 PM PDT 24 |
| Finished | Aug 16 05:41:11 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-0601eac3-7a6c-4cd4-b394-280165d6bc68 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=693665915 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 497.usbdev_tx_rx_disruption.693665915 |
| Directory | /workspace/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/498.usbdev_tx_rx_disruption.2211216004 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 453828647 ps |
| CPU time | 1.42 seconds |
| Started | Aug 16 05:41:10 PM PDT 24 |
| Finished | Aug 16 05:41:12 PM PDT 24 |
| Peak memory | 207628 kb |
| Host | smart-78c32ba4-0324-4271-87d3-990b9df27c44 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2211216004 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 498.usbdev_tx_rx_disruption.2211216004 |
| Directory | /workspace/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/499.usbdev_tx_rx_disruption.2255649092 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 563985531 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:41:11 PM PDT 24 |
| Finished | Aug 16 05:41:13 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-4b0fa025-4d65-40ab-b309-b0842a30b689 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2255649092 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 499.usbdev_tx_rx_disruption.2255649092 |
| Directory | /workspace/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/5.usbdev_alert_test.1493538787 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 74266069 ps |
| CPU time | 0.72 seconds |
| Started | Aug 16 05:33:42 PM PDT 24 |
| Finished | Aug 16 05:33:43 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-11db3e0a-08e0-4188-8c77-c9ece025a96c |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=1493538787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.1493538787 |
| Directory | /workspace/5.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/5.usbdev_aon_wake_disconnect.3020840278 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 3452458128 ps |
| CPU time | 5.33 seconds |
| Started | Aug 16 05:33:44 PM PDT 24 |
| Finished | Aug 16 05:33:50 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-cb931f77-f100-45c3-bff7-7a5c23089546 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3020840278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_ao n_wake_disconnect.3020840278 |
| Directory | /workspace/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/5.usbdev_aon_wake_reset.3420341319 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 18757087377 ps |
| CPU time | 28.32 seconds |
| Started | Aug 16 05:33:21 PM PDT 24 |
| Finished | Aug 16 05:33:50 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-50ed4156-bdcb-42df-9b7c-532574be2819 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=3420341319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.3420341319 |
| Directory | /workspace/5.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/5.usbdev_aon_wake_resume.3291346555 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 24308103228 ps |
| CPU time | 29.79 seconds |
| Started | Aug 16 05:33:27 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 216008 kb |
| Host | smart-0372a69e-6ca0-4350-b332-b9860600105d |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3291346555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_ao n_wake_resume.3291346555 |
| Directory | /workspace/5.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/5.usbdev_av_buffer.2809500802 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 178218250 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:23 PM PDT 24 |
| Finished | Aug 16 05:33:24 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-ebcb52a4-d890-4363-a618-ea2b7f16073d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28095 00802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_av_buffer.2809500802 |
| Directory | /workspace/5.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/5.usbdev_bitstuff_err.2366313934 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 153005302 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:27 PM PDT 24 |
| Finished | Aug 16 05:33:28 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-131d6b50-7f48-4a6e-b5d7-b0796f861663 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23663 13934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_bitstuff_err.2366313934 |
| Directory | /workspace/5.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/5.usbdev_data_toggle_clear.2280169894 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 316254683 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:33:26 PM PDT 24 |
| Finished | Aug 16 05:33:32 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-02c5118a-4c51-496e-a42b-f6e0a5ac6fe9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22801 69894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_clear.2280169894 |
| Directory | /workspace/5.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/5.usbdev_data_toggle_restore.3799392115 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 897769439 ps |
| CPU time | 2.6 seconds |
| Started | Aug 16 05:33:43 PM PDT 24 |
| Finished | Aug 16 05:33:46 PM PDT 24 |
| Peak memory | 207744 kb |
| Host | smart-18e1ed0d-738d-4536-b65f-764132282c6c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=3799392115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.3799392115 |
| Directory | /workspace/5.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/5.usbdev_device_address.842270784 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 42382928836 ps |
| CPU time | 68 seconds |
| Started | Aug 16 05:33:27 PM PDT 24 |
| Finished | Aug 16 05:34:40 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-5d4545af-845b-430f-8343-f08ee68f1de1 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=84227 0784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.842270784 |
| Directory | /workspace/5.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/5.usbdev_device_timeout.2118047728 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 3347745839 ps |
| CPU time | 33.81 seconds |
| Started | Aug 16 05:33:25 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-8735c23a-32e0-450e-9588-f279828ab6da |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2118047728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.2118047728 |
| Directory | /workspace/5.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/5.usbdev_disable_endpoint.2558173392 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 568622510 ps |
| CPU time | 1.66 seconds |
| Started | Aug 16 05:33:27 PM PDT 24 |
| Finished | Aug 16 05:33:29 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-e3131c4d-8485-4562-90cc-a7e7e2d47f0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25581 73392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_disable_endpoint.2558173392 |
| Directory | /workspace/5.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/5.usbdev_disconnected.3823280123 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 144644366 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:33:28 PM PDT 24 |
| Finished | Aug 16 05:33:29 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-d9d0edd2-54f2-40b3-933b-f8c639791f7a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38232 80123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_disconnected.3823280123 |
| Directory | /workspace/5.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/5.usbdev_enable.983013646 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 58361154 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:33:24 PM PDT 24 |
| Finished | Aug 16 05:33:25 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-e9ce7b00-986b-4d05-873c-544ab97bba0d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=98301 3646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_enable.983013646 |
| Directory | /workspace/5.usbdev_enable/latest |
| Test location | /workspace/coverage/default/5.usbdev_endpoint_access.533864147 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 903068993 ps |
| CPU time | 2.44 seconds |
| Started | Aug 16 05:33:25 PM PDT 24 |
| Finished | Aug 16 05:33:28 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-5a458416-8162-4510-bcc3-1d4b587049f3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=53386 4147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.533864147 |
| Directory | /workspace/5.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/5.usbdev_endpoint_types.840412585 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 269245323 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:33:25 PM PDT 24 |
| Finished | Aug 16 05:33:26 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-28343dea-e7f8-4637-aaa6-ed664aef82e7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=840412585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.840412585 |
| Directory | /workspace/5.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/5.usbdev_fifo_rst.955198488 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 251579252 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:33:27 PM PDT 24 |
| Finished | Aug 16 05:33:29 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-86af9b3c-054d-4099-b854-7826169a2df5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95519 8488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_fifo_rst.955198488 |
| Directory | /workspace/5.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/5.usbdev_in_iso.536601384 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 181232036 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:33:27 PM PDT 24 |
| Finished | Aug 16 05:33:28 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-716361bb-15ea-473c-8836-80e0e88d5ac3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=536601384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.536601384 |
| Directory | /workspace/5.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/5.usbdev_in_stall.2441234663 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 145437812 ps |
| CPU time | 0.79 seconds |
| Started | Aug 16 05:33:24 PM PDT 24 |
| Finished | Aug 16 05:33:25 PM PDT 24 |
| Peak memory | 207360 kb |
| Host | smart-5b38a706-9e94-4126-b632-ecffc4528018 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24412 34663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_in_stall.2441234663 |
| Directory | /workspace/5.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/5.usbdev_in_trans.542076482 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 225673545 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:33:24 PM PDT 24 |
| Finished | Aug 16 05:33:25 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-fc017eb5-9c8d-4944-8d3b-dc1527ebacbe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=54207 6482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_in_trans.542076482 |
| Directory | /workspace/5.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_invalid_sync.1275498425 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 3496360697 ps |
| CPU time | 27.85 seconds |
| Started | Aug 16 05:33:26 PM PDT 24 |
| Finished | Aug 16 05:33:54 PM PDT 24 |
| Peak memory | 224092 kb |
| Host | smart-367e3d26-3f48-4ad2-b69f-a82058d636e5 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1275498425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.1275498425 |
| Directory | /workspace/5.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/5.usbdev_iso_retraction.850646142 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 4923999751 ps |
| CPU time | 37.82 seconds |
| Started | Aug 16 05:33:44 PM PDT 24 |
| Finished | Aug 16 05:34:22 PM PDT 24 |
| Peak memory | 207784 kb |
| Host | smart-201767f2-904c-486a-bdbd-da4d344ae15b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=850646142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.850646142 |
| Directory | /workspace/5.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/5.usbdev_link_in_err.1815964176 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 152657601 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:33:41 PM PDT 24 |
| Finished | Aug 16 05:33:42 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-83bd6fdd-d9c2-48b9-8a5f-d0fa6f41ddb0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18159 64176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_link_in_err.1815964176 |
| Directory | /workspace/5.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/5.usbdev_link_resume.1488659072 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 29019999134 ps |
| CPU time | 33.29 seconds |
| Started | Aug 16 05:33:27 PM PDT 24 |
| Finished | Aug 16 05:34:01 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-9a4eb2cf-7c6c-4817-84d7-c4559d11621b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14886 59072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_link_resume.1488659072 |
| Directory | /workspace/5.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/5.usbdev_link_suspend.4199553323 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 3698285180 ps |
| CPU time | 6.65 seconds |
| Started | Aug 16 05:33:32 PM PDT 24 |
| Finished | Aug 16 05:33:38 PM PDT 24 |
| Peak memory | 216068 kb |
| Host | smart-1ce042e6-3493-428c-90b9-1cd5545a1f54 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41995 53323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_link_suspend.4199553323 |
| Directory | /workspace/5.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/5.usbdev_low_speed_traffic.1196181546 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 3058681044 ps |
| CPU time | 90.19 seconds |
| Started | Aug 16 05:33:40 PM PDT 24 |
| Finished | Aug 16 05:35:11 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-1e8aecad-7691-4e33-bbbd-1632e17ff5c4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1196181546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.1196181546 |
| Directory | /workspace/5.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_inter_pkt_delay.3367437974 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 2725601175 ps |
| CPU time | 79.68 seconds |
| Started | Aug 16 05:33:25 PM PDT 24 |
| Finished | Aug 16 05:34:45 PM PDT 24 |
| Peak memory | 217588 kb |
| Host | smart-bdc49edc-4765-4bb6-ae1f-bcfeaa42a79a |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3367437974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.3367437974 |
| Directory | /workspace/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_length_in_transaction.1353094190 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 287285652 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:33:22 PM PDT 24 |
| Finished | Aug 16 05:33:23 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-2f7130bf-b952-4e4c-b13a-83f451e27541 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=1353094190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.1353094190 |
| Directory | /workspace/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_length_out_transaction.1998038355 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 241531018 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:33:32 PM PDT 24 |
| Finished | Aug 16 05:33:33 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-8017d4ef-847f-48e1-a01d-08f036eee383 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19980 38355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.1998038355 |
| Directory | /workspace/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_non_iso_usb_traffic.3114395267 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 1892598386 ps |
| CPU time | 19.1 seconds |
| Started | Aug 16 05:33:27 PM PDT 24 |
| Finished | Aug 16 05:33:46 PM PDT 24 |
| Peak memory | 224016 kb |
| Host | smart-6865c9a1-b15c-4828-be85-cae637ceb57c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31143 95267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.3114395267 |
| Directory | /workspace/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/5.usbdev_max_usb_traffic.1275429494 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 3023796952 ps |
| CPU time | 27.5 seconds |
| Started | Aug 16 05:33:35 PM PDT 24 |
| Finished | Aug 16 05:34:03 PM PDT 24 |
| Peak memory | 224200 kb |
| Host | smart-98a700a0-65a3-4e4a-bdd6-0bf124a35bad |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1275429494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.1275429494 |
| Directory | /workspace/5.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/5.usbdev_min_inter_pkt_delay.1681315139 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 3128164099 ps |
| CPU time | 32.02 seconds |
| Started | Aug 16 05:33:33 PM PDT 24 |
| Finished | Aug 16 05:34:05 PM PDT 24 |
| Peak memory | 215984 kb |
| Host | smart-1a140c2c-a519-4239-ad2b-2070f9e92c7c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1681315139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.1681315139 |
| Directory | /workspace/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/5.usbdev_min_length_in_transaction.1690473983 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 183423770 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:39 PM PDT 24 |
| Finished | Aug 16 05:33:40 PM PDT 24 |
| Peak memory | 207388 kb |
| Host | smart-6ff138f8-61cd-4f2f-a7aa-ec34fb9bf979 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1690473983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.1690473983 |
| Directory | /workspace/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_min_length_out_transaction.2835159463 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 189141879 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:33:50 PM PDT 24 |
| Finished | Aug 16 05:33:51 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-15fb2ab5-77ac-4795-9445-c7fd02147472 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28351 59463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.2835159463 |
| Directory | /workspace/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_nak_trans.1281478452 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 189936469 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:33:40 PM PDT 24 |
| Finished | Aug 16 05:33:41 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-6095010f-b1b9-48f8-8478-08282be46e3a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12814 78452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_nak_trans.1281478452 |
| Directory | /workspace/5.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_out_iso.3532588648 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 199555305 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:29 PM PDT 24 |
| Finished | Aug 16 05:33:30 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-ac2a3680-1f41-443d-9950-b4b7a843a219 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35325 88648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_out_iso.3532588648 |
| Directory | /workspace/5.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/5.usbdev_out_stall.1934887748 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 179506199 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:26 PM PDT 24 |
| Finished | Aug 16 05:33:27 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-58d22f2e-63b3-4a4b-95f2-3fe6be13f022 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19348 87748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_out_stall.1934887748 |
| Directory | /workspace/5.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/5.usbdev_out_trans_nak.1675774075 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 200592653 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:38 PM PDT 24 |
| Finished | Aug 16 05:33:39 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-200340eb-dc16-4165-be3f-6bb11996a94a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16757 74075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_out_trans_nak.1675774075 |
| Directory | /workspace/5.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/5.usbdev_pending_in_trans.3518491033 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 162482340 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:33:46 PM PDT 24 |
| Finished | Aug 16 05:33:47 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-a5422969-5387-45ab-ab36-61d22d4096d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35184 91033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pending_in_trans.3518491033 |
| Directory | /workspace/5.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_phy_config_pinflip.1085579500 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 266698747 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:33:42 PM PDT 24 |
| Finished | Aug 16 05:33:43 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-7f5647aa-05a4-49f1-92d7-a3722bf7061a |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1085579500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.1085579500 |
| Directory | /workspace/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/5.usbdev_phy_config_usb_ref_disable.2257468024 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 156996878 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:33:48 PM PDT 24 |
| Finished | Aug 16 05:33:49 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-e9b837d7-a8da-40b9-9589-e0e403e12005 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22574 68024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.2257468024 |
| Directory | /workspace/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/5.usbdev_phy_pins_sense.2258507036 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 37598791 ps |
| CPU time | 0.69 seconds |
| Started | Aug 16 05:33:35 PM PDT 24 |
| Finished | Aug 16 05:33:36 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-a4a661d6-ec36-40a7-be7a-8ca0ad5fb8b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22585 07036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.2258507036 |
| Directory | /workspace/5.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/5.usbdev_pkt_buffer.2141925610 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 17325502204 ps |
| CPU time | 48.56 seconds |
| Started | Aug 16 05:33:30 PM PDT 24 |
| Finished | Aug 16 05:34:19 PM PDT 24 |
| Peak memory | 221140 kb |
| Host | smart-5c1b4dbd-555f-4e99-977a-420de64606d6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21419 25610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pkt_buffer.2141925610 |
| Directory | /workspace/5.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/5.usbdev_pkt_received.4010216746 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 172645373 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:33:51 PM PDT 24 |
| Finished | Aug 16 05:33:53 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-0056c321-e600-4e83-a0f6-f966eef27048 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40102 16746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pkt_received.4010216746 |
| Directory | /workspace/5.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/5.usbdev_pkt_sent.3958911190 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 217582824 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:33:30 PM PDT 24 |
| Finished | Aug 16 05:33:31 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-8515facb-8406-4f06-8f7e-5ebe16936eec |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39589 11190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pkt_sent.3958911190 |
| Directory | /workspace/5.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/5.usbdev_rand_bus_disconnects.2906014934 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 6297559350 ps |
| CPU time | 25.23 seconds |
| Started | Aug 16 05:33:46 PM PDT 24 |
| Finished | Aug 16 05:34:11 PM PDT 24 |
| Peak memory | 224112 kb |
| Host | smart-eb60f9a0-90b8-4593-b08c-f0e5a1a3f8a9 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2906014934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.2906014934 |
| Directory | /workspace/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/5.usbdev_rand_bus_resets.131705058 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 6481077924 ps |
| CPU time | 26.55 seconds |
| Started | Aug 16 05:33:32 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 224184 kb |
| Host | smart-33a03ff9-e027-45bb-8b1b-88085fbb1bca |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=131705058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.131705058 |
| Directory | /workspace/5.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/5.usbdev_rand_suspends.3420145787 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 10076698377 ps |
| CPU time | 190.67 seconds |
| Started | Aug 16 05:33:44 PM PDT 24 |
| Finished | Aug 16 05:36:54 PM PDT 24 |
| Peak memory | 216072 kb |
| Host | smart-b48b8c5f-fb9f-4061-9e90-062ce122eae1 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3420145787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.3420145787 |
| Directory | /workspace/5.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/5.usbdev_random_length_in_transaction.95820462 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 281587841 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:33:42 PM PDT 24 |
| Finished | Aug 16 05:33:43 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-482a9d23-32f1-4e87-ae98-59eded962486 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=95820 462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_in_transaction.95820462 |
| Directory | /workspace/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_random_length_out_transaction.2634171419 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 163461823 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:37 PM PDT 24 |
| Finished | Aug 16 05:33:38 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-efa92042-c803-4d7d-99ba-152743b1b13e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26341 71419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.2634171419 |
| Directory | /workspace/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/5.usbdev_resume_link_active.1101609109 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 20155071249 ps |
| CPU time | 24.62 seconds |
| Started | Aug 16 05:33:31 PM PDT 24 |
| Finished | Aug 16 05:33:56 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-242ba94c-3e2f-43c4-b7de-a1c18d573191 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11016 09109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_resume_link_active.1101609109 |
| Directory | /workspace/5.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/5.usbdev_rx_crc_err.3759237884 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 176441667 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:52 PM PDT 24 |
| Finished | Aug 16 05:33:53 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-8e258164-a240-44ad-a86d-67f96dd52a0b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37592 37884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rx_crc_err.3759237884 |
| Directory | /workspace/5.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/5.usbdev_rx_full.641147957 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 387160192 ps |
| CPU time | 1.32 seconds |
| Started | Aug 16 05:33:33 PM PDT 24 |
| Finished | Aug 16 05:33:34 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-38afe2dd-81cb-4bf3-b729-eea4d27dd350 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=64114 7957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rx_full.641147957 |
| Directory | /workspace/5.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/5.usbdev_setup_stage.2173797245 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 147096331 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:33:34 PM PDT 24 |
| Finished | Aug 16 05:33:35 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-cfc3405d-87a7-4995-89e3-e06f91953910 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21737 97245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_setup_stage.2173797245 |
| Directory | /workspace/5.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/5.usbdev_setup_trans_ignored.606502771 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 165080939 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:33:48 PM PDT 24 |
| Finished | Aug 16 05:33:49 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-ede1723e-86a2-46a5-8b3f-b747d068e358 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=60650 2771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_setup_trans_ignored.606502771 |
| Directory | /workspace/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/5.usbdev_smoke.2602184901 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 208641062 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:33:44 PM PDT 24 |
| Finished | Aug 16 05:33:46 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0635cf87-4f36-4b24-b885-082126149b4d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26021 84901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.2602184901 |
| Directory | /workspace/5.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/5.usbdev_spurious_pids_ignored.811591286 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 2953861818 ps |
| CPU time | 22.91 seconds |
| Started | Aug 16 05:33:43 PM PDT 24 |
| Finished | Aug 16 05:34:06 PM PDT 24 |
| Peak memory | 217828 kb |
| Host | smart-97e2f586-a999-40c2-8083-3ea66fe399e6 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=811591286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.811591286 |
| Directory | /workspace/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/5.usbdev_stall_priority_over_nak.3048673721 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 242941150 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:33:31 PM PDT 24 |
| Finished | Aug 16 05:33:32 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-08c68987-3803-4160-a908-93244fdbf4f4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30486 73721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.3048673721 |
| Directory | /workspace/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/5.usbdev_stall_trans.248717205 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 179900402 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:32 PM PDT 24 |
| Finished | Aug 16 05:33:33 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-a25bf965-b963-4c04-9dea-a782d93d07df |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24871 7205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_trans.248717205 |
| Directory | /workspace/5.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/5.usbdev_stream_len_max.1443405041 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 354978797 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:33:33 PM PDT 24 |
| Finished | Aug 16 05:33:34 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-85367ecb-4186-4192-b983-5a7e5d793700 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14434 05041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.1443405041 |
| Directory | /workspace/5.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/5.usbdev_streaming_out.3186487001 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 2615244161 ps |
| CPU time | 78.63 seconds |
| Started | Aug 16 05:33:30 PM PDT 24 |
| Finished | Aug 16 05:34:49 PM PDT 24 |
| Peak memory | 224128 kb |
| Host | smart-32877e68-ee3a-44ff-83da-e4d5c1708fea |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31864 87001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_streaming_out.3186487001 |
| Directory | /workspace/5.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/5.usbdev_timeout_missing_host_handshake.1415485977 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 4957806955 ps |
| CPU time | 32.98 seconds |
| Started | Aug 16 05:33:30 PM PDT 24 |
| Finished | Aug 16 05:34:04 PM PDT 24 |
| Peak memory | 207720 kb |
| Host | smart-ccad6a4f-4792-4d2c-a46f-6e54e413f1aa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1415485977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host _handshake.1415485977 |
| Directory | /workspace/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/5.usbdev_tx_rx_disruption.1674937639 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 657538573 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:33:32 PM PDT 24 |
| Finished | Aug 16 05:33:34 PM PDT 24 |
| Peak memory | 207696 kb |
| Host | smart-4d99b802-8e32-4f61-a006-ea0d4b91f3dd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1674937639 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_tx_rx_disruption.1674937639 |
| Directory | /workspace/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/50.usbdev_endpoint_types.2663940320 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 665960954 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-f8d42e57-8ee9-4e6d-bcf2-13fce8b8d753 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2663940320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.2663940320 |
| Directory | /workspace/50.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/50.usbdev_tx_rx_disruption.715851400 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 477127003 ps |
| CPU time | 1.49 seconds |
| Started | Aug 16 05:39:30 PM PDT 24 |
| Finished | Aug 16 05:39:32 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-93c80e72-7f1d-4f7c-9c54-ac3b048e70c5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=715851400 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 50.usbdev_tx_rx_disruption.715851400 |
| Directory | /workspace/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/51.usbdev_endpoint_types.3599252434 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 315157729 ps |
| CPU time | 1.11 seconds |
| Started | Aug 16 05:39:33 PM PDT 24 |
| Finished | Aug 16 05:39:40 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-92fa7655-11e5-4f7d-8c54-10bc557ff2d1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3599252434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.3599252434 |
| Directory | /workspace/51.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/51.usbdev_tx_rx_disruption.3531077730 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 502324134 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-149f908d-f88e-40cb-aba6-49a7aae4d948 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3531077730 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 51.usbdev_tx_rx_disruption.3531077730 |
| Directory | /workspace/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/52.usbdev_endpoint_types.270162057 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 228047232 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:39:45 PM PDT 24 |
| Finished | Aug 16 05:39:46 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-1d409ee2-a30b-48e4-b9fc-d0c48ef08665 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=270162057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.270162057 |
| Directory | /workspace/52.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/52.usbdev_tx_rx_disruption.343612137 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 534664969 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:40:04 PM PDT 24 |
| Finished | Aug 16 05:40:06 PM PDT 24 |
| Peak memory | 207608 kb |
| Host | smart-9d9df02f-7f30-4ab2-be89-11ebe8e0827a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=343612137 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 52.usbdev_tx_rx_disruption.343612137 |
| Directory | /workspace/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/53.usbdev_endpoint_types.921034058 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 294669870 ps |
| CPU time | 1.17 seconds |
| Started | Aug 16 05:39:23 PM PDT 24 |
| Finished | Aug 16 05:39:25 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-b6fa574b-763e-41d9-be8f-7cd65e5a036e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=921034058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.921034058 |
| Directory | /workspace/53.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/53.usbdev_tx_rx_disruption.2848785706 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 523160190 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:39:32 PM PDT 24 |
| Finished | Aug 16 05:39:34 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-5f28d120-ad67-465b-ac18-de9a09f89dc5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2848785706 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 53.usbdev_tx_rx_disruption.2848785706 |
| Directory | /workspace/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/54.usbdev_endpoint_types.866567742 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 757453508 ps |
| CPU time | 1.92 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:05 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-2d6f51f8-4997-4577-822c-301000d32deb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=866567742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.866567742 |
| Directory | /workspace/54.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/54.usbdev_tx_rx_disruption.2230436279 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 559386930 ps |
| CPU time | 1.84 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-ab3e27e4-0853-4293-9732-5d9b239840d4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2230436279 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 54.usbdev_tx_rx_disruption.2230436279 |
| Directory | /workspace/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/55.usbdev_tx_rx_disruption.577263643 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 551706514 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:05 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-d25ccae4-7a3d-4760-8c05-ad3a1a1b4c2f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=577263643 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 55.usbdev_tx_rx_disruption.577263643 |
| Directory | /workspace/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/56.usbdev_tx_rx_disruption.335450424 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 470196854 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:40:01 PM PDT 24 |
| Finished | Aug 16 05:40:03 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-163793bf-4062-405d-a484-eadd81992eea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=335450424 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 56.usbdev_tx_rx_disruption.335450424 |
| Directory | /workspace/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/57.usbdev_tx_rx_disruption.1350905163 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 581373882 ps |
| CPU time | 1.67 seconds |
| Started | Aug 16 05:39:30 PM PDT 24 |
| Finished | Aug 16 05:39:32 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-02b9320a-d29a-4174-8049-aac305a7ddd2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1350905163 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 57.usbdev_tx_rx_disruption.1350905163 |
| Directory | /workspace/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/58.usbdev_endpoint_types.1715904204 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 213012625 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:39:35 PM PDT 24 |
| Finished | Aug 16 05:39:36 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-cbd16843-a67b-43e6-9555-75445ad8ba22 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1715904204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.1715904204 |
| Directory | /workspace/58.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/58.usbdev_tx_rx_disruption.858807602 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 482140102 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:39:55 PM PDT 24 |
| Finished | Aug 16 05:39:56 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-819d1df9-1835-49b8-92a8-8d21f5eb8a49 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=858807602 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 58.usbdev_tx_rx_disruption.858807602 |
| Directory | /workspace/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/59.usbdev_endpoint_types.1635181501 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 481163539 ps |
| CPU time | 1.33 seconds |
| Started | Aug 16 05:39:56 PM PDT 24 |
| Finished | Aug 16 05:39:57 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-97699cb8-fec7-4fc7-9dac-b1818c2d8018 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1635181501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.1635181501 |
| Directory | /workspace/59.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/59.usbdev_tx_rx_disruption.1528843544 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 469040997 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:39:35 PM PDT 24 |
| Finished | Aug 16 05:39:37 PM PDT 24 |
| Peak memory | 207612 kb |
| Host | smart-582309c2-aa37-4f65-ac3f-3ce10f48f1b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1528843544 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 59.usbdev_tx_rx_disruption.1528843544 |
| Directory | /workspace/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/6.usbdev_alert_test.3685660403 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 122784358 ps |
| CPU time | 0.76 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:56 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-52bfd69c-8625-4689-8dde-c38e37682afb |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3685660403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.3685660403 |
| Directory | /workspace/6.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/6.usbdev_aon_wake_disconnect.907194503 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 4936070360 ps |
| CPU time | 8.5 seconds |
| Started | Aug 16 05:33:33 PM PDT 24 |
| Finished | Aug 16 05:33:42 PM PDT 24 |
| Peak memory | 216052 kb |
| Host | smart-aad76de5-7e16-4b26-99c9-92397abe1b2a |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=907194503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon _wake_disconnect.907194503 |
| Directory | /workspace/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/6.usbdev_aon_wake_reset.444762865 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 16174346417 ps |
| CPU time | 20.4 seconds |
| Started | Aug 16 05:33:42 PM PDT 24 |
| Finished | Aug 16 05:34:02 PM PDT 24 |
| Peak memory | 215988 kb |
| Host | smart-6dd58de8-2d1d-4f76-b048-3260bebb134a |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=444762865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.444762865 |
| Directory | /workspace/6.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/6.usbdev_aon_wake_resume.1168841642 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 25319106838 ps |
| CPU time | 36.83 seconds |
| Started | Aug 16 05:33:47 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 216052 kb |
| Host | smart-085409e9-04e1-4dc8-8138-b75576be9288 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1168841642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_ao n_wake_resume.1168841642 |
| Directory | /workspace/6.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/6.usbdev_av_buffer.4159346228 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 149246385 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:45 PM PDT 24 |
| Finished | Aug 16 05:33:46 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-24db7691-4f33-4465-93d8-a38b51d7d271 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41593 46228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_av_buffer.4159346228 |
| Directory | /workspace/6.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/6.usbdev_bitstuff_err.4199278527 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 147498454 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:33:33 PM PDT 24 |
| Finished | Aug 16 05:33:34 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-120293be-b3eb-49fc-8e61-433557109437 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41992 78527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_bitstuff_err.4199278527 |
| Directory | /workspace/6.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/6.usbdev_data_toggle_clear.4006852027 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 296573508 ps |
| CPU time | 1.14 seconds |
| Started | Aug 16 05:33:46 PM PDT 24 |
| Finished | Aug 16 05:33:47 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-c730bc18-132f-41a5-b870-1900c8e6360a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40068 52027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_clear.4006852027 |
| Directory | /workspace/6.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/6.usbdev_data_toggle_restore.1185331671 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 361366457 ps |
| CPU time | 1.29 seconds |
| Started | Aug 16 05:33:35 PM PDT 24 |
| Finished | Aug 16 05:33:37 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-963eeb86-e78e-4df2-910b-12e1372dc882 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=1185331671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.1185331671 |
| Directory | /workspace/6.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/6.usbdev_device_address.2289786974 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 44290703686 ps |
| CPU time | 69.6 seconds |
| Started | Aug 16 05:33:48 PM PDT 24 |
| Finished | Aug 16 05:34:58 PM PDT 24 |
| Peak memory | 207780 kb |
| Host | smart-a047a41a-5428-4b56-a2e1-19f39d960669 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22897 86974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.2289786974 |
| Directory | /workspace/6.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/6.usbdev_device_timeout.2455140199 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 1014784682 ps |
| CPU time | 23.51 seconds |
| Started | Aug 16 05:33:34 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-31f57e56-2fb0-49ab-bd26-ec011a8c3c24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2455140199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.2455140199 |
| Directory | /workspace/6.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/6.usbdev_disable_endpoint.4079634241 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 610117647 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:33:54 PM PDT 24 |
| Finished | Aug 16 05:33:55 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-a6a6ccb5-cf9d-4eb0-8f04-293ad96720c8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40796 34241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disable_endpoint.4079634241 |
| Directory | /workspace/6.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/6.usbdev_disconnected.2294703370 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 137209778 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:33:54 PM PDT 24 |
| Finished | Aug 16 05:33:55 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-b806a469-966a-462e-82fd-a00c3bfead24 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22947 03370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disconnected.2294703370 |
| Directory | /workspace/6.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/6.usbdev_enable.1539895088 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 38961623 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:33:51 PM PDT 24 |
| Finished | Aug 16 05:33:52 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-ea6523fa-1630-4682-bca2-6fd56479f8a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15398 95088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_enable.1539895088 |
| Directory | /workspace/6.usbdev_enable/latest |
| Test location | /workspace/coverage/default/6.usbdev_endpoint_access.115657841 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 917999889 ps |
| CPU time | 2.38 seconds |
| Started | Aug 16 05:33:52 PM PDT 24 |
| Finished | Aug 16 05:33:54 PM PDT 24 |
| Peak memory | 207752 kb |
| Host | smart-7b92b156-6f8d-4cf8-b355-1f772d9f809b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11565 7841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.115657841 |
| Directory | /workspace/6.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/6.usbdev_endpoint_types.1389698376 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 372847850 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-4e0804f2-5a60-4f44-80f6-332b1e01fbaf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1389698376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.1389698376 |
| Directory | /workspace/6.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/6.usbdev_fifo_rst.3415814815 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 213169253 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:33:53 PM PDT 24 |
| Finished | Aug 16 05:33:55 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-ac1c458b-6aba-4a25-bb61-e47a014dacf3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34158 14815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_fifo_rst.3415814815 |
| Directory | /workspace/6.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/6.usbdev_in_iso.3462980498 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 248808314 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:33:47 PM PDT 24 |
| Finished | Aug 16 05:33:48 PM PDT 24 |
| Peak memory | 215852 kb |
| Host | smart-eaca56fa-195b-42aa-93d9-8d2118319d16 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3462980498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.3462980498 |
| Directory | /workspace/6.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/6.usbdev_in_stall.2642314672 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 170009678 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:33:47 PM PDT 24 |
| Finished | Aug 16 05:33:48 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-faba5675-2c34-4577-a953-1b4757fd64d9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26423 14672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_in_stall.2642314672 |
| Directory | /workspace/6.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/6.usbdev_in_trans.711506298 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 209303406 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:33:45 PM PDT 24 |
| Finished | Aug 16 05:33:46 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-f51868ad-bc70-452a-8b48-cdeb5867b73b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71150 6298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_in_trans.711506298 |
| Directory | /workspace/6.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_invalid_sync.548333170 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 5288133450 ps |
| CPU time | 156.78 seconds |
| Started | Aug 16 05:33:54 PM PDT 24 |
| Finished | Aug 16 05:36:31 PM PDT 24 |
| Peak memory | 217500 kb |
| Host | smart-ece0e507-e12a-457d-8d73-e3dcd8eddc19 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=548333170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.548333170 |
| Directory | /workspace/6.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/6.usbdev_iso_retraction.2593769307 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 11899044227 ps |
| CPU time | 82.51 seconds |
| Started | Aug 16 05:33:46 PM PDT 24 |
| Finished | Aug 16 05:35:09 PM PDT 24 |
| Peak memory | 207740 kb |
| Host | smart-fd0ada86-68fc-451c-86df-b140ebb73f53 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2593769307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.2593769307 |
| Directory | /workspace/6.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/6.usbdev_link_in_err.335836606 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 223671975 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:33:48 PM PDT 24 |
| Finished | Aug 16 05:33:49 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-9f1a323d-5beb-4d50-8fa5-9dfc51ddd458 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33583 6606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_link_in_err.335836606 |
| Directory | /workspace/6.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/6.usbdev_link_resume.331687834 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 7174014650 ps |
| CPU time | 11.6 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:34:08 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-39c4aeae-247d-41dc-b860-c33af9308735 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33168 7834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_link_resume.331687834 |
| Directory | /workspace/6.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/6.usbdev_link_suspend.3163361058 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 5619142890 ps |
| CPU time | 9.02 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:34:08 PM PDT 24 |
| Peak memory | 216160 kb |
| Host | smart-a9b4c9cf-4a28-409a-8d04-86cab8423e08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31633 61058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_link_suspend.3163361058 |
| Directory | /workspace/6.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/6.usbdev_low_speed_traffic.3703896536 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 2965354085 ps |
| CPU time | 24.91 seconds |
| Started | Aug 16 05:33:47 PM PDT 24 |
| Finished | Aug 16 05:34:12 PM PDT 24 |
| Peak memory | 219104 kb |
| Host | smart-b82636ee-0992-4da7-a365-3dd939b7d159 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3703896536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.3703896536 |
| Directory | /workspace/6.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_inter_pkt_delay.3865873349 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 3806869923 ps |
| CPU time | 108.21 seconds |
| Started | Aug 16 05:33:54 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 217416 kb |
| Host | smart-66ef2121-1277-4796-8bd0-881b8c0103c0 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=3865873349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.3865873349 |
| Directory | /workspace/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_length_in_transaction.3504506146 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 264355748 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-f61186bf-1c32-4ec7-8f57-b61dfead9e17 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3504506146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.3504506146 |
| Directory | /workspace/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_length_out_transaction.2013095020 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 228766517 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:33:53 PM PDT 24 |
| Finished | Aug 16 05:33:54 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-9f386d25-2e51-43b6-911e-1f0fe52a7fe0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20130 95020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.2013095020 |
| Directory | /workspace/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_non_iso_usb_traffic.3062372193 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 1958935102 ps |
| CPU time | 19.32 seconds |
| Started | Aug 16 05:33:45 PM PDT 24 |
| Finished | Aug 16 05:34:04 PM PDT 24 |
| Peak memory | 224036 kb |
| Host | smart-a0e557fd-511b-4708-935e-403061a68cb7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30623 72193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.3062372193 |
| Directory | /workspace/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/6.usbdev_max_usb_traffic.3799070186 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 3159576273 ps |
| CPU time | 29.85 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-340a82f2-ea5a-4ebc-85ff-08cea436486d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3799070186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.3799070186 |
| Directory | /workspace/6.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/6.usbdev_min_inter_pkt_delay.3662706486 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 1800088739 ps |
| CPU time | 50.07 seconds |
| Started | Aug 16 05:33:50 PM PDT 24 |
| Finished | Aug 16 05:34:40 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-f17048d2-8b45-4b58-8803-141a97940461 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3662706486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.3662706486 |
| Directory | /workspace/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/6.usbdev_min_length_in_transaction.688437836 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 159635264 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-cb921456-8383-448e-a6c4-b08e2d579b06 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=688437836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.688437836 |
| Directory | /workspace/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_min_length_out_transaction.3169578977 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 145162499 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:33:48 PM PDT 24 |
| Finished | Aug 16 05:33:49 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-a409a7d5-6d70-49da-8935-25de38037f23 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31695 78977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.3169578977 |
| Directory | /workspace/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_nak_trans.387954973 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 263406625 ps |
| CPU time | 1.04 seconds |
| Started | Aug 16 05:33:52 PM PDT 24 |
| Finished | Aug 16 05:33:53 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-0c32de7f-da32-4c98-8d2f-bb77ffe41bfe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38795 4973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_nak_trans.387954973 |
| Directory | /workspace/6.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_out_iso.2715224217 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 162836233 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:48 PM PDT 24 |
| Finished | Aug 16 05:33:49 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-fd1b391d-7102-49db-9dd3-08ee2c7cf4a9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27152 24217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_out_iso.2715224217 |
| Directory | /workspace/6.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/6.usbdev_out_stall.2776110178 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 208810715 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:54 PM PDT 24 |
| Finished | Aug 16 05:33:55 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-9b36bec8-1b37-47fe-bb7d-d5470a635d73 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27761 10178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_out_stall.2776110178 |
| Directory | /workspace/6.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/6.usbdev_out_trans_nak.870119560 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 178781425 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:02 PM PDT 24 |
| Peak memory | 207504 kb |
| Host | smart-37a9c15f-869e-491f-9302-ab26b839c5cf |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=87011 9560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_out_trans_nak.870119560 |
| Directory | /workspace/6.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/6.usbdev_pending_in_trans.473488905 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 151616118 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-b59748a1-1781-431e-a75a-0bc56045eec9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=47348 8905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pending_in_trans.473488905 |
| Directory | /workspace/6.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_phy_config_pinflip.2080980487 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 241304988 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-7b44386d-dc12-41b9-ae77-64a66a03380b |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=2080980487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.2080980487 |
| Directory | /workspace/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/6.usbdev_phy_config_usb_ref_disable.3333114659 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 147697373 ps |
| CPU time | 0.81 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-26de99dc-4bd8-4334-bdae-2c3a13d544b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33331 14659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.3333114659 |
| Directory | /workspace/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/6.usbdev_phy_pins_sense.3863758052 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 55630374 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:33:49 PM PDT 24 |
| Finished | Aug 16 05:33:50 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-d8eb2716-5684-402a-83ea-5b2cad839320 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38637 58052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.3863758052 |
| Directory | /workspace/6.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/6.usbdev_pkt_buffer.2925446371 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 15922764389 ps |
| CPU time | 41.3 seconds |
| Started | Aug 16 05:33:51 PM PDT 24 |
| Finished | Aug 16 05:34:32 PM PDT 24 |
| Peak memory | 215884 kb |
| Host | smart-09d90566-3897-4fe9-8a5f-8dbec068f2c9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29254 46371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pkt_buffer.2925446371 |
| Directory | /workspace/6.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/6.usbdev_pkt_received.3091586552 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 189226743 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:49 PM PDT 24 |
| Finished | Aug 16 05:33:50 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-0038fc35-3442-49b5-9846-c03204d713c4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30915 86552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pkt_received.3091586552 |
| Directory | /workspace/6.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/6.usbdev_pkt_sent.3716895115 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 241284756 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:33:52 PM PDT 24 |
| Finished | Aug 16 05:33:53 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-d8b6860d-fbaf-4cd8-9b09-0fa75aa4797c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37168 95115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pkt_sent.3716895115 |
| Directory | /workspace/6.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/6.usbdev_rand_bus_resets.1556490097 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 3491104793 ps |
| CPU time | 26.01 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 217672 kb |
| Host | smart-08495765-2223-468e-b74c-1d54171f9ac7 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1556490097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.1556490097 |
| Directory | /workspace/6.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/6.usbdev_rand_suspends.3613499724 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 5703637709 ps |
| CPU time | 22.39 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:21 PM PDT 24 |
| Peak memory | 224136 kb |
| Host | smart-516bf29e-469b-4a93-b3ee-3651794d67c5 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3613499724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.3613499724 |
| Directory | /workspace/6.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/6.usbdev_random_length_in_transaction.1399643558 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 216298938 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:33:49 PM PDT 24 |
| Finished | Aug 16 05:33:50 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3337c5f5-e2b1-421d-8800-e9d2a3ac0b08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13996 43558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_in_transaction.1399643558 |
| Directory | /workspace/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_random_length_out_transaction.1899971349 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 142913332 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-ab145914-ebc4-4f73-85a7-d82c35a82b59 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18999 71349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.1899971349 |
| Directory | /workspace/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/6.usbdev_resume_link_active.3882367640 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 20158937060 ps |
| CPU time | 26.11 seconds |
| Started | Aug 16 05:33:52 PM PDT 24 |
| Finished | Aug 16 05:34:18 PM PDT 24 |
| Peak memory | 207624 kb |
| Host | smart-497d116a-fff7-431a-a818-6f304a383660 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38823 67640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_resume_link_active.3882367640 |
| Directory | /workspace/6.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/6.usbdev_rx_crc_err.4220226111 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 166878249 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:33:51 PM PDT 24 |
| Finished | Aug 16 05:33:52 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-15e24372-7f5c-464a-8131-9c6719e3f5a2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42202 26111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rx_crc_err.4220226111 |
| Directory | /workspace/6.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/6.usbdev_rx_full.1949220246 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 360483036 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:33:55 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-9616c9b7-8c84-4124-b6e2-658e38423447 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19492 20246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rx_full.1949220246 |
| Directory | /workspace/6.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/6.usbdev_setup_stage.4128812789 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 156469973 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:45 PM PDT 24 |
| Finished | Aug 16 05:33:46 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-278a21a8-0caf-4c79-acba-a4baba07b7d2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41288 12789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_setup_stage.4128812789 |
| Directory | /workspace/6.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/6.usbdev_setup_trans_ignored.331182266 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 164045501 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:48 PM PDT 24 |
| Finished | Aug 16 05:33:49 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-09970fdf-6d14-496e-8666-91d9bf62bc2f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33118 2266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_setup_trans_ignored.331182266 |
| Directory | /workspace/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/6.usbdev_smoke.1278386273 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 246772294 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-b5f42a98-c7f4-468a-9828-bfa0a524adc0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12783 86273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.1278386273 |
| Directory | /workspace/6.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/6.usbdev_spurious_pids_ignored.605523769 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 1852568558 ps |
| CPU time | 15.35 seconds |
| Started | Aug 16 05:33:55 PM PDT 24 |
| Finished | Aug 16 05:34:10 PM PDT 24 |
| Peak memory | 217516 kb |
| Host | smart-7307a73a-ae8e-4335-b71d-d603c499c62d |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=605523769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.605523769 |
| Directory | /workspace/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/6.usbdev_stall_priority_over_nak.977313161 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 187091588 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-31aa1759-d491-4a56-8491-8940f4aaae9c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=97731 3161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+as sert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.977313161 |
| Directory | /workspace/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/6.usbdev_stall_trans.617314595 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 186131426 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-68827ebc-5094-4ba8-a711-86e7c6b59545 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61731 4595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_trans.617314595 |
| Directory | /workspace/6.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/6.usbdev_stream_len_max.18652692 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 1398143157 ps |
| CPU time | 3.26 seconds |
| Started | Aug 16 05:33:54 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207692 kb |
| Host | smart-120f2f76-98ff-49e9-9c74-dab341349c30 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18652 692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.18652692 |
| Directory | /workspace/6.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/6.usbdev_streaming_out.3979582430 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 2482025892 ps |
| CPU time | 21.21 seconds |
| Started | Aug 16 05:33:47 PM PDT 24 |
| Finished | Aug 16 05:34:08 PM PDT 24 |
| Peak memory | 217004 kb |
| Host | smart-3f9fb214-621d-44a9-b6c3-8355ac4887b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39795 82430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_streaming_out.3979582430 |
| Directory | /workspace/6.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/6.usbdev_timeout_missing_host_handshake.1864918866 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 2021385432 ps |
| CPU time | 17.65 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:34:15 PM PDT 24 |
| Peak memory | 207684 kb |
| Host | smart-7b49ac8c-1543-42d6-85fa-f07024941a11 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1864918866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host _handshake.1864918866 |
| Directory | /workspace/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/6.usbdev_tx_rx_disruption.1507394263 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 562600744 ps |
| CPU time | 1.7 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-d2dbfe92-1842-4dd3-bb95-7e7059d76acf |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1507394263 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_tx_rx_disruption.1507394263 |
| Directory | /workspace/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/60.usbdev_endpoint_types.284819855 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 476866240 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:39:51 PM PDT 24 |
| Finished | Aug 16 05:39:53 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-15eff57d-b12e-411d-a6de-85a63c6a7f27 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=284819855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.284819855 |
| Directory | /workspace/60.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/60.usbdev_tx_rx_disruption.1301599185 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 499668067 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-ac3ae6d5-4fef-4b6a-a4a3-14d0ca5a0ce9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1301599185 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 60.usbdev_tx_rx_disruption.1301599185 |
| Directory | /workspace/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/61.usbdev_endpoint_types.3764866972 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 276467523 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:39:52 PM PDT 24 |
| Finished | Aug 16 05:39:53 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-cd2fb348-f56e-44c1-a236-e09a9b2741bd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3764866972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.3764866972 |
| Directory | /workspace/61.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/61.usbdev_tx_rx_disruption.446938566 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 630350411 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:39:46 PM PDT 24 |
| Finished | Aug 16 05:39:48 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-0864482b-64fd-4b55-a3d7-248fbd31e8ca |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=446938566 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 61.usbdev_tx_rx_disruption.446938566 |
| Directory | /workspace/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/62.usbdev_endpoint_types.1474140259 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 363134735 ps |
| CPU time | 1.13 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-3dd340be-f818-498b-a444-7a730f1b62e4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1474140259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.1474140259 |
| Directory | /workspace/62.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/62.usbdev_tx_rx_disruption.386381293 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 623428509 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:39:54 PM PDT 24 |
| Finished | Aug 16 05:39:56 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-b30435ef-d5c4-4d70-a484-9c9a1ace4030 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=386381293 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 62.usbdev_tx_rx_disruption.386381293 |
| Directory | /workspace/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/63.usbdev_endpoint_types.4080870571 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 296872102 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:39:29 PM PDT 24 |
| Finished | Aug 16 05:39:40 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-fe9acb2d-225f-4715-85c9-d35039f98f23 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4080870571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.4080870571 |
| Directory | /workspace/63.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/63.usbdev_tx_rx_disruption.1061623813 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 452694037 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:39:41 PM PDT 24 |
| Finished | Aug 16 05:39:42 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-2cedfefb-33b8-4bc8-8fdf-74c57115c82a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1061623813 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 63.usbdev_tx_rx_disruption.1061623813 |
| Directory | /workspace/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/64.usbdev_endpoint_types.2260345694 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 158506988 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:27 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-f1f8b264-fdb6-4d46-9cf1-c5b5db72a2cb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2260345694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.2260345694 |
| Directory | /workspace/64.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/64.usbdev_tx_rx_disruption.1385832603 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 483053334 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:39:32 PM PDT 24 |
| Finished | Aug 16 05:39:34 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-c80fa67a-f0d4-4625-9d24-1f1bcec89886 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1385832603 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 64.usbdev_tx_rx_disruption.1385832603 |
| Directory | /workspace/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/65.usbdev_tx_rx_disruption.93285167 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 474280757 ps |
| CPU time | 1.38 seconds |
| Started | Aug 16 05:39:29 PM PDT 24 |
| Finished | Aug 16 05:39:31 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-618fdbb1-5ffe-4888-806b-1504545e2bea |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=93285167 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 65.usbdev_tx_rx_disruption.93285167 |
| Directory | /workspace/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/66.usbdev_endpoint_types.2327434520 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 146595436 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:39:54 PM PDT 24 |
| Finished | Aug 16 05:39:55 PM PDT 24 |
| Peak memory | 206424 kb |
| Host | smart-4c3f83c1-f6d7-4a14-b501-1c0062c806b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2327434520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.2327434520 |
| Directory | /workspace/66.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/66.usbdev_tx_rx_disruption.4269540657 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 599237295 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-c0b863fd-5e24-4db2-8dd5-1308c7fd2a94 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4269540657 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 66.usbdev_tx_rx_disruption.4269540657 |
| Directory | /workspace/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/67.usbdev_endpoint_types.117641213 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 434256564 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:39:26 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-65684b04-d685-4242-b046-d2eccac6d516 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=117641213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.117641213 |
| Directory | /workspace/67.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/67.usbdev_tx_rx_disruption.3768901376 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 489311199 ps |
| CPU time | 1.58 seconds |
| Started | Aug 16 05:39:45 PM PDT 24 |
| Finished | Aug 16 05:39:47 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-14aec6e6-dfe3-4f69-8db0-8569fd4f4641 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3768901376 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 67.usbdev_tx_rx_disruption.3768901376 |
| Directory | /workspace/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/68.usbdev_endpoint_types.746085916 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 610455300 ps |
| CPU time | 1.5 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-59e206f6-521c-4720-b1ba-f13ded2fb441 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=746085916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.746085916 |
| Directory | /workspace/68.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/68.usbdev_tx_rx_disruption.278921935 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 609233229 ps |
| CPU time | 1.62 seconds |
| Started | Aug 16 05:39:48 PM PDT 24 |
| Finished | Aug 16 05:39:49 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-10d2548d-be00-43d1-aed1-9bf2a6875a6a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=278921935 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 68.usbdev_tx_rx_disruption.278921935 |
| Directory | /workspace/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/69.usbdev_endpoint_types.775017192 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 170612234 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:40:00 PM PDT 24 |
| Finished | Aug 16 05:40:01 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-85ccd3dd-470b-42e3-8586-eda3b1e7f605 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=775017192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.775017192 |
| Directory | /workspace/69.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/69.usbdev_tx_rx_disruption.2745307127 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 535539249 ps |
| CPU time | 1.47 seconds |
| Started | Aug 16 05:39:29 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-c71ed85a-5799-4771-8f0a-655da9ffb613 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2745307127 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 69.usbdev_tx_rx_disruption.2745307127 |
| Directory | /workspace/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/7.usbdev_alert_test.2760725947 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 91179989 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-e7e736a5-79f7-4226-8bcb-7cd82b034d86 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2760725947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.2760725947 |
| Directory | /workspace/7.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/7.usbdev_aon_wake_disconnect.2492975973 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 11746244251 ps |
| CPU time | 16.11 seconds |
| Started | Aug 16 05:33:55 PM PDT 24 |
| Finished | Aug 16 05:34:11 PM PDT 24 |
| Peak memory | 207804 kb |
| Host | smart-574f8428-2834-4f24-8ac5-1e1c94e488f5 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2492975973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_ao n_wake_disconnect.2492975973 |
| Directory | /workspace/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/7.usbdev_aon_wake_reset.2584588597 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 14311853313 ps |
| CPU time | 17.4 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:19 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-bbded988-27b4-4b98-900d-6bb0e90d4913 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=2584588597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.2584588597 |
| Directory | /workspace/7.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/7.usbdev_aon_wake_resume.2811504175 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 24127209269 ps |
| CPU time | 29.34 seconds |
| Started | Aug 16 05:33:54 PM PDT 24 |
| Finished | Aug 16 05:34:23 PM PDT 24 |
| Peak memory | 216052 kb |
| Host | smart-2f84b4fc-31d9-487f-9f5e-1a4388ecd730 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2811504175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_ao n_wake_resume.2811504175 |
| Directory | /workspace/7.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/7.usbdev_av_buffer.712432292 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 153556273 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-86f289e4-9a0f-4fe5-97d4-91b1d58568b6 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=71243 2292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_av_buffer.712432292 |
| Directory | /workspace/7.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/7.usbdev_bitstuff_err.46262369 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 143991219 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:48 PM PDT 24 |
| Finished | Aug 16 05:33:49 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-7bd95c9d-c6c5-433c-8697-4d1e805e2d2c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=46262 369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_bitstuff_err.46262369 |
| Directory | /workspace/7.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/7.usbdev_data_toggle_clear.1192406518 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 346850790 ps |
| CPU time | 1.34 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-b20a0ec5-8cd2-4fef-8b28-3ce83742c921 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11924 06518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_clear.1192406518 |
| Directory | /workspace/7.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/7.usbdev_data_toggle_restore.4014589987 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 509769793 ps |
| CPU time | 1.71 seconds |
| Started | Aug 16 05:33:54 PM PDT 24 |
| Finished | Aug 16 05:33:56 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-d992745b-7238-4186-a0b8-942479f849df |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=4014589987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.4014589987 |
| Directory | /workspace/7.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/7.usbdev_device_address.1955869861 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 17219757143 ps |
| CPU time | 29.34 seconds |
| Started | Aug 16 05:33:47 PM PDT 24 |
| Finished | Aug 16 05:34:16 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-d4041be6-0a59-412a-9fbd-4d14d038ed77 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19558 69861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.1955869861 |
| Directory | /workspace/7.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/7.usbdev_device_timeout.296640876 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 272570547 ps |
| CPU time | 4.43 seconds |
| Started | Aug 16 05:34:00 PM PDT 24 |
| Finished | Aug 16 05:34:04 PM PDT 24 |
| Peak memory | 207756 kb |
| Host | smart-4e2e85ec-2b8a-4187-94ef-231968bc3060 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=296640876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.296640876 |
| Directory | /workspace/7.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/7.usbdev_disable_endpoint.3034389594 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 778737543 ps |
| CPU time | 1.95 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-43d3938e-e447-4975-b908-3200e6bb5da7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30343 89594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_disable_endpoint.3034389594 |
| Directory | /workspace/7.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/7.usbdev_disconnected.289019843 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 173560540 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:52 PM PDT 24 |
| Finished | Aug 16 05:33:53 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-bea3d621-8ecf-468f-8cfb-27edf0280781 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28901 9843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_disconnected.289019843 |
| Directory | /workspace/7.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/7.usbdev_enable.2921756418 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 44983185 ps |
| CPU time | 0.71 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-2ddcbc0d-f555-42e3-940c-286f862d262b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29217 56418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_enable.2921756418 |
| Directory | /workspace/7.usbdev_enable/latest |
| Test location | /workspace/coverage/default/7.usbdev_endpoint_access.489971004 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 935971450 ps |
| CPU time | 2.49 seconds |
| Started | Aug 16 05:34:00 PM PDT 24 |
| Finished | Aug 16 05:34:02 PM PDT 24 |
| Peak memory | 207768 kb |
| Host | smart-a672ddcd-3359-45bd-93d7-228aa4972ada |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=48997 1004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.489971004 |
| Directory | /workspace/7.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/7.usbdev_endpoint_types.33151845 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 244022784 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:00 PM PDT 24 |
| Finished | Aug 16 05:34:01 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-dc719ca7-2c3f-426b-81d1-7cd13f68f905 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=33151845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.33151845 |
| Directory | /workspace/7.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/7.usbdev_fifo_rst.2350288495 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 380366852 ps |
| CPU time | 2.5 seconds |
| Started | Aug 16 05:33:50 PM PDT 24 |
| Finished | Aug 16 05:33:52 PM PDT 24 |
| Peak memory | 207648 kb |
| Host | smart-614671aa-2d5a-4dc3-bc6d-969f806b0782 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23502 88495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_fifo_rst.2350288495 |
| Directory | /workspace/7.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/7.usbdev_in_iso.439084824 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 231613013 ps |
| CPU time | 1.16 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 215856 kb |
| Host | smart-a018e1c6-f460-4fd6-86df-9ea89ecacea0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=439084824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.439084824 |
| Directory | /workspace/7.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/7.usbdev_in_stall.3911873252 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 142871105 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:52 PM PDT 24 |
| Finished | Aug 16 05:33:53 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-cf610995-aa8a-453d-8de5-7cdde8aa7354 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39118 73252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_in_stall.3911873252 |
| Directory | /workspace/7.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/7.usbdev_in_trans.3972864621 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 205729223 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-f06371e1-2cec-466e-bf81-366ef85ebd4b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39728 64621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_in_trans.3972864621 |
| Directory | /workspace/7.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_invalid_sync.2858572116 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 3341029390 ps |
| CPU time | 34.39 seconds |
| Started | Aug 16 05:33:51 PM PDT 24 |
| Finished | Aug 16 05:34:25 PM PDT 24 |
| Peak memory | 218476 kb |
| Host | smart-93d805d4-6b56-4947-843f-4962de6202ca |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2858572116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.2858572116 |
| Directory | /workspace/7.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/7.usbdev_iso_retraction.3044404452 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 12616387302 ps |
| CPU time | 144.51 seconds |
| Started | Aug 16 05:33:55 PM PDT 24 |
| Finished | Aug 16 05:36:20 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-12ea9e21-9db9-46b8-bc71-321f9fd86561 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3044404452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.3044404452 |
| Directory | /workspace/7.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/7.usbdev_link_in_err.3167350409 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 199096911 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:02 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-b5084c78-8cc0-4d94-8fe6-8e59f7f8181e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31673 50409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_link_in_err.3167350409 |
| Directory | /workspace/7.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/7.usbdev_link_resume.455198442 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 34047413299 ps |
| CPU time | 56.95 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:34:53 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-9c4ca340-12d3-4597-83af-ef7d6339df1b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=45519 8442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_link_resume.455198442 |
| Directory | /workspace/7.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/7.usbdev_link_suspend.2786886323 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 5128694211 ps |
| CPU time | 7.22 seconds |
| Started | Aug 16 05:33:53 PM PDT 24 |
| Finished | Aug 16 05:34:01 PM PDT 24 |
| Peak memory | 216172 kb |
| Host | smart-5bccb7e9-9c81-4103-bdbf-393d26a0a235 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27868 86323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_link_suspend.2786886323 |
| Directory | /workspace/7.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/7.usbdev_low_speed_traffic.1958839665 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 3811082599 ps |
| CPU time | 44.82 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:34:41 PM PDT 24 |
| Peak memory | 224148 kb |
| Host | smart-df1c3c11-aace-4605-bb87-aea49f247e3b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1958839665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.1958839665 |
| Directory | /workspace/7.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_inter_pkt_delay.1924789803 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 2863790983 ps |
| CPU time | 21.48 seconds |
| Started | Aug 16 05:33:53 PM PDT 24 |
| Finished | Aug 16 05:34:15 PM PDT 24 |
| Peak memory | 224212 kb |
| Host | smart-df1dc6ef-cf2c-4463-aa8b-d8566b96840c |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1924789803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.1924789803 |
| Directory | /workspace/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_length_in_transaction.2125228344 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 276846853 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:33:50 PM PDT 24 |
| Finished | Aug 16 05:33:51 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-2d8ab1e1-3f30-4ffe-ad0f-1a2eb54676c2 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=2125228344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.2125228344 |
| Directory | /workspace/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_length_out_transaction.2954966789 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 222927076 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-7008438c-55a9-4882-9a95-128682aa987b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=29549 66789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.2954966789 |
| Directory | /workspace/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_non_iso_usb_traffic.1737606848 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 1968579930 ps |
| CPU time | 59.35 seconds |
| Started | Aug 16 05:33:53 PM PDT 24 |
| Finished | Aug 16 05:34:52 PM PDT 24 |
| Peak memory | 217460 kb |
| Host | smart-2c6a63b9-c1d7-4c51-bd6b-084c0c38c12a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17376 06848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.1737606848 |
| Directory | /workspace/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/7.usbdev_max_usb_traffic.3255291714 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 2781535062 ps |
| CPU time | 79.33 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:35:18 PM PDT 24 |
| Peak memory | 224144 kb |
| Host | smart-7054e7d0-6702-4b3d-948d-d1e28be99e17 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3255291714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.3255291714 |
| Directory | /workspace/7.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/7.usbdev_min_inter_pkt_delay.3453558246 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 2471759274 ps |
| CPU time | 20.11 seconds |
| Started | Aug 16 05:33:53 PM PDT 24 |
| Finished | Aug 16 05:34:13 PM PDT 24 |
| Peak memory | 217656 kb |
| Host | smart-25cdab3e-122e-432d-bb99-b60b12951fdf |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=3453558246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.3453558246 |
| Directory | /workspace/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/7.usbdev_min_length_in_transaction.1232785746 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 149957759 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-db1fb7b7-eec2-48b5-8857-0e4fc8702be4 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1232785746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.1232785746 |
| Directory | /workspace/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_min_length_out_transaction.195546880 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 211991488 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d0380870-0ca1-4358-a4a3-674d4ac4f04e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19554 6880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch +assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.195546880 |
| Directory | /workspace/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_nak_trans.1384126878 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 204910801 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:33:53 PM PDT 24 |
| Finished | Aug 16 05:33:54 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-bfdb6f93-ffb8-4fc8-abdd-ad9e149c74f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13841 26878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_nak_trans.1384126878 |
| Directory | /workspace/7.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_out_iso.3633660904 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 181171037 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-7fa0726e-e9dc-44c4-b7b5-6b47021fa7a4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36336 60904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_out_iso.3633660904 |
| Directory | /workspace/7.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/7.usbdev_out_stall.1282446784 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 159876890 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:52 PM PDT 24 |
| Finished | Aug 16 05:33:53 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-78805037-b562-4227-859c-0db6001c0284 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12824 46784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_out_stall.1282446784 |
| Directory | /workspace/7.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/7.usbdev_out_trans_nak.1848163348 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 169935534 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207600 kb |
| Host | smart-d4524f1d-6ce1-494f-9ac5-655ecc2a69ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18481 63348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_out_trans_nak.1848163348 |
| Directory | /workspace/7.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/7.usbdev_pending_in_trans.2230337102 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 146781932 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-a27a2005-46b3-4b32-9b81-dc6327860ffc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22303 37102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pending_in_trans.2230337102 |
| Directory | /workspace/7.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_phy_config_pinflip.221340559 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 247573013 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-35f49644-108f-45a6-a7dc-8ff0a8ba9c19 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=221340559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.221340559 |
| Directory | /workspace/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/7.usbdev_phy_config_usb_ref_disable.1522967146 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 181373295 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-eb4837fe-7a7d-48c6-a37c-8de8134ff112 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15229 67146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.1522967146 |
| Directory | /workspace/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/7.usbdev_phy_pins_sense.1963223185 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 108921987 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:34:02 PM PDT 24 |
| Finished | Aug 16 05:34:03 PM PDT 24 |
| Peak memory | 207340 kb |
| Host | smart-d1f90ede-c666-4354-a848-7027760aef8d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19632 23185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.1963223185 |
| Directory | /workspace/7.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/7.usbdev_pkt_buffer.2811811194 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 20776716598 ps |
| CPU time | 50.7 seconds |
| Started | Aug 16 05:33:55 PM PDT 24 |
| Finished | Aug 16 05:34:45 PM PDT 24 |
| Peak memory | 215940 kb |
| Host | smart-ed3fe29e-bdc5-4f27-875c-f3daf6544902 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28118 11194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pkt_buffer.2811811194 |
| Directory | /workspace/7.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/7.usbdev_pkt_received.1190631220 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 171929064 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:33:51 PM PDT 24 |
| Finished | Aug 16 05:33:52 PM PDT 24 |
| Peak memory | 207560 kb |
| Host | smart-84e0e300-55e2-496e-845a-606f5ad8c025 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11906 31220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pkt_received.1190631220 |
| Directory | /workspace/7.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/7.usbdev_pkt_sent.329553458 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 205225980 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-8f174989-f193-480f-a107-edda2e8596b9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32955 3458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pkt_sent.329553458 |
| Directory | /workspace/7.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/7.usbdev_rand_bus_disconnects.529472118 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 6338564458 ps |
| CPU time | 87.41 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:35:27 PM PDT 24 |
| Peak memory | 219024 kb |
| Host | smart-30d04bf5-bbf4-406f-a599-a6b291e7b024 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=529472118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.529472118 |
| Directory | /workspace/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/7.usbdev_rand_bus_resets.136319862 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 2674678735 ps |
| CPU time | 28.12 seconds |
| Started | Aug 16 05:33:53 PM PDT 24 |
| Finished | Aug 16 05:34:21 PM PDT 24 |
| Peak memory | 218392 kb |
| Host | smart-20cae99e-8a0b-4cb5-b250-4f69841556fa |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=136319862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.136319862 |
| Directory | /workspace/7.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/7.usbdev_rand_suspends.1292574492 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 7012093093 ps |
| CPU time | 30.83 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:30 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-c7983b23-018f-423f-a12f-bb164b1909e6 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=1292574492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.1292574492 |
| Directory | /workspace/7.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/7.usbdev_random_length_in_transaction.2487020530 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 185505540 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-6ab05e9e-ccd3-45c8-b874-0f284adf913a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24870 20530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_in_transaction.2487020530 |
| Directory | /workspace/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_random_length_out_transaction.3469554307 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 238051839 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:51 PM PDT 24 |
| Finished | Aug 16 05:33:52 PM PDT 24 |
| Peak memory | 207308 kb |
| Host | smart-7e7739df-adf2-4335-b664-5ffd6729b14c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=34695 54307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.3469554307 |
| Directory | /workspace/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/7.usbdev_resume_link_active.2340512912 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 20164456539 ps |
| CPU time | 24.23 seconds |
| Started | Aug 16 05:34:04 PM PDT 24 |
| Finished | Aug 16 05:34:28 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-ada0796d-0ccd-43bd-b2ba-3bca430df689 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=23405 12912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_resume_link_active.2340512912 |
| Directory | /workspace/7.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/7.usbdev_rx_crc_err.3397210504 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 146253480 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:33:55 PM PDT 24 |
| Finished | Aug 16 05:33:56 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-9453ce68-2e2c-48b3-a45d-9687b238504b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33972 10504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rx_crc_err.3397210504 |
| Directory | /workspace/7.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/7.usbdev_rx_full.300620796 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 401425154 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-80a638e3-9053-4e90-9a64-96dcba35ec71 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30062 0796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rx_full.300620796 |
| Directory | /workspace/7.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/7.usbdev_setup_stage.3340441640 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 195385637 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:34:04 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-6eda3b57-2039-47e9-b87d-c2090a67d74c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33404 41640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_setup_stage.3340441640 |
| Directory | /workspace/7.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/7.usbdev_setup_trans_ignored.4126744584 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 153683561 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-6da8214f-7b00-4148-975a-f1f8f2304587 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41267 44584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_setup_trans_ignored.4126744584 |
| Directory | /workspace/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/7.usbdev_smoke.264011182 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 210775241 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-bb51e98d-76a4-4bf0-94c7-8a5bc530f1c2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26401 1182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.264011182 |
| Directory | /workspace/7.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/7.usbdev_spurious_pids_ignored.3799861412 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 2198119405 ps |
| CPU time | 18.54 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:34:16 PM PDT 24 |
| Peak memory | 217692 kb |
| Host | smart-87cb3dbf-247f-4fed-987e-52745c97613e |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=3799861412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.3799861412 |
| Directory | /workspace/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/7.usbdev_stall_priority_over_nak.1086532725 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 180420417 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-eca7bcce-f42f-472d-92fd-4a9590007a50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10865 32725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.1086532725 |
| Directory | /workspace/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/7.usbdev_stall_trans.4080334970 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 201841902 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-c6e1a65e-7199-4619-b37b-f5dcafea6fe2 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=40803 34970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_trans.4080334970 |
| Directory | /workspace/7.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/7.usbdev_stream_len_max.1547119819 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 1164284489 ps |
| CPU time | 3.01 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:34:07 PM PDT 24 |
| Peak memory | 207668 kb |
| Host | smart-362b0cbb-1fda-4a4b-a82a-c2cd50a0959e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15471 19819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.1547119819 |
| Directory | /workspace/7.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/7.usbdev_streaming_out.2631945159 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 3831700024 ps |
| CPU time | 37.97 seconds |
| Started | Aug 16 05:33:51 PM PDT 24 |
| Finished | Aug 16 05:34:29 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-248343b4-9432-43f2-8d74-7bdf9fc823ee |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26319 45159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_streaming_out.2631945159 |
| Directory | /workspace/7.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/7.usbdev_timeout_missing_host_handshake.553421267 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 1309921987 ps |
| CPU time | 29.08 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:34:27 PM PDT 24 |
| Peak memory | 207660 kb |
| Host | smart-f293dc69-829e-4d50-8648-14d3b0c65e8c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=553421267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_ handshake.553421267 |
| Directory | /workspace/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/7.usbdev_tx_rx_disruption.2922806110 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 614923020 ps |
| CPU time | 1.63 seconds |
| Started | Aug 16 05:34:11 PM PDT 24 |
| Finished | Aug 16 05:34:13 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-0ec3fbcb-eaf5-41d3-997b-06a22cc72244 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2922806110 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_tx_rx_disruption.2922806110 |
| Directory | /workspace/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/70.usbdev_endpoint_types.1597891272 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 520312308 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:39:56 PM PDT 24 |
| Finished | Aug 16 05:39:58 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-c19c40e4-4309-431a-82ba-6b548df8d087 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1597891272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.1597891272 |
| Directory | /workspace/70.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/70.usbdev_tx_rx_disruption.907359789 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 458291462 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:39:29 PM PDT 24 |
| Finished | Aug 16 05:39:31 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-cb197a5b-367e-407b-8e23-53e67db4a11d |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=907359789 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 70.usbdev_tx_rx_disruption.907359789 |
| Directory | /workspace/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/71.usbdev_endpoint_types.3515522054 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 245711516 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-d2de82ef-e7ca-4cfa-ae95-37478d80529b |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3515522054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.3515522054 |
| Directory | /workspace/71.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/71.usbdev_tx_rx_disruption.3914644132 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 481153179 ps |
| CPU time | 1.56 seconds |
| Started | Aug 16 05:39:52 PM PDT 24 |
| Finished | Aug 16 05:39:54 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-98559949-ff29-4851-8e27-c4790dbaff24 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3914644132 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 71.usbdev_tx_rx_disruption.3914644132 |
| Directory | /workspace/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/72.usbdev_tx_rx_disruption.1624951503 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 534152403 ps |
| CPU time | 1.51 seconds |
| Started | Aug 16 05:39:36 PM PDT 24 |
| Finished | Aug 16 05:39:37 PM PDT 24 |
| Peak memory | 207576 kb |
| Host | smart-9af7321b-62ba-49cf-844c-653b5cd1931c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1624951503 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 72.usbdev_tx_rx_disruption.1624951503 |
| Directory | /workspace/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/73.usbdev_endpoint_types.867896537 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 264049228 ps |
| CPU time | 1 seconds |
| Started | Aug 16 05:39:51 PM PDT 24 |
| Finished | Aug 16 05:39:53 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-c187baa7-858b-45ce-8408-9f49cd8c522c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=867896537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.867896537 |
| Directory | /workspace/73.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/73.usbdev_tx_rx_disruption.3250555324 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 577778917 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:39:24 PM PDT 24 |
| Finished | Aug 16 05:39:26 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-b29e5da6-f295-4795-9532-d6c52f601cdc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3250555324 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 73.usbdev_tx_rx_disruption.3250555324 |
| Directory | /workspace/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/74.usbdev_endpoint_types.2279418104 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 321557402 ps |
| CPU time | 1.31 seconds |
| Started | Aug 16 05:40:05 PM PDT 24 |
| Finished | Aug 16 05:40:06 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-3507a288-5a95-4a33-86a0-1c6ca3ab3ae9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2279418104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.2279418104 |
| Directory | /workspace/74.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/74.usbdev_tx_rx_disruption.3443538142 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 680430384 ps |
| CPU time | 1.87 seconds |
| Started | Aug 16 05:39:53 PM PDT 24 |
| Finished | Aug 16 05:39:55 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-cec4f0a7-6b5c-4df6-990b-cd3379d5e4c2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3443538142 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 74.usbdev_tx_rx_disruption.3443538142 |
| Directory | /workspace/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/75.usbdev_tx_rx_disruption.2690511983 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 481617201 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:39:51 PM PDT 24 |
| Finished | Aug 16 05:39:53 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-b6b01435-9ef2-4662-b381-14983fd29107 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2690511983 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 75.usbdev_tx_rx_disruption.2690511983 |
| Directory | /workspace/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/76.usbdev_endpoint_types.3613166959 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 429108285 ps |
| CPU time | 1.49 seconds |
| Started | Aug 16 05:39:49 PM PDT 24 |
| Finished | Aug 16 05:39:51 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-ca51d54f-8649-4c13-9a4d-1aa429936fb4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3613166959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.3613166959 |
| Directory | /workspace/76.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/76.usbdev_tx_rx_disruption.3054371979 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 708966066 ps |
| CPU time | 1.82 seconds |
| Started | Aug 16 05:39:57 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-65ca6add-21f0-4683-90c8-c6988b128115 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3054371979 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 76.usbdev_tx_rx_disruption.3054371979 |
| Directory | /workspace/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/77.usbdev_endpoint_types.2095369011 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 549120284 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:39:29 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-17c0d8b9-e14a-4443-ab90-189e8ca0f416 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2095369011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.2095369011 |
| Directory | /workspace/77.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/77.usbdev_tx_rx_disruption.1713096486 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 635127033 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-74f16280-64b8-4c94-99c5-81f212630c1c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1713096486 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 77.usbdev_tx_rx_disruption.1713096486 |
| Directory | /workspace/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/78.usbdev_endpoint_types.88340322 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 770383303 ps |
| CPU time | 1.83 seconds |
| Started | Aug 16 05:39:52 PM PDT 24 |
| Finished | Aug 16 05:39:54 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-2c682041-5d95-49ec-8a20-715dd6086cde |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=88340322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.88340322 |
| Directory | /workspace/78.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/78.usbdev_tx_rx_disruption.1355526791 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 557447867 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:05 PM PDT 24 |
| Peak memory | 207496 kb |
| Host | smart-e0f0ac46-aff8-4093-b0ff-54d929802685 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1355526791 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 78.usbdev_tx_rx_disruption.1355526791 |
| Directory | /workspace/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/79.usbdev_endpoint_types.3600260915 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 476186247 ps |
| CPU time | 1.42 seconds |
| Started | Aug 16 05:39:52 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-e4180df9-1e35-4c72-9f2d-01380e36d340 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3600260915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.3600260915 |
| Directory | /workspace/79.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/79.usbdev_tx_rx_disruption.2723294252 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 516818736 ps |
| CPU time | 1.59 seconds |
| Started | Aug 16 05:39:48 PM PDT 24 |
| Finished | Aug 16 05:39:50 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-3f09e9a4-0b2e-47f9-9ceb-77b59182a1f5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2723294252 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 79.usbdev_tx_rx_disruption.2723294252 |
| Directory | /workspace/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/8.usbdev_alert_test.3406805300 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 47376679 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-703acaaa-e234-4a50-98db-247f24103326 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=3406805300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.3406805300 |
| Directory | /workspace/8.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/8.usbdev_aon_wake_disconnect.2149972549 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 9353570611 ps |
| CPU time | 11.29 seconds |
| Started | Aug 16 05:34:05 PM PDT 24 |
| Finished | Aug 16 05:34:17 PM PDT 24 |
| Peak memory | 207796 kb |
| Host | smart-2b8788e3-56f6-4ea2-bec7-9a14943951f7 |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2149972549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_ao n_wake_disconnect.2149972549 |
| Directory | /workspace/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/8.usbdev_aon_wake_reset.1090272905 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 15123086643 ps |
| CPU time | 18.4 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:34:16 PM PDT 24 |
| Peak memory | 215952 kb |
| Host | smart-a54d23f8-2302-41be-a8cb-ac748cbb711f |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=1090272905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.1090272905 |
| Directory | /workspace/8.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/8.usbdev_aon_wake_resume.3875113421 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 29627473194 ps |
| CPU time | 38.55 seconds |
| Started | Aug 16 05:34:04 PM PDT 24 |
| Finished | Aug 16 05:34:42 PM PDT 24 |
| Peak memory | 207776 kb |
| Host | smart-100e664e-1ccc-458f-9a29-22b33ec24a00 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3875113421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_ao n_wake_resume.3875113421 |
| Directory | /workspace/8.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/8.usbdev_av_buffer.445328735 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 182732267 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:34:05 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-ab366633-f5be-415e-8a9c-af1309e4e31f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=44532 8735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_av_buffer.445328735 |
| Directory | /workspace/8.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/8.usbdev_bitstuff_err.1484017939 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 153835088 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-caea466d-4505-4136-bdd3-43b5045fc437 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14840 17939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_bitstuff_err.1484017939 |
| Directory | /workspace/8.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/8.usbdev_data_toggle_clear.1359765434 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 152666452 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-4999e715-2626-4ad1-81f0-d228ac7d992b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13597 65434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_clear.1359765434 |
| Directory | /workspace/8.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/8.usbdev_data_toggle_restore.2049353779 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 620792167 ps |
| CPU time | 2.06 seconds |
| Started | Aug 16 05:34:07 PM PDT 24 |
| Finished | Aug 16 05:34:09 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-880438c1-b588-4771-a2aa-37110f2ea3c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2049353779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.2049353779 |
| Directory | /workspace/8.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/8.usbdev_device_address.720028760 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 45490621167 ps |
| CPU time | 80.42 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:35:18 PM PDT 24 |
| Peak memory | 207816 kb |
| Host | smart-e751744e-3145-4a75-9532-d2421e77e66e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=72002 8760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.720028760 |
| Directory | /workspace/8.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/8.usbdev_device_timeout.426479296 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 2940340195 ps |
| CPU time | 19.99 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:34:19 PM PDT 24 |
| Peak memory | 207840 kb |
| Host | smart-6251acec-cf44-4489-b9e9-891634140dec |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=426479296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.426479296 |
| Directory | /workspace/8.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/8.usbdev_disable_endpoint.1413165232 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 547703229 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:02 PM PDT 24 |
| Peak memory | 207412 kb |
| Host | smart-b97dd252-ca07-4b48-8fb4-64ec45bf30e7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14131 65232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_disable_endpoint.1413165232 |
| Directory | /workspace/8.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/8.usbdev_disconnected.2780330427 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 153626247 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:34:00 PM PDT 24 |
| Finished | Aug 16 05:34:01 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-fa68ee3e-ccb5-4846-b036-80855df5ea36 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27803 30427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_disconnected.2780330427 |
| Directory | /workspace/8.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/8.usbdev_enable.3025993947 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 34964576 ps |
| CPU time | 0.77 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207384 kb |
| Host | smart-49b96840-5adf-46cb-8d7c-0f1c44a49b50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30259 93947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_enable.3025993947 |
| Directory | /workspace/8.usbdev_enable/latest |
| Test location | /workspace/coverage/default/8.usbdev_endpoint_access.3982731853 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 782682529 ps |
| CPU time | 2.05 seconds |
| Started | Aug 16 05:33:55 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207712 kb |
| Host | smart-2a7686b4-3cf4-433c-abbb-2e37e019395a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39827 31853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.3982731853 |
| Directory | /workspace/8.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/8.usbdev_fifo_rst.4138574693 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 164804498 ps |
| CPU time | 1.26 seconds |
| Started | Aug 16 05:34:05 PM PDT 24 |
| Finished | Aug 16 05:34:06 PM PDT 24 |
| Peak memory | 207592 kb |
| Host | smart-00c01f8b-0444-47fd-bc15-17404cd502fb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41385 74693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_fifo_rst.4138574693 |
| Directory | /workspace/8.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/8.usbdev_in_iso.2514037137 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 219168201 ps |
| CPU time | 1.08 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:33:58 PM PDT 24 |
| Peak memory | 215888 kb |
| Host | smart-1e003dd8-2f9a-4cd6-a726-3d5027ced0e8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2514037137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.2514037137 |
| Directory | /workspace/8.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/8.usbdev_in_stall.1748833833 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 155395270 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:34:10 PM PDT 24 |
| Finished | Aug 16 05:34:11 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-a47f2ce0-181f-49a9-84eb-a72ad4561886 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17488 33833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_in_stall.1748833833 |
| Directory | /workspace/8.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/8.usbdev_in_trans.2824927467 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 239069410 ps |
| CPU time | 1.05 seconds |
| Started | Aug 16 05:34:10 PM PDT 24 |
| Finished | Aug 16 05:34:12 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-4d646981-3ab0-4db8-ab9c-3d8bdfc77236 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28249 27467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_in_trans.2824927467 |
| Directory | /workspace/8.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_invalid_sync.1738898794 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 4028225235 ps |
| CPU time | 32.11 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:34:29 PM PDT 24 |
| Peak memory | 215980 kb |
| Host | smart-67be42df-ae4e-480d-bfa3-7977f3ec545e |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1738898794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.1738898794 |
| Directory | /workspace/8.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/8.usbdev_iso_retraction.2797097553 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 9330619713 ps |
| CPU time | 106.2 seconds |
| Started | Aug 16 05:34:05 PM PDT 24 |
| Finished | Aug 16 05:35:52 PM PDT 24 |
| Peak memory | 207788 kb |
| Host | smart-3ec2d766-2356-4776-992a-b22ef38cde69 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2797097553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.2797097553 |
| Directory | /workspace/8.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/8.usbdev_link_in_err.3299638123 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 274903701 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:34:05 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-8b6796aa-ea25-4c80-8d29-bb38a3512001 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32996 38123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_link_in_err.3299638123 |
| Directory | /workspace/8.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/8.usbdev_link_resume.679677338 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 26705469351 ps |
| CPU time | 45.24 seconds |
| Started | Aug 16 05:33:57 PM PDT 24 |
| Finished | Aug 16 05:34:42 PM PDT 24 |
| Peak memory | 207620 kb |
| Host | smart-06749730-b48b-45d3-9e28-69541fb6ad43 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67967 7338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_link_resume.679677338 |
| Directory | /workspace/8.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/8.usbdev_link_suspend.2695874704 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 9121186841 ps |
| CPU time | 12.2 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:13 PM PDT 24 |
| Peak memory | 207764 kb |
| Host | smart-d138948f-e1e5-49b8-ae77-1285975c2048 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26958 74704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_link_suspend.2695874704 |
| Directory | /workspace/8.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/8.usbdev_low_speed_traffic.2262571892 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 4839650958 ps |
| CPU time | 52.69 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:54 PM PDT 24 |
| Peak memory | 219516 kb |
| Host | smart-74de90e4-63d1-4f83-b16c-370e47e22af4 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2262571892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.2262571892 |
| Directory | /workspace/8.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_inter_pkt_delay.1409969 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 2612883662 ps |
| CPU time | 26.13 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:25 PM PDT 24 |
| Peak memory | 215920 kb |
| Host | smart-eeea61d5-b775-4b46-af16-e0507aa3e27e |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1409969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.1409969 |
| Directory | /workspace/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_length_in_transaction.354726103 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 286609055 ps |
| CPU time | 1.1 seconds |
| Started | Aug 16 05:34:11 PM PDT 24 |
| Finished | Aug 16 05:34:12 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-e6fba1ca-5967-44af-96f2-c898ccfaa015 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=354726103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.354726103 |
| Directory | /workspace/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_length_out_transaction.3675184211 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 192004915 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207452 kb |
| Host | smart-646afc4e-33b7-4a05-9783-b2dd894065fa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=36751 84211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.3675184211 |
| Directory | /workspace/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_non_iso_usb_traffic.3591457064 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 3067795391 ps |
| CPU time | 26.21 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 215948 kb |
| Host | smart-7f60840b-0c49-49b5-9eaf-42eab4f72af0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35914 57064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.3591457064 |
| Directory | /workspace/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/8.usbdev_max_usb_traffic.4283082763 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 3747404635 ps |
| CPU time | 113.82 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:35:52 PM PDT 24 |
| Peak memory | 218552 kb |
| Host | smart-60d90ce5-935d-4594-ae72-bcad84a4d4e3 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4283082763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.4283082763 |
| Directory | /workspace/8.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/8.usbdev_min_inter_pkt_delay.2110819719 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 2275074380 ps |
| CPU time | 23.59 seconds |
| Started | Aug 16 05:34:02 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 217288 kb |
| Host | smart-3f3ee41a-20b8-411a-bf77-7f236d5b02c1 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=2110819719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.2110819719 |
| Directory | /workspace/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/8.usbdev_min_length_in_transaction.2778536974 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 180817438 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-30f2b15c-9b81-417b-b7e8-3e15abadbd44 |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2778536974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.2778536974 |
| Directory | /workspace/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_min_length_out_transaction.2540102457 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 159547263 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:34:00 PM PDT 24 |
| Finished | Aug 16 05:34:01 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-2a8ceb86-eed5-441a-95a0-529870f3a5aa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25401 02457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.2540102457 |
| Directory | /workspace/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_nak_trans.2455260893 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 222596619 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:03 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-a07e48ea-0038-4f85-9d03-c92fcafce113 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24552 60893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_nak_trans.2455260893 |
| Directory | /workspace/8.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_out_iso.2090028694 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 185522583 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:34:00 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-03c29c67-8063-49c3-a02c-4e16ae4d9f08 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=20900 28694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_out_iso.2090028694 |
| Directory | /workspace/8.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/8.usbdev_out_stall.3965885711 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 184216293 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:02 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-00b9a9fb-83ec-459f-8f98-5d51b952aced |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39658 85711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_out_stall.3965885711 |
| Directory | /workspace/8.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/8.usbdev_out_trans_nak.2116475594 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 240641410 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:33:56 PM PDT 24 |
| Finished | Aug 16 05:33:57 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-559c05c2-6657-4d56-9061-44484f1023b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=21164 75594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_out_trans_nak.2116475594 |
| Directory | /workspace/8.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/8.usbdev_pending_in_trans.1507770301 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 171332635 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:33:59 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-69ee0fee-175f-41bf-b084-07216e6419ac |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=15077 70301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pending_in_trans.1507770301 |
| Directory | /workspace/8.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_phy_config_pinflip.892973603 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 215193403 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:34:10 PM PDT 24 |
| Finished | Aug 16 05:34:11 PM PDT 24 |
| Peak memory | 206584 kb |
| Host | smart-bfb8a610-4995-4d8b-b12f-d30b4fd0247c |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=892973603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.892973603 |
| Directory | /workspace/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/8.usbdev_phy_config_usb_ref_disable.1077886326 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 143958892 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:34:06 PM PDT 24 |
| Finished | Aug 16 05:34:07 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-5fe9099e-3300-45bf-b482-c5e1558f9d50 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10778 86326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.1077886326 |
| Directory | /workspace/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/8.usbdev_phy_pins_sense.253277820 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 66275742 ps |
| CPU time | 0.74 seconds |
| Started | Aug 16 05:34:05 PM PDT 24 |
| Finished | Aug 16 05:34:06 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-e77977bd-5fa2-4400-a60a-2aa5701435b5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25327 7820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.253277820 |
| Directory | /workspace/8.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/8.usbdev_pkt_buffer.24739052 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 9245116570 ps |
| CPU time | 27.53 seconds |
| Started | Aug 16 05:33:58 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 215928 kb |
| Host | smart-cdd4ca36-af11-4f48-9dc5-6ec6f8ea8919 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24739 052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pkt_buffer.24739052 |
| Directory | /workspace/8.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/8.usbdev_pkt_received.3076024040 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 204927549 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:34:04 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-b8c2fcb6-00db-4bbc-be1d-1ab87b0299ba |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=30760 24040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pkt_received.3076024040 |
| Directory | /workspace/8.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/8.usbdev_pkt_sent.2608026883 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 254448908 ps |
| CPU time | 1.09 seconds |
| Started | Aug 16 05:34:02 PM PDT 24 |
| Finished | Aug 16 05:34:03 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-5e06ec9f-7076-493b-917f-da5ed885352a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26080 26883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pkt_sent.2608026883 |
| Directory | /workspace/8.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/8.usbdev_rand_bus_disconnects.179755624 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 9797060341 ps |
| CPU time | 63.89 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:35:07 PM PDT 24 |
| Peak memory | 224064 kb |
| Host | smart-7ec15fba-75a2-4060-a12a-bb8e21ebd82e |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=179755624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.179755624 |
| Directory | /workspace/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/8.usbdev_rand_bus_resets.1063244018 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 2739748876 ps |
| CPU time | 22.29 seconds |
| Started | Aug 16 05:34:05 PM PDT 24 |
| Finished | Aug 16 05:34:28 PM PDT 24 |
| Peak memory | 218624 kb |
| Host | smart-107d1604-0d1c-492b-a441-00aee55c7660 |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1063244018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.1063244018 |
| Directory | /workspace/8.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/8.usbdev_rand_suspends.4084105179 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 6534304674 ps |
| CPU time | 32.07 seconds |
| Started | Aug 16 05:34:10 PM PDT 24 |
| Finished | Aug 16 05:34:42 PM PDT 24 |
| Peak memory | 223416 kb |
| Host | smart-8a02b8b1-0ff2-4fca-9792-605e5a916c76 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=4084105179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.4084105179 |
| Directory | /workspace/8.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/8.usbdev_random_length_in_transaction.3981687973 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 194494178 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:34:11 PM PDT 24 |
| Finished | Aug 16 05:34:12 PM PDT 24 |
| Peak memory | 207460 kb |
| Host | smart-e7e3adfd-e178-467a-84e0-3b68c9ec0de5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39816 87973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_in_transaction.3981687973 |
| Directory | /workspace/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_random_length_out_transaction.1018510164 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 174874555 ps |
| CPU time | 0.92 seconds |
| Started | Aug 16 05:34:02 PM PDT 24 |
| Finished | Aug 16 05:34:03 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-4e8ab63b-4f4c-4e2f-805f-a89633ca2e8f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=10185 10164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.1018510164 |
| Directory | /workspace/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/8.usbdev_resume_link_active.1208412327 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 20173779144 ps |
| CPU time | 23.61 seconds |
| Started | Aug 16 05:34:00 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 207572 kb |
| Host | smart-8821989b-91fe-4586-9adc-dffd4cd1e3ef |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12084 12327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_resume_link_active.1208412327 |
| Directory | /workspace/8.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/8.usbdev_rx_crc_err.730865064 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 156576714 ps |
| CPU time | 0.87 seconds |
| Started | Aug 16 05:34:05 PM PDT 24 |
| Finished | Aug 16 05:34:06 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-2d212fb3-5057-4377-85a3-408f9f67e9b8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73086 5064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rx_crc_err.730865064 |
| Directory | /workspace/8.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/8.usbdev_rx_full.1454494887 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 272644957 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:09 PM PDT 24 |
| Peak memory | 207440 kb |
| Host | smart-bde97180-ee60-4c91-8398-5291ffafd1ff |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=14544 94887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rx_full.1454494887 |
| Directory | /workspace/8.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/8.usbdev_setup_stage.3179292423 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 166248283 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:09 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-78228141-340c-4325-8bb8-74410c78b7fd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31792 92423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_setup_stage.3179292423 |
| Directory | /workspace/8.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/8.usbdev_setup_trans_ignored.3873569335 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 144212894 ps |
| CPU time | 0.86 seconds |
| Started | Aug 16 05:34:06 PM PDT 24 |
| Finished | Aug 16 05:34:07 PM PDT 24 |
| Peak memory | 207548 kb |
| Host | smart-902d41b8-af1b-4164-8cc2-7e662b1da3fc |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38735 69335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_setup_trans_ignored.3873569335 |
| Directory | /workspace/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/8.usbdev_smoke.3812576134 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 195423779 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:34:04 PM PDT 24 |
| Finished | Aug 16 05:34:05 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-68cae02e-2690-4744-9d8e-fd0ed018a776 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=38125 76134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wor kspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.3812576134 |
| Directory | /workspace/8.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/8.usbdev_spurious_pids_ignored.1602974046 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 3304797436 ps |
| CPU time | 95.37 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:35:43 PM PDT 24 |
| Peak memory | 224040 kb |
| Host | smart-fa743580-6ea3-48f3-8e73-8564d1364b7e |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=1602974046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.1602974046 |
| Directory | /workspace/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/8.usbdev_stall_priority_over_nak.2216184112 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 188175146 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:04 PM PDT 24 |
| Finished | Aug 16 05:34:05 PM PDT 24 |
| Peak memory | 207408 kb |
| Host | smart-49c88805-5ee5-464f-aa6f-41376a171a09 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22161 84112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.2216184112 |
| Directory | /workspace/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/8.usbdev_stall_trans.4179903942 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 180827694 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:02 PM PDT 24 |
| Peak memory | 207464 kb |
| Host | smart-de25cb22-1be4-47b8-b832-9222679cc3b0 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41799 03942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_trans.4179903942 |
| Directory | /workspace/8.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/8.usbdev_stream_len_max.3208206532 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 759946128 ps |
| CPU time | 2.07 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:34:05 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-3045583a-de72-420d-b8eb-78a40236b330 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=32082 06532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.3208206532 |
| Directory | /workspace/8.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/8.usbdev_streaming_out.679163413 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 2787970073 ps |
| CPU time | 21.55 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 215996 kb |
| Host | smart-f09a36c4-f53b-4a02-9f72-3f90e4f82f34 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=67916 3413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_streaming_out.679163413 |
| Directory | /workspace/8.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/8.usbdev_timeout_missing_host_handshake.3484805876 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 4269249729 ps |
| CPU time | 38.41 seconds |
| Started | Aug 16 05:34:00 PM PDT 24 |
| Finished | Aug 16 05:34:38 PM PDT 24 |
| Peak memory | 207656 kb |
| Host | smart-6f14743f-ad3e-42d6-a86d-2fd8aec6a2c0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3484805876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host _handshake.3484805876 |
| Directory | /workspace/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/8.usbdev_tx_rx_disruption.804849940 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 605406697 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:34:10 PM PDT 24 |
| Finished | Aug 16 05:34:12 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-d6b51ad5-e993-460f-9ee7-75a3ca3b72af |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=804849940 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 8.usbdev_tx_rx_disruption.804849940 |
| Directory | /workspace/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/80.usbdev_endpoint_types.3039320698 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 698004524 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:39:30 PM PDT 24 |
| Finished | Aug 16 05:39:31 PM PDT 24 |
| Peak memory | 207352 kb |
| Host | smart-de71956c-4963-42ff-8e05-720b97518080 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3039320698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.3039320698 |
| Directory | /workspace/80.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/80.usbdev_tx_rx_disruption.2985903436 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 544576608 ps |
| CPU time | 1.77 seconds |
| Started | Aug 16 05:39:25 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-4c9d0004-c7a4-4029-82b5-5875ed123042 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2985903436 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 80.usbdev_tx_rx_disruption.2985903436 |
| Directory | /workspace/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/81.usbdev_endpoint_types.1443863619 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 322190392 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:39:59 PM PDT 24 |
| Peak memory | 207404 kb |
| Host | smart-d42697da-e9ec-4687-9e1d-7029d4e7e75f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1443863619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.1443863619 |
| Directory | /workspace/81.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/81.usbdev_tx_rx_disruption.3403110386 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 635907686 ps |
| CPU time | 1.57 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:29 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-a459bac7-5063-4580-aa3c-8474d80b0c5a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3403110386 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 81.usbdev_tx_rx_disruption.3403110386 |
| Directory | /workspace/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/82.usbdev_tx_rx_disruption.2911091850 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 625930290 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:39:36 PM PDT 24 |
| Finished | Aug 16 05:39:37 PM PDT 24 |
| Peak memory | 207556 kb |
| Host | smart-b80729a9-dd78-43ff-bb2f-7ed143f8a8cc |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2911091850 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 82.usbdev_tx_rx_disruption.2911091850 |
| Directory | /workspace/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/83.usbdev_endpoint_types.883760349 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 319197962 ps |
| CPU time | 1.12 seconds |
| Started | Aug 16 05:39:39 PM PDT 24 |
| Finished | Aug 16 05:39:41 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-8e209a56-6ca5-4893-9170-26ce39352005 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=883760349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.883760349 |
| Directory | /workspace/83.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/83.usbdev_tx_rx_disruption.174237242 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 614956946 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:39:50 PM PDT 24 |
| Finished | Aug 16 05:39:52 PM PDT 24 |
| Peak memory | 207512 kb |
| Host | smart-609330ff-0abe-4620-950c-8715d32201cb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=174237242 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 83.usbdev_tx_rx_disruption.174237242 |
| Directory | /workspace/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/84.usbdev_endpoint_types.1141246850 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 206556136 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:39:55 PM PDT 24 |
| Finished | Aug 16 05:39:56 PM PDT 24 |
| Peak memory | 207484 kb |
| Host | smart-2914313b-56fd-4217-9ab2-39d3674ad714 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1141246850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.1141246850 |
| Directory | /workspace/84.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/84.usbdev_tx_rx_disruption.3333151346 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 512824082 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:39:56 PM PDT 24 |
| Finished | Aug 16 05:39:58 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-a7c0df2c-0cda-4141-a6ce-0bd7ddb41493 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3333151346 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 84.usbdev_tx_rx_disruption.3333151346 |
| Directory | /workspace/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/85.usbdev_endpoint_types.2526065655 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 601100944 ps |
| CPU time | 1.61 seconds |
| Started | Aug 16 05:39:41 PM PDT 24 |
| Finished | Aug 16 05:39:43 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-caff0146-bb71-493e-9080-2028a3c04c25 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2526065655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.2526065655 |
| Directory | /workspace/85.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/85.usbdev_tx_rx_disruption.2205569053 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 576841217 ps |
| CPU time | 1.6 seconds |
| Started | Aug 16 05:39:51 PM PDT 24 |
| Finished | Aug 16 05:39:53 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-bd31d592-ed2a-4e8f-9d6c-b7785ca714b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2205569053 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 85.usbdev_tx_rx_disruption.2205569053 |
| Directory | /workspace/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/86.usbdev_endpoint_types.3993830207 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 368207844 ps |
| CPU time | 1.28 seconds |
| Started | Aug 16 05:40:03 PM PDT 24 |
| Finished | Aug 16 05:40:04 PM PDT 24 |
| Peak memory | 207488 kb |
| Host | smart-777cf908-1e55-4116-9391-c4975892c70e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3993830207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.3993830207 |
| Directory | /workspace/86.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/86.usbdev_tx_rx_disruption.3853923601 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 494077020 ps |
| CPU time | 1.49 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-d48bf1f4-bae3-4d04-a085-c0d330cd10cd |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3853923601 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 86.usbdev_tx_rx_disruption.3853923601 |
| Directory | /workspace/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/87.usbdev_endpoint_types.1161165554 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 526862726 ps |
| CPU time | 1.41 seconds |
| Started | Aug 16 05:39:43 PM PDT 24 |
| Finished | Aug 16 05:39:44 PM PDT 24 |
| Peak memory | 207508 kb |
| Host | smart-7891b6ea-e0c3-488f-9faf-b951b2e9c9de |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1161165554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.1161165554 |
| Directory | /workspace/87.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/87.usbdev_tx_rx_disruption.3379455223 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 471981760 ps |
| CPU time | 1.45 seconds |
| Started | Aug 16 05:40:01 PM PDT 24 |
| Finished | Aug 16 05:40:02 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-414cec3b-cccb-424e-8532-f42417b0c6c7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3379455223 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 87.usbdev_tx_rx_disruption.3379455223 |
| Directory | /workspace/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/88.usbdev_tx_rx_disruption.1433504739 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 613313972 ps |
| CPU time | 1.69 seconds |
| Started | Aug 16 05:39:52 PM PDT 24 |
| Finished | Aug 16 05:39:54 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-a466addc-7278-4575-93b1-167a724a8d45 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1433504739 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 88.usbdev_tx_rx_disruption.1433504739 |
| Directory | /workspace/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/89.usbdev_endpoint_types.1333394252 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 503189641 ps |
| CPU time | 1.39 seconds |
| Started | Aug 16 05:39:51 PM PDT 24 |
| Finished | Aug 16 05:39:52 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-89071d9c-daf9-42e9-a19b-58980fcc326c |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1333394252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.1333394252 |
| Directory | /workspace/89.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/89.usbdev_tx_rx_disruption.135234642 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 429988000 ps |
| CPU time | 1.32 seconds |
| Started | Aug 16 05:39:27 PM PDT 24 |
| Finished | Aug 16 05:39:28 PM PDT 24 |
| Peak memory | 207632 kb |
| Host | smart-3b2cd538-0600-40ae-9764-480fe77a83a8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=135234642 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 89.usbdev_tx_rx_disruption.135234642 |
| Directory | /workspace/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/9.usbdev_alert_test.2330477959 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 57711495 ps |
| CPU time | 0.68 seconds |
| Started | Aug 16 05:34:12 PM PDT 24 |
| Finished | Aug 16 05:34:13 PM PDT 24 |
| Peak memory | 207432 kb |
| Host | smart-f6aae224-3b68-479e-b8c3-4b015ef35574 |
| User | root |
| Command | /workspace/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim. tcl +ntb_random_seed=2330477959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl +branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.2330477959 |
| Directory | /workspace/9.usbdev_alert_test/latest |
| Test location | /workspace/coverage/default/9.usbdev_aon_wake_disconnect.1544090608 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 4280983752 ps |
| CPU time | 6.32 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:08 PM PDT 24 |
| Peak memory | 215960 kb |
| Host | smart-875bf810-babb-4629-964f-038d604ec81c |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1544090608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_ao n_wake_disconnect.1544090608 |
| Directory | /workspace/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspace/coverage/default/9.usbdev_aon_wake_reset.410936 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 15035340356 ps |
| CPU time | 20.21 seconds |
| Started | Aug 16 05:34:12 PM PDT 24 |
| Finished | Aug 16 05:34:32 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-8d4448c6-c2e4-4058-b4bb-55a6cb0296bd |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/rep o_top/hw/dv/tools/sim.tcl +ntb_random_seed=410936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.410936 |
| Directory | /workspace/9.usbdev_aon_wake_reset/latest |
| Test location | /workspace/coverage/default/9.usbdev_aon_wake_resume.3339259623 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 29317881139 ps |
| CPU time | 37.46 seconds |
| Started | Aug 16 05:34:04 PM PDT 24 |
| Finished | Aug 16 05:34:42 PM PDT 24 |
| Peak memory | 207724 kb |
| Host | smart-5a1a5bc6-ba8e-4754-b96a-b871de4a5e4b |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resume=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3339259623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_ao n_wake_resume.3339259623 |
| Directory | /workspace/9.usbdev_aon_wake_resume/latest |
| Test location | /workspace/coverage/default/9.usbdev_av_buffer.1318048774 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 162650279 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:34:04 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-ec0a5f23-3721-4bfc-8255-f4b6d4bc4e96 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13180 48774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_av_buffer.1318048774 |
| Directory | /workspace/9.usbdev_av_buffer/latest |
| Test location | /workspace/coverage/default/9.usbdev_bitstuff_err.1997606623 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 153036083 ps |
| CPU time | 0.85 seconds |
| Started | Aug 16 05:34:04 PM PDT 24 |
| Finished | Aug 16 05:34:05 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-a835a511-0c28-4253-a0c0-fa8abaf6e15f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=19976 06623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_bitstuff_err.1997606623 |
| Directory | /workspace/9.usbdev_bitstuff_err/latest |
| Test location | /workspace/coverage/default/9.usbdev_data_toggle_clear.1883022750 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 522667422 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:34:05 PM PDT 24 |
| Finished | Aug 16 05:34:07 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-475e1aba-e822-4447-af7e-527302e02a25 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18830 22750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_clear.1883022750 |
| Directory | /workspace/9.usbdev_data_toggle_clear/latest |
| Test location | /workspace/coverage/default/9.usbdev_data_toggle_restore.2192315809 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 934575056 ps |
| CPU time | 2.88 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:34:06 PM PDT 24 |
| Peak memory | 207856 kb |
| Host | smart-a3a8a749-5cb4-4d29-be9e-c608ea87672e |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/si m.tcl +ntb_random_seed=2192315809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_restore_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.2192315809 |
| Directory | /workspace/9.usbdev_data_toggle_restore/latest |
| Test location | /workspace/coverage/default/9.usbdev_device_address.1634568458 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 34177151333 ps |
| CPU time | 54.03 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:35:03 PM PDT 24 |
| Peak memory | 207700 kb |
| Host | smart-23e3baef-4630-412b-a2b4-e457d4bf0671 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16345 68458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.1634568458 |
| Directory | /workspace/9.usbdev_device_address/latest |
| Test location | /workspace/coverage/default/9.usbdev_device_timeout.3205984097 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 933224274 ps |
| CPU time | 18.58 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:20 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-e3949e62-0d85-45f9-8edc-d599eb7334b1 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3205984097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.3205984097 |
| Directory | /workspace/9.usbdev_device_timeout/latest |
| Test location | /workspace/coverage/default/9.usbdev_disable_endpoint.1300009327 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 858971890 ps |
| CPU time | 2.13 seconds |
| Started | Aug 16 05:34:05 PM PDT 24 |
| Finished | Aug 16 05:34:07 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-2e671dfd-09b6-4e35-b4a4-803faf57227d |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13000 09327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_disable_endpoint.1300009327 |
| Directory | /workspace/9.usbdev_disable_endpoint/latest |
| Test location | /workspace/coverage/default/9.usbdev_disconnected.2481619335 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 175956096 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:00 PM PDT 24 |
| Finished | Aug 16 05:34:01 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-831de942-4b58-45f1-a20c-33ff7eb58781 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=24816 19335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_disconnected.2481619335 |
| Directory | /workspace/9.usbdev_disconnected/latest |
| Test location | /workspace/coverage/default/9.usbdev_enable.3788215274 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 28258030 ps |
| CPU time | 0.76 seconds |
| Started | Aug 16 05:34:04 PM PDT 24 |
| Finished | Aug 16 05:34:05 PM PDT 24 |
| Peak memory | 207420 kb |
| Host | smart-13e5fb3f-bc81-4469-a64a-787f00ed82d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=37882 15274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /wo rkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_enable.3788215274 |
| Directory | /workspace/9.usbdev_enable/latest |
| Test location | /workspace/coverage/default/9.usbdev_endpoint_access.3560962722 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 867600263 ps |
| CPU time | 2.33 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:11 PM PDT 24 |
| Peak memory | 207732 kb |
| Host | smart-53f5b3a5-f79a-42c5-882d-db7f80d6a7ca |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35609 62722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -c m_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.3560962722 |
| Directory | /workspace/9.usbdev_endpoint_access/latest |
| Test location | /workspace/coverage/default/9.usbdev_endpoint_types.2349323843 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 823641609 ps |
| CPU time | 1.78 seconds |
| Started | Aug 16 05:34:05 PM PDT 24 |
| Finished | Aug 16 05:34:07 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-3c42c71e-7119-40b7-a001-d4be35a39cb6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2349323843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.2349323843 |
| Directory | /workspace/9.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/9.usbdev_fifo_rst.1311676775 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 174980714 ps |
| CPU time | 2.08 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:03 PM PDT 24 |
| Peak memory | 207708 kb |
| Host | smart-88500bfc-c4eb-4882-a239-5d6e812fd41a |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13116 76775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_fifo_rst.1311676775 |
| Directory | /workspace/9.usbdev_fifo_rst/latest |
| Test location | /workspace/coverage/default/9.usbdev_in_iso.351228130 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 230826174 ps |
| CPU time | 1.18 seconds |
| Started | Aug 16 05:33:59 PM PDT 24 |
| Finished | Aug 16 05:34:01 PM PDT 24 |
| Peak memory | 215880 kb |
| Host | smart-94cb2cd0-5958-4048-b37c-5f82a4e7f3e0 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=351228130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.351228130 |
| Directory | /workspace/9.usbdev_in_iso/latest |
| Test location | /workspace/coverage/default/9.usbdev_in_stall.2598476858 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 143975939 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:09 PM PDT 24 |
| Peak memory | 207364 kb |
| Host | smart-28f99606-bc87-447f-951e-3ade61cd59d7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=25984 76858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_in_stall.2598476858 |
| Directory | /workspace/9.usbdev_in_stall/latest |
| Test location | /workspace/coverage/default/9.usbdev_in_trans.730421995 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 157370986 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:04 PM PDT 24 |
| Finished | Aug 16 05:34:05 PM PDT 24 |
| Peak memory | 206976 kb |
| Host | smart-c044d5e4-f2e8-4243-b2fb-80a0d7f699fe |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=73042 1995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_in_trans.730421995 |
| Directory | /workspace/9.usbdev_in_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_invalid_sync.1416312423 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 3811289273 ps |
| CPU time | 107.58 seconds |
| Started | Aug 16 05:34:02 PM PDT 24 |
| Finished | Aug 16 05:35:49 PM PDT 24 |
| Peak memory | 224164 kb |
| Host | smart-129e28cd-b495-42dd-933f-69df4c98f7b8 |
| User | root |
| Command | /workspace/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=1416312423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+bran ch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.1416312423 |
| Directory | /workspace/9.usbdev_invalid_sync/latest |
| Test location | /workspace/coverage/default/9.usbdev_iso_retraction.2790677689 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 7295493270 ps |
| CPU time | 49.44 seconds |
| Started | Aug 16 05:34:11 PM PDT 24 |
| Finished | Aug 16 05:35:00 PM PDT 24 |
| Peak memory | 207772 kb |
| Host | smart-dfbb0dcc-9f26-4cd0-b174-7fd5dbd6a2b6 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2790677689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_iso_retraction_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.2790677689 |
| Directory | /workspace/9.usbdev_iso_retraction/latest |
| Test location | /workspace/coverage/default/9.usbdev_link_in_err.1817433959 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 198781432 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:03 PM PDT 24 |
| Finished | Aug 16 05:34:04 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-9eacd9cb-4b8d-43e3-8853-2f5c38da6858 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18174 33959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_link_in_err.1817433959 |
| Directory | /workspace/9.usbdev_link_in_err/latest |
| Test location | /workspace/coverage/default/9.usbdev_link_resume.619553206 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 24191159065 ps |
| CPU time | 41.18 seconds |
| Started | Aug 16 05:34:07 PM PDT 24 |
| Finished | Aug 16 05:34:49 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-17ae9765-ef4a-418d-965c-7a8806954019 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=61955 3206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_link_resume.619553206 |
| Directory | /workspace/9.usbdev_link_resume/latest |
| Test location | /workspace/coverage/default/9.usbdev_link_suspend.3138831832 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 9994505485 ps |
| CPU time | 12.4 seconds |
| Started | Aug 16 05:34:12 PM PDT 24 |
| Finished | Aug 16 05:34:25 PM PDT 24 |
| Peak memory | 207828 kb |
| Host | smart-f35c1fda-d68c-476d-bc2b-5e181a168f7f |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31388 31832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_link_suspend.3138831832 |
| Directory | /workspace/9.usbdev_link_suspend/latest |
| Test location | /workspace/coverage/default/9.usbdev_low_speed_traffic.2037293512 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 3786770874 ps |
| CPU time | 106.23 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:35:55 PM PDT 24 |
| Peak memory | 224028 kb |
| Host | smart-a2469cdf-9546-4edc-8d28-10ac4362a4eb |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2037293512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_low_speed_traffic_vseq +en_cov=1 -cm line+co nd+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.2037293512 |
| Directory | /workspace/9.usbdev_low_speed_traffic/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_inter_pkt_delay.1948876342 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 1980891715 ps |
| CPU time | 57.44 seconds |
| Started | Aug 16 05:34:02 PM PDT 24 |
| Finished | Aug 16 05:35:00 PM PDT 24 |
| Peak memory | 215892 kb |
| Host | smart-449646e5-37be-401b-961f-bffa8c0b1ede |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw /dv/tools/sim.tcl +ntb_random_seed=1948876342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.1948876342 |
| Directory | /workspace/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_length_in_transaction.3540502699 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 240660064 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:34:07 PM PDT 24 |
| Finished | Aug 16 05:34:08 PM PDT 24 |
| Peak memory | 207500 kb |
| Host | smart-914fbcbf-ee0b-486b-93b8-fca1680f93ee |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_ random_seed=3540502699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.3540502699 |
| Directory | /workspace/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_length_out_transaction.1707517634 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 231486630 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:34:27 PM PDT 24 |
| Finished | Aug 16 05:34:28 PM PDT 24 |
| Peak memory | 207424 kb |
| Host | smart-c54d2641-acf1-44b3-8f22-0378968ce233 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=17075 17634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.1707517634 |
| Directory | /workspace/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_non_iso_usb_traffic.3546537223 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 2688857341 ps |
| CPU time | 20.61 seconds |
| Started | Aug 16 05:34:01 PM PDT 24 |
| Finished | Aug 16 05:34:22 PM PDT 24 |
| Peak memory | 224084 kb |
| Host | smart-80125ed2-c88b-4d06-b358-6649e66ab425 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35465 37223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.3546537223 |
| Directory | /workspace/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspace/coverage/default/9.usbdev_max_usb_traffic.3230456891 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 2781851545 ps |
| CPU time | 21.24 seconds |
| Started | Aug 16 05:34:04 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 224096 kb |
| Host | smart-3fbf6e1c-4e97-4395-a38c-be98a87fe62f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3230456891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_usb_traffic_vseq +en_cov=1 -cm line+cond +fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.3230456891 |
| Directory | /workspace/9.usbdev_max_usb_traffic/latest |
| Test location | /workspace/coverage/default/9.usbdev_min_inter_pkt_delay.1732112072 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 2230697014 ps |
| CPU time | 18.35 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:26 PM PDT 24 |
| Peak memory | 216024 kb |
| Host | smart-fa786310-3cf0-4a06-915a-6c7868ae95c7 |
| User | root |
| Command | /workspace/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/d v/tools/sim.tcl +ntb_random_seed=1732112072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.1732112072 |
| Directory | /workspace/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspace/coverage/default/9.usbdev_min_length_in_transaction.2927086562 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 158824567 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:34:10 PM PDT 24 |
| Finished | Aug 16 05:34:11 PM PDT 24 |
| Peak memory | 207480 kb |
| Host | smart-62eeb676-24d8-4211-89d9-5023d04e2bec |
| User | root |
| Command | /workspace/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_r andom_seed=2927086562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.2927086562 |
| Directory | /workspace/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_min_length_out_transaction.1896210479 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 153378969 ps |
| CPU time | 0.83 seconds |
| Started | Aug 16 05:34:05 PM PDT 24 |
| Finished | Aug 16 05:34:06 PM PDT 24 |
| Peak memory | 207428 kb |
| Host | smart-2ee13e41-e426-469d-af81-26510a5a7afa |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=18962 10479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.1896210479 |
| Directory | /workspace/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_nak_trans.2848688901 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 226651739 ps |
| CPU time | 0.99 seconds |
| Started | Aug 16 05:34:04 PM PDT 24 |
| Finished | Aug 16 05:34:05 PM PDT 24 |
| Peak memory | 206924 kb |
| Host | smart-8ebadb65-7966-4833-a299-e2ad2332957b |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28486 88901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_nak_trans.2848688901 |
| Directory | /workspace/9.usbdev_nak_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_out_iso.3579410204 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 200666817 ps |
| CPU time | 0.94 seconds |
| Started | Aug 16 05:34:06 PM PDT 24 |
| Finished | Aug 16 05:34:07 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-d040d437-9c85-4ff9-b75b-73e92515d82e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=35794 10204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_out_iso.3579410204 |
| Directory | /workspace/9.usbdev_out_iso/latest |
| Test location | /workspace/coverage/default/9.usbdev_out_stall.136168211 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 151362325 ps |
| CPU time | 0.9 seconds |
| Started | Aug 16 05:34:02 PM PDT 24 |
| Finished | Aug 16 05:34:03 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-513453e3-c702-400e-bc07-f42a7388b164 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13616 8211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_out_stall.136168211 |
| Directory | /workspace/9.usbdev_out_stall/latest |
| Test location | /workspace/coverage/default/9.usbdev_out_trans_nak.1240581788 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 181189929 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:09 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-a90f9b1d-03b7-4612-b0a8-7d989fa53d92 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=12405 81788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_ dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_out_trans_nak.1240581788 |
| Directory | /workspace/9.usbdev_out_trans_nak/latest |
| Test location | /workspace/coverage/default/9.usbdev_pending_in_trans.1119587258 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 162864327 ps |
| CPU time | 0.95 seconds |
| Started | Aug 16 05:34:12 PM PDT 24 |
| Finished | Aug 16 05:34:13 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-5e60ca96-b56e-4f0a-b262-58ea9ec2d1a5 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11195 87258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pending_in_trans.1119587258 |
| Directory | /workspace/9.usbdev_pending_in_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_phy_config_pinflip.1977018022 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 192498742 ps |
| CPU time | 1.02 seconds |
| Started | Aug 16 05:34:12 PM PDT 24 |
| Finished | Aug 16 05:34:13 PM PDT 24 |
| Peak memory | 207516 kb |
| Host | smart-c22981f8-4955-4b2b-9233-c65cabc27cf8 |
| User | root |
| Command | /workspace/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_rando m_seed=1977018022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.1977018022 |
| Directory | /workspace/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspace/coverage/default/9.usbdev_phy_config_usb_ref_disable.1187970535 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 158266101 ps |
| CPU time | 0.89 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:10 PM PDT 24 |
| Peak memory | 207456 kb |
| Host | smart-a9dadb4e-ad0f-4498-9981-92d8b29c6e75 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=11879 70535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branc h+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.1187970535 |
| Directory | /workspace/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspace/coverage/default/9.usbdev_phy_pins_sense.4293608051 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 62174230 ps |
| CPU time | 0.73 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:10 PM PDT 24 |
| Peak memory | 207580 kb |
| Host | smart-3dbc5629-0af8-48ca-88a8-38e639a1a8cd |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=42936 08051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.4293608051 |
| Directory | /workspace/9.usbdev_phy_pins_sense/latest |
| Test location | /workspace/coverage/default/9.usbdev_pkt_buffer.1370344442 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 7380611366 ps |
| CPU time | 20.63 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:29 PM PDT 24 |
| Peak memory | 216000 kb |
| Host | smart-2588d200-3a13-464e-b053-0572629e8799 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=13703 44442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pkt_buffer.1370344442 |
| Directory | /workspace/9.usbdev_pkt_buffer/latest |
| Test location | /workspace/coverage/default/9.usbdev_pkt_received.4120973093 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 163563922 ps |
| CPU time | 0.96 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:10 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-1094fde3-fdc6-444e-b56e-4ade135680bb |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=41209 73093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_d ir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pkt_received.4120973093 |
| Directory | /workspace/9.usbdev_pkt_received/latest |
| Test location | /workspace/coverage/default/9.usbdev_pkt_sent.1676169083 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 207064784 ps |
| CPU time | 1.06 seconds |
| Started | Aug 16 05:34:12 PM PDT 24 |
| Finished | Aug 16 05:34:13 PM PDT 24 |
| Peak memory | 207528 kb |
| Host | smart-59f3e211-c1a7-4e7f-b5d2-1fb478e309f7 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=16761 69083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir / workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_pkt_sent.1676169083 |
| Directory | /workspace/9.usbdev_pkt_sent/latest |
| Test location | /workspace/coverage/default/9.usbdev_rand_bus_disconnects.3985173039 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 4027524478 ps |
| CPU time | 113.48 seconds |
| Started | Aug 16 05:34:11 PM PDT 24 |
| Finished | Aug 16 05:36:06 PM PDT 24 |
| Peak memory | 218220 kb |
| Host | smart-f6402531-1633-43f5-9050-e2205eac36dc |
| User | root |
| Command | /workspace/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=3985173039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.3985173039 |
| Directory | /workspace/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspace/coverage/default/9.usbdev_rand_bus_resets.4160885529 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 2413741560 ps |
| CPU time | 14.21 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:24 PM PDT 24 |
| Peak memory | 218148 kb |
| Host | smart-306224c5-bc7e-4efe-ab86-85b72dedac5a |
| User | root |
| Command | /workspace/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4160885529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.4160885529 |
| Directory | /workspace/9.usbdev_rand_bus_resets/latest |
| Test location | /workspace/coverage/default/9.usbdev_rand_suspends.2546408035 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 6457291033 ps |
| CPU time | 32.49 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:41 PM PDT 24 |
| Peak memory | 224136 kb |
| Host | smart-9718ade7-c447-4f78-b83a-0b911c9156a7 |
| User | root |
| Command | /workspace/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/re po_top/hw/dv/tools/sim.tcl +ntb_random_seed=2546408035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.2546408035 |
| Directory | /workspace/9.usbdev_rand_suspends/latest |
| Test location | /workspace/coverage/default/9.usbdev_random_length_in_transaction.81377727 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 198642362 ps |
| CPU time | 0.97 seconds |
| Started | Aug 16 05:34:13 PM PDT 24 |
| Finished | Aug 16 05:34:14 PM PDT 24 |
| Peak memory | 207476 kb |
| Host | smart-665eb6bd-c841-438e-8720-3af3afa5f679 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=81377 727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_in_transaction.81377727 |
| Directory | /workspace/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_random_length_out_transaction.3198822199 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 162426690 ps |
| CPU time | 0.93 seconds |
| Started | Aug 16 05:34:10 PM PDT 24 |
| Finished | Aug 16 05:34:12 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-6853df0a-24ac-45e9-a1b8-21fdc00663b4 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=31988 22199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transaction_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.3198822199 |
| Directory | /workspace/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspace/coverage/default/9.usbdev_resume_link_active.768355220 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 20172321459 ps |
| CPU time | 26.64 seconds |
| Started | Aug 16 05:34:12 PM PDT 24 |
| Finished | Aug 16 05:34:39 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-f4d693af-c5fd-445b-9f27-d1fd395cb094 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=76835 5220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_resume_link_active.768355220 |
| Directory | /workspace/9.usbdev_resume_link_active/latest |
| Test location | /workspace/coverage/default/9.usbdev_rx_crc_err.2767978736 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 144258532 ps |
| CPU time | 0.82 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:10 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-2b986c57-52a1-4913-a971-a0a6ed514ab3 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27679 78736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rx_crc_err.2767978736 |
| Directory | /workspace/9.usbdev_rx_crc_err/latest |
| Test location | /workspace/coverage/default/9.usbdev_rx_full.2692541175 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 320691567 ps |
| CPU time | 1.25 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:09 PM PDT 24 |
| Peak memory | 207524 kb |
| Host | smart-096d363c-624a-4d51-93cb-300c5f215566 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=26925 41175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /w orkspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rx_full.2692541175 |
| Directory | /workspace/9.usbdev_rx_full/latest |
| Test location | /workspace/coverage/default/9.usbdev_setup_stage.3997095445 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 156841018 ps |
| CPU time | 0.84 seconds |
| Started | Aug 16 05:34:11 PM PDT 24 |
| Finished | Aug 16 05:34:12 PM PDT 24 |
| Peak memory | 207380 kb |
| Host | smart-a5b0c7e2-d107-4504-b040-57ab2e565ba9 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=39970 95445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_di r /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_setup_stage.3997095445 |
| Directory | /workspace/9.usbdev_setup_stage/latest |
| Test location | /workspace/coverage/default/9.usbdev_setup_trans_ignored.2295081696 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 166596477 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:12 PM PDT 24 |
| Finished | Aug 16 05:34:13 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-48b37bed-17d1-4a1b-be02-c3c3dd695723 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=22950 81696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+asser t -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_setup_trans_ignored.2295081696 |
| Directory | /workspace/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspace/coverage/default/9.usbdev_smoke.517943788 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 228298817 ps |
| CPU time | 1.01 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:09 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-73ef9efc-b2e0-4b0f-8319-d4820890ad6e |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=51794 3788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /work space/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.517943788 |
| Directory | /workspace/9.usbdev_smoke/latest |
| Test location | /workspace/coverage/default/9.usbdev_spurious_pids_ignored.437348912 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 2543599540 ps |
| CPU time | 19.67 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:28 PM PDT 24 |
| Peak memory | 217664 kb |
| Host | smart-56d4237a-5109-4da3-a60b-03edf749eaa5 |
| User | root |
| Command | /workspace/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +n tb_random_seed=437348912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.437348912 |
| Directory | /workspace/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspace/coverage/default/9.usbdev_stall_priority_over_nak.3303952186 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 185410520 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:34:10 PM PDT 24 |
| Finished | Aug 16 05:34:11 PM PDT 24 |
| Peak memory | 207468 kb |
| Host | smart-8225db49-2ca4-4729-b589-b2fdebb39747 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=33039 52186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+a ssert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.3303952186 |
| Directory | /workspace/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspace/coverage/default/9.usbdev_stall_trans.837321432 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 224912879 ps |
| CPU time | 0.98 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:10 PM PDT 24 |
| Peak memory | 207436 kb |
| Host | smart-ae1e99c6-400a-488b-954d-40db16234002 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=83732 1432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_trans.837321432 |
| Directory | /workspace/9.usbdev_stall_trans/latest |
| Test location | /workspace/coverage/default/9.usbdev_stream_len_max.2776304363 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 1435213878 ps |
| CPU time | 3.28 seconds |
| Started | Aug 16 05:34:09 PM PDT 24 |
| Finished | Aug 16 05:34:12 PM PDT 24 |
| Peak memory | 207716 kb |
| Host | smart-120941e1-8cbe-4d71-92b8-93cc97a73a9c |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=27763 04363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm _dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.2776304363 |
| Directory | /workspace/9.usbdev_stream_len_max/latest |
| Test location | /workspace/coverage/default/9.usbdev_streaming_out.2876392144 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 4231560697 ps |
| CPU time | 126.57 seconds |
| Started | Aug 16 05:34:11 PM PDT 24 |
| Finished | Aug 16 05:36:19 PM PDT 24 |
| Peak memory | 217280 kb |
| Host | smart-f6c4d9a0-3614-484d-85ec-c348f9463bf8 |
| User | root |
| Command | /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=28763 92144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_streaming_out.2876392144 |
| Directory | /workspace/9.usbdev_streaming_out/latest |
| Test location | /workspace/coverage/default/9.usbdev_timeout_missing_host_handshake.834012214 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 873254638 ps |
| CPU time | 19.48 seconds |
| Started | Aug 16 05:34:08 PM PDT 24 |
| Finished | Aug 16 05:34:27 PM PDT 24 |
| Peak memory | 207688 kb |
| Host | smart-2d8c5471-38ef-422f-851a-19b00f972e46 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mn t/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=834012214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_timeout_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_ handshake.834012214 |
| Directory | /workspace/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspace/coverage/default/9.usbdev_tx_rx_disruption.2497760238 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 635592594 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:34:12 PM PDT 24 |
| Finished | Aug 16 05:34:14 PM PDT 24 |
| Peak memory | 207568 kb |
| Host | smart-d868e98e-8820-4e03-afcf-c173ada74b3a |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2497760238 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_tx_rx_disruption.2497760238 |
| Directory | /workspace/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/90.usbdev_endpoint_types.4083843345 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 836956587 ps |
| CPU time | 2.02 seconds |
| Started | Aug 16 05:40:00 PM PDT 24 |
| Finished | Aug 16 05:40:02 PM PDT 24 |
| Peak memory | 207520 kb |
| Host | smart-acff531b-5e0c-4569-8cd0-d3f83a3466b7 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=4083843345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.4083843345 |
| Directory | /workspace/90.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/90.usbdev_tx_rx_disruption.2394668433 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 593137400 ps |
| CPU time | 1.65 seconds |
| Started | Aug 16 05:40:02 PM PDT 24 |
| Finished | Aug 16 05:40:03 PM PDT 24 |
| Peak memory | 207588 kb |
| Host | smart-0c623da1-7693-41af-bcdc-7cc5f83f350f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2394668433 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 90.usbdev_tx_rx_disruption.2394668433 |
| Directory | /workspace/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/91.usbdev_endpoint_types.3774154746 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 319739864 ps |
| CPU time | 1.16 seconds |
| Started | Aug 16 05:39:59 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207472 kb |
| Host | smart-102abbb5-f896-4a3a-9ab2-e4be18d8d1be |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3774154746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.3774154746 |
| Directory | /workspace/91.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/91.usbdev_tx_rx_disruption.3152993722 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 638177543 ps |
| CPU time | 1.72 seconds |
| Started | Aug 16 05:39:52 PM PDT 24 |
| Finished | Aug 16 05:39:54 PM PDT 24 |
| Peak memory | 207396 kb |
| Host | smart-3fac1b35-c757-4999-9b49-7a6fd9dfa0fa |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3152993722 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 91.usbdev_tx_rx_disruption.3152993722 |
| Directory | /workspace/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/92.usbdev_tx_rx_disruption.1534593468 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 619364103 ps |
| CPU time | 1.74 seconds |
| Started | Aug 16 05:39:59 PM PDT 24 |
| Finished | Aug 16 05:40:01 PM PDT 24 |
| Peak memory | 207540 kb |
| Host | smart-eab37062-bc4c-426e-b2e7-3a2f83fef081 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1534593468 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 92.usbdev_tx_rx_disruption.1534593468 |
| Directory | /workspace/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/93.usbdev_endpoint_types.2399031974 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 165330492 ps |
| CPU time | 0.91 seconds |
| Started | Aug 16 05:39:57 PM PDT 24 |
| Finished | Aug 16 05:39:58 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-512c243c-e49e-4644-a140-d631fe859727 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2399031974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.2399031974 |
| Directory | /workspace/93.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/93.usbdev_tx_rx_disruption.3610505384 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 528513786 ps |
| CPU time | 1.64 seconds |
| Started | Aug 16 05:39:52 PM PDT 24 |
| Finished | Aug 16 05:39:54 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-edfadd4f-734f-491b-a3ab-fbbdcc2db481 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3610505384 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 93.usbdev_tx_rx_disruption.3610505384 |
| Directory | /workspace/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/94.usbdev_endpoint_types.2978775485 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 311504620 ps |
| CPU time | 1.07 seconds |
| Started | Aug 16 05:39:30 PM PDT 24 |
| Finished | Aug 16 05:39:32 PM PDT 24 |
| Peak memory | 207356 kb |
| Host | smart-c9338ae4-9887-496d-9264-97403babf4e5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=2978775485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.2978775485 |
| Directory | /workspace/94.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/94.usbdev_tx_rx_disruption.741625495 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 617731051 ps |
| CPU time | 1.86 seconds |
| Started | Aug 16 05:40:01 PM PDT 24 |
| Finished | Aug 16 05:40:03 PM PDT 24 |
| Peak memory | 207584 kb |
| Host | smart-23462763-8421-4d59-8cb1-be3452758a27 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=741625495 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 94.usbdev_tx_rx_disruption.741625495 |
| Directory | /workspace/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/95.usbdev_endpoint_types.85070965 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 164485996 ps |
| CPU time | 0.88 seconds |
| Started | Aug 16 05:39:28 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207532 kb |
| Host | smart-ed66bd64-220a-4d17-a516-5c9fb0b49811 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=85070965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.85070965 |
| Directory | /workspace/95.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/95.usbdev_tx_rx_disruption.657437934 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 423258853 ps |
| CPU time | 1.43 seconds |
| Started | Aug 16 05:39:29 PM PDT 24 |
| Finished | Aug 16 05:39:30 PM PDT 24 |
| Peak memory | 207552 kb |
| Host | smart-1cd85600-b6b7-4e66-951c-95b26bff5fc2 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=657437934 -assert nopostproc +UVM_TES TNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defaul t.vdb -cm_log /dev/null -cm_name 95.usbdev_tx_rx_disruption.657437934 |
| Directory | /workspace/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/96.usbdev_endpoint_types.471854374 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 353511232 ps |
| CPU time | 1.15 seconds |
| Started | Aug 16 05:39:45 PM PDT 24 |
| Finished | Aug 16 05:39:47 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-e58fd871-ca86-4aee-8fed-ad4f6fee4cd5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=471854374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+f sm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.471854374 |
| Directory | /workspace/96.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/96.usbdev_tx_rx_disruption.2762458282 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 512304695 ps |
| CPU time | 1.68 seconds |
| Started | Aug 16 05:39:55 PM PDT 24 |
| Finished | Aug 16 05:39:57 PM PDT 24 |
| Peak memory | 207448 kb |
| Host | smart-ca74815f-27b0-4e8e-adf2-c7945ac66922 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2762458282 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 96.usbdev_tx_rx_disruption.2762458282 |
| Directory | /workspace/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/97.usbdev_endpoint_types.1942447509 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 391466152 ps |
| CPU time | 1.27 seconds |
| Started | Aug 16 05:39:50 PM PDT 24 |
| Finished | Aug 16 05:39:51 PM PDT 24 |
| Peak memory | 207492 kb |
| Host | smart-4dae3f41-bc4e-4854-b45f-9bdb091d3bc5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=1942447509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.1942447509 |
| Directory | /workspace/97.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/97.usbdev_tx_rx_disruption.92236532 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 573183382 ps |
| CPU time | 1.76 seconds |
| Started | Aug 16 05:39:48 PM PDT 24 |
| Finished | Aug 16 05:39:49 PM PDT 24 |
| Peak memory | 207564 kb |
| Host | smart-a05a6bec-b787-4d67-b0b9-1a3e1829a2f8 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=92236532 -assert nopostproc +UVM_TEST NAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default .vdb -cm_log /dev/null -cm_name 97.usbdev_tx_rx_disruption.92236532 |
| Directory | /workspace/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/98.usbdev_endpoint_types.70800301 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 436834872 ps |
| CPU time | 1.32 seconds |
| Started | Aug 16 05:39:54 PM PDT 24 |
| Finished | Aug 16 05:39:55 PM PDT 24 |
| Peak memory | 207392 kb |
| Host | smart-419ff2f1-b8bd-4404-9307-8ad738aee6a9 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=70800301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+fs m+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.70800301 |
| Directory | /workspace/98.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/98.usbdev_tx_rx_disruption.1955959398 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 561463924 ps |
| CPU time | 1.53 seconds |
| Started | Aug 16 05:39:45 PM PDT 24 |
| Finished | Aug 16 05:39:47 PM PDT 24 |
| Peak memory | 207536 kb |
| Host | smart-07dab08e-5fb6-4b59-8b11-73679cb566f5 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1955959398 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 98.usbdev_tx_rx_disruption.1955959398 |
| Directory | /workspace/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspace/coverage/default/99.usbdev_endpoint_types.3445231704 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 463385359 ps |
| CPU time | 1.46 seconds |
| Started | Aug 16 05:39:58 PM PDT 24 |
| Finished | Aug 16 05:40:00 PM PDT 24 |
| Peak memory | 207544 kb |
| Host | smart-bcc0010a-431c-4275-8264-81f551f08c5f |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.t cl +ntb_random_seed=3445231704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_types_vseq +en_cov=1 -cm line+cond+ fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.3445231704 |
| Directory | /workspace/99.usbdev_endpoint_types/latest |
| Test location | /workspace/coverage/default/99.usbdev_tx_rx_disruption.3692734571 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 661172754 ps |
| CPU time | 1.73 seconds |
| Started | Aug 16 05:40:13 PM PDT 24 |
| Finished | Aug 16 05:40:15 PM PDT 24 |
| Peak memory | 207344 kb |
| Host | smart-15bef66c-0fca-48c4-aeca-d6af705eb040 |
| User | root |
| Command | /workspace/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link_in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELN OTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3692734571 -assert nopostproc +UVM_TE STNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/defau lt.vdb -cm_log /dev/null -cm_name 99.usbdev_tx_rx_disruption.3692734571 |
| Directory | /workspace/99.usbdev_tx_rx_disruption/latest |
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