Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	2610	1			T27	2		T129	1		T369	1
range_16_to_126	156006	1			T3	88		T14	3		T15	10
fifteen	1002	1			T27	4		T95	2		T55	11
range_2_to_14	17885	1			T15	3		T27	453		T29	7
seven	676	1			T27	2		T112	1		T113	7
one	709	1			T27	1		T112	1		T128	1
zero	1061	1			T68	1		T27	2		T112	3

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Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

seven

13823

1

T3

11

T4

11

T23

2

three

12531

1

T3

11

T15

1

T4

11

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Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	184	1			T113	1		T370	2		T371	2
range_127	three	197	1			T27	1		T133	1		T372	1
range_16_to_126	seven	11024	1			T3	11		T4	11		T23	2
range_16_to_126	three	10760	1			T3	11		T15	1		T4	11
fifteen	seven	285	1			T27	1		T113	2		T182	1
fifteen	three	50	1			T27	1		T116	1		T113	2
range_2_to_14	seven	2235	1			T27	28		T112	3		T97	34
range_2_to_14	three	1428	1			T27	36		T88	3		T112	1
seven	seven	26	1			T133	1		T370	2		T373	1
seven	three	22	1			T374	1		T375	1		T376	1
one	seven	49	1			T182	2		T179	1		T133	1
one	three	42	1			T182	1		T374	1		T372	1
zero	seven	46	1			T377	1		T374	1		T375	1
zero	three	54	1			T133	1		T376	1		T371	1