Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	683	1			T129	1		T134	1		T130	1
range_16_to_126	162600	1			T1	2		T2	828		T3	10
fifteen	440	1			T132	1		T114	3		T363	1
range_2_to_14	13782	1			T17	9		T20	9		T128	1
seven	937	1			T129	1		T114	4		T111	3
one	1892	1			T18	2		T218	65		T114	3
zero	844	1			T178	78		T114	1		T518	5

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Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

seven

13026

1

T2

69

T18

2

T20

9

three

12032

1

T2

62

T4

9

T36

2

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Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	238	1			T111	1		T137	2		T519	2
range_127	three	23	1			T111	1		T520	2		T137	1
range_16_to_126	seven	11370	1			T2	69		T21	7		T22	3
range_16_to_126	three	11222	1			T2	62		T4	9		T36	2
fifteen	seven	19	1			T111	1		T183	1		T521	1
fifteen	three	12	1			T522	1		T523	2		T524	1
range_2_to_14	seven	1265	1			T20	9		T75	1		T135	1
range_2_to_14	three	642	1			T138	1		T57	9		T134	1
seven	seven	83	1			T183	1		T525	1		T526	2
seven	three	62	1			T183	1		T527	2		T528	2
one	seven	102	1			T18	2		T218	13		T111	2
one	three	101	1			T218	13		T137	68		T210	1
zero	seven	32	1			T137	1		T529	3		T396	1
zero	three	32	1			T178	13		T111	1		T393	1