Group : usbdev_env_pkg::usbdev_env_cov::crc16_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : usbdev_env_pkg::usbdev_env_cov::crc16_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv



Summary for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_crc16 2 0 2 100.00 100 1 1 0
cp_dir 2 0 2 100.00 100 1 1 2


Crosses for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_crc16_X_dir 4 0 4 100.00 100 1 1 0


Summary for Variable cp_crc16

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_crc16

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
six_ones 18 1 T131 2 T210 1 T212 1
all_ones 10 1 T325 1 T530 1 T78 1



Summary for Variable cp_dir

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_dir

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 111272 1 T1 1 T2 403 T3 6
auto[1] 46780 1 T1 1 T2 425 T3 3



Summary for Cross cr_crc16_X_dir

Samples crossed: cp_crc16 cp_dir
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cr_crc16_X_dir

Bins
cp_crc16cp_dirCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
six_ones auto[0] 14 1 T131 1 T210 1 T212 1
six_ones auto[1] 4 1 T131 1 T531 1 T532 1
all_ones auto[0] 7 1 T325 1 T530 1 T78 1
all_ones auto[1] 3 1 T533 1 T534 1 T535 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%