Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::ep_out_cfg_cg

Group : usbdev_env_pkg::usbdev_env_cov::ep_out_cfg_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
99.03	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

---

Summary for Group usbdev_env_pkg::usbdev_env_cov::ep_out_cfg_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00
Crosses	192	2	190	98.96

Variables for Group usbdev_env_pkg::usbdev_env_cov::ep_out_cfg_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_out_enable	2	0	2	100.00	100	1	1	2
cp_out_iso	2	0	2	100.00	100	1	1	2
cp_out_stall	2	0	2	100.00	100	1	1	2
cp_pid	3	0	3	100.00	100	1	1	0
cp_rxenable_out	2	0	2	100.00	100	1	1	2
cp_rxenable_setup	2	0	2	100.00	100	1	1	2
cp_set_nak_out	2	0	2	100.00	100	1	1	2

Crosses for Group usbdev_env_pkg::usbdev_env_cov::ep_out_cfg_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_pid_x_epconfig	192	2	190	98.96	100	1	1	0

Summary for Variable cp_out_enable

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_out_enable

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

17147

1

T83

6

T138

3

T132

9

auto[1]

81121

1

T1

1

T2

403

T3

6

---

Summary for Variable cp_out_iso

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_out_iso

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

95800

1

T1

1

T2

403

T3

6

auto[1]

2468

1

T83

5

T128

1

T138

7

---

Summary for Variable cp_out_stall

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_out_stall

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

85672

1

T1

1

T2

403

T3

3

auto[1]

12596

1

T3

3

T17

3

T19

3

---

Summary for Variable cp_pid

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_pid

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
ignore_pre[PidTypePre]	8872	1			T83	1		T128	1		T138	1
pkt_types[PidTypeSetupToken]	18671	1			T3	3		T17	3		T19	3
pkt_types[PidTypeOutToken]	70699	1			T1	1		T2	403		T3	3

---

Summary for Variable cp_rxenable_out

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_rxenable_out

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

17974

1

T83

2

T198

1

T128

1

auto[1]

80294

1

T1

1

T2

403

T3

6

---

Summary for Variable cp_rxenable_setup

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_rxenable_setup

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

68790

1

T1

1

T2

403

T18

1

auto[1]

29478

1

T3

6

T17

6

T19

6

---

Summary for Variable cp_set_nak_out

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_set_nak_out

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

97582

1

T1

1

T2

403

T3

6

auto[1]

686

1

T83

5

T138

5

T258

3

---

Summary for Cross cr_pid_x_epconfig

Samples crossed: cp_pid cp_out_enable cp_rxenable_setup cp_rxenable_out cp_set_nak_out cp_out_iso cp_out_stall

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	192	2	190	98.96	2

Automatically Generated Cross Bins for cr_pid_x_epconfig

Uncovered bins

cp_pid	cp_out_enable	cp_rxenable_setup	cp_rxenable_out	cp_set_nak_out	cp_out_iso	cp_out_stall	COUNT	AT LEAST	NUMBER	STATUS
[ignore_pre[PidTypePre]]	[auto[0]]	[auto[1]]	[auto[1]]	[auto[1]]	[auto[1]]	[auto[0]]	0	1	1
[ignore_pre[PidTypePre]]	[auto[1]]	[auto[0]]	[auto[0]]	[auto[1]]	[auto[0]]	[auto[0]]	0	1	1

Covered bins

cp_pid

cp_out_enable

cp_rxenable_setup

cp_rxenable_out

cp_set_nak_out

cp_out_iso

cp_out_stall

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

714

1

T135

4

T114

14

T137

40

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

419

1

T114

6

T363

1

T210

31

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

79

1

T132

4

T134

2

T364

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

3

1

T365

1

T366

1

T367

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

4

1

T368

1

T369

1

T370

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

2

1

T371

1

T372

1

-

-

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

6

1

T373

1

T374

1

T375

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

3

1

T376

1

T377

1

T378

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

640

1

T111

52

T137

68

T379

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

420

1

T130

1

T114

12

T379

3

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

7

1

T83

1

T115

1

T380

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

5

1

T381

1

T382

1

T383

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

3

1

T384

1

T385

1

T386

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

4

1

T387

1

T388

1

T389

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

5

1

T390

1

T391

1

T392

1

ignore_pre[PidTypePre]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

5

1

T393

2

T394

1

T395

1

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

677

1

T132

3

T134

1

T111

20

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

559

1

T114

13

T363

3

T137

29

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

73

1

T132

2

T135

1

T396

3

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

5

1

T397

1

T387

1

T398

1

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

6

1

T399

1

T395

1

T400

2

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

8

1

T401

1

T402

1

T403

1

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

8

1

T387

1

T404

1

T405

1

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

5

1

T364

1

T406

1

T407

1

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

471

1

T114

7

T111

17

T137

25

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

399

1

T114

4

T363

1

T137

16

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

2

1

T397

1

T408

1

-

-

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

6

1

T387

1

T409

1

T410

1

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

2

1

T411

1

T383

1

-

-

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

5

1

T130

1

T412

1

T413

1

ignore_pre[PidTypePre]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

4

1

T403

1

T414

1

T415

1

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

597

1

T114

22

T111

19

T384

1

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

403

1

T111

20

T401

1

T210

14

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

5

1

T383

1

T416

1

T417

2

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

5

1

T418

1

T416

1

T419

1

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

6

1

T420

1

T376

1

T412

1

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

5

1

T412

1

T383

1

T365

1

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

2

1

T421

1

T422

1

-

-

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

565

1

T132

2

T135

3

T111

22

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

368

1

T128

1

T114

7

T213

8

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

72

1

T132

1

T134

3

T396

1

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

6

1

T399

1

T395

1

T423

2

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

3

1

T399

1

T424

1

T425

1

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

2

1

T418

1

T426

1

-

-

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

2

1

T427

1

T423

1

-

-

ignore_pre[PidTypePre]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

6

1

T402

1

T428

1

T429

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

970

1

T130

1

T430

1

T111

44

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

29

1

T222

2

T391

1

T212

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

3

1

T430

1

T431

1

T432

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

7

1

T387

1

T433

1

T414

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

10

1

T393

1

T376

1

T400

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

8

1

T434

1

T435

1

T381

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

4

1

T436

1

T366

1

T437

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

2

1

T438

1

T395

1

-

-

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

1128

1

T132

1

T135

5

T114

20

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

25

1

T210

2

T183

2

T439

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

69

1

T134

3

T135

4

T440

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

4

1

T441

1

T424

1

T437

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

4

1

T399

1

T442

1

T410

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

7

1

T130

1

T395

1

T443

1

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

2

1

T367

2

-

-

-

-

ignore_pre[PidTypePre]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

4

1

T138

1

T444

1

T445

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

943

1

T114

18

T137

59

T222

48

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

646

1

T138

1

T114

12

T210

48

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

6

1

T446

1

T447

2

T448

2

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

2

1

T449

1

T365

1

-

-

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

7

1

T450

1

T435

1

T451

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

5

1

T452

1

T438

2

T366

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

3

1

T450

1

T453

2

-

-

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

8

1

T449

1

T454

1

T444

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

949

1

T363

1

T111

78

T137

84

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

608

1

T114

17

T379

1

T210

36

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

6

1

T83

1

T397

1

T455

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

7

1

T430

1

T397

1

T381

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

5

1

T83

1

T391

1

T456

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

3

1

T435

1

T413

1

T457

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

3

1

T439

1

T458

1

T459

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

11

1

T129

1

T364

2

T368

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

790

1

T111

27

T379

4

T210

15

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

827

1

T114

16

T363

2

T137

31

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

7

1

T430

1

T460

1

T398

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

1

1

T422

1

-

-

-

-

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

9

1

T399

1

T395

2

T383

2

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

11

1

T403

1

T461

1

T450

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

5

1

T405

1

T429

2

T462

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

5

1

T420

1

T434

1

T374

2

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

670

1

T114

14

T111

22

T137

36

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

563

1

T114

7

T363

2

T137

35

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

2

1

T410

2

-

-

-

-

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

7

1

T138

1

T463

1

T437

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

7

1

T373

1

T464

1

T438

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

4

1

T465

2

T466

1

T467

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

15

1

T434

1

T468

1

T411

1

pkt_types[PidTypeSetupToken]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

11

1

T83

1

T258

1

T430

2

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

892

1

T117

1

T133

1

T114

36

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

602

1

T111

26

T210

22

T222

19

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

8

1

T128

1

T440

1

T404

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

7

1

T399

1

T376

1

T397

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

2

1

T375

1

T467

1

-

-

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

10

1

T258

1

T393

1

T420

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

8

1

T469

1

T444

1

T455

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

6

1

T390

1

T411

1

T470

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

747

1

T111

21

T390

1

T210

18

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

500

1

T130

1

T114

6

T213

8

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

5

1

T384

1

T403

1

T471

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

8

1

T464

1

T441

2

T472

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

9

1

T364

1

T461

1

T473

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

2

1

T414

1

T437

1

-

-

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

2

1

T451

1

T474

1

-

-

pkt_types[PidTypeSetupToken]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

2

1

T451

1

T475

1

-

-

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

1823

1

T198

1

T116

1

T256

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

77

1

T40

1

T130

1

T430

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

2

1

T470

1

T476

1

-

-

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

5

1

T454

1

T426

1

T477

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

7

1

T393

1

T394

1

T392

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

9

1

T471

1

T478

1

T479

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

5

1

T420

1

T404

1

T480

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

12

1

T258

1

T428

1

T382

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

5729

1

T61

1

T4

9

T5

9

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

1647

1

T3

3

T17

3

T19

3

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

372

1

T122

1

T129

1

T134

3

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

2

1

T481

1

T441

1

-

-

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

8

1

T130

1

T385

1

T441

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

7

1

T130

1

T479

1

T423

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

3

1

T480

1

T445

1

T482

1

pkt_types[PidTypeSetupToken]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

7

1

T480

2

T410

1

T482

1

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

1077

1

T114

14

T137

60

T222

55

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

732

1

T114

16

T363

2

T210

49

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

4

1

T368

1

T418

1

T483

1

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

6

1

T83

1

T381

1

T484

1

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

6

1

T109

1

T485

1

T486

1

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

5

1

T485

1

T366

1

T431

1

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

6

1

T393

1

T411

3

T366

2

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

4

1

T130

1

T368

1

T433

1

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

932

1

T363

2

T111

66

T137

86

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

640

1

T130

1

T114

16

T379

5

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

7

1

T397

1

T444

1

T487

1

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

4

1

T488

1

T441

1

T398

2

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

5

1

T403

1

T472

1

T489

1

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

6

1

T387

2

T400

2

T415

1

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

12

1

T138

1

T391

2

T464

1

pkt_types[PidTypeOutToken]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

7

1

T384

1

T490

1

T491

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

799

1

T111

27

T481

1

T379

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

806

1

T114

19

T363

1

T137

26

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

5

1

T430

1

T434

1

T465

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

7

1

T391

1

T492

1

T373

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

6

1

T428

1

T435

2

T438

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

10

1

T461

1

T450

2

T434

2

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

5

1

T490

1

T381

2

T398

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

5

1

T397

2

T434

1

T451

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

703

1

T114

15

T111

44

T137

31

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

595

1

T114

16

T363

2

T137

31

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

10

1

T393

1

T493

1

T468

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

7

1

T387

1

T494

1

T495

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

3

1

T434

1

T456

1

T496

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

5

1

T497

1

T498

1

T422

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

8

1

T435

1

T497

1

T411

1

pkt_types[PidTypeOutToken]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

12

1

T83

1

T129

1

T452

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

auto[0]

892

1

T141

1

T142

1

T143

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

auto[1]

552

1

T111

31

T488

1

T210

17

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

auto[0]

2

1

T416

1

T377

1

-

-

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

auto[1]

8

1

T399

1

T376

1

T418

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

auto[0]

52

1

T144

1

T145

1

T173

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

auto[1]

7

1

T393

1

T463

1

T484

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

auto[0]

4

1

T455

1

T419

1

T365

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

auto[1]

6

1

T393

1

T492

1

T499

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

auto[0]

51722

1

T1

1

T2

403

T18

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

auto[1]

633

1

T139

1

T114

14

T500

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

auto[0]

930

1

T122

7

T132

24

T136

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

auto[1]

10

1

T138

1

T384

1

T391

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

auto[0]

58

1

T83

1

T144

1

T364

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

auto[1]

55

1

T140

1

T501

1

T502

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

auto[0]

5

1

T450

1

T381

1

T465

1

pkt_types[PidTypeOutToken]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

auto[1]

5

1

T488

1

T395

1

T445

1

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

auto[0]

1501

1

T258

1

T130

1

T111

84

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

auto[1]

48

1

T222

3

T391

1

T183

1

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

auto[0]

6

1

T503

1

T494

1

T421

2

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

auto[1]

8

1

T403

3

T438

1

T421

1

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

auto[0]

4

1

T83

1

T484

1

T466

2

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

auto[1]

2

1

T412

1

T479

1

-

-

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

auto[0]

4

1

T504

1

T366

1

T505

2

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

auto[1]

5

1

T428

1

T438

1

T466

1

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

auto[0]

7297

1

T3

3

T17

3

T19

3

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

auto[1]

28

1

T210

3

T222

1

T183

2

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

auto[0]

386

1

T122

5

T129

2

T134

3

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

auto[1]

4

1

T506

1

T427

1

T424

1

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

auto[0]

8

1

T397

1

T418

2

T385

1

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

auto[1]

9

1

T401

1

T402

1

T443

1

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

auto[0]

2

1

T388

1

T442

1

-

-

pkt_types[PidTypeOutToken]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

auto[1]

7

1

T138

3

T507

1

T480

1