Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/usbdev-sim-vcs/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	1747	1			T25	1		T117	1		T121	3
range_16_to_126	156471	1			T1	1		T3	1		T29	1
fifteen	2487	1			T43	1		T90	1		T358	1
range_2_to_14	15489	1			T2	2		T43	1		T45	1
seven	834	1			T2	2		T222	9		T121	2
one	1403	1			T121	4		T440	1		T120	7
zero	1665	1			T94	2		T58	8		T169	5

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Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

seven

14493

1

T3

1

T30

2

T43

2

three

13266

1

T29

1

T30

1

T43

6

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Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	289	1			T121	1		T201	1		T199	1
range_127	three	78	1			T506	1		T507	1		T508	1
range_16_to_126	seven	12741	1			T3	1		T30	2		T43	2
range_16_to_126	three	11334	1			T29	1		T30	1		T43	5
fifteen	seven	124	1			T105	43		T121	1		T201	1
fifteen	three	126	1			T105	42		T121	1		T120	1
range_2_to_14	seven	1123	1			T121	5		T265	46		T239	7
range_2_to_14	three	832	1			T43	1		T121	3		T343	1
seven	seven	42	1			T239	7		T394	2		T509	1
seven	three	11	1			T510	1		T508	1		T511	1
one	seven	180	1			T120	1		T201	1		T509	1
one	three	70	1			T120	3		T393	2		T507	1
zero	seven	36	1			T121	1		T122	1		T393	1
zero	three	826	1			T120	1		T512	780		T114	13