Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	987	1			T65	3		T113	103		T157	77
range_16_to_126	156159	1			T2	1		T3	1		T18	13
fifteen	1824	1			T29	11		T65	5		T52	7
range_2_to_14	16014	1			T17	1		T19	12		T22	2
seven	1298	1			T74	1		T65	9		T111	4
one	2037	1			T27	24		T65	2		T111	10
zero	807	1			T26	1		T85	5		T65	6

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Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

seven

13494

1

T3

1

T17

1

T19

1

three

14654

1

T19

1

T22

6

T27

2

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Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	70	1			T65	1		T157	11		T454	25
range_127	three	58	1			T157	11		T454	25		T293	1
range_16_to_126	seven	12083	1			T3	1		T84	1		T107	2
range_16_to_126	three	13587	1			T22	6		T34	2		T4	19
fifteen	seven	143	1			T293	1		T455	21		T456	1
fifteen	three	154	1			T111	1		T356	1		T455	21
range_2_to_14	seven	1043	1			T17	1		T19	1		T65	8
range_2_to_14	three	706	1			T19	1		T65	3		T119	2
seven	seven	87	1			T65	1		T293	1		T456	1
seven	three	81	1			T175	1		T293	1		T294	1
one	seven	112	1			T27	2		T65	1		T111	1
one	three	122	1			T27	2		T111	1		T457	1
zero	seven	43	1			T65	2		T175	1		T356	15
zero	three	27	1			T112	1		T356	18		T456	1