Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::crc16_cg

Group : usbdev_env_pkg::usbdev_env_cov::crc16_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_10/usbdev-sim-vcs/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_crc16	2	0	2	100.00	100	1	1	0
cp_dir	2	0	2	100.00	100	1	1	2

Crosses for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_crc16_X_dir	4	0	4	100.00	100	1	1	0

Summary for Variable cp_crc16

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_crc16

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

six_ones

12

1

T116

2

T262

1

T460

1

all_ones

10

1

T575

2

T113

3

T576

1

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Summary for Variable cp_dir

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_dir

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

111911

1

T1

1

T3

1

T30

1

auto[1]

45683

1

T31

10

T32

2

T34

10

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Summary for Cross cr_crc16_X_dir

Samples crossed: cp_crc16 cp_dir

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cr_crc16_X_dir

Bins

cp_crc16

cp_dir

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

six_ones

auto[0]

9

1

T116

1

T262

1

T460

1

six_ones

auto[1]

3

1

T116

1

T577

1

T578

1

all_ones

auto[0]

7

1

T575

1

T113

2

T576

1

all_ones

auto[1]

3

1

T575

1

T113

1

T579

1