26b0ee226
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | chip_sw_uart_tx_rx | chip_sw_uart_tx_rx | 13.524m | 5.193ms | 5 | 5 | 100.00 |
V1 | chip_sw_uart_rx_overflow | chip_sw_uart_tx_rx | 13.524m | 5.193ms | 5 | 5 | 100.00 |
chip_sw_uart_tx_rx_idx1 | 15.527m | 6.254ms | 5 | 5 | 100.00 | ||
chip_sw_uart_tx_rx_idx2 | 17.096m | 6.034ms | 5 | 5 | 100.00 | ||
chip_sw_uart_tx_rx_idx3 | 16.158m | 5.731ms | 5 | 5 | 100.00 | ||
V1 | chip_sw_uart_rand_baudrate | chip_sw_uart_rand_baudrate | 58.048m | 23.036ms | 20 | 20 | 100.00 |
V1 | chip_sw_uart_tx_rx_alt_clk_freq | chip_sw_uart_tx_rx_alt_clk_freq | 34.226m | 13.403ms | 5 | 5 | 100.00 |
chip_sw_uart_tx_rx_alt_clk_freq_low_speed | 33.516m | 23.137ms | 5 | 5 | 100.00 | ||
V1 | chip_sw_gpio_out | chip_sw_gpio | 6.396m | 3.632ms | 3 | 3 | 100.00 |
V1 | chip_sw_gpio_in | chip_sw_gpio | 6.396m | 3.632ms | 3 | 3 | 100.00 |
V1 | chip_sw_gpio_irq | chip_sw_gpio | 6.396m | 3.632ms | 3 | 3 | 100.00 |
V1 | chip_sw_example_tests | chip_sw_example_flash | 3.225m | 2.344ms | 3 | 3 | 100.00 |
chip_sw_example_rom | 2.254m | 1.793ms | 3 | 3 | 100.00 | ||
chip_sw_example_manufacturer | 3.749m | 2.443ms | 3 | 3 | 100.00 | ||
chip_sw_example_concurrency | 4.975m | 3.462ms | 3 | 3 | 100.00 | ||
chip_sw_uart_smoketest_signed | 33.171m | 8.611ms | 3 | 3 | 100.00 | ||
V1 | csr_hw_reset | chip_csr_hw_reset | 7.378m | 5.867ms | 5 | 5 | 100.00 |
V1 | csr_rw | chip_csr_rw | 9.128m | 5.643ms | 20 | 20 | 100.00 |
V1 | csr_bit_bash | chip_csr_bit_bash | 1.400h | 48.600ms | 5 | 5 | 100.00 |
V1 | csr_aliasing | chip_csr_aliasing | 2.626h | 63.288ms | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | chip_csr_mem_rw_with_rand_reset | 7.361m | 7.324ms | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | chip_csr_aliasing | 2.626h | 63.288ms | 5 | 5 | 100.00 |
chip_csr_rw | 9.128m | 5.643ms | 20 | 20 | 100.00 | ||
V1 | xbar_smoke | xbar_smoke | 12.110s | 239.404us | 100 | 100 | 100.00 |
V1 | TOTAL | 223 | 223 | 100.00 | |||
V2 | chip_sw_spi_device_tx_rx | chip_sw_spi_device_tx_rx | 6.950m | 3.646ms | 3 | 3 | 100.00 |
V2 | chip_sw_spi_device_flash_mode | chip_sw_uart_tx_rx_bootstrap | 3.358h | 70.487ms | 3 | 3 | 100.00 |
V2 | chip_sw_spi_device_pass_through | chip_sw_spi_device_pass_through | 14.574m | 8.035ms | 3 | 3 | 100.00 |
V2 | chip_sw_spi_device_pass_through_collision | chip_sw_spi_device_pass_through_collision | 11.797m | 4.287ms | 3 | 3 | 100.00 |
V2 | chip_sw_spi_device_tpm | chip_sw_spi_device_tpm | 7.570m | 4.109ms | 3 | 3 | 100.00 |
V2 | chip_sw_spi_host_tx_rx | chip_sw_spi_host_tx_rx | 4.613m | 2.750ms | 3 | 3 | 100.00 |
V2 | chip_sw_i2c_host_tx_rx | chip_sw_i2c_host_tx_rx | 11.340m | 4.780ms | 3 | 3 | 100.00 |
chip_sw_i2c_host_tx_rx_idx1 | 10.930m | 3.785ms | 3 | 3 | 100.00 | ||
chip_sw_i2c_host_tx_rx_idx2 | 6.821m | 3.842ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_i2c_device_tx_rx | chip_sw_i2c_device_tx_rx | 11.227m | 4.953ms | 3 | 3 | 100.00 |
V2 | chip_sw_usbdev_dpi | chip_sw_usbdev_dpi | 22.828m | 7.504ms | 1 | 1 | 100.00 |
V2 | chip_pin_mux | chip_padctrl_attributes | 5.918m | 5.299ms | 10 | 10 | 100.00 |
V2 | chip_padctrl_attributes | chip_padctrl_attributes | 5.918m | 5.299ms | 10 | 10 | 100.00 |
V2 | chip_sw_sleep_pin_mio_dio_val | chip_sw_sleep_pin_mio_dio_val | 5.694m | 3.190ms | 3 | 3 | 100.00 |
V2 | chip_sw_sleep_pin_wake | chip_sw_sleep_pin_wake | 7.159m | 4.434ms | 3 | 3 | 100.00 |
V2 | chip_sw_sleep_pin_retention | chip_sw_sleep_pin_retention | 4.933m | 3.165ms | 3 | 3 | 100.00 |
V2 | chip_sw_tap_strap_sampling | chip_tap_straps_dev | 26.046m | 16.722ms | 5 | 5 | 100.00 |
chip_tap_straps_testunlock0 | 10.717m | 7.454ms | 5 | 5 | 100.00 | ||
chip_tap_straps_rma | 16.423m | 9.632ms | 5 | 5 | 100.00 | ||
chip_tap_straps_prod | 23.045m | 12.508ms | 5 | 5 | 100.00 | ||
V2 | chip_sw_pattgen_ios | chip_sw_pattgen_ios | 3.799m | 2.227ms | 3 | 3 | 100.00 |
V2 | chip_sw_sleep_pwm_pulses | chip_sw_sleep_pwm_pulses | 23.384m | 8.672ms | 3 | 3 | 100.00 |
V2 | chip_sw_data_integrity | chip_sw_data_integrity_escalation | 12.594m | 5.924ms | 6 | 6 | 100.00 |
V2 | chip_sw_instruction_integrity | chip_sw_data_integrity_escalation | 12.594m | 5.924ms | 6 | 6 | 100.00 |
V2 | chip_jtag_csr_rw | chip_jtag_csr_rw | 32.701m | 19.676ms | 3 | 3 | 100.00 |
V2 | chip_jtag_mem_access | chip_jtag_mem_access | 22.126m | 13.608ms | 3 | 3 | 100.00 |
V2 | chip_rv_dm_ndm_reset_req | chip_rv_dm_ndm_reset_req | 7.125m | 3.951ms | 3 | 3 | 100.00 |
V2 | chip_sw_rv_dm_ndm_reset_req_when_cpu_halted | chip_sw_rv_dm_ndm_reset_req_when_cpu_halted | 9.248m | 5.506ms | 3 | 3 | 100.00 |
V2 | chip_rv_dm_access_after_wakeup | chip_sw_rv_dm_access_after_wakeup | 8.286m | 5.609ms | 3 | 3 | 100.00 |
V2 | chip_sw_rv_dm_jtag_tap_sel | chip_tap_straps_rma | 16.423m | 9.632ms | 5 | 5 | 100.00 |
V2 | chip_rv_dm_lc_disabled | chip_rv_dm_lc_disabled | 6.831m | 12.239ms | 3 | 3 | 100.00 |
V2 | chip_sw_timer | chip_sw_rv_timer_irq | 4.836m | 3.388ms | 3 | 3 | 100.00 |
V2 | chip_sw_aon_timer_wakeup_irq | chip_sw_aon_timer_irq | 7.951m | 4.046ms | 3 | 3 | 100.00 |
V2 | chip_sw_aon_timer_sleep_wakeup | chip_sw_pwrmgr_smoketest | 5.850m | 4.114ms | 3 | 3 | 100.00 |
V2 | chip_sw_aon_timer_wdog_bark_irq | chip_sw_aon_timer_irq | 7.951m | 4.046ms | 3 | 3 | 100.00 |
V2 | chip_sw_aon_timer_wdog_lc_escalate | chip_sw_aon_timer_wdog_lc_escalate | 10.352m | 4.895ms | 3 | 3 | 100.00 |
V2 | chip_sw_aon_timer_wdog_bite_reset | chip_sw_aon_timer_wdog_bite_reset | 18.424m | 9.510ms | 3 | 3 | 100.00 |
V2 | chip_sw_aon_timer_sleep_wdog_bite_reset | chip_sw_aon_timer_wdog_bite_reset | 18.424m | 9.510ms | 3 | 3 | 100.00 |
V2 | chip_sw_aon_timer_sleep_wdog_sleep_pause | chip_sw_aon_timer_sleep_wdog_sleep_pause | 9.720m | 6.555ms | 5 | 5 | 100.00 |
V2 | chip_sw_plic_all_irqs | chip_plic_all_irqs | 29.404m | 8.197ms | 3 | 3 | 100.00 |
V2 | chip_sw_plic_sw_irq | chip_sw_plic_sw_irq | 3.519m | 2.523ms | 3 | 3 | 100.00 |
V2 | chip_sw_clkmgr_idle_trans | chip_sw_otbn_randomness | 9.638m | 5.572ms | 3 | 3 | 100.00 |
chip_sw_aes_idle | 4.212m | 3.322ms | 3 | 3 | 100.00 | ||
chip_sw_hmac_enc_idle | 5.378m | 3.483ms | 3 | 3 | 100.00 | ||
chip_sw_kmac_idle | 4.513m | 3.031ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_clkmgr_off_trans | chip_sw_clkmgr_off_aes_trans | 6.125m | 3.481ms | 3 | 3 | 100.00 |
chip_sw_clkmgr_off_hmac_trans | 10.757m | 5.230ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_off_kmac_trans | 9.276m | 3.836ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_off_otbn_trans | 7.088m | 4.893ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_clkmgr_off_peri | chip_sw_clkmgr_off_peri | 22.364m | 12.587ms | 3 | 3 | 100.00 |
V2 | chip_sw_clkmgr_div | chip_sw_clkmgr_external_clk_src_for_lc | 8.501m | 6.668ms | 3 | 3 | 100.00 |
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 | 10.034m | 4.136ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 | 10.624m | 4.737ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev | 10.330m | 3.733ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev | 12.436m | 4.832ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma | 12.098m | 4.367ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma | 10.696m | 4.607ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_clkmgr_external_clk_src_for_lc | chip_sw_clkmgr_external_clk_src_for_lc | 8.501m | 6.668ms | 3 | 3 | 100.00 |
V2 | chip_sw_clkmgr_external_clk_src_for_sw | chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 | 10.034m | 4.136ms | 3 | 3 | 100.00 |
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 | 10.624m | 4.737ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev | 10.330m | 3.733ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev | 12.436m | 4.832ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma | 12.098m | 4.367ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma | 10.696m | 4.607ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_clkmgr_jitter | chip_sw_flash_ctrl_ops_jitter_en | 14.636m | 5.469ms | 3 | 3 | 100.00 |
chip_sw_flash_ctrl_access_jitter_en | 19.607m | 6.147ms | 3 | 3 | 100.00 | ||
chip_sw_otbn_ecdsa_op_irq_jitter_en | 1.050h | 21.058ms | 3 | 3 | 100.00 | ||
chip_sw_aes_enc_jitter_en | 4.116m | 3.209ms | 3 | 3 | 100.00 | ||
chip_sw_edn_entropy_reqs_jitter | 18.848m | 5.165ms | 3 | 3 | 100.00 | ||
chip_sw_hmac_enc_jitter_en | 4.606m | 2.771ms | 3 | 3 | 100.00 | ||
chip_sw_keymgr_key_derivation_jitter_en | 8.491m | 4.375ms | 3 | 3 | 100.00 | ||
chip_sw_kmac_mode_kmac_jitter_en | 4.992m | 2.966ms | 3 | 3 | 100.00 | ||
chip_sw_sram_ctrl_scrambled_access_jitter_en | 8.434m | 5.258ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_jitter | 4.590m | 2.799ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_clkmgr_extended_range | chip_sw_clkmgr_jitter_reduced_freq | 3.584m | 2.432ms | 3 | 3 | 100.00 |
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq | 16.197m | 7.105ms | 3 | 3 | 100.00 | ||
chip_sw_flash_ctrl_access_jitter_en_reduced_freq | 20.943m | 8.248ms | 3 | 3 | 100.00 | ||
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq | 1.055h | 28.249ms | 3 | 3 | 100.00 | ||
chip_sw_aes_enc_jitter_en_reduced_freq | 3.938m | 3.290ms | 3 | 3 | 100.00 | ||
chip_sw_hmac_enc_jitter_en_reduced_freq | 5.054m | 3.537ms | 3 | 3 | 100.00 | ||
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq | 10.444m | 5.523ms | 3 | 3 | 100.00 | ||
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq | 5.175m | 2.962ms | 3 | 3 | 100.00 | ||
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq | 10.106m | 4.273ms | 3 | 3 | 100.00 | ||
chip_sw_flash_init_reduced_freq | 35.023m | 19.382ms | 3 | 3 | 100.00 | ||
chip_sw_csrng_edn_concurrency_reduced_freq | 46.910m | 16.195ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_clkmgr_deep_sleep_frequency | chip_sw_ast_clk_outputs | 19.966m | 7.175ms | 3 | 3 | 100.00 |
V2 | chip_sw_clkmgr_sleep_frequency | chip_sw_clkmgr_sleep_frequency | 10.927m | 4.727ms | 3 | 3 | 100.00 |
V2 | chip_sw_clkmgr_reset_frequency | chip_sw_clkmgr_reset_frequency | 7.281m | 3.425ms | 3 | 3 | 100.00 |
V2 | chip_sw_clkmgr_escalation_reset | chip_sw_all_escalation_resets | 13.911m | 5.007ms | 100 | 100 | 100.00 |
V2 | chip_sw_pwrmgr_external_full_reset | chip_sw_pwrmgr_full_aon_reset | 6.953m | 9.851ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_random_sleep_all_wake_ups | chip_sw_pwrmgr_random_sleep_all_wake_ups | 24.116m | 20.968ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_normal_sleep_all_wake_ups | chip_sw_pwrmgr_normal_sleep_all_wake_ups | 5.714m | 6.944ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_sleep_all_reset_reqs | chip_sw_aon_timer_wdog_bite_reset | 18.424m | 9.510ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_deep_sleep_all_wake_ups | chip_sw_pwrmgr_deep_sleep_all_wake_ups | 20.216m | 17.666ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_deep_sleep_all_reset_reqs | chip_sw_pwrmgr_deep_sleep_all_reset_reqs | 33.219m | 20.025ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_normal_sleep_all_reset_reqs | chip_sw_pwrmgr_normal_sleep_all_reset_reqs | 33.303m | 17.841ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_wdog_reset | chip_sw_pwrmgr_wdog_reset | 6.783m | 4.723ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_aon_power_glitch_reset | chip_sw_pwrmgr_full_aon_reset | 6.953m | 9.851ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_main_power_glitch_reset | chip_sw_pwrmgr_main_power_glitch_reset | 7.912m | 3.706ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_random_sleep_power_glitch_reset | chip_sw_pwrmgr_random_sleep_power_glitch_reset | 54.152m | 40.871ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_deep_sleep_power_glitch_reset | chip_sw_pwrmgr_deep_sleep_power_glitch_reset | 6.907m | 5.660ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_sleep_power_glitch_reset | chip_sw_pwrmgr_sleep_power_glitch_reset | 7.468m | 6.663ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_random_sleep_all_reset_reqs | chip_sw_pwrmgr_random_sleep_all_reset_reqs | 47.086m | 23.470ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_sysrst_ctrl_reset | chip_sw_pwrmgr_sysrst_ctrl_reset | 22.082m | 9.142ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_b2b_sleep_reset_req | chip_sw_pwrmgr_b2b_sleep_reset_req | 46.854m | 26.755ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_sleep_disabled | chip_sw_pwrmgr_sleep_disabled | 4.480m | 2.614ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_escalation_reset | chip_sw_all_escalation_resets | 13.911m | 5.007ms | 100 | 100 | 100.00 |
V2 | chip_sw_rstmgr_non_sys_reset_info | chip_sw_pwrmgr_smoketest | 5.850m | 4.114ms | 3 | 3 | 100.00 |
V2 | chip_sw_rstmgr_sys_reset_info | chip_rv_dm_ndm_reset_req | 7.125m | 3.951ms | 3 | 3 | 100.00 |
V2 | chip_sw_rstmgr_cpu_info | chip_sw_rstmgr_cpu_info | 7.024m | 5.110ms | 3 | 3 | 100.00 |
V2 | chip_sw_rstmgr_sw_req_reset | chip_sw_rstmgr_sw_req | 7.274m | 3.732ms | 3 | 3 | 100.00 |
V2 | chip_sw_rstmgr_alert_info | chip_sw_rstmgr_alert_info | 29.622m | 13.320ms | 3 | 3 | 100.00 |
V2 | chip_sw_rstmgr_sw_rst | chip_sw_rstmgr_sw_rst | 3.832m | 2.861ms | 3 | 3 | 100.00 |
V2 | chip_sw_rstmgr_escalation_reset | chip_sw_all_escalation_resets | 13.911m | 5.007ms | 100 | 100 | 100.00 |
V2 | chip_sw_alert_handler_alerts | chip_sw_alert_test | 5.048m | 3.307ms | 3 | 3 | 100.00 |
V2 | chip_sw_alert_handler_escalations | chip_sw_alert_handler_escalation | 8.699m | 5.961ms | 3 | 3 | 100.00 |
V2 | chip_sw_all_escalation_resets | chip_sw_all_escalation_resets | 13.911m | 5.007ms | 100 | 100 | 100.00 |
V2 | chip_sw_alert_handler_irqs | chip_plic_all_irqs | 29.404m | 8.197ms | 3 | 3 | 100.00 |
V2 | chip_sw_alert_handler_entropy | chip_sw_alert_handler_entropy | 6.128m | 3.142ms | 3 | 3 | 100.00 |
V2 | chip_sw_alert_handler_crashdump | chip_sw_rstmgr_alert_info | 29.622m | 13.320ms | 3 | 3 | 100.00 |
V2 | chip_sw_alert_handler_ping_timeout | chip_sw_alert_handler_ping_timeout | 6.779m | 4.085ms | 3 | 3 | 100.00 |
V2 | chip_sw_alert_handler_lpg_sleep_mode_alerts | chip_sw_alert_handler_lpg_sleep_mode_alerts | 11.108m | 4.609ms | 90 | 90 | 100.00 |
V2 | chip_sw_alert_handler_lpg_sleep_mode_pings | chip_sw_alert_handler_lpg_sleep_mode_pings | 31.992m | 13.657ms | 3 | 3 | 100.00 |
V2 | chip_sw_alert_handler_lpg_clock_off | chip_sw_alert_handler_lpg_clkoff | 27.256m | 7.040ms | 3 | 3 | 100.00 |
V2 | chip_sw_alert_handler_lpg_reset_toggle | chip_sw_alert_handler_lpg_reset_toggle | 27.904m | 7.189ms | 3 | 3 | 100.00 |
V2 | chip_sw_alert_handler_reverse_ping_in_deep_sleep | chip_sw_alert_handler_reverse_ping_in_deep_sleep | 3.298h | 254.682ms | 3 | 3 | 100.00 |
V2 | chip_sw_lc_ctrl_alert_handler_escalation | chip_sw_alert_handler_escalation | 8.699m | 5.961ms | 3 | 3 | 100.00 |
V2 | chip_sw_lc_ctrl_jtag_access | chip_tap_straps_dev | 26.046m | 16.722ms | 5 | 5 | 100.00 |
chip_tap_straps_rma | 16.423m | 9.632ms | 5 | 5 | 100.00 | ||
chip_tap_straps_prod | 23.045m | 12.508ms | 5 | 5 | 100.00 | ||
V2 | chip_sw_lc_ctrl_otp_hw_cfg | chip_sw_lc_ctrl_otp_hw_cfg | 5.283m | 3.377ms | 3 | 3 | 100.00 |
V2 | chip_sw_lc_ctrl_init | chip_sw_lc_ctrl_transition | 18.025m | 13.115ms | 15 | 15 | 100.00 |
V2 | chip_sw_lc_ctrl_transitions | chip_sw_lc_ctrl_transition | 18.025m | 13.115ms | 15 | 15 | 100.00 |
V2 | chip_sw_lc_ctrl_kmac_req | chip_sw_lc_ctrl_transition | 18.025m | 13.115ms | 15 | 15 | 100.00 |
V2 | chip_sw_lc_ctrl_key_div | chip_sw_keymgr_key_derivation_prod | 7.965m | 4.575ms | 3 | 3 | 100.00 |
V2 | chip_sw_lc_ctrl_broadcast | chip_sw_flash_ctrl_lc_rw_en | 9.572m | 5.109ms | 3 | 3 | 100.00 |
chip_sw_flash_rma_unlocked | 1.375h | 43.560ms | 3 | 3 | 100.00 | ||
chip_sw_otp_ctrl_lc_signals_test_unlocked0 | 12.829m | 4.315ms | 3 | 3 | 100.00 | ||
chip_sw_otp_ctrl_lc_signals_dev | 23.437m | 7.467ms | 3 | 3 | 100.00 | ||
chip_sw_otp_ctrl_lc_signals_prod | 21.988m | 7.695ms | 3 | 3 | 100.00 | ||
chip_sw_otp_ctrl_lc_signals_rma | 20.143m | 8.692ms | 3 | 3 | 100.00 | ||
chip_sw_lc_ctrl_transition | 18.025m | 13.115ms | 15 | 15 | 100.00 | ||
chip_sw_keymgr_key_derivation | 9.519m | 5.205ms | 3 | 3 | 100.00 | ||
chip_sw_rom_ctrl_integrity_check | 11.529m | 8.731ms | 3 | 3 | 100.00 | ||
chip_sw_sram_ctrl_execution_main | 13.605m | 10.189ms | 3 | 3 | 100.00 | ||
chip_prim_tl_access | 5.958m | 11.184ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_lc | 8.501m | 6.668ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 | 10.034m | 4.136ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 | 10.624m | 4.737ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev | 10.330m | 3.733ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev | 12.436m | 4.832ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma | 12.098m | 4.367ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma | 10.696m | 4.607ms | 3 | 3 | 100.00 | ||
chip_tap_straps_dev | 26.046m | 16.722ms | 5 | 5 | 100.00 | ||
chip_tap_straps_rma | 16.423m | 9.632ms | 5 | 5 | 100.00 | ||
chip_tap_straps_prod | 23.045m | 12.508ms | 5 | 5 | 100.00 | ||
chip_rv_dm_lc_disabled | 6.831m | 12.239ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_sysrst_ctrl_inputs | chip_sw_sysrst_ctrl_inputs | 5.053m | 3.067ms | 3 | 3 | 100.00 |
V2 | chip_sw_sysrst_ctrl_outputs | chip_sw_sysrst_ctrl_outputs | 6.258m | 3.686ms | 3 | 3 | 100.00 |
V2 | chip_sw_sysrst_ctrl_in_irq | chip_sw_sysrst_ctrl_in_irq | 10.846m | 4.896ms | 3 | 3 | 100.00 |
V2 | chip_sw_sysrst_ctrl_sleep_wakeup | chip_sw_sysrst_ctrl_reset | 24.449m | 21.518ms | 3 | 3 | 100.00 |
V2 | chip_sw_sysrst_ctrl_reset | chip_sw_sysrst_ctrl_reset | 24.449m | 21.518ms | 3 | 3 | 100.00 |
V2 | chip_sw_sysrst_ctrl_sleep_reset | chip_sw_sysrst_ctrl_reset | 24.449m | 21.518ms | 3 | 3 | 100.00 |
V2 | chip_sw_sysrst_ctrl_ec_rst_l | chip_sw_sysrst_ctrl_ec_rst_l | 48.025m | 20.490ms | 3 | 3 | 100.00 |
V2 | chip_sw_sysrst_ctrl_flash_wp_l | chip_sw_sysrst_ctrl_ec_rst_l | 48.025m | 20.490ms | 3 | 3 | 100.00 |
V2 | chip_sw_sysrst_ctrl_ulp_z3_wakeup | chip_sw_sysrst_ctrl_ulp_z3_wakeup | 8.865m | 5.637ms | 3 | 3 | 100.00 |
chip_sw_adc_ctrl_sleep_debug_cable_wakeup | 9.722m | 18.766ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_adc_ctrl_debug_cable_irq | chip_sw_adc_ctrl_sleep_debug_cable_wakeup | 9.722m | 18.766ms | 3 | 3 | 100.00 |
V2 | chip_sw_adc_ctrl_sleep_debug_cable_wakeup | chip_sw_adc_ctrl_sleep_debug_cable_wakeup | 9.722m | 18.766ms | 3 | 3 | 100.00 |
V2 | chip_sw_aes_enc | chip_sw_aes_enc | 5.494m | 2.783ms | 3 | 3 | 100.00 |
chip_sw_aes_enc_jitter_en | 4.116m | 3.209ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_aes_entropy | chip_sw_aes_entropy | 3.822m | 3.523ms | 3 | 3 | 100.00 |
V2 | chip_sw_aes_idle | chip_sw_aes_idle | 4.212m | 3.322ms | 3 | 3 | 100.00 |
V2 | chip_sw_aes_sideload | chip_sw_keymgr_sideload_aes | 11.424m | 5.539ms | 3 | 3 | 100.00 |
V2 | chip_sw_hmac_enc | chip_sw_hmac_enc | 5.927m | 3.161ms | 3 | 3 | 100.00 |
chip_sw_hmac_enc_jitter_en | 4.606m | 2.771ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_hmac_idle | chip_sw_hmac_enc_idle | 5.378m | 3.483ms | 3 | 3 | 100.00 |
V2 | chip_sw_kmac_enc | chip_sw_kmac_mode_cshake | 4.022m | 2.694ms | 3 | 3 | 100.00 |
chip_sw_kmac_mode_kmac | 4.531m | 2.682ms | 3 | 3 | 100.00 | ||
chip_sw_kmac_mode_kmac_jitter_en | 4.992m | 2.966ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_kmac_app_keymgr | chip_sw_keymgr_key_derivation | 9.519m | 5.205ms | 3 | 3 | 100.00 |
V2 | chip_sw_kmac_app_lc | chip_sw_lc_ctrl_transition | 18.025m | 13.115ms | 15 | 15 | 100.00 |
V2 | chip_sw_kmac_app_rom | chip_sw_kmac_app_rom | 3.727m | 3.328ms | 3 | 3 | 100.00 |
V2 | chip_sw_kmac_entropy | chip_sw_kmac_entropy | 3.544m | 2.920ms | 3 | 3 | 100.00 |
V2 | chip_sw_kmac_idle | chip_sw_kmac_idle | 4.513m | 3.031ms | 3 | 3 | 100.00 |
V2 | chip_sw_entropy_src_ast_rng_req | chip_sw_entropy_src_ast_rng_req | 3.255m | 2.646ms | 3 | 3 | 100.00 |
V2 | chip_sw_entropy_src_csrng | chip_sw_entropy_src_csrng | 24.426m | 6.563ms | 3 | 3 | 100.00 |
V2 | chip_sw_entropy_src_fuse_en_fw_read | chip_sw_entropy_src_fuse_en_fw_read_test | 10.334m | 4.793ms | 3 | 3 | 100.00 |
V2 | chip_sw_entropy_src_known_answer_tests | chip_sw_entropy_src_kat_test | 3.493m | 3.368ms | 3 | 3 | 100.00 |
V2 | chip_sw_csrng_edn_cmd | chip_sw_entropy_src_csrng | 24.426m | 6.563ms | 3 | 3 | 100.00 |
V2 | chip_sw_csrng_fuse_en_sw_app_read | chip_sw_csrng_fuse_en_sw_app_read_test | 6.834m | 5.232ms | 3 | 3 | 100.00 |
V2 | chip_sw_csrng_lc_hw_debug_en | chip_sw_csrng_lc_hw_debug_en_test | 11.786m | 6.297ms | 3 | 3 | 100.00 |
V2 | chip_sw_csrng_known_answer_tests | chip_sw_csrng_kat_test | 5.632m | 3.247ms | 3 | 3 | 100.00 |
V2 | chip_sw_edn_entropy_reqs | chip_sw_csrng_edn_concurrency | 39.399m | 10.404ms | 3 | 3 | 100.00 |
chip_sw_edn_entropy_reqs | 18.307m | 5.611ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_keymgr_key_derivation | chip_sw_keymgr_key_derivation | 9.519m | 5.205ms | 3 | 3 | 100.00 |
chip_sw_keymgr_key_derivation_jitter_en | 8.491m | 4.375ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_keymgr_sideload_kmac | chip_sw_keymgr_sideload_kmac | 8.659m | 4.717ms | 3 | 3 | 100.00 |
V2 | chip_sw_keymgr_sideload_aes | chip_sw_keymgr_sideload_aes | 11.424m | 5.539ms | 3 | 3 | 100.00 |
V2 | chip_sw_keymgr_sideload_otbn | chip_sw_keymgr_sideload_otbn | 44.909m | 9.534ms | 3 | 3 | 100.00 |
V2 | chip_sw_otbn_op | chip_sw_otbn_ecdsa_op_irq | 55.199m | 20.401ms | 3 | 3 | 100.00 |
chip_sw_otbn_ecdsa_op_irq_jitter_en | 1.050h | 21.058ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_otbn_rnd_entropy | chip_sw_otbn_randomness | 9.638m | 5.572ms | 3 | 3 | 100.00 |
V2 | chip_sw_otbn_urnd_entropy | chip_sw_otbn_randomness | 9.638m | 5.572ms | 3 | 3 | 100.00 |
V2 | chip_sw_otbn_idle | chip_sw_otbn_randomness | 9.638m | 5.572ms | 3 | 3 | 100.00 |
V2 | chip_sw_otbn_mem_scramble | chip_sw_otbn_mem_scramble | 9.308m | 3.004ms | 3 | 3 | 100.00 |
V2 | chip_sw_rom_access | chip_sw_rom_ctrl_integrity_check | 11.529m | 8.731ms | 3 | 3 | 100.00 |
V2 | chip_sw_rom_ctrl_integrity_check | chip_sw_rom_ctrl_integrity_check | 11.529m | 8.731ms | 3 | 3 | 100.00 |
V2 | chip_sw_sram_scrambled_access | chip_sw_sram_ctrl_scrambled_access | 7.656m | 3.825ms | 3 | 3 | 100.00 |
chip_sw_sram_ctrl_scrambled_access_jitter_en | 8.434m | 5.258ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_sleep_sram_ret_contents | chip_sw_sleep_sram_ret_contents | 19.443m | 10.599ms | 3 | 3 | 100.00 |
V2 | chip_sw_sram_execution | chip_sw_sram_ctrl_execution_main | 13.605m | 10.189ms | 3 | 3 | 100.00 |
V2 | chip_sw_sram_lc_escalation | chip_sw_all_escalation_resets | 13.911m | 5.007ms | 100 | 100 | 100.00 |
chip_sw_data_integrity_escalation | 12.594m | 5.924ms | 6 | 6 | 100.00 | ||
V2 | chip_otp_ctrl_init | chip_sw_lc_ctrl_transition | 18.025m | 13.115ms | 15 | 15 | 100.00 |
V2 | chip_sw_otp_ctrl_keys | chip_sw_flash_init | 36.018m | 22.213ms | 3 | 3 | 100.00 |
chip_sw_otbn_mem_scramble | 9.308m | 3.004ms | 3 | 3 | 100.00 | ||
chip_sw_keymgr_key_derivation | 9.519m | 5.205ms | 3 | 3 | 100.00 | ||
chip_sw_sram_ctrl_scrambled_access | 7.656m | 3.825ms | 3 | 3 | 100.00 | ||
chip_sw_rv_core_ibex_icache_invalidate | 3.632m | 2.664ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_otp_ctrl_entropy | chip_sw_flash_init | 36.018m | 22.213ms | 3 | 3 | 100.00 |
chip_sw_otbn_mem_scramble | 9.308m | 3.004ms | 3 | 3 | 100.00 | ||
chip_sw_keymgr_key_derivation | 9.519m | 5.205ms | 3 | 3 | 100.00 | ||
chip_sw_sram_ctrl_scrambled_access | 7.656m | 3.825ms | 3 | 3 | 100.00 | ||
chip_sw_rv_core_ibex_icache_invalidate | 3.632m | 2.664ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_otp_ctrl_program | chip_sw_lc_ctrl_transition | 18.025m | 13.115ms | 15 | 15 | 100.00 |
V2 | chip_sw_otp_ctrl_program_error | chip_sw_lc_ctrl_program_error | 10.020m | 4.331ms | 3 | 3 | 100.00 |
V2 | chip_sw_otp_ctrl_hw_cfg | chip_sw_lc_ctrl_otp_hw_cfg | 5.283m | 3.377ms | 3 | 3 | 100.00 |
V2 | chip_sw_otp_ctrl_lc_signals | chip_sw_otp_ctrl_lc_signals_test_unlocked0 | 12.829m | 4.315ms | 3 | 3 | 100.00 |
chip_sw_otp_ctrl_lc_signals_dev | 23.437m | 7.467ms | 3 | 3 | 100.00 | ||
chip_sw_otp_ctrl_lc_signals_prod | 21.988m | 7.695ms | 3 | 3 | 100.00 | ||
chip_sw_otp_ctrl_lc_signals_rma | 20.143m | 8.692ms | 3 | 3 | 100.00 | ||
chip_sw_lc_ctrl_transition | 18.025m | 13.115ms | 15 | 15 | 100.00 | ||
chip_prim_tl_access | 5.958m | 11.184ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_otp_prim_tl_access | chip_prim_tl_access | 5.958m | 11.184ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_init | chip_sw_flash_init | 36.018m | 22.213ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_host_access | chip_sw_flash_ctrl_access | 17.401m | 5.493ms | 3 | 3 | 100.00 |
chip_sw_flash_ctrl_access_jitter_en | 19.607m | 6.147ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_flash_ctrl_ops | chip_sw_flash_ctrl_ops | 17.847m | 5.337ms | 3 | 3 | 100.00 |
chip_sw_flash_ctrl_ops_jitter_en | 14.636m | 5.469ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_flash_rma_unlocked | chip_sw_flash_rma_unlocked | 1.375h | 43.560ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_scramble | chip_sw_flash_init | 36.018m | 22.213ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_idle_low_power | chip_sw_flash_ctrl_idle_low_power | 6.710m | 3.325ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_keymgr_seeds | chip_sw_keymgr_key_derivation | 9.519m | 5.205ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_lc_creator_seed_sw_rw_en | chip_sw_flash_ctrl_lc_rw_en | 9.572m | 5.109ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_creator_seed_wipe_on_rma | chip_sw_flash_rma_unlocked | 1.375h | 43.560ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_lc_owner_seed_sw_rw_en | chip_sw_flash_ctrl_lc_rw_en | 9.572m | 5.109ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_lc_iso_part_sw_rd_en | chip_sw_flash_ctrl_lc_rw_en | 9.572m | 5.109ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_lc_iso_part_sw_wr_en | chip_sw_flash_ctrl_lc_rw_en | 9.572m | 5.109ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_lc_seed_hw_rd_en | chip_sw_flash_ctrl_lc_rw_en | 9.572m | 5.109ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_lc_escalate_en | chip_sw_all_escalation_resets | 13.911m | 5.007ms | 100 | 100 | 100.00 |
V2 | chip_sw_flash_prim_tl_access | chip_prim_tl_access | 5.958m | 11.184ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_ctrl_clock_freqs | chip_sw_flash_ctrl_clock_freqs | 16.783m | 6.076ms | 3 | 3 | 100.00 |
V2 | chip_sw_flash_ctrl_escalation_reset | chip_sw_flash_crash_alert | 12.520m | 5.431ms | 3 | 3 | 100.00 |
V2 | chip_sw_ast_clk_outputs | chip_sw_ast_clk_outputs | 19.966m | 7.175ms | 3 | 3 | 100.00 |
V2 | chip_sw_ast_clk_rst_inputs | chip_sw_ast_clk_rst_inputs | 12.452m | 11.095ms | 3 | 3 | 100.00 |
V2 | chip_sw_ast_sys_clk_jitter | chip_sw_flash_ctrl_ops_jitter_en | 14.636m | 5.469ms | 3 | 3 | 100.00 |
chip_sw_flash_ctrl_access_jitter_en | 19.607m | 6.147ms | 3 | 3 | 100.00 | ||
chip_sw_otbn_ecdsa_op_irq_jitter_en | 1.050h | 21.058ms | 3 | 3 | 100.00 | ||
chip_sw_aes_enc_jitter_en | 4.116m | 3.209ms | 3 | 3 | 100.00 | ||
chip_sw_edn_entropy_reqs_jitter | 18.848m | 5.165ms | 3 | 3 | 100.00 | ||
chip_sw_hmac_enc_jitter_en | 4.606m | 2.771ms | 3 | 3 | 100.00 | ||
chip_sw_keymgr_key_derivation_jitter_en | 8.491m | 4.375ms | 3 | 3 | 100.00 | ||
chip_sw_kmac_mode_kmac_jitter_en | 4.992m | 2.966ms | 3 | 3 | 100.00 | ||
chip_sw_sram_ctrl_scrambled_access_jitter_en | 8.434m | 5.258ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_jitter | 4.590m | 2.799ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_ast_usb_clk_calib | chip_sw_usb_ast_clk_calib | 6.596m | 3.530ms | 1 | 1 | 100.00 |
V2 | chip_sw_ast_alerts | chip_sw_sensor_ctrl_alert | 30.545m | 12.585ms | 5 | 5 | 100.00 |
V2 | chip_sw_sensor_ctrl_ast_alerts | chip_sw_sensor_ctrl_alert | 30.545m | 12.585ms | 5 | 5 | 100.00 |
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup | 7.209m | 4.478ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_sensor_ctrl_ast_status | chip_sw_sensor_ctrl_status | 3.396m | 3.070ms | 3 | 3 | 100.00 |
V2 | chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup | chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup | 7.209m | 4.478ms | 3 | 3 | 100.00 |
V2 | chip_sw_nmi_irq | chip_sw_rv_core_ibex_nmi_irq | 11.408m | 4.646ms | 3 | 3 | 100.00 |
V2 | chip_sw_rv_core_ibex_rnd | chip_sw_rv_core_ibex_rnd | 17.465m | 5.961ms | 3 | 3 | 100.00 |
V2 | chip_sw_rv_core_ibex_address_translation | chip_sw_rv_core_ibex_address_translation | 4.811m | 3.388ms | 3 | 3 | 100.00 |
V2 | chip_sw_rv_core_ibex_icache_scrambled_access | chip_sw_rv_core_ibex_icache_invalidate | 3.632m | 2.664ms | 3 | 3 | 100.00 |
V2 | chip_sw_rv_core_ibex_fault_dump | chip_sw_rstmgr_cpu_info | 7.024m | 5.110ms | 3 | 3 | 100.00 |
V2 | chip_sw_rv_core_ibex_double_fault | chip_sw_rstmgr_cpu_info | 7.024m | 5.110ms | 3 | 3 | 100.00 |
V2 | chip_sw_smoketest | chip_sw_flash_scrambling_smoketest | 4.246m | 2.900ms | 3 | 3 | 100.00 |
chip_sw_aes_smoketest | 4.494m | 3.113ms | 3 | 3 | 100.00 | ||
chip_sw_aon_timer_smoketest | 6.022m | 2.752ms | 3 | 3 | 100.00 | ||
chip_sw_clkmgr_smoketest | 4.667m | 2.783ms | 3 | 3 | 100.00 | ||
chip_sw_csrng_smoketest | 3.834m | 2.915ms | 3 | 3 | 100.00 | ||
chip_sw_entropy_src_smoketest | 8.076m | 3.596ms | 3 | 3 | 100.00 | ||
chip_sw_gpio_smoketest | 4.526m | 3.014ms | 3 | 3 | 100.00 | ||
chip_sw_hmac_smoketest | 5.682m | 3.415ms | 3 | 3 | 100.00 | ||
chip_sw_kmac_smoketest | 5.241m | 3.002ms | 3 | 3 | 100.00 | ||
chip_sw_otbn_smoketest | 27.097m | 9.728ms | 3 | 3 | 100.00 | ||
chip_sw_otp_ctrl_smoketest | 5.433m | 2.778ms | 3 | 3 | 100.00 | ||
chip_sw_pwrmgr_smoketest | 5.850m | 4.114ms | 3 | 3 | 100.00 | ||
chip_sw_pwrmgr_usbdev_smoketest | 7.984m | 5.393ms | 3 | 3 | 100.00 | ||
chip_sw_rv_plic_smoketest | 4.054m | 2.745ms | 3 | 3 | 100.00 | ||
chip_sw_rv_timer_smoketest | 4.213m | 3.156ms | 3 | 3 | 100.00 | ||
chip_sw_rstmgr_smoketest | 3.996m | 2.911ms | 3 | 3 | 100.00 | ||
chip_sw_sram_ctrl_smoketest | 3.255m | 2.743ms | 3 | 3 | 100.00 | ||
chip_sw_uart_smoketest | 5.047m | 2.621ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_rom_functests | rom_keymgr_functest | 8.303m | 4.146ms | 3 | 3 | 100.00 |
V2 | chip_sw_signed | chip_sw_uart_smoketest_signed | 33.171m | 8.611ms | 3 | 3 | 100.00 |
V2 | chip_sw_boot | chip_sw_uart_tx_rx_bootstrap | 3.358h | 70.487ms | 3 | 3 | 100.00 |
V2 | chip_sw_secure_boot | rom_e2e_smoke | 29.143m | 8.149ms | 3 | 3 | 100.00 |
V2 | chip_lc_scrap | chip_sw_lc_ctrl_rma_to_scrap | 4.286m | 2.540ms | 1 | 1 | 100.00 |
chip_sw_lc_ctrl_raw_to_scrap | 2.535m | 2.387ms | 1 | 1 | 100.00 | ||
chip_sw_lc_ctrl_test_locked0_to_scrap | 2.061m | 2.873ms | 1 | 1 | 100.00 | ||
chip_sw_lc_ctrl_rand_to_scrap | 4.891m | 2.903ms | 3 | 3 | 100.00 | ||
V2 | chip_lc_test_locked | chip_sw_lc_walkthrough_testunlocks | 40.147m | 30.085ms | 3 | 3 | 100.00 |
chip_rv_dm_lc_disabled | 6.831m | 12.239ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_lc_walkthrough | chip_sw_lc_walkthrough_dev | 1.418h | 50.505ms | 3 | 3 | 100.00 |
chip_sw_lc_walkthrough_prod | 1.325h | 50.431ms | 3 | 3 | 100.00 | ||
chip_sw_lc_walkthrough_prodend | 14.536m | 9.975ms | 3 | 3 | 100.00 | ||
chip_sw_lc_walkthrough_rma | 1.361h | 48.483ms | 3 | 3 | 100.00 | ||
chip_sw_lc_walkthrough_testunlocks | 40.147m | 30.085ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_lc_ctrl_volatile_raw_unlock | chip_sw_lc_ctrl_volatile_raw_unlock | 6.008m | 3.846ms | 3 | 3 | 100.00 |
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz | 5.916m | 3.824ms | 3 | 3 | 100.00 | ||
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_96mhz | 7.063m | 4.320ms | 3 | 3 | 100.00 | ||
rom_volatile_raw_unlock | 5.149h | 114.104ms | 3 | 3 | 100.00 | ||
V2 | chip_sw_power_idle_load | chip_sw_power_idle_load | 11.493m | 3.784ms | 3 | 3 | 100.00 |
V2 | chip_sw_power_sleep_load | chip_sw_power_sleep_load | 7.018m | 4.458ms | 3 | 3 | 100.00 |
V2 | chip_sw_exit_test_unlocked_bootstrap | chip_sw_exit_test_unlocked_bootstrap | 2.668h | 61.028ms | 2 | 3 | 66.67 |
V2 | chip_sw_inject_scramble_seed | chip_sw_inject_scramble_seed | 3.029h | 63.529ms | 3 | 3 | 100.00 |
V2 | tl_d_oob_addr_access | chip_tl_errors | 8.011m | 4.975ms | 30 | 30 | 100.00 |
V2 | tl_d_illegal_access | chip_tl_errors | 8.011m | 4.975ms | 30 | 30 | 100.00 |
V2 | tl_d_outstanding_access | chip_csr_aliasing | 2.626h | 63.288ms | 5 | 5 | 100.00 |
chip_same_csr_outstanding | 1.003h | 27.158ms | 20 | 20 | 100.00 | ||
chip_csr_hw_reset | 7.378m | 5.867ms | 5 | 5 | 100.00 | ||
chip_csr_rw | 9.128m | 5.643ms | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | chip_csr_aliasing | 2.626h | 63.288ms | 5 | 5 | 100.00 |
chip_same_csr_outstanding | 1.003h | 27.158ms | 20 | 20 | 100.00 | ||
chip_csr_hw_reset | 7.378m | 5.867ms | 5 | 5 | 100.00 | ||
chip_csr_rw | 9.128m | 5.643ms | 20 | 20 | 100.00 | ||
V2 | xbar_base_random_sequence | xbar_random | 1.714m | 2.311ms | 100 | 100 | 100.00 |
V2 | xbar_random_delay | xbar_smoke_zero_delays | 8.110s | 44.569us | 100 | 100 | 100.00 |
xbar_smoke_large_delays | 1.936m | 10.392ms | 100 | 100 | 100.00 | ||
xbar_smoke_slow_rsp | 2.058m | 6.318ms | 100 | 100 | 100.00 | ||
xbar_random_zero_delays | 1.107m | 509.121us | 100 | 100 | 100.00 | ||
xbar_random_large_delays | 22.572m | 116.291ms | 100 | 100 | 100.00 | ||
xbar_random_slow_rsp | 21.961m | 71.245ms | 100 | 100 | 100.00 | ||
V2 | xbar_unmapped_address | xbar_unmapped_addr | 1.223m | 1.393ms | 100 | 100 | 100.00 |
xbar_error_and_unmapped_addr | 1.134m | 1.487ms | 100 | 100 | 100.00 | ||
V2 | xbar_error_cases | xbar_error_random | 1.905m | 2.472ms | 100 | 100 | 100.00 |
xbar_error_and_unmapped_addr | 1.134m | 1.487ms | 100 | 100 | 100.00 | ||
V2 | xbar_all_access_same_device | xbar_access_same_device | 2.619m | 3.108ms | 100 | 100 | 100.00 |
xbar_access_same_device_slow_rsp | 53.907m | 170.049ms | 100 | 100 | 100.00 | ||
V2 | xbar_all_hosts_use_same_source_id | xbar_same_source | 1.515m | 2.600ms | 100 | 100 | 100.00 |
V2 | xbar_stress_all | xbar_stress_all | 15.698m | 20.249ms | 100 | 100 | 100.00 |
xbar_stress_all_with_error | 11.865m | 17.444ms | 100 | 100 | 100.00 | ||
V2 | xbar_stress_with_reset | xbar_stress_all_with_rand_reset | 15.939m | 17.100ms | 100 | 100 | 100.00 |
xbar_stress_all_with_reset_error | 15.788m | 20.720ms | 100 | 100 | 100.00 | ||
V2 | rom_e2e_smoke | rom_e2e_smoke | 29.143m | 8.149ms | 3 | 3 | 100.00 |
V2 | rom_e2e_shutdown_output | rom_e2e_shutdown_output | 42.591m | 22.468ms | 1 | 3 | 33.33 |
V2 | rom_e2e_shutdown_exception_c | rom_e2e_shutdown_exception_c | 34.156m | 8.343ms | 3 | 3 | 100.00 |
V2 | rom_e2e_boot_policy_valid | rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 | 4.026h | 77.590ms | 1 | 1 | 100.00 |
rom_e2e_boot_policy_valid_a_good_b_good_dev | 31.631m | 8.401ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_good_b_good_prod | 31.197m | 8.835ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_good_b_good_prod_end | 30.590m | 9.164ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_good_b_good_rma | 32.394m | 9.248ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 | 3.810h | 76.293ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_good_b_bad_dev | 35.232m | 8.752ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_good_b_bad_prod | 37.948m | 8.565ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end | 33.870m | 8.855ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_good_b_bad_rma | 33.441m | 8.416ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 | 7.246h | 151.586ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_bad_b_good_dev | 43.666m | 11.794ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_bad_b_good_prod | 43.395m | 11.824ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end | 49.009m | 11.974ms | 1 | 1 | 100.00 | ||
rom_e2e_boot_policy_valid_a_bad_b_good_rma | 45.923m | 11.599ms | 1 | 1 | 100.00 | ||
V2 | rom_e2e_sigverify_always | rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 | 7.185h | 150.154ms | 1 | 1 | 100.00 |
rom_e2e_sigverify_always_a_bad_b_bad_dev | 46.571m | 11.025ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_bad_b_bad_prod | 43.165m | 11.475ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_bad_b_bad_prod_end | 49.848m | 12.246ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_bad_b_bad_rma | 43.855m | 11.758ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 | 3.833h | 75.950ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_bad_b_nothing_dev | 30.176m | 8.315ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_bad_b_nothing_prod | 33.005m | 8.015ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end | 30.919m | 8.867ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_bad_b_nothing_rma | 28.633m | 8.726ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 | 3.805h | 77.001ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_nothing_b_bad_dev | 30.470m | 8.427ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_nothing_b_bad_prod | 27.964m | 8.534ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end | 30.746m | 7.715ms | 1 | 1 | 100.00 | ||
rom_e2e_sigverify_always_a_nothing_b_bad_rma | 28.815m | 8.918ms | 1 | 1 | 100.00 | ||
V2 | rom_e2e_sigverify_mod_exp | rom_e2e_sigverify_mod_exp_test_unlocked0_otbn | 3.990h | 79.680ms | 3 | 3 | 100.00 |
rom_e2e_sigverify_mod_exp_test_unlocked0_sw | 3.937h | 78.579ms | 3 | 3 | 100.00 | ||
rom_e2e_sigverify_mod_exp_dev_otbn | 33.336m | 8.832ms | 3 | 3 | 100.00 | ||
rom_e2e_sigverify_mod_exp_dev_sw | 36.432m | 8.950ms | 3 | 3 | 100.00 | ||
rom_e2e_sigverify_mod_exp_prod_otbn | 33.018m | 8.669ms | 3 | 3 | 100.00 | ||
rom_e2e_sigverify_mod_exp_prod_sw | 33.947m | 8.651ms | 3 | 3 | 100.00 | ||
rom_e2e_sigverify_mod_exp_prod_end_otbn | 30.583m | 8.498ms | 3 | 3 | 100.00 | ||
rom_e2e_sigverify_mod_exp_prod_end_sw | 32.999m | 8.559ms | 3 | 3 | 100.00 | ||
rom_e2e_sigverify_mod_exp_rma_otbn | 34.836m | 8.732ms | 3 | 3 | 100.00 | ||
rom_e2e_sigverify_mod_exp_rma_sw | 33.915m | 8.360ms | 3 | 3 | 100.00 | ||
V2 | rom_e2e_asm_init | rom_e2e_asm_init_test_unlocked0 | 3.857h | 77.753ms | 3 | 3 | 100.00 |
rom_e2e_asm_init_dev | 35.751m | 8.179ms | 3 | 3 | 100.00 | ||
rom_e2e_asm_init_prod | 34.553m | 8.044ms | 3 | 3 | 100.00 | ||
rom_e2e_asm_init_prod_end | 35.280m | 8.849ms | 3 | 3 | 100.00 | ||
rom_e2e_asm_init_rma | 30.785m | 8.338ms | 3 | 3 | 100.00 | ||
V2 | rom_e2e_keymgr_init | rom_e2e_keymgr_init_rom_ext_meas | 36.938m | 9.103ms | 3 | 3 | 100.00 |
rom_e2e_keymgr_init_rom_ext_no_meas | 31.870m | 8.567ms | 3 | 3 | 100.00 | ||
rom_e2e_keymgr_init_rom_ext_invalid_meas | 34.426m | 8.430ms | 3 | 3 | 100.00 | ||
V2 | rom_e2e_static_critical | rom_e2e_static_critical | 41.192m | 10.220ms | 3 | 3 | 100.00 |
V2 | TOTAL | 2648 | 2651 | 99.89 | |||
V2S | chip_sw_aes_masking_off | chip_sw_aes_masking_off | 4.727m | 3.574ms | 3 | 3 | 100.00 |
V2S | chip_sw_rv_core_ibex_lockstep_glitch | chip_sw_rv_core_ibex_lockstep_glitch | 3.490m | 2.876ms | 3 | 3 | 100.00 |
V2S | TOTAL | 6 | 6 | 100.00 | |||
V3 | chip_sw_spi_device_pass_through_flash_model | chip_sw_spi_device_pass_through_flash_model | 0 | 0 | -- | ||
V3 | chip_sw_spi_device_output_when_disabled_or_sleeping | chip_sw_spi_device_output_when_disabled_or_sleeping | 0 | 0 | -- | ||
V3 | chip_sw_usb_fs_tx_rx | chip_sw_usbdev_stream | 0 | 1 | 0.00 | ||
V3 | chip_sw_usb_vbus | chip_sw_usb_vbus | 0 | 0 | -- | ||
V3 | chip_sw_usb_suspend | chip_sw_usb_suspend | 0 | 0 | -- | ||
V3 | chip_usb_sof | chip_usb_sof | 0 | 0 | -- | ||
V3 | chip_usb_wake_debug | chip_usb_wake_debug | 0 | 0 | -- | ||
V3 | chip_usb_enumeration | chip_usb_enumeration | 0 | 0 | -- | ||
V3 | chip_rv_dm_perform_debug | rom_e2e_jtag_debug_test_unlocked0 | 28.870m | 11.027ms | 1 | 1 | 100.00 |
rom_e2e_jtag_debug_dev | 29.283m | 11.233ms | 1 | 1 | 100.00 | ||
rom_e2e_jtag_debug_rma | 32.650m | 11.424ms | 1 | 1 | 100.00 | ||
V3 | chip_sw_rv_dm_access_after_hw_reset | chip_sw_rv_dm_access_after_escalation_reset | 8.754m | 5.556ms | 3 | 3 | 100.00 |
V3 | chip_sw_plic_alerts | chip_sw_all_escalation_resets | 13.911m | 5.007ms | 100 | 100 | 100.00 |
V3 | chip_sw_lc_ctrl_kmac_error | chip_sw_lc_ctrl_kmac_error | 0 | 0 | -- | ||
V3 | chip_sw_csrng_edn_error | chip_sw_csrng_edn_error | 0 | 0 | -- | ||
V3 | chip_sw_keymgr_sideload_kmac_error | chip_sw_keymgr_sideload_kmac_error | 0 | 0 | -- | ||
V3 | chip_sw_rom_ctrl_kmac_error | chip_sw_rom_ctrl_kmac_error | 0 | 0 | -- | ||
V3 | chip_sw_otp_ctrl_vendor_test_csr_access | chip_sw_otp_ctrl_vendor_test_csr_access | 3.400m | 2.888ms | 3 | 3 | 100.00 |
V3 | chip_sw_otp_ctrl_escalation | chip_sw_otp_ctrl_escalation | 8.259m | 5.844ms | 1 | 1 | 100.00 |
V3 | chip_sw_rv_core_ibex_alerts | chip_sw_rv_core_ibex_alerts | 0 | 0 | -- | ||
V3 | chip_sw_coremark | chip_sw_coremark | 3.230s | 0 | 1 | 0.00 | |
V3 | chip_sw_power_max_load | chip_sw_power_virus | 34.386m | 8.258ms | 3 | 3 | 100.00 |
V3 | rom_e2e_debug | rom_e2e_jtag_debug_test_unlocked0 | 28.870m | 11.027ms | 1 | 1 | 100.00 |
rom_e2e_jtag_debug_dev | 29.283m | 11.233ms | 1 | 1 | 100.00 | ||
rom_e2e_jtag_debug_rma | 32.650m | 11.424ms | 1 | 1 | 100.00 | ||
V3 | rom_e2e_jtag_inject | rom_e2e_jtag_inject_test_unlocked0 | 58.523m | 32.129ms | 1 | 1 | 100.00 |
rom_e2e_jtag_inject_dev | 52.914m | 39.780ms | 1 | 1 | 100.00 | ||
rom_e2e_jtag_inject_rma | 34.108m | 32.650ms | 1 | 1 | 100.00 | ||
V3 | rom_bootstrap_rma | rom_bootstrap_rma | 0 | 0 | -- | ||
V3 | rom_e2e_weak_straps | rom_e2e_weak_straps | 0 | 0 | -- | ||
V3 | TOTAL | 16 | 18 | 88.89 | |||
Unmapped tests | chip_sw_rstmgr_rst_cnsty_escalation | 11.632m | 5.100ms | 3 | 3 | 100.00 | |
TOTAL | 2896 | 2901 | 99.83 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
N.A. | 1 | 1 | 1 | 100.00 |
V1 | 19 | 19 | 19 | 100.00 |
V2 | 270 | 270 | 268 | 99.26 |
V2S | 2 | 2 | 2 | 100.00 |
V3 | 26 | 12 | 10 | 38.46 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
---|---|---|---|---|---|---|---|
96.68 | 95.62 | 94.04 | 98.13 | -- | 94.66 | 97.93 | 99.69 |
Job chip_earlgrey_asic-sim-vcs_run_default killed due to: Exit reason: User job exceeded runlimit: User job timed out
has 4 failures:
Test chip_sw_usbdev_stream has 1 failures.
0.chip_sw_usbdev_stream.631761333
Log /container/opentitan-public/scratch/os_regression/chip_earlgrey_asic-sim-vcs/0.chip_sw_usbdev_stream/latest/run.log
Job ID: smart:71477c32-22b1-4c7f-8fe3-13ba2688e24e
Test chip_sw_exit_test_unlocked_bootstrap has 1 failures.
0.chip_sw_exit_test_unlocked_bootstrap.2097488247
Log /container/opentitan-public/scratch/os_regression/chip_earlgrey_asic-sim-vcs/0.chip_sw_exit_test_unlocked_bootstrap/latest/run.log
Job ID: smart:fc1f7028-aacf-4934-9b17-d7725cc01bbe
Test rom_e2e_shutdown_output has 2 failures.
0.rom_e2e_shutdown_output.553994520
Log /container/opentitan-public/scratch/os_regression/chip_earlgrey_asic-sim-vcs/0.rom_e2e_shutdown_output/latest/run.log
Job ID: smart:c3c962cd-c924-4dff-b8ea-2dcff5312dbc
1.rom_e2e_shutdown_output.2361226929
Log /container/opentitan-public/scratch/os_regression/chip_earlgrey_asic-sim-vcs/1.rom_e2e_shutdown_output/latest/run.log
Job ID: smart:ac489841-eee1-4f72-aa0c-4234a9867c88
UVM_FATAL @ * us: (uart_logger.sv:25) [m_logger] Check failed (!logs_output_fd) Failed to open log for writing
has 1 failures:
0.chip_sw_coremark.977697732
Line 1041, in log /container/opentitan-public/scratch/os_regression/chip_earlgrey_asic-sim-vcs/0.chip_sw_coremark/latest/run.log
UVM_FATAL @ 0.000000 us: (uart_logger.sv:25) [uvm_test_top.env.m_uart_agent0.m_logger] Check failed (!logs_output_fd) Failed to open uvm_test_top.env.m_uart_agent0.m_logger.log for writing
UVM_INFO @ 0.000000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---