Summary for Variable cp_num_of_outstanding
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
128 |
117 |
11 |
8.59 |
User Defined Bins for cp_num_of_outstanding
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
values[12] |
0 |
1 |
1 |
|
values[13] |
0 |
1 |
1 |
|
values[14] |
0 |
1 |
1 |
|
values[15] |
0 |
1 |
1 |
|
values[16] |
0 |
1 |
1 |
|
values[17] |
0 |
1 |
1 |
|
values[18] |
0 |
1 |
1 |
|
values[19] |
0 |
1 |
1 |
|
values[20] |
0 |
1 |
1 |
|
values[21] |
0 |
1 |
1 |
|
values[22] |
0 |
1 |
1 |
|
values[23] |
0 |
1 |
1 |
|
values[24] |
0 |
1 |
1 |
|
values[25] |
0 |
1 |
1 |
|
values[26] |
0 |
1 |
1 |
|
values[27] |
0 |
1 |
1 |
|
values[28] |
0 |
1 |
1 |
|
values[29] |
0 |
1 |
1 |
|
values[30] |
0 |
1 |
1 |
|
values[31] |
0 |
1 |
1 |
|
values[32] |
0 |
1 |
1 |
|
values[33] |
0 |
1 |
1 |
|
values[34] |
0 |
1 |
1 |
|
values[35] |
0 |
1 |
1 |
|
values[36] |
0 |
1 |
1 |
|
values[37] |
0 |
1 |
1 |
|
values[38] |
0 |
1 |
1 |
|
values[39] |
0 |
1 |
1 |
|
values[40] |
0 |
1 |
1 |
|
values[41] |
0 |
1 |
1 |
|
values[42] |
0 |
1 |
1 |
|
values[43] |
0 |
1 |
1 |
|
values[44] |
0 |
1 |
1 |
|
values[45] |
0 |
1 |
1 |
|
values[46] |
0 |
1 |
1 |
|
values[47] |
0 |
1 |
1 |
|
values[48] |
0 |
1 |
1 |
|
values[49] |
0 |
1 |
1 |
|
values[50] |
0 |
1 |
1 |
|
values[51] |
0 |
1 |
1 |
|
values[52] |
0 |
1 |
1 |
|
values[53] |
0 |
1 |
1 |
|
values[54] |
0 |
1 |
1 |
|
values[55] |
0 |
1 |
1 |
|
values[56] |
0 |
1 |
1 |
|
values[57] |
0 |
1 |
1 |
|
values[58] |
0 |
1 |
1 |
|
values[59] |
0 |
1 |
1 |
|
values[60] |
0 |
1 |
1 |
|
values[61] |
0 |
1 |
1 |
|
values[62] |
0 |
1 |
1 |
|
values[63] |
0 |
1 |
1 |
|
values[64] |
0 |
1 |
1 |
|
values[65] |
0 |
1 |
1 |
|
values[66] |
0 |
1 |
1 |
|
values[67] |
0 |
1 |
1 |
|
values[68] |
0 |
1 |
1 |
|
values[69] |
0 |
1 |
1 |
|
values[70] |
0 |
1 |
1 |
|
values[71] |
0 |
1 |
1 |
|
values[72] |
0 |
1 |
1 |
|
values[73] |
0 |
1 |
1 |
|
values[74] |
0 |
1 |
1 |
|
values[75] |
0 |
1 |
1 |
|
values[76] |
0 |
1 |
1 |
|
values[77] |
0 |
1 |
1 |
|
values[78] |
0 |
1 |
1 |
|
values[79] |
0 |
1 |
1 |
|
values[80] |
0 |
1 |
1 |
|
values[81] |
0 |
1 |
1 |
|
values[82] |
0 |
1 |
1 |
|
values[83] |
0 |
1 |
1 |
|
values[84] |
0 |
1 |
1 |
|
values[85] |
0 |
1 |
1 |
|
values[86] |
0 |
1 |
1 |
|
values[87] |
0 |
1 |
1 |
|
values[88] |
0 |
1 |
1 |
|
values[89] |
0 |
1 |
1 |
|
values[90] |
0 |
1 |
1 |
|
values[91] |
0 |
1 |
1 |
|
values[92] |
0 |
1 |
1 |
|
values[93] |
0 |
1 |
1 |
|
values[94] |
0 |
1 |
1 |
|
values[95] |
0 |
1 |
1 |
|
values[96] |
0 |
1 |
1 |
|
values[97] |
0 |
1 |
1 |
|
values[98] |
0 |
1 |
1 |
|
values[99] |
0 |
1 |
1 |
|
values[100] |
0 |
1 |
1 |
|
values[101] |
0 |
1 |
1 |
|
values[102] |
0 |
1 |
1 |
|
values[103] |
0 |
1 |
1 |
|
values[104] |
0 |
1 |
1 |
|
values[105] |
0 |
1 |
1 |
|
values[106] |
0 |
1 |
1 |
|
values[107] |
0 |
1 |
1 |
|
values[108] |
0 |
1 |
1 |
|
values[109] |
0 |
1 |
1 |
|
values[110] |
0 |
1 |
1 |
|
values[111] |
0 |
1 |
1 |
|
values[112] |
0 |
1 |
1 |
|
values[113] |
0 |
1 |
1 |
|
values[114] |
0 |
1 |
1 |
|
values[115] |
0 |
1 |
1 |
|
values[116] |
0 |
1 |
1 |
|
values[117] |
0 |
1 |
1 |
|
values[118] |
0 |
1 |
1 |
|
values[119] |
0 |
1 |
1 |
|
values[120] |
0 |
1 |
1 |
|
values[121] |
0 |
1 |
1 |
|
values[122] |
0 |
1 |
1 |
|
values[123] |
0 |
1 |
1 |
|
values[124] |
0 |
1 |
1 |
|
values[125] |
0 |
1 |
1 |
|
values[126] |
0 |
1 |
1 |
|
values[127] |
0 |
1 |
1 |
|
values[128] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
values[1] |
249100 |
1 |
|
|
T4 |
195 |
|
T5 |
75 |
|
T21 |
195 |
values[2] |
75300 |
1 |
|
|
T4 |
1 |
|
T5 |
3 |
|
T21 |
1 |
values[3] |
41200 |
1 |
|
|
T51 |
211 |
|
T59 |
201 |
|
T60 |
201 |
values[4] |
20100 |
1 |
|
|
T51 |
117 |
|
T59 |
84 |
|
T60 |
84 |
values[5] |
13300 |
1 |
|
|
T51 |
57 |
|
T59 |
76 |
|
T60 |
76 |
values[6] |
7000 |
1 |
|
|
T51 |
24 |
|
T59 |
46 |
|
T60 |
46 |
values[7] |
3600 |
1 |
|
|
T51 |
13 |
|
T59 |
23 |
|
T60 |
23 |
values[8] |
1500 |
1 |
|
|
T51 |
6 |
|
T59 |
9 |
|
T60 |
9 |
values[9] |
1300 |
1 |
|
|
T51 |
5 |
|
T59 |
8 |
|
T60 |
8 |
values[10] |
600 |
1 |
|
|
T51 |
5 |
|
T59 |
1 |
|
T60 |
1 |
values[11] |
100 |
1 |
|
|
T51 |
1 |
|
T76 |
1 |
|
T88 |
1 |
0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |