Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.hmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	183500	1			T4	191		T5	80		T21	191
values[2]	2900	1			T4	2		T21	2		T46	2
values[3]	1000	1			T51	3		T59	7		T60	7
values[4]	900	1			T51	2		T59	7		T60	7
values[5]	400	1			T51	2		T59	2		T60	2
values[6]	400	1			T51	3		T59	1		T60	1
values[7]	400	1			T51	3		T59	1		T60	1
values[8]	300	1			T51	1		T59	2		T60	2
values[9]	400	1			T51	3		T59	1		T60	1
values[10]	500	1			T51	3		T59	2		T60	2
values[11]	400	1			T51	2		T59	2		T60	2
values[12]	700	1			T51	4		T59	3		T60	3
values[13]	600	1			T51	2		T59	4		T60	4
values[14]	400	1			T51	2		T59	2		T60	2
values[15]	300	1			T51	1		T59	2		T60	2
values[16]	600	1			T51	5		T59	1		T60	1
values[17]	300	1			T51	1		T59	2		T60	2
values[18]	1000	1			T51	5		T59	5		T60	5
values[19]	500	1			T51	3		T59	2		T60	2
values[20]	400	1			T51	1		T59	3		T60	3
values[21]	300	1			T51	1		T59	2		T60	2
values[22]	400	1			T51	2		T59	2		T60	2
values[23]	600	1			T51	2		T59	4		T60	4
values[24]	500	1			T51	1		T59	4		T60	4
values[25]	700	1			T51	1		T59	6		T60	6
values[26]	500	1			T51	3		T59	2		T60	2
values[27]	500	1			T51	3		T59	2		T60	2
values[28]	400	1			T51	2		T59	2		T60	2
values[29]	400	1			T51	3		T59	1		T60	1
values[30]	700	1			T51	3		T59	4		T60	4
values[31]	200	1			T51	1		T59	1		T60	1
values[32]	600	1			T51	4		T59	2		T60	2
values[33]	600	1			T51	5		T59	1		T60	1
values[34]	400	1			T51	1		T59	3		T60	3
values[35]	500	1			T51	3		T59	2		T60	2
values[36]	400	1			T51	2		T59	2		T60	2
values[37]	200	1			T51	1		T59	1		T60	1
values[38]	700	1			T51	4		T59	3		T60	3
values[39]	600	1			T51	5		T59	1		T60	1
values[40]	500	1			T51	4		T59	1		T60	1
values[41]	1100	1			T51	6		T59	5		T60	5
values[42]	400	1			T51	2		T59	2		T60	2
values[43]	400	1			T51	1		T59	3		T60	3
values[44]	500	1			T51	3		T59	2		T60	2
values[45]	300	1			T51	1		T59	2		T60	2
values[46]	600	1			T51	1		T59	5		T60	5
values[47]	500	1			T51	1		T59	4		T60	4
values[48]	500	1			T51	3		T59	2		T60	2
values[49]	700	1			T51	5		T59	2		T60	2
values[50]	700	1			T51	3		T59	4		T60	4
values[51]	300	1			T51	1		T59	2		T60	2
values[52]	500	1			T51	2		T59	3		T60	3
values[53]	400	1			T51	1		T59	3		T60	3
values[54]	300	1			T51	2		T59	1		T60	1
values[55]	400	1			T51	3		T59	1		T60	1
values[56]	300	1			T51	2		T59	1		T60	1
values[57]	200	1			T51	1		T59	1		T60	1
values[58]	500	1			T51	3		T59	2		T60	2
values[59]	600	1			T51	1		T59	5		T60	5
values[60]	400	1			T51	2		T59	2		T60	2
values[61]	500	1			T51	3		T59	2		T60	2
values[62]	400	1			T51	1		T59	3		T60	3
values[63]	800	1			T51	2		T59	6		T60	6
values[64]	600	1			T51	4		T59	2		T60	2
values[65]	600	1			T51	5		T59	1		T60	1
values[66]	500	1			T51	4		T59	1		T60	1
values[67]	400	1			T51	3		T59	1		T60	1
values[68]	500	1			T51	1		T59	4		T60	4
values[69]	400	1			T51	2		T59	2		T60	2
values[70]	500	1			T51	3		T59	2		T60	2
values[71]	600	1			T51	3		T59	3		T60	3
values[72]	900	1			T51	3		T59	6		T60	6
values[73]	500	1			T51	2		T59	3		T60	3
values[74]	500	1			T51	2		T59	3		T60	3
values[75]	500	1			T51	3		T59	2		T60	2
values[76]	300	1			T51	1		T59	2		T60	2
values[77]	400	1			T51	2		T59	2		T60	2
values[78]	500	1			T51	3		T59	2		T60	2
values[79]	400	1			T51	2		T59	2		T60	2
values[80]	700	1			T51	4		T59	3		T60	3
values[81]	800	1			T51	2		T59	6		T60	6
values[82]	600	1			T51	3		T59	3		T60	3
values[83]	200	1			T51	1		T59	1		T60	1
values[84]	400	1			T51	1		T59	3		T60	3
values[85]	500	1			T51	3		T59	2		T60	2
values[86]	500	1			T51	3		T59	2		T60	2
values[87]	400	1			T51	3		T59	1		T60	1
values[88]	900	1			T51	6		T59	3		T60	3
values[89]	800	1			T51	6		T59	2		T60	2
values[90]	400	1			T51	2		T59	2		T60	2
values[91]	800	1			T51	6		T59	2		T60	2
values[92]	300	1			T51	2		T59	1		T60	1
values[93]	300	1			T51	1		T59	2		T60	2
values[94]	600	1			T51	2		T59	4		T60	4
values[95]	900	1			T51	4		T59	5		T60	5
values[96]	1000	1			T51	4		T59	6		T60	6
values[97]	300	1			T51	1		T59	2		T60	2
values[98]	800	1			T51	3		T59	5		T60	5
values[99]	500	1			T51	2		T59	3		T60	3
values[100]	500	1			T51	4		T59	1		T60	1
values[101]	400	1			T51	2		T59	2		T60	2
values[102]	700	1			T51	1		T59	6		T60	6
values[103]	800	1			T51	2		T59	6		T60	6
values[104]	300	1			T51	2		T59	1		T60	1
values[105]	600	1			T51	5		T59	1		T60	1
values[106]	500	1			T51	2		T59	3		T60	3
values[107]	400	1			T51	2		T59	2		T60	2
values[108]	400	1			T51	1		T59	3		T60	3
values[109]	900	1			T51	3		T59	6		T60	6
values[110]	500	1			T51	2		T59	3		T60	3
values[111]	1000	1			T51	4		T59	6		T60	6
values[112]	700	1			T51	5		T59	2		T60	2
values[113]	1100	1			T51	5		T59	6		T60	6
values[114]	800	1			T51	3		T59	5		T60	5
values[115]	1100	1			T51	7		T59	4		T60	4
values[116]	1000	1			T51	8		T59	2		T60	2
values[117]	600	1			T51	3		T59	3		T60	3
values[118]	1400	1			T51	6		T59	8		T60	8
values[119]	1300	1			T51	8		T59	5		T60	5
values[120]	1900	1			T51	13		T59	6		T60	6
values[121]	1200	1			T51	7		T59	5		T60	5
values[122]	1600	1			T51	8		T59	8		T60	8
values[123]	2400	1			T51	11		T59	13		T60	13
values[124]	4700	1			T51	26		T59	21		T60	21
values[125]	9800	1			T51	52		T59	46		T60	46
values[126]	11400	1			T51	57		T59	57		T60	57
values[127]	6200	1			T51	27		T59	35		T60	35
values[128]	500	1			T51	1		T59	4		T60	4