Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cfg_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	156148	1			T4	68		T5	434		T6	65
values[2]	4956	1			T4	1		T5	64		T46	2
values[3]	2442	1			T5	82		T148	22		T68	1
values[4]	1615	1			T5	59		T148	26		T87	62
values[5]	1218	1			T5	28		T148	48		T87	41
values[6]	955	1			T5	30		T148	44		T87	41
values[7]	767	1			T5	31		T148	43		T87	34
values[8]	681	1			T5	12		T148	50		T87	29
values[9]	656	1			T5	14		T148	47		T87	23
values[10]	580	1			T5	17		T148	34		T87	25
values[11]	526	1			T5	7		T148	31		T87	15
values[12]	470	1			T5	8		T148	21		T87	2
values[13]	387	1			T5	9		T148	26		T88	1
values[14]	330	1			T5	3		T148	15		T88	1
values[15]	291	1			T5	5		T148	24		T88	1
values[16]	283	1			T5	8		T148	8		T88	1
values[17]	243	1			T5	3		T148	18		T88	1
values[18]	210	1			T5	2		T148	12		T88	1
values[19]	189	1			T5	10		T148	5		T88	1
values[20]	131	1			T5	9		T88	1		T318	10
values[21]	147	1			T5	1		T88	1		T318	4
values[22]	136	1			T88	1		T318	16		T299	2
values[23]	118	1			T88	1		T318	29		T299	2
values[24]	89	1			T88	1		T318	15		T299	2
values[25]	90	1			T88	1		T318	8		T299	2
values[26]	90	1			T88	1		T318	4		T299	2
values[27]	100	1			T88	1		T318	19		T299	2
values[28]	96	1			T88	1		T318	16		T299	2
values[29]	106	1			T88	1		T318	41		T299	2
values[30]	111	1			T88	1		T318	33		T299	2
values[31]	119	1			T88	1		T318	20		T299	2
values[32]	120	1			T88	1		T318	10		T299	2
values[33]	98	1			T88	1		T318	11		T299	2
values[34]	108	1			T88	1		T318	11		T299	2
values[35]	71	1			T88	1		T318	2		T299	2
values[36]	93	1			T88	1		T299	2		T287	2
values[37]	98	1			T88	1		T299	2		T287	1
values[38]	81	1			T88	1		T299	2		T287	1
values[39]	91	1			T88	1		T299	2		T287	1
values[40]	87	1			T88	1		T299	2		T287	1
values[41]	85	1			T88	1		T299	2		T287	1
values[42]	77	1			T88	1		T299	2		T287	1
values[43]	82	1			T88	1		T299	2		T287	1
values[44]	82	1			T88	1		T299	2		T287	1
values[45]	74	1			T88	1		T299	2		T287	1
values[46]	67	1			T88	1		T299	2		T287	1
values[47]	87	1			T88	1		T299	2		T287	1
values[48]	72	1			T88	1		T299	2		T287	1
values[49]	82	1			T88	1		T299	2		T287	1
values[50]	75	1			T88	1		T299	2		T287	1
values[51]	73	1			T88	1		T299	2		T287	1
values[52]	62	1			T88	1		T299	2		T287	1
values[53]	57	1			T88	1		T299	2		T287	1
values[54]	52	1			T88	1		T299	2		T287	1
values[55]	58	1			T88	1		T299	2		T287	1
values[56]	55	1			T88	1		T299	2		T287	1
values[57]	54	1			T88	1		T299	2		T287	1
values[58]	56	1			T88	1		T299	2		T287	1
values[59]	49	1			T88	1		T299	2		T287	1
values[60]	50	1			T88	1		T299	2		T287	1
values[61]	61	1			T88	1		T299	2		T287	1
values[62]	54	1			T88	1		T299	2		T287	1
values[63]	55	1			T88	1		T299	2		T287	1
values[64]	57	1			T88	1		T299	2		T287	1
values[65]	52	1			T88	1		T299	2		T287	1
values[66]	53	1			T88	1		T299	2		T287	1
values[67]	56	1			T88	1		T299	2		T287	1
values[68]	55	1			T88	1		T299	2		T287	1
values[69]	58	1			T88	1		T299	2		T287	1
values[70]	57	1			T88	1		T299	2		T287	1
values[71]	56	1			T88	1		T299	2		T287	1
values[72]	57	1			T88	4		T299	2		T287	1
values[73]	54	1			T88	1		T299	2		T287	1
values[74]	52	1			T88	1		T299	2		T287	1
values[75]	65	1			T88	3		T299	2		T287	1
values[76]	59	1			T88	2		T299	2		T287	1
values[77]	45	1			T88	1		T299	2		T287	1
values[78]	58	1			T88	2		T299	2		T287	1
values[79]	56	1			T88	1		T299	2		T287	1
values[80]	66	1			T88	6		T299	2		T287	1
values[81]	68	1			T88	8		T299	2		T287	1
values[82]	68	1			T88	6		T299	2		T287	1
values[83]	67	1			T88	3		T299	2		T287	1
values[84]	74	1			T88	2		T299	2		T287	1
values[85]	81	1			T88	6		T299	3		T287	1
values[86]	91	1			T88	6		T299	2		T287	1
values[87]	84	1			T88	5		T299	2		T287	1
values[88]	69	1			T88	1		T299	2		T287	1
values[89]	80	1			T88	1		T299	2		T287	1
values[90]	91	1			T88	1		T299	2		T287	1
values[91]	86	1			T88	5		T299	2		T287	1
values[92]	96	1			T88	4		T299	2		T287	1
values[93]	96	1			T88	2		T299	2		T287	1
values[94]	74	1			T88	3		T299	2		T287	1
values[95]	91	1			T88	1		T299	2		T287	1
values[96]	99	1			T88	2		T299	2		T287	1
values[97]	94	1			T88	2		T299	2		T287	1
values[98]	86	1			T88	6		T299	2		T287	1
values[99]	81	1			T88	2		T299	2		T287	1
values[100]	96	1			T88	2		T299	2		T287	1
values[101]	95	1			T88	1		T299	2		T287	1
values[102]	97	1			T88	3		T299	2		T287	1
values[103]	89	1			T88	3		T299	2		T287	1
values[104]	83	1			T88	3		T299	2		T287	1
values[105]	110	1			T88	2		T299	2		T287	1
values[106]	97	1			T88	2		T299	3		T287	1
values[107]	92	1			T88	6		T299	2		T287	1
values[108]	99	1			T88	2		T299	2		T287	1
values[109]	91	1			T88	1		T299	2		T287	1
values[110]	88	1			T88	3		T299	2		T287	1
values[111]	103	1			T88	4		T299	4		T287	1
values[112]	97	1			T88	2		T299	2		T287	1
values[113]	115	1			T88	2		T299	4		T287	1
values[114]	113	1			T88	2		T299	2		T287	1
values[115]	103	1			T88	2		T299	7		T287	1
values[116]	97	1			T88	1		T299	4		T287	1
values[117]	85	1			T88	2		T299	2		T287	1
values[118]	103	1			T88	3		T299	8		T287	1
values[119]	112	1			T88	1		T299	7		T287	1
values[120]	91	1			T88	1		T299	6		T287	1
values[121]	119	1			T88	3		T299	2		T287	1
values[122]	115	1			T88	1		T299	2		T287	2
values[123]	110	1			T88	2		T299	4		T287	2
values[124]	179	1			T88	4		T299	3		T287	2
values[125]	267	1			T88	3		T299	2		T287	1
values[126]	747	1			T88	16		T299	49		T287	17
values[127]	3863	1			T88	90		T299	344		T287	91
values[128]	7338	1			T88	169		T299	472		T287	213