Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	145460	1			T4	47		T5	479		T6	75
values[2]	8958	1			T4	1		T5	142		T46	2
values[3]	3805	1			T5	81		T148	7		T203	15
values[4]	2446	1			T5	43		T203	6		T149	18
values[5]	1622	1			T5	18		T203	1		T149	13
values[6]	1107	1			T5	9		T149	4		T72	10
values[7]	908	1			T5	10		T149	16		T72	8
values[8]	796	1			T5	10		T149	14		T72	8
values[9]	702	1			T149	15		T72	7		T87	2
values[10]	582	1			T149	7		T72	4		T87	9
values[11]	563	1			T149	4		T72	7		T87	6
values[12]	536	1			T149	11		T72	10		T87	2
values[13]	586	1			T149	10		T72	9		T87	8
values[14]	530	1			T149	11		T72	12		T87	4
values[15]	559	1			T149	9		T72	6		T87	3
values[16]	536	1			T149	9		T72	13		T87	2
values[17]	538	1			T149	5		T72	13		T87	8
values[18]	531	1			T149	4		T72	5		T87	3
values[19]	547	1			T149	27		T72	8		T87	2
values[20]	552	1			T149	10		T72	16		T87	2
values[21]	476	1			T149	4		T72	10		T87	2
values[22]	482	1			T149	6		T72	16		T87	3
values[23]	493	1			T149	11		T72	15		T87	2
values[24]	516	1			T149	12		T72	13		T87	5
values[25]	526	1			T149	17		T72	14		T87	2
values[26]	480	1			T149	7		T72	25		T87	5
values[27]	403	1			T149	6		T72	20		T87	1
values[28]	438	1			T149	4		T72	16		T87	2
values[29]	398	1			T149	9		T72	12		T87	3
values[30]	389	1			T149	3		T72	10		T87	1
values[31]	369	1			T149	6		T72	8		T87	6
values[32]	399	1			T149	25		T72	4		T87	6
values[33]	524	1			T149	12		T72	13		T87	4
values[34]	477	1			T149	8		T72	9		T87	3
values[35]	450	1			T149	6		T72	12		T87	1
values[36]	448	1			T149	6		T72	2		T87	2
values[37]	367	1			T149	24		T72	3		T87	2
values[38]	413	1			T149	6		T72	5		T87	1
values[39]	365	1			T149	6		T72	5		T87	1
values[40]	354	1			T149	11		T72	17		T87	3
values[41]	324	1			T149	3		T72	13		T87	2
values[42]	316	1			T149	7		T72	6		T87	2
values[43]	304	1			T149	23		T72	5		T87	3
values[44]	237	1			T149	7		T72	2		T87	4
values[45]	282	1			T149	15		T72	2		T87	4
values[46]	221	1			T149	8		T72	4		T87	7
values[47]	239	1			T149	8		T72	6		T87	13
values[48]	215	1			T149	6		T72	1		T87	12
values[49]	272	1			T149	10		T72	10		T87	3
values[50]	168	1			T149	12		T72	4		T87	1
values[51]	153	1			T149	10		T72	3		T87	2
values[52]	136	1			T149	5		T72	2		T87	3
values[53]	155	1			T149	2		T72	2		T87	4
values[54]	141	1			T72	4		T87	8		T90	9
values[55]	103	1			T72	3		T87	9		T90	3
values[56]	112	1			T72	7		T87	3		T90	9
values[57]	103	1			T72	6		T87	1		T90	6
values[58]	119	1			T72	1		T87	4		T90	8
values[59]	90	1			T72	2		T87	5		T290	1
values[60]	76	1			T72	3		T87	4		T290	1
values[61]	79	1			T72	3		T87	3		T290	1
values[62]	91	1			T72	7		T87	4		T290	1
values[63]	81	1			T72	7		T87	4		T290	1
values[64]	84	1			T72	6		T87	4		T290	1
values[65]	108	1			T72	9		T87	12		T290	1
values[66]	99	1			T72	2		T87	5		T290	1
values[67]	90	1			T72	4		T87	5		T290	1
values[68]	101	1			T72	6		T87	6		T290	1
values[69]	132	1			T72	6		T87	3		T290	1
values[70]	140	1			T72	19		T87	5		T290	1
values[71]	131	1			T72	9		T87	4		T290	1
values[72]	142	1			T72	7		T87	5		T290	1
values[73]	133	1			T72	3		T87	3		T290	6
values[74]	165	1			T72	11		T87	7		T290	22
values[75]	157	1			T72	20		T87	9		T290	2
values[76]	124	1			T72	11		T87	9		T290	1
values[77]	140	1			T72	12		T87	5		T290	1
values[78]	138	1			T72	6		T87	2		T290	4
values[79]	94	1			T72	4		T87	1		T290	4
values[80]	94	1			T72	4		T87	2		T290	9
values[81]	83	1			T72	4		T87	4		T290	1
values[82]	84	1			T72	1		T87	10		T290	2
values[83]	111	1			T87	14		T290	5		T297	1
values[84]	92	1			T87	4		T290	11		T297	1
values[85]	83	1			T87	4		T290	5		T297	1
values[86]	59	1			T87	9		T290	2		T297	1
values[87]	82	1			T87	4		T290	3		T297	1
values[88]	76	1			T87	1		T290	2		T297	1
values[89]	76	1			T87	10		T290	2		T297	1
values[90]	69	1			T87	3		T290	1		T297	1
values[91]	79	1			T87	12		T290	2		T297	1
values[92]	88	1			T87	5		T290	3		T297	1
values[93]	87	1			T87	2		T290	3		T297	1
values[94]	72	1			T87	3		T290	1		T297	1
values[95]	63	1			T87	3		T290	1		T297	1
values[96]	76	1			T87	3		T290	4		T297	1
values[97]	80	1			T87	5		T290	1		T297	1
values[98]	91	1			T87	11		T290	1		T297	1
values[99]	75	1			T87	15		T290	2		T297	1
values[100]	77	1			T87	11		T290	2		T297	1
values[101]	75	1			T87	1		T290	2		T297	1
values[102]	77	1			T290	1		T297	1		T299	2
values[103]	74	1			T290	4		T297	1		T299	2
values[104]	53	1			T290	2		T297	1		T299	3
values[105]	52	1			T290	2		T297	1		T299	1
values[106]	49	1			T290	1		T297	1		T299	1
values[107]	60	1			T290	7		T297	1		T299	1
values[108]	63	1			T290	5		T297	1		T299	1
values[109]	60	1			T290	3		T297	2		T299	2
values[110]	51	1			T290	1		T297	1		T299	1
values[111]	55	1			T290	1		T297	3		T299	3
values[112]	47	1			T290	1		T297	2		T299	2
values[113]	51	1			T290	2		T297	3		T299	5
values[114]	50	1			T290	2		T297	4		T299	1
values[115]	59	1			T290	1		T297	2		T299	2
values[116]	59	1			T290	1		T297	2		T299	1
values[117]	51	1			T290	4		T297	1		T299	1
values[118]	49	1			T290	1		T297	2		T299	1
values[119]	51	1			T290	1		T297	5		T299	1
values[120]	52	1			T290	3		T297	3		T299	2
values[121]	56	1			T290	2		T297	2		T299	1
values[122]	47	1			T290	1		T297	2		T299	3
values[123]	50	1			T290	1		T297	2		T299	1
values[124]	58	1			T290	1		T297	4		T299	1
values[125]	57	1			T290	1		T297	1		T299	1
values[126]	98	1			T290	2		T297	7		T299	2
values[127]	1521	1			T290	45		T297	53		T299	53
values[128]	7090	1			T290	232		T297	276		T299	264