T588 |
/workspace/coverage/cover_reg_top/99.xbar_random_zero_delays.409609399 |
|
|
Jan 07 02:07:10 PM PST 24 |
Jan 07 02:07:54 PM PST 24 |
105695626 ps |
T589 |
/workspace/coverage/cover_reg_top/43.xbar_random_large_delays.640073239 |
|
|
Jan 07 02:03:04 PM PST 24 |
Jan 07 02:21:02 PM PST 24 |
96099083224 ps |
T222 |
/workspace/coverage/cover_reg_top/17.chip_tl_errors.724811058 |
|
|
Jan 07 02:02:18 PM PST 24 |
Jan 07 02:05:24 PM PST 24 |
3183741052 ps |
T590 |
/workspace/coverage/cover_reg_top/55.xbar_smoke_slow_rsp.3245133542 |
|
|
Jan 07 02:04:00 PM PST 24 |
Jan 07 02:05:27 PM PST 24 |
2826419245 ps |
T591 |
/workspace/coverage/cover_reg_top/69.xbar_access_same_device_slow_rsp.3455780687 |
|
|
Jan 07 02:05:22 PM PST 24 |
Jan 07 02:08:16 PM PST 24 |
8558500687 ps |
T125 |
/workspace/coverage/cover_reg_top/68.xbar_same_source.975916207 |
|
|
Jan 07 02:04:55 PM PST 24 |
Jan 07 02:06:00 PM PST 24 |
568842726 ps |
T343 |
/workspace/coverage/cover_reg_top/53.xbar_stress_all_with_reset_error.2047973276 |
|
|
Jan 07 02:04:03 PM PST 24 |
Jan 07 02:05:12 PM PST 24 |
194307465 ps |
T592 |
/workspace/coverage/cover_reg_top/74.xbar_stress_all_with_error.3940415783 |
|
|
Jan 07 02:05:40 PM PST 24 |
Jan 07 02:08:26 PM PST 24 |
4400894601 ps |
T593 |
/workspace/coverage/cover_reg_top/67.xbar_unmapped_addr.2133760355 |
|
|
Jan 07 02:04:56 PM PST 24 |
Jan 07 02:06:08 PM PST 24 |
248725376 ps |
T594 |
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_reset_error.3200446482 |
|
|
Jan 07 02:06:56 PM PST 24 |
Jan 07 02:08:03 PM PST 24 |
139790025 ps |
T595 |
/workspace/coverage/cover_reg_top/51.xbar_random_slow_rsp.1876594368 |
|
|
Jan 07 02:05:02 PM PST 24 |
Jan 07 02:16:58 PM PST 24 |
41565052659 ps |
T596 |
/workspace/coverage/cover_reg_top/92.xbar_access_same_device_slow_rsp.1479041759 |
|
|
Jan 07 02:07:02 PM PST 24 |
Jan 07 02:24:42 PM PST 24 |
59468699602 ps |
T597 |
/workspace/coverage/cover_reg_top/56.xbar_random_slow_rsp.3554154824 |
|
|
Jan 07 02:04:08 PM PST 24 |
Jan 07 02:11:23 PM PST 24 |
24903280087 ps |
T598 |
/workspace/coverage/cover_reg_top/9.xbar_access_same_device.4010108344 |
|
|
Jan 07 02:01:10 PM PST 24 |
Jan 07 02:02:50 PM PST 24 |
2510013175 ps |
T599 |
/workspace/coverage/cover_reg_top/32.xbar_access_same_device_slow_rsp.2314086602 |
|
|
Jan 07 02:02:56 PM PST 24 |
Jan 07 02:29:42 PM PST 24 |
106048633570 ps |
T600 |
/workspace/coverage/cover_reg_top/10.xbar_error_and_unmapped_addr.910315443 |
|
|
Jan 07 02:02:05 PM PST 24 |
Jan 07 02:02:31 PM PST 24 |
479767378 ps |
T601 |
/workspace/coverage/cover_reg_top/56.xbar_random_zero_delays.3219985436 |
|
|
Jan 07 02:04:14 PM PST 24 |
Jan 07 02:04:49 PM PST 24 |
74086752 ps |
T602 |
/workspace/coverage/cover_reg_top/23.xbar_stress_all.1417955084 |
|
|
Jan 07 02:02:42 PM PST 24 |
Jan 07 02:03:55 PM PST 24 |
1905350642 ps |
T603 |
/workspace/coverage/cover_reg_top/25.xbar_random.1225417918 |
|
|
Jan 07 02:02:55 PM PST 24 |
Jan 07 02:03:40 PM PST 24 |
504544307 ps |
T604 |
/workspace/coverage/cover_reg_top/36.xbar_random.1101548182 |
|
|
Jan 07 02:03:57 PM PST 24 |
Jan 07 02:05:38 PM PST 24 |
562078170 ps |
T605 |
/workspace/coverage/cover_reg_top/41.xbar_smoke_zero_delays.408499944 |
|
|
Jan 07 02:04:20 PM PST 24 |
Jan 07 02:05:12 PM PST 24 |
50057009 ps |
T606 |
/workspace/coverage/cover_reg_top/95.xbar_smoke_zero_delays.821373420 |
|
|
Jan 07 02:06:57 PM PST 24 |
Jan 07 02:07:42 PM PST 24 |
49774598 ps |
T607 |
/workspace/coverage/cover_reg_top/1.xbar_smoke.951998129 |
|
|
Jan 07 02:01:20 PM PST 24 |
Jan 07 02:01:36 PM PST 24 |
228557720 ps |
T255 |
/workspace/coverage/cover_reg_top/41.xbar_access_same_device.325107780 |
|
|
Jan 07 02:04:59 PM PST 24 |
Jan 07 02:06:07 PM PST 24 |
288282951 ps |
T608 |
/workspace/coverage/cover_reg_top/15.xbar_smoke_slow_rsp.4155973163 |
|
|
Jan 07 02:01:21 PM PST 24 |
Jan 07 02:02:37 PM PST 24 |
3999646150 ps |
T609 |
/workspace/coverage/cover_reg_top/53.xbar_error_and_unmapped_addr.3545323489 |
|
|
Jan 07 02:04:37 PM PST 24 |
Jan 07 02:05:54 PM PST 24 |
223385328 ps |
T610 |
/workspace/coverage/cover_reg_top/20.xbar_random.1893010807 |
|
|
Jan 07 02:02:12 PM PST 24 |
Jan 07 02:02:40 PM PST 24 |
274899716 ps |
T611 |
/workspace/coverage/cover_reg_top/87.xbar_stress_all_with_error.221038462 |
|
|
Jan 07 02:06:29 PM PST 24 |
Jan 07 02:08:12 PM PST 24 |
2912501562 ps |
T612 |
/workspace/coverage/cover_reg_top/2.xbar_stress_all.4151105691 |
|
|
Jan 07 02:01:05 PM PST 24 |
Jan 07 02:01:18 PM PST 24 |
49437711 ps |
T613 |
/workspace/coverage/cover_reg_top/10.xbar_same_source.1031499888 |
|
|
Jan 07 02:01:25 PM PST 24 |
Jan 07 02:02:51 PM PST 24 |
2508806122 ps |
T614 |
/workspace/coverage/cover_reg_top/60.xbar_access_same_device_slow_rsp.3732030495 |
|
|
Jan 07 02:04:09 PM PST 24 |
Jan 07 02:23:24 PM PST 24 |
69230153744 ps |
T261 |
/workspace/coverage/cover_reg_top/16.chip_tl_errors.1990801467 |
|
|
Jan 07 02:02:16 PM PST 24 |
Jan 07 02:08:01 PM PST 24 |
4188897589 ps |
T615 |
/workspace/coverage/cover_reg_top/80.xbar_smoke.2151267762 |
|
|
Jan 07 02:05:50 PM PST 24 |
Jan 07 02:06:08 PM PST 24 |
36982983 ps |
T616 |
/workspace/coverage/cover_reg_top/52.xbar_same_source.981391299 |
|
|
Jan 07 02:04:02 PM PST 24 |
Jan 07 02:05:03 PM PST 24 |
389486213 ps |
T617 |
/workspace/coverage/cover_reg_top/8.xbar_access_same_device.3535819097 |
|
|
Jan 07 02:01:05 PM PST 24 |
Jan 07 02:02:35 PM PST 24 |
2296104536 ps |
T618 |
/workspace/coverage/cover_reg_top/7.xbar_random_slow_rsp.155777905 |
|
|
Jan 07 02:00:48 PM PST 24 |
Jan 07 02:04:27 PM PST 24 |
12404616469 ps |
T619 |
/workspace/coverage/cover_reg_top/60.xbar_random_large_delays.3500370332 |
|
|
Jan 07 02:04:20 PM PST 24 |
Jan 07 02:06:24 PM PST 24 |
7174130173 ps |
T620 |
/workspace/coverage/cover_reg_top/6.xbar_stress_all_with_reset_error.3119522281 |
|
|
Jan 07 02:00:52 PM PST 24 |
Jan 07 02:11:10 PM PST 24 |
7168592542 ps |
T621 |
/workspace/coverage/cover_reg_top/82.xbar_smoke_zero_delays.2276264734 |
|
|
Jan 07 02:06:06 PM PST 24 |
Jan 07 02:06:17 PM PST 24 |
54287004 ps |
T622 |
/workspace/coverage/cover_reg_top/75.xbar_smoke_slow_rsp.3616031969 |
|
|
Jan 07 02:05:25 PM PST 24 |
Jan 07 02:07:12 PM PST 24 |
4953300270 ps |
T623 |
/workspace/coverage/cover_reg_top/33.xbar_random_slow_rsp.2156130497 |
|
|
Jan 07 02:02:56 PM PST 24 |
Jan 07 02:12:56 PM PST 24 |
40497447752 ps |
T181 |
/workspace/coverage/cover_reg_top/36.xbar_random_zero_delays.2426771316 |
|
|
Jan 07 02:03:58 PM PST 24 |
Jan 07 02:05:02 PM PST 24 |
316733067 ps |
T624 |
/workspace/coverage/cover_reg_top/37.xbar_error_and_unmapped_addr.359426756 |
|
|
Jan 07 02:03:57 PM PST 24 |
Jan 07 02:05:08 PM PST 24 |
128309442 ps |
T326 |
/workspace/coverage/cover_reg_top/78.xbar_access_same_device_slow_rsp.1652667620 |
|
|
Jan 07 02:05:55 PM PST 24 |
Jan 07 02:38:43 PM PST 24 |
123047588702 ps |
T352 |
/workspace/coverage/cover_reg_top/30.xbar_stress_all_with_reset_error.2716715704 |
|
|
Jan 07 02:03:30 PM PST 24 |
Jan 07 02:11:30 PM PST 24 |
8313311024 ps |
T625 |
/workspace/coverage/cover_reg_top/53.xbar_stress_all.3053484379 |
|
|
Jan 07 02:04:15 PM PST 24 |
Jan 07 02:05:40 PM PST 24 |
751521567 ps |
T626 |
/workspace/coverage/cover_reg_top/51.xbar_smoke_zero_delays.3638802344 |
|
|
Jan 07 02:04:59 PM PST 24 |
Jan 07 02:05:46 PM PST 24 |
46020340 ps |
T627 |
/workspace/coverage/cover_reg_top/54.xbar_smoke_slow_rsp.1147381907 |
|
|
Jan 07 02:04:00 PM PST 24 |
Jan 07 02:06:14 PM PST 24 |
6219328442 ps |
T628 |
/workspace/coverage/cover_reg_top/14.xbar_smoke.3971088089 |
|
|
Jan 07 02:01:37 PM PST 24 |
Jan 07 02:01:48 PM PST 24 |
211331927 ps |
T629 |
/workspace/coverage/cover_reg_top/95.xbar_access_same_device.714224458 |
|
|
Jan 07 02:06:54 PM PST 24 |
Jan 07 02:09:05 PM PST 24 |
2430238097 ps |
T630 |
/workspace/coverage/cover_reg_top/16.xbar_same_source.1903963236 |
|
|
Jan 07 02:02:17 PM PST 24 |
Jan 07 02:02:49 PM PST 24 |
400704487 ps |
T631 |
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_rand_reset.3221359243 |
|
|
Jan 07 02:06:59 PM PST 24 |
Jan 07 02:09:06 PM PST 24 |
269249936 ps |
T632 |
/workspace/coverage/cover_reg_top/83.xbar_stress_all.2212124332 |
|
|
Jan 07 02:06:27 PM PST 24 |
Jan 07 02:08:12 PM PST 24 |
1250887698 ps |
T633 |
/workspace/coverage/cover_reg_top/33.xbar_access_same_device.3438097956 |
|
|
Jan 07 02:02:45 PM PST 24 |
Jan 07 02:05:02 PM PST 24 |
3011921967 ps |
T634 |
/workspace/coverage/cover_reg_top/79.xbar_random_large_delays.4063592270 |
|
|
Jan 07 02:05:46 PM PST 24 |
Jan 07 02:18:05 PM PST 24 |
66525785748 ps |
T635 |
/workspace/coverage/cover_reg_top/30.xbar_error_and_unmapped_addr.3731692755 |
|
|
Jan 07 02:02:47 PM PST 24 |
Jan 07 02:03:18 PM PST 24 |
242158844 ps |
T636 |
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_rand_reset.1195482861 |
|
|
Jan 07 02:00:35 PM PST 24 |
Jan 07 02:01:55 PM PST 24 |
247375639 ps |
T637 |
/workspace/coverage/cover_reg_top/18.xbar_error_random.344190598 |
|
|
Jan 07 02:02:38 PM PST 24 |
Jan 07 02:03:42 PM PST 24 |
1894282837 ps |
T638 |
/workspace/coverage/cover_reg_top/9.xbar_stress_all_with_reset_error.1150059198 |
|
|
Jan 07 02:01:19 PM PST 24 |
Jan 07 02:01:48 PM PST 24 |
11338682 ps |
T178 |
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_rand_reset.3615726101 |
|
|
Jan 07 02:06:55 PM PST 24 |
Jan 07 02:14:00 PM PST 24 |
6013541409 ps |
T237 |
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_error.2461238498 |
|
|
Jan 07 02:07:00 PM PST 24 |
Jan 07 02:09:34 PM PST 24 |
1881451339 ps |
T639 |
/workspace/coverage/cover_reg_top/46.xbar_random_zero_delays.867223020 |
|
|
Jan 07 02:03:59 PM PST 24 |
Jan 07 02:05:21 PM PST 24 |
556357427 ps |
T640 |
/workspace/coverage/cover_reg_top/31.xbar_error_and_unmapped_addr.1040164322 |
|
|
Jan 07 02:04:11 PM PST 24 |
Jan 07 02:04:46 PM PST 24 |
34691981 ps |
T641 |
/workspace/coverage/cover_reg_top/10.xbar_error_random.2707501466 |
|
|
Jan 07 02:01:41 PM PST 24 |
Jan 07 02:02:26 PM PST 24 |
1404267365 ps |
T642 |
/workspace/coverage/cover_reg_top/11.xbar_random.1910233448 |
|
|
Jan 07 02:02:44 PM PST 24 |
Jan 07 02:03:38 PM PST 24 |
574075277 ps |
T643 |
/workspace/coverage/cover_reg_top/33.xbar_random_large_delays.824127077 |
|
|
Jan 07 02:03:08 PM PST 24 |
Jan 07 02:16:50 PM PST 24 |
79697616330 ps |
T644 |
/workspace/coverage/cover_reg_top/60.xbar_stress_all.1082345311 |
|
|
Jan 07 02:04:19 PM PST 24 |
Jan 07 02:09:47 PM PST 24 |
8548089770 ps |
T645 |
/workspace/coverage/cover_reg_top/6.xbar_smoke_slow_rsp.3564025506 |
|
|
Jan 07 02:00:36 PM PST 24 |
Jan 07 02:02:07 PM PST 24 |
4826229917 ps |
T646 |
/workspace/coverage/cover_reg_top/59.xbar_stress_all.3782893002 |
|
|
Jan 07 02:05:03 PM PST 24 |
Jan 07 02:09:37 PM PST 24 |
7612202898 ps |
T647 |
/workspace/coverage/cover_reg_top/35.xbar_access_same_device.708956283 |
|
|
Jan 07 02:03:53 PM PST 24 |
Jan 07 02:06:01 PM PST 24 |
2234417057 ps |
T648 |
/workspace/coverage/cover_reg_top/5.xbar_error_and_unmapped_addr.4230197181 |
|
|
Jan 07 02:01:19 PM PST 24 |
Jan 07 02:02:23 PM PST 24 |
1416210843 ps |
T649 |
/workspace/coverage/cover_reg_top/60.xbar_smoke_slow_rsp.3739937582 |
|
|
Jan 07 02:04:10 PM PST 24 |
Jan 07 02:05:55 PM PST 24 |
5130229843 ps |
T650 |
/workspace/coverage/cover_reg_top/16.xbar_random_slow_rsp.120226470 |
|
|
Jan 07 02:01:58 PM PST 24 |
Jan 07 02:12:48 PM PST 24 |
36163968055 ps |
T344 |
/workspace/coverage/cover_reg_top/54.xbar_stress_all_with_rand_reset.1966789540 |
|
|
Jan 07 02:03:53 PM PST 24 |
Jan 07 02:06:50 PM PST 24 |
287363896 ps |
T651 |
/workspace/coverage/cover_reg_top/91.xbar_smoke_slow_rsp.3017940515 |
|
|
Jan 07 02:06:54 PM PST 24 |
Jan 07 02:09:21 PM PST 24 |
6402744856 ps |
T652 |
/workspace/coverage/cover_reg_top/15.xbar_random_slow_rsp.3500822647 |
|
|
Jan 07 02:01:21 PM PST 24 |
Jan 07 02:04:53 PM PST 24 |
11039603506 ps |
T653 |
/workspace/coverage/cover_reg_top/71.xbar_error_and_unmapped_addr.756576347 |
|
|
Jan 07 02:05:22 PM PST 24 |
Jan 07 02:05:57 PM PST 24 |
150399586 ps |
T159 |
/workspace/coverage/cover_reg_top/37.xbar_access_same_device.309638192 |
|
|
Jan 07 02:02:56 PM PST 24 |
Jan 07 02:03:45 PM PST 24 |
1063871051 ps |
T654 |
/workspace/coverage/cover_reg_top/44.xbar_smoke_zero_delays.3255064795 |
|
|
Jan 07 02:03:26 PM PST 24 |
Jan 07 02:03:34 PM PST 24 |
43091561 ps |
T655 |
/workspace/coverage/cover_reg_top/84.xbar_same_source.1137932091 |
|
|
Jan 07 02:06:26 PM PST 24 |
Jan 07 02:07:27 PM PST 24 |
2030286616 ps |
T656 |
/workspace/coverage/cover_reg_top/66.xbar_stress_all_with_error.4245356198 |
|
|
Jan 07 02:04:55 PM PST 24 |
Jan 07 02:06:01 PM PST 24 |
159770018 ps |
T52 |
/workspace/coverage/cover_reg_top/17.chip_csr_mem_rw_with_rand_reset.3361703869 |
|
|
Jan 07 02:02:56 PM PST 24 |
Jan 07 02:06:02 PM PST 24 |
4216913745 ps |
T657 |
/workspace/coverage/cover_reg_top/43.xbar_smoke_large_delays.2382080061 |
|
|
Jan 07 02:03:04 PM PST 24 |
Jan 07 02:04:26 PM PST 24 |
7463358429 ps |
T658 |
/workspace/coverage/cover_reg_top/82.xbar_random_zero_delays.1082830873 |
|
|
Jan 07 02:06:11 PM PST 24 |
Jan 07 02:06:51 PM PST 24 |
431775949 ps |
T659 |
/workspace/coverage/cover_reg_top/66.xbar_smoke_large_delays.2079325335 |
|
|
Jan 07 02:04:43 PM PST 24 |
Jan 07 02:06:43 PM PST 24 |
6574435145 ps |
T660 |
/workspace/coverage/cover_reg_top/54.xbar_same_source.4234149797 |
|
|
Jan 07 02:03:47 PM PST 24 |
Jan 07 02:05:25 PM PST 24 |
1613420186 ps |
T661 |
/workspace/coverage/cover_reg_top/30.xbar_random_slow_rsp.487886342 |
|
|
Jan 07 02:03:11 PM PST 24 |
Jan 07 02:11:30 PM PST 24 |
27629984157 ps |
T662 |
/workspace/coverage/cover_reg_top/14.xbar_random_slow_rsp.1725932476 |
|
|
Jan 07 02:02:15 PM PST 24 |
Jan 07 02:22:55 PM PST 24 |
73229780307 ps |
T663 |
/workspace/coverage/cover_reg_top/99.xbar_unmapped_addr.1332924819 |
|
|
Jan 07 02:07:11 PM PST 24 |
Jan 07 02:07:58 PM PST 24 |
110722983 ps |
T664 |
/workspace/coverage/cover_reg_top/24.xbar_stress_all_with_error.1872534039 |
|
|
Jan 07 02:02:54 PM PST 24 |
Jan 07 02:05:47 PM PST 24 |
2351579516 ps |
T30 |
/workspace/coverage/cover_reg_top/0.chip_csr_hw_reset.3672021224 |
|
|
Jan 07 02:01:15 PM PST 24 |
Jan 07 02:07:33 PM PST 24 |
7304396488 ps |
T665 |
/workspace/coverage/cover_reg_top/30.xbar_random_large_delays.3816177921 |
|
|
Jan 07 02:02:59 PM PST 24 |
Jan 07 02:18:59 PM PST 24 |
93692574217 ps |
T666 |
/workspace/coverage/cover_reg_top/38.xbar_random_zero_delays.1924337050 |
|
|
Jan 07 02:02:58 PM PST 24 |
Jan 07 02:03:16 PM PST 24 |
110781119 ps |
T172 |
/workspace/coverage/cover_reg_top/31.xbar_stress_all.3433575554 |
|
|
Jan 07 02:02:42 PM PST 24 |
Jan 07 02:14:02 PM PST 24 |
18851290024 ps |
T667 |
/workspace/coverage/cover_reg_top/30.xbar_smoke.2650094477 |
|
|
Jan 07 02:02:43 PM PST 24 |
Jan 07 02:02:56 PM PST 24 |
205076288 ps |
T44 |
/workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.465483778 |
|
|
Jan 07 02:00:58 PM PST 24 |
Jan 07 02:07:43 PM PST 24 |
9571660622 ps |
T668 |
/workspace/coverage/cover_reg_top/92.xbar_random_zero_delays.3992084103 |
|
|
Jan 07 02:07:02 PM PST 24 |
Jan 07 02:08:08 PM PST 24 |
352302992 ps |
T669 |
/workspace/coverage/cover_reg_top/21.xbar_error_random.3368894877 |
|
|
Jan 07 02:01:58 PM PST 24 |
Jan 07 02:02:08 PM PST 24 |
34755167 ps |
T263 |
/workspace/coverage/cover_reg_top/9.chip_tl_errors.3139315982 |
|
|
Jan 07 02:01:06 PM PST 24 |
Jan 07 02:09:16 PM PST 24 |
5102906734 ps |
T66 |
/workspace/coverage/cover_reg_top/12.chip_same_csr_outstanding.96209236 |
|
|
Jan 07 02:01:20 PM PST 24 |
Jan 07 02:23:24 PM PST 24 |
15306973707 ps |
T670 |
/workspace/coverage/cover_reg_top/31.xbar_random.857154884 |
|
|
Jan 07 02:03:56 PM PST 24 |
Jan 07 02:05:09 PM PST 24 |
475674755 ps |
T671 |
/workspace/coverage/cover_reg_top/93.xbar_access_same_device.2610105334 |
|
|
Jan 07 02:06:51 PM PST 24 |
Jan 07 02:08:52 PM PST 24 |
2441733721 ps |
T672 |
/workspace/coverage/cover_reg_top/94.xbar_error_and_unmapped_addr.318657292 |
|
|
Jan 07 02:06:56 PM PST 24 |
Jan 07 02:08:08 PM PST 24 |
344504630 ps |
T673 |
/workspace/coverage/cover_reg_top/7.xbar_smoke_large_delays.1338992619 |
|
|
Jan 07 02:00:49 PM PST 24 |
Jan 07 02:02:18 PM PST 24 |
8221394943 ps |
T674 |
/workspace/coverage/cover_reg_top/60.xbar_access_same_device.1782729548 |
|
|
Jan 07 02:04:21 PM PST 24 |
Jan 07 02:07:13 PM PST 24 |
3441427837 ps |
T327 |
/workspace/coverage/cover_reg_top/60.xbar_stress_all_with_rand_reset.1526780517 |
|
|
Jan 07 02:04:17 PM PST 24 |
Jan 07 02:09:05 PM PST 24 |
741588632 ps |
T675 |
/workspace/coverage/cover_reg_top/13.xbar_random_large_delays.639312155 |
|
|
Jan 07 02:01:19 PM PST 24 |
Jan 07 02:03:43 PM PST 24 |
11358135628 ps |
T264 |
/workspace/coverage/cover_reg_top/18.chip_tl_errors.1166728731 |
|
|
Jan 07 02:02:48 PM PST 24 |
Jan 07 02:05:46 PM PST 24 |
3486727672 ps |
T676 |
/workspace/coverage/cover_reg_top/18.xbar_access_same_device_slow_rsp.337639883 |
|
|
Jan 07 02:03:52 PM PST 24 |
Jan 07 02:25:56 PM PST 24 |
75637549741 ps |
T677 |
/workspace/coverage/cover_reg_top/25.xbar_access_same_device_slow_rsp.360870573 |
|
|
Jan 07 02:02:45 PM PST 24 |
Jan 07 02:44:42 PM PST 24 |
140127536238 ps |
T678 |
/workspace/coverage/cover_reg_top/35.xbar_smoke_zero_delays.1824445311 |
|
|
Jan 07 02:02:52 PM PST 24 |
Jan 07 02:03:03 PM PST 24 |
47519291 ps |
T679 |
/workspace/coverage/cover_reg_top/32.xbar_smoke_slow_rsp.3692531523 |
|
|
Jan 07 02:02:49 PM PST 24 |
Jan 07 02:04:15 PM PST 24 |
4483037591 ps |
T680 |
/workspace/coverage/cover_reg_top/62.xbar_stress_all_with_reset_error.105811548 |
|
|
Jan 07 02:04:13 PM PST 24 |
Jan 07 02:08:24 PM PST 24 |
2183605744 ps |
T681 |
/workspace/coverage/cover_reg_top/12.xbar_random_large_delays.1716442953 |
|
|
Jan 07 02:01:16 PM PST 24 |
Jan 07 02:13:41 PM PST 24 |
60774936365 ps |
T682 |
/workspace/coverage/cover_reg_top/75.xbar_unmapped_addr.2109570112 |
|
|
Jan 07 02:05:43 PM PST 24 |
Jan 07 02:06:40 PM PST 24 |
287579248 ps |
T354 |
/workspace/coverage/cover_reg_top/3.xbar_stress_all_with_rand_reset.1466084672 |
|
|
Jan 07 02:00:59 PM PST 24 |
Jan 07 02:07:30 PM PST 24 |
5286081250 ps |
T683 |
/workspace/coverage/cover_reg_top/34.xbar_random_slow_rsp.3115924472 |
|
|
Jan 07 02:02:53 PM PST 24 |
Jan 07 02:20:35 PM PST 24 |
61844099151 ps |
T684 |
/workspace/coverage/cover_reg_top/57.xbar_stress_all_with_reset_error.2284490967 |
|
|
Jan 07 02:04:04 PM PST 24 |
Jan 07 02:11:17 PM PST 24 |
4736790877 ps |
T685 |
/workspace/coverage/cover_reg_top/59.xbar_smoke_large_delays.1805367915 |
|
|
Jan 07 02:04:17 PM PST 24 |
Jan 07 02:06:01 PM PST 24 |
7361881795 ps |
T686 |
/workspace/coverage/cover_reg_top/52.xbar_smoke_slow_rsp.1475379157 |
|
|
Jan 07 02:04:03 PM PST 24 |
Jan 07 02:05:36 PM PST 24 |
3673799304 ps |
T687 |
/workspace/coverage/cover_reg_top/46.xbar_access_same_device.378514564 |
|
|
Jan 07 02:03:50 PM PST 24 |
Jan 07 02:05:17 PM PST 24 |
176748766 ps |
T688 |
/workspace/coverage/cover_reg_top/90.xbar_access_same_device.248101837 |
|
|
Jan 07 02:06:31 PM PST 24 |
Jan 07 02:06:46 PM PST 24 |
245547433 ps |
T689 |
/workspace/coverage/cover_reg_top/38.xbar_random_slow_rsp.495356366 |
|
|
Jan 07 02:03:32 PM PST 24 |
Jan 07 02:14:00 PM PST 24 |
38408749178 ps |
T690 |
/workspace/coverage/cover_reg_top/72.xbar_random_large_delays.786170985 |
|
|
Jan 07 02:05:19 PM PST 24 |
Jan 07 02:11:40 PM PST 24 |
34506529608 ps |
T691 |
/workspace/coverage/cover_reg_top/58.xbar_stress_all.74077214 |
|
|
Jan 07 02:04:38 PM PST 24 |
Jan 07 02:07:47 PM PST 24 |
1975584521 ps |
T692 |
/workspace/coverage/cover_reg_top/46.xbar_smoke.2422965391 |
|
|
Jan 07 02:03:50 PM PST 24 |
Jan 07 02:04:49 PM PST 24 |
234610632 ps |
T267 |
/workspace/coverage/cover_reg_top/12.chip_tl_errors.555826406 |
|
|
Jan 07 02:02:11 PM PST 24 |
Jan 07 02:06:44 PM PST 24 |
4381353500 ps |
T693 |
/workspace/coverage/cover_reg_top/37.xbar_stress_all_with_rand_reset.370933473 |
|
|
Jan 07 02:02:59 PM PST 24 |
Jan 07 02:04:15 PM PST 24 |
227323758 ps |
T348 |
/workspace/coverage/cover_reg_top/83.xbar_stress_all_with_reset_error.3496354898 |
|
|
Jan 07 02:06:02 PM PST 24 |
Jan 07 02:09:36 PM PST 24 |
791826519 ps |
T268 |
/workspace/coverage/cover_reg_top/22.chip_tl_errors.473650949 |
|
|
Jan 07 02:02:06 PM PST 24 |
Jan 07 02:05:24 PM PST 24 |
3454810899 ps |
T694 |
/workspace/coverage/cover_reg_top/39.xbar_smoke.210558560 |
|
|
Jan 07 02:03:55 PM PST 24 |
Jan 07 02:04:41 PM PST 24 |
207088068 ps |
T695 |
/workspace/coverage/cover_reg_top/22.xbar_random_zero_delays.695618151 |
|
|
Jan 07 02:02:45 PM PST 24 |
Jan 07 02:03:01 PM PST 24 |
91171282 ps |
T331 |
/workspace/coverage/cover_reg_top/68.xbar_stress_all_with_rand_reset.193332161 |
|
|
Jan 07 02:04:54 PM PST 24 |
Jan 07 02:07:14 PM PST 24 |
186868321 ps |
T265 |
/workspace/coverage/cover_reg_top/6.chip_tl_errors.2323204775 |
|
|
Jan 07 02:00:59 PM PST 24 |
Jan 07 02:05:20 PM PST 24 |
4046121116 ps |
T696 |
/workspace/coverage/cover_reg_top/85.xbar_smoke_slow_rsp.2837121078 |
|
|
Jan 07 02:06:31 PM PST 24 |
Jan 07 02:08:05 PM PST 24 |
5778910381 ps |
T697 |
/workspace/coverage/cover_reg_top/37.xbar_error_random.1454760005 |
|
|
Jan 07 02:02:46 PM PST 24 |
Jan 07 02:03:53 PM PST 24 |
1824659832 ps |
T698 |
/workspace/coverage/cover_reg_top/56.xbar_smoke_slow_rsp.1255147911 |
|
|
Jan 07 02:04:05 PM PST 24 |
Jan 07 02:06:17 PM PST 24 |
5902066549 ps |
T699 |
/workspace/coverage/cover_reg_top/84.xbar_unmapped_addr.1123759608 |
|
|
Jan 07 02:06:47 PM PST 24 |
Jan 07 02:07:28 PM PST 24 |
188771454 ps |
T700 |
/workspace/coverage/cover_reg_top/54.xbar_smoke.2076671273 |
|
|
Jan 07 02:03:55 PM PST 24 |
Jan 07 02:04:49 PM PST 24 |
47230940 ps |
T701 |
/workspace/coverage/cover_reg_top/86.xbar_same_source.360327248 |
|
|
Jan 07 02:06:55 PM PST 24 |
Jan 07 02:08:37 PM PST 24 |
2213754413 ps |
T702 |
/workspace/coverage/cover_reg_top/57.xbar_access_same_device_slow_rsp.2073164917 |
|
|
Jan 07 02:04:00 PM PST 24 |
Jan 07 02:38:54 PM PST 24 |
127829718527 ps |
T703 |
/workspace/coverage/cover_reg_top/41.xbar_error_random.3597292604 |
|
|
Jan 07 02:03:52 PM PST 24 |
Jan 07 02:06:08 PM PST 24 |
2452576931 ps |
T704 |
/workspace/coverage/cover_reg_top/88.xbar_random_slow_rsp.2496802258 |
|
|
Jan 07 02:06:27 PM PST 24 |
Jan 07 02:10:26 PM PST 24 |
13606228260 ps |
T705 |
/workspace/coverage/cover_reg_top/55.xbar_random_zero_delays.1793413209 |
|
|
Jan 07 02:04:03 PM PST 24 |
Jan 07 02:05:01 PM PST 24 |
151968858 ps |
T706 |
/workspace/coverage/cover_reg_top/90.xbar_access_same_device_slow_rsp.1082692605 |
|
|
Jan 07 02:06:46 PM PST 24 |
Jan 07 02:48:53 PM PST 24 |
150922574014 ps |
T707 |
/workspace/coverage/cover_reg_top/10.xbar_access_same_device.339186386 |
|
|
Jan 07 02:01:59 PM PST 24 |
Jan 07 02:02:52 PM PST 24 |
493841638 ps |
T708 |
/workspace/coverage/cover_reg_top/11.chip_tl_errors.3941043211 |
|
|
Jan 07 02:02:11 PM PST 24 |
Jan 07 02:06:11 PM PST 24 |
3717457328 ps |
T709 |
/workspace/coverage/cover_reg_top/25.xbar_smoke_zero_delays.586360307 |
|
|
Jan 07 02:02:55 PM PST 24 |
Jan 07 02:03:07 PM PST 24 |
49730536 ps |
T710 |
/workspace/coverage/cover_reg_top/39.xbar_error_and_unmapped_addr.1005851194 |
|
|
Jan 07 02:03:57 PM PST 24 |
Jan 07 02:05:30 PM PST 24 |
1269994179 ps |
T160 |
/workspace/coverage/cover_reg_top/48.xbar_same_source.4109669751 |
|
|
Jan 07 02:04:04 PM PST 24 |
Jan 07 02:05:11 PM PST 24 |
444332503 ps |
T711 |
/workspace/coverage/cover_reg_top/10.xbar_smoke_zero_delays.1262305477 |
|
|
Jan 07 02:01:16 PM PST 24 |
Jan 07 02:01:31 PM PST 24 |
42909554 ps |
T712 |
/workspace/coverage/cover_reg_top/62.xbar_smoke_large_delays.3821226617 |
|
|
Jan 07 02:04:55 PM PST 24 |
Jan 07 02:07:08 PM PST 24 |
7952322345 ps |
T713 |
/workspace/coverage/cover_reg_top/54.xbar_random_large_delays.2425953355 |
|
|
Jan 07 02:03:53 PM PST 24 |
Jan 07 02:19:34 PM PST 24 |
78630662342 ps |
T714 |
/workspace/coverage/cover_reg_top/8.xbar_smoke_large_delays.1522229225 |
|
|
Jan 07 02:01:00 PM PST 24 |
Jan 07 02:02:45 PM PST 24 |
9105095091 ps |
T715 |
/workspace/coverage/cover_reg_top/27.xbar_smoke_slow_rsp.1728493277 |
|
|
Jan 07 02:02:52 PM PST 24 |
Jan 07 02:04:20 PM PST 24 |
4825698308 ps |
T716 |
/workspace/coverage/cover_reg_top/96.xbar_smoke_zero_delays.969662323 |
|
|
Jan 07 02:06:59 PM PST 24 |
Jan 07 02:07:43 PM PST 24 |
44315312 ps |
T717 |
/workspace/coverage/cover_reg_top/98.xbar_smoke_zero_delays.2228451016 |
|
|
Jan 07 02:06:57 PM PST 24 |
Jan 07 02:07:42 PM PST 24 |
45633311 ps |
T718 |
/workspace/coverage/cover_reg_top/38.xbar_same_source.2371081092 |
|
|
Jan 07 02:03:01 PM PST 24 |
Jan 07 02:03:22 PM PST 24 |
422544056 ps |
T719 |
/workspace/coverage/cover_reg_top/65.xbar_random_slow_rsp.1522855802 |
|
|
Jan 07 02:04:37 PM PST 24 |
Jan 07 02:17:48 PM PST 24 |
49428728480 ps |
T190 |
/workspace/coverage/cover_reg_top/44.xbar_access_same_device_slow_rsp.2676289942 |
|
|
Jan 07 02:03:59 PM PST 24 |
Jan 07 02:35:19 PM PST 24 |
113832919018 ps |
T720 |
/workspace/coverage/cover_reg_top/10.xbar_random_large_delays.1020380751 |
|
|
Jan 07 02:02:09 PM PST 24 |
Jan 07 02:15:02 PM PST 24 |
69122005797 ps |
T162 |
/workspace/coverage/cover_reg_top/74.xbar_stress_all_with_rand_reset.3937736883 |
|
|
Jan 07 02:06:08 PM PST 24 |
Jan 07 02:15:46 PM PST 24 |
12362832854 ps |
T721 |
/workspace/coverage/cover_reg_top/43.xbar_smoke_zero_delays.679866708 |
|
|
Jan 07 02:03:49 PM PST 24 |
Jan 07 02:04:59 PM PST 24 |
48246796 ps |
T722 |
/workspace/coverage/cover_reg_top/75.xbar_smoke_zero_delays.394434365 |
|
|
Jan 07 02:05:44 PM PST 24 |
Jan 07 02:06:06 PM PST 24 |
43148223 ps |
T723 |
/workspace/coverage/cover_reg_top/42.xbar_access_same_device_slow_rsp.1264948415 |
|
|
Jan 07 02:03:57 PM PST 24 |
Jan 07 02:49:37 PM PST 24 |
156129050459 ps |
T724 |
/workspace/coverage/cover_reg_top/82.xbar_error_and_unmapped_addr.2991968369 |
|
|
Jan 07 02:06:04 PM PST 24 |
Jan 07 02:06:41 PM PST 24 |
743256791 ps |
T725 |
/workspace/coverage/cover_reg_top/12.xbar_stress_all_with_reset_error.576874677 |
|
|
Jan 07 02:01:17 PM PST 24 |
Jan 07 02:07:41 PM PST 24 |
2456045610 ps |
T726 |
/workspace/coverage/cover_reg_top/11.xbar_unmapped_addr.2760804678 |
|
|
Jan 07 02:02:53 PM PST 24 |
Jan 07 02:03:36 PM PST 24 |
859400050 ps |
T33 |
/workspace/coverage/cover_reg_top/2.chip_same_csr_outstanding.2809790341 |
|
|
Jan 07 02:01:00 PM PST 24 |
Jan 07 02:41:34 PM PST 24 |
29141922461 ps |
T727 |
/workspace/coverage/cover_reg_top/71.xbar_unmapped_addr.3811124375 |
|
|
Jan 07 02:05:19 PM PST 24 |
Jan 07 02:05:58 PM PST 24 |
240160559 ps |
T728 |
/workspace/coverage/cover_reg_top/84.xbar_smoke_slow_rsp.3054870797 |
|
|
Jan 07 02:06:31 PM PST 24 |
Jan 07 02:08:07 PM PST 24 |
5801115796 ps |
T729 |
/workspace/coverage/cover_reg_top/66.xbar_random_zero_delays.3523784549 |
|
|
Jan 07 02:04:53 PM PST 24 |
Jan 07 02:05:49 PM PST 24 |
93636324 ps |
T730 |
/workspace/coverage/cover_reg_top/93.xbar_random.3634099040 |
|
|
Jan 07 02:06:32 PM PST 24 |
Jan 07 02:06:42 PM PST 24 |
36069248 ps |
T731 |
/workspace/coverage/cover_reg_top/50.xbar_stress_all_with_rand_reset.4234380908 |
|
|
Jan 07 02:04:59 PM PST 24 |
Jan 07 02:05:58 PM PST 24 |
56508866 ps |
T732 |
/workspace/coverage/cover_reg_top/47.xbar_stress_all_with_error.54794216 |
|
|
Jan 07 02:04:09 PM PST 24 |
Jan 07 02:07:31 PM PST 24 |
2166823029 ps |
T733 |
/workspace/coverage/cover_reg_top/40.xbar_smoke_zero_delays.4062871131 |
|
|
Jan 07 02:03:58 PM PST 24 |
Jan 07 02:04:43 PM PST 24 |
41458974 ps |
T734 |
/workspace/coverage/cover_reg_top/50.xbar_smoke_zero_delays.359896086 |
|
|
Jan 07 02:04:20 PM PST 24 |
Jan 07 02:05:12 PM PST 24 |
49676990 ps |
T735 |
/workspace/coverage/cover_reg_top/98.xbar_smoke.1141499048 |
|
|
Jan 07 02:07:03 PM PST 24 |
Jan 07 02:07:45 PM PST 24 |
119624747 ps |
T53 |
/workspace/coverage/cover_reg_top/9.chip_csr_mem_rw_with_rand_reset.4221096109 |
|
|
Jan 07 02:01:19 PM PST 24 |
Jan 07 02:04:58 PM PST 24 |
6713976639 ps |
T736 |
/workspace/coverage/cover_reg_top/54.xbar_error_and_unmapped_addr.2201555924 |
|
|
Jan 07 02:03:52 PM PST 24 |
Jan 07 02:05:22 PM PST 24 |
1070680523 ps |
T737 |
/workspace/coverage/cover_reg_top/81.xbar_access_same_device.2449912987 |
|
|
Jan 07 02:05:53 PM PST 24 |
Jan 07 02:07:09 PM PST 24 |
781878957 ps |
T340 |
/workspace/coverage/cover_reg_top/76.xbar_stress_all_with_rand_reset.3806362757 |
|
|
Jan 07 02:05:52 PM PST 24 |
Jan 07 02:08:17 PM PST 24 |
395718001 ps |
T738 |
/workspace/coverage/cover_reg_top/29.xbar_stress_all_with_rand_reset.1400401226 |
|
|
Jan 07 02:03:10 PM PST 24 |
Jan 07 02:03:56 PM PST 24 |
97917465 ps |
T739 |
/workspace/coverage/cover_reg_top/3.xbar_smoke_large_delays.1570803805 |
|
|
Jan 07 02:01:10 PM PST 24 |
Jan 07 02:03:08 PM PST 24 |
10448939940 ps |
T740 |
/workspace/coverage/cover_reg_top/29.xbar_stress_all.1054444860 |
|
|
Jan 07 02:02:43 PM PST 24 |
Jan 07 02:12:47 PM PST 24 |
15508241348 ps |
T741 |
/workspace/coverage/cover_reg_top/51.xbar_smoke.2856175754 |
|
|
Jan 07 02:04:10 PM PST 24 |
Jan 07 02:04:43 PM PST 24 |
46563267 ps |
T742 |
/workspace/coverage/cover_reg_top/9.xbar_random_zero_delays.3056773508 |
|
|
Jan 07 02:01:15 PM PST 24 |
Jan 07 02:02:07 PM PST 24 |
584325171 ps |
T743 |
/workspace/coverage/cover_reg_top/89.xbar_smoke.3169798046 |
|
|
Jan 07 02:06:27 PM PST 24 |
Jan 07 02:06:39 PM PST 24 |
209881856 ps |
T744 |
/workspace/coverage/cover_reg_top/54.xbar_random_slow_rsp.1610664229 |
|
|
Jan 07 02:03:54 PM PST 24 |
Jan 07 02:19:20 PM PST 24 |
53249876028 ps |
T745 |
/workspace/coverage/cover_reg_top/7.xbar_smoke_zero_delays.881517601 |
|
|
Jan 07 02:01:04 PM PST 24 |
Jan 07 02:01:17 PM PST 24 |
40723495 ps |
T746 |
/workspace/coverage/cover_reg_top/53.xbar_random_slow_rsp.808100259 |
|
|
Jan 07 02:03:55 PM PST 24 |
Jan 07 02:22:42 PM PST 24 |
63185171673 ps |
T747 |
/workspace/coverage/cover_reg_top/64.xbar_access_same_device.1636003097 |
|
|
Jan 07 02:04:09 PM PST 24 |
Jan 07 02:04:47 PM PST 24 |
213139245 ps |
T748 |
/workspace/coverage/cover_reg_top/71.xbar_random_zero_delays.967992717 |
|
|
Jan 07 02:05:21 PM PST 24 |
Jan 07 02:05:57 PM PST 24 |
84384924 ps |
T749 |
/workspace/coverage/cover_reg_top/43.xbar_random_slow_rsp.2680477480 |
|
|
Jan 07 02:03:04 PM PST 24 |
Jan 07 02:18:56 PM PST 24 |
55043540586 ps |
T750 |
/workspace/coverage/cover_reg_top/21.xbar_smoke_zero_delays.1195322900 |
|
|
Jan 07 02:02:02 PM PST 24 |
Jan 07 02:02:10 PM PST 24 |
40060315 ps |
T751 |
/workspace/coverage/cover_reg_top/90.xbar_same_source.913070633 |
|
|
Jan 07 02:06:52 PM PST 24 |
Jan 07 02:07:50 PM PST 24 |
912192772 ps |
T752 |
/workspace/coverage/cover_reg_top/47.xbar_stress_all_with_reset_error.991095674 |
|
|
Jan 07 02:04:05 PM PST 24 |
Jan 07 02:09:18 PM PST 24 |
4484143138 ps |
T753 |
/workspace/coverage/cover_reg_top/88.xbar_stress_all_with_rand_reset.267863302 |
|
|
Jan 07 02:06:29 PM PST 24 |
Jan 07 02:12:10 PM PST 24 |
3892603192 ps |
T754 |
/workspace/coverage/cover_reg_top/10.xbar_access_same_device_slow_rsp.1303139848 |
|
|
Jan 07 02:01:48 PM PST 24 |
Jan 07 02:17:56 PM PST 24 |
58861973651 ps |
T755 |
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_reset_error.1794798720 |
|
|
Jan 07 02:07:09 PM PST 24 |
Jan 07 02:08:07 PM PST 24 |
82943948 ps |
T756 |
/workspace/coverage/cover_reg_top/10.xbar_random.2963354982 |
|
|
Jan 07 02:01:50 PM PST 24 |
Jan 07 02:02:42 PM PST 24 |
533040311 ps |
T757 |
/workspace/coverage/cover_reg_top/78.xbar_random_slow_rsp.1066829342 |
|
|
Jan 07 02:05:50 PM PST 24 |
Jan 07 02:24:11 PM PST 24 |
72337135022 ps |
T36 |
/workspace/coverage/cover_reg_top/8.chip_same_csr_outstanding.476457236 |
|
|
Jan 07 02:00:49 PM PST 24 |
Jan 07 02:55:42 PM PST 24 |
27593388555 ps |
T758 |
/workspace/coverage/cover_reg_top/24.xbar_error_and_unmapped_addr.3547184882 |
|
|
Jan 07 02:02:52 PM PST 24 |
Jan 07 02:03:43 PM PST 24 |
1201757944 ps |
T759 |
/workspace/coverage/cover_reg_top/39.xbar_smoke_large_delays.3193157902 |
|
|
Jan 07 02:03:50 PM PST 24 |
Jan 07 02:06:05 PM PST 24 |
9009700287 ps |
T337 |
/workspace/coverage/cover_reg_top/20.xbar_stress_all_with_rand_reset.3329956875 |
|
|
Jan 07 02:01:59 PM PST 24 |
Jan 07 02:10:41 PM PST 24 |
8767239617 ps |
T760 |
/workspace/coverage/cover_reg_top/44.xbar_access_same_device.3952644070 |
|
|
Jan 07 02:03:57 PM PST 24 |
Jan 07 02:05:57 PM PST 24 |
2058878383 ps |
T50 |
/workspace/coverage/cover_reg_top/1.chip_csr_mem_rw_with_rand_reset.2720410847 |
|
|
Jan 07 02:01:01 PM PST 24 |
Jan 07 02:07:41 PM PST 24 |
10551589050 ps |
T761 |
/workspace/coverage/cover_reg_top/44.xbar_stress_all_with_error.2969393067 |
|
|
Jan 07 02:03:51 PM PST 24 |
Jan 07 02:11:43 PM PST 24 |
12331422451 ps |
T762 |
/workspace/coverage/cover_reg_top/88.xbar_error_random.4256190366 |
|
|
Jan 07 02:06:59 PM PST 24 |
Jan 07 02:09:05 PM PST 24 |
2313302333 ps |
T763 |
/workspace/coverage/cover_reg_top/4.xbar_error_random.3844240049 |
|
|
Jan 07 02:01:10 PM PST 24 |
Jan 07 02:01:33 PM PST 24 |
135334395 ps |
T37 |
/workspace/coverage/cover_reg_top/7.chip_same_csr_outstanding.2834831962 |
|
|
Jan 07 02:00:54 PM PST 24 |
Jan 07 02:48:32 PM PST 24 |
29552773007 ps |
T764 |
/workspace/coverage/cover_reg_top/84.xbar_random_slow_rsp.3182951441 |
|
|
Jan 07 02:06:32 PM PST 24 |
Jan 07 02:14:17 PM PST 24 |
27126829865 ps |
T765 |
/workspace/coverage/cover_reg_top/23.xbar_smoke.1902878216 |
|
|
Jan 07 02:02:40 PM PST 24 |
Jan 07 02:02:49 PM PST 24 |
39756101 ps |
T766 |
/workspace/coverage/cover_reg_top/66.xbar_random_large_delays.2396876892 |
|
|
Jan 07 02:04:50 PM PST 24 |
Jan 07 02:10:31 PM PST 24 |
27078347510 ps |
T767 |
/workspace/coverage/cover_reg_top/98.xbar_access_same_device.1908631638 |
|
|
Jan 07 02:07:12 PM PST 24 |
Jan 07 02:09:24 PM PST 24 |
2435522868 ps |
T768 |
/workspace/coverage/cover_reg_top/17.xbar_stress_all.872634877 |
|
|
Jan 07 02:02:55 PM PST 24 |
Jan 07 02:07:53 PM PST 24 |
8780031858 ps |
T1 |
/workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.2745499046 |
|
|
Jan 07 01:56:57 PM PST 24 |
Jan 07 02:01:17 PM PST 24 |
4960419067 ps |
T2 |
/workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.3380119152 |
|
|
Jan 07 01:56:36 PM PST 24 |
Jan 07 02:00:16 PM PST 24 |
4151089326 ps |
T3 |
/workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.1946700272 |
|
|
Jan 07 01:56:53 PM PST 24 |
Jan 07 02:01:23 PM PST 24 |
4255495600 ps |
T4 |
/workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.3817306245 |
|
|
Jan 07 01:56:52 PM PST 24 |
Jan 07 02:00:23 PM PST 24 |
3890224547 ps |
T5 |
/workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.717688004 |
|
|
Jan 07 01:57:00 PM PST 24 |
Jan 07 02:01:29 PM PST 24 |
5786973095 ps |
T6 |
/workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.1528913462 |
|
|
Jan 07 01:56:48 PM PST 24 |
Jan 07 02:01:14 PM PST 24 |
4275123705 ps |
T7 |
/workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.211057976 |
|
|
Jan 07 01:57:02 PM PST 24 |
Jan 07 02:03:07 PM PST 24 |
5252687680 ps |
T8 |
/workspace/coverage/pad_ctrl_test_mode/1.chip_padctrl_attributes.1173425217 |
|
|
Jan 07 01:56:48 PM PST 24 |
Jan 07 01:59:54 PM PST 24 |
5125879358 ps |
T9 |
/workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.1601413221 |
|
|
Jan 07 01:56:53 PM PST 24 |
Jan 07 02:01:31 PM PST 24 |
4299062355 ps |
T10 |
/workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.1127707817 |
|
|
Jan 07 01:56:56 PM PST 24 |
Jan 07 02:00:26 PM PST 24 |
3883027000 ps |
T24 |
/workspace/coverage/default/0.chip_jtag_mem_access.4226700034 |
|
|
Jan 07 01:57:49 PM PST 24 |
Jan 07 02:17:42 PM PST 24 |
13567098886 ps |
T27 |
/workspace/coverage/default/0.chip_jtag_csr_rw.1637908847 |
|
|
Jan 07 01:58:01 PM PST 24 |
Jan 07 02:16:14 PM PST 24 |
11871557810 ps |
T25 |
/workspace/coverage/default/2.chip_jtag_mem_access.3444392678 |
|
|
Jan 07 01:59:45 PM PST 24 |
Jan 07 02:20:01 PM PST 24 |
13980021760 ps |
T29 |
/workspace/coverage/default/2.chip_jtag_csr_rw.3723173530 |
|
|
Jan 07 01:59:28 PM PST 24 |
Jan 07 02:31:02 PM PST 24 |
19455911936 ps |
T26 |
/workspace/coverage/default/1.chip_jtag_mem_access.2659838330 |
|
|
Jan 07 01:58:36 PM PST 24 |
Jan 07 02:17:24 PM PST 24 |
13516274440 ps |
T28 |
/workspace/coverage/default/1.chip_jtag_csr_rw.239418005 |
|
|
Jan 07 01:59:47 PM PST 24 |
Jan 07 02:30:03 PM PST 24 |
18917514130 ps |
T769 |
/workspace/coverage/cover_reg_top/79.xbar_access_same_device_slow_rsp.906698927 |
|
|
Jan 07 02:05:51 PM PST 24 |
Jan 07 02:30:57 PM PST 24 |
97145130061 ps |
T770 |
/workspace/coverage/cover_reg_top/22.xbar_random_slow_rsp.759075719 |
|
|
Jan 07 02:02:52 PM PST 24 |
Jan 07 02:09:09 PM PST 24 |
21596085595 ps |
T771 |
/workspace/coverage/cover_reg_top/62.xbar_access_same_device.3641441800 |
|
|
Jan 07 02:04:09 PM PST 24 |
Jan 07 02:05:21 PM PST 24 |
423882545 ps |
T772 |
/workspace/coverage/cover_reg_top/5.xbar_smoke_zero_delays.2408540469 |
|
|
Jan 07 02:01:29 PM PST 24 |
Jan 07 02:01:41 PM PST 24 |
54258274 ps |
T773 |
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_error.2934054307 |
|
|
Jan 07 02:02:47 PM PST 24 |
Jan 07 02:08:24 PM PST 24 |
10933546039 ps |
T774 |
/workspace/coverage/cover_reg_top/4.xbar_random.3406771125 |
|
|
Jan 07 02:01:04 PM PST 24 |
Jan 07 02:02:24 PM PST 24 |
2252586004 ps |
T775 |
/workspace/coverage/cover_reg_top/81.xbar_smoke_zero_delays.63667895 |
|
|
Jan 07 02:05:50 PM PST 24 |
Jan 07 02:06:09 PM PST 24 |
41471681 ps |
T776 |
/workspace/coverage/cover_reg_top/27.xbar_stress_all_with_rand_reset.1920734710 |
|
|
Jan 07 02:03:14 PM PST 24 |
Jan 07 02:10:08 PM PST 24 |
2826706955 ps |
T777 |
/workspace/coverage/cover_reg_top/92.xbar_random_large_delays.3711740090 |
|
|
Jan 07 02:07:00 PM PST 24 |
Jan 07 02:25:00 PM PST 24 |
95481871873 ps |
T778 |
/workspace/coverage/cover_reg_top/2.chip_csr_mem_rw_with_rand_reset.40968831 |
|
|
Jan 07 02:01:10 PM PST 24 |
Jan 07 02:04:49 PM PST 24 |
6458210685 ps |
T779 |
/workspace/coverage/cover_reg_top/43.xbar_smoke.1393060712 |
|
|
Jan 07 02:03:33 PM PST 24 |
Jan 07 02:03:44 PM PST 24 |
157741970 ps |
T780 |
/workspace/coverage/cover_reg_top/80.xbar_access_same_device_slow_rsp.2744675967 |
|
|
Jan 07 02:05:46 PM PST 24 |
Jan 07 02:22:59 PM PST 24 |
56807012298 ps |
T781 |
/workspace/coverage/cover_reg_top/82.xbar_random.1113504812 |
|
|
Jan 07 02:06:28 PM PST 24 |
Jan 07 02:07:05 PM PST 24 |
410926645 ps |
T782 |
/workspace/coverage/cover_reg_top/21.xbar_access_same_device_slow_rsp.3689163469 |
|
|
Jan 07 02:01:56 PM PST 24 |
Jan 07 02:25:06 PM PST 24 |
77312900020 ps |
T783 |
/workspace/coverage/cover_reg_top/79.xbar_smoke.4041668994 |
|
|
Jan 07 02:05:51 PM PST 24 |
Jan 07 02:06:10 PM PST 24 |
115537139 ps |
T784 |
/workspace/coverage/cover_reg_top/9.xbar_smoke.1698288789 |
|
|
Jan 07 02:01:19 PM PST 24 |
Jan 07 02:01:35 PM PST 24 |
193730893 ps |
T785 |
/workspace/coverage/cover_reg_top/60.xbar_smoke.4104055985 |
|
|
Jan 07 02:04:20 PM PST 24 |
Jan 07 02:05:15 PM PST 24 |
47515798 ps |