Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.kmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	153370	1			T11	30		T12	766		T13	134
values[2]	4228	1			T11	5		T12	29		T58	2
values[3]	2180	1			T11	1		T12	15		T67	1
values[4]	1857	1			T12	6		T341	62		T68	18
values[5]	1398	1			T12	4		T341	56		T68	14
values[6]	1203	1			T12	7		T341	46		T68	5
values[7]	1035	1			T12	22		T341	49		T68	2
values[8]	877	1			T12	22		T341	30		T68	2
values[9]	668	1			T12	10		T341	3		T68	4
values[10]	549	1			T12	1		T68	6		T274	3
values[11]	578	1			T12	1		T68	3		T274	18
values[12]	557	1			T12	2		T274	32		T339	1
values[13]	553	1			T12	10		T274	15		T339	3
values[14]	463	1			T12	21		T274	2		T339	2
values[15]	466	1			T12	18		T339	1		T63	3
values[16]	469	1			T12	4		T339	3		T63	2
values[17]	443	1			T12	4		T339	2		T63	4
values[18]	408	1			T12	2		T339	2		T63	2
values[19]	409	1			T12	5		T339	2		T63	2
values[20]	331	1			T12	1		T339	1		T63	2
values[21]	345	1			T12	3		T339	2		T63	4
values[22]	357	1			T12	8		T339	2		T63	4
values[23]	326	1			T12	5		T339	3		T63	1
values[24]	303	1			T12	6		T339	1		T63	2
values[25]	275	1			T12	6		T339	2		T63	1
values[26]	236	1			T12	2		T339	1		T63	1
values[27]	209	1			T12	1		T339	3		T63	5
values[28]	206	1			T339	2		T63	7		T332	9
values[29]	207	1			T339	2		T63	3		T332	2
values[30]	143	1			T339	1		T63	1		T332	3
values[31]	126	1			T339	4		T63	2		T332	4
values[32]	125	1			T339	3		T63	2		T332	1
values[33]	118	1			T339	3		T63	1		T332	1
values[34]	139	1			T339	1		T63	1		T332	5
values[35]	152	1			T339	2		T63	1		T332	2
values[36]	151	1			T339	6		T63	4		T332	1
values[37]	103	1			T339	2		T63	2		T332	3
values[38]	107	1			T339	2		T63	1		T332	3
values[39]	93	1			T339	2		T63	2		T332	2
values[40]	80	1			T339	2		T63	1		T332	1
values[41]	83	1			T339	2		T63	8		T332	2
values[42]	91	1			T339	2		T63	16		T332	2
values[43]	80	1			T339	1		T63	8		T332	3
values[44]	76	1			T339	2		T63	3		T332	2
values[45]	75	1			T339	5		T63	1		T332	3
values[46]	76	1			T339	2		T63	1		T332	1
values[47]	69	1			T339	3		T63	1		T332	3
values[48]	72	1			T339	4		T63	2		T332	1
values[49]	76	1			T339	1		T63	5		T332	3
values[50]	81	1			T339	2		T63	1		T332	3
values[51]	65	1			T339	3		T63	1		T332	5
values[52]	94	1			T339	2		T63	2		T332	4
values[53]	68	1			T339	3		T63	1		T332	3
values[54]	60	1			T339	7		T63	1		T332	1
values[55]	61	1			T339	3		T63	4		T332	3
values[56]	57	1			T339	1		T63	2		T332	3
values[57]	48	1			T339	4		T63	1		T332	1
values[58]	65	1			T339	2		T63	1		T332	2
values[59]	61	1			T339	6		T63	2		T332	3
values[60]	58	1			T339	4		T63	4		T332	2
values[61]	55	1			T339	2		T63	2		T332	1
values[62]	68	1			T339	2		T63	1		T332	1
values[63]	55	1			T339	2		T63	2		T332	1
values[64]	55	1			T339	1		T63	2		T332	2
values[65]	55	1			T339	1		T63	1		T332	2
values[66]	65	1			T339	2		T63	4		T332	4
values[67]	71	1			T339	4		T63	3		T332	4
values[68]	71	1			T339	3		T63	1		T332	2
values[69]	69	1			T339	6		T63	1		T332	5
values[70]	67	1			T339	5		T63	1		T332	2
values[71]	62	1			T339	4		T63	4		T332	2
values[72]	57	1			T339	1		T63	2		T332	1
values[73]	58	1			T339	1		T63	4		T332	2
values[74]	52	1			T339	2		T63	3		T332	2
values[75]	59	1			T339	1		T63	1		T332	2
values[76]	55	1			T339	1		T63	4		T332	1
values[77]	67	1			T339	2		T63	3		T332	3
values[78]	74	1			T339	5		T63	1		T332	6
values[79]	64	1			T339	2		T63	1		T332	7
values[80]	61	1			T339	1		T63	3		T332	6
values[81]	53	1			T339	2		T63	3		T332	2
values[82]	60	1			T339	4		T63	4		T332	1
values[83]	69	1			T339	1		T63	2		T332	2
values[84]	57	1			T339	1		T63	2		T332	1
values[85]	61	1			T339	6		T63	1		T332	3
values[86]	76	1			T339	7		T63	4		T332	2
values[87]	72	1			T339	5		T63	1		T332	2
values[88]	86	1			T339	4		T63	2		T332	4
values[89]	82	1			T339	2		T63	5		T332	2
values[90]	87	1			T339	2		T63	7		T332	3
values[91]	76	1			T339	2		T63	3		T332	5
values[92]	82	1			T339	3		T63	1		T332	6
values[93]	73	1			T339	3		T63	1		T332	3
values[94]	72	1			T339	1		T63	1		T332	4
values[95]	74	1			T339	1		T63	3		T332	9
values[96]	94	1			T339	5		T63	5		T332	6
values[97]	90	1			T339	6		T63	5		T332	3
values[98]	80	1			T339	4		T63	2		T332	6
values[99]	88	1			T339	3		T63	1		T332	2
values[100]	79	1			T339	2		T63	2		T332	3
values[101]	106	1			T339	3		T63	5		T332	4
values[102]	104	1			T339	4		T63	8		T332	3
values[103]	93	1			T339	2		T63	2		T332	8
values[104]	92	1			T339	1		T63	1		T332	4
values[105]	85	1			T339	4		T63	2		T332	2
values[106]	96	1			T339	4		T63	1		T332	7
values[107]	86	1			T339	1		T63	1		T332	4
values[108]	111	1			T339	4		T63	2		T332	7
values[109]	115	1			T339	3		T63	5		T332	4
values[110]	116	1			T339	4		T63	1		T332	6
values[111]	110	1			T339	3		T63	5		T332	3
values[112]	113	1			T339	1		T63	2		T332	4
values[113]	102	1			T339	2		T63	1		T332	4
values[114]	112	1			T339	3		T63	4		T332	1
values[115]	115	1			T339	3		T63	8		T332	4
values[116]	103	1			T339	6		T63	2		T332	2
values[117]	123	1			T339	4		T63	2		T332	3
values[118]	107	1			T339	3		T63	3		T332	3
values[119]	112	1			T339	6		T63	3		T332	9
values[120]	124	1			T339	13		T63	6		T332	5
values[121]	110	1			T339	17		T63	3		T332	12
values[122]	106	1			T339	5		T63	1		T332	7
values[123]	130	1			T339	7		T63	5		T332	6
values[124]	214	1			T339	18		T63	11		T332	5
values[125]	351	1			T339	19		T63	31		T332	14
values[126]	797	1			T339	44		T63	52		T332	37
values[127]	2353	1			T339	30		T63	17		T332	26
values[128]	3839	1			T339	2		T63	1		T332	2