Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.aon_timer_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143519	1			T11	38		T12	820		T13	116
values[2]	10198	1			T11	1		T12	127		T30	1
values[3]	3896	1			T12	10		T30	1		T85	15
values[4]	2323	1			T12	3		T30	1		T58	16
values[5]	1514	1			T30	1		T58	13		T66	1
values[6]	1015	1			T30	1		T58	12		T66	1
values[7]	748	1			T30	1		T58	15		T66	1
values[8]	518	1			T30	1		T58	9		T66	1
values[9]	443	1			T30	1		T58	5		T66	1
values[10]	339	1			T30	1		T58	6		T66	1
values[11]	340	1			T30	1		T58	7		T66	1
values[12]	399	1			T30	1		T58	5		T66	1
values[13]	370	1			T30	1		T58	7		T66	1
values[14]	319	1			T30	1		T58	10		T66	1
values[15]	287	1			T30	1		T58	5		T66	1
values[16]	344	1			T30	1		T58	6		T66	1
values[17]	298	1			T30	1		T58	9		T66	1
values[18]	349	1			T30	1		T58	5		T66	1
values[19]	324	1			T30	1		T58	2		T66	1
values[20]	285	1			T30	1		T58	1		T66	1
values[21]	285	1			T30	1		T58	2		T66	1
values[22]	303	1			T30	1		T58	2		T66	1
values[23]	308	1			T30	1		T58	1		T66	1
values[24]	297	1			T30	1		T58	1		T66	1
values[25]	242	1			T30	1		T58	2		T66	1
values[26]	220	1			T30	1		T58	3		T66	1
values[27]	249	1			T30	1		T58	4		T66	1
values[28]	259	1			T30	1		T58	2		T66	1
values[29]	251	1			T30	1		T58	2		T66	1
values[30]	234	1			T30	1		T58	2		T66	1
values[31]	291	1			T30	1		T58	2		T66	1
values[32]	256	1			T30	1		T58	5		T66	1
values[33]	296	1			T30	1		T58	4		T66	1
values[34]	270	1			T30	1		T58	3		T66	1
values[35]	256	1			T30	1		T58	4		T66	1
values[36]	268	1			T30	1		T58	3		T66	1
values[37]	231	1			T30	1		T58	6		T66	1
values[38]	273	1			T30	1		T58	6		T66	1
values[39]	222	1			T30	1		T58	5		T66	1
values[40]	220	1			T30	1		T58	5		T66	1
values[41]	226	1			T30	1		T58	3		T66	1
values[42]	239	1			T30	1		T58	3		T66	1
values[43]	257	1			T30	1		T58	3		T66	1
values[44]	284	1			T30	1		T58	7		T66	1
values[45]	279	1			T30	1		T58	3		T66	1
values[46]	250	1			T30	1		T58	3		T66	1
values[47]	266	1			T30	1		T58	9		T66	1
values[48]	208	1			T30	1		T58	3		T66	1
values[49]	223	1			T30	1		T58	1		T66	1
values[50]	284	1			T30	1		T58	2		T66	1
values[51]	231	1			T30	1		T58	1		T66	1
values[52]	203	1			T30	1		T58	2		T66	1
values[53]	237	1			T30	1		T58	1		T66	1
values[54]	208	1			T30	2		T58	1		T66	1
values[55]	186	1			T30	1		T58	2		T66	1
values[56]	197	1			T30	1		T58	4		T66	1
values[57]	207	1			T30	1		T58	11		T66	1
values[58]	199	1			T30	1		T58	4		T66	1
values[59]	187	1			T30	1		T58	1		T66	1
values[60]	189	1			T30	1		T58	5		T66	1
values[61]	153	1			T30	1		T58	1		T66	1
values[62]	142	1			T30	1		T58	2		T66	1
values[63]	132	1			T30	1		T58	4		T66	1
values[64]	119	1			T30	1		T58	9		T66	1
values[65]	156	1			T30	1		T58	11		T66	1
values[66]	145	1			T30	1		T58	10		T66	1
values[67]	146	1			T30	1		T58	13		T66	1
values[68]	131	1			T30	1		T58	13		T66	1
values[69]	131	1			T30	1		T58	4		T66	2
values[70]	172	1			T30	1		T58	7		T66	1
values[71]	150	1			T30	1		T58	19		T66	1
values[72]	124	1			T30	1		T58	19		T66	1
values[73]	126	1			T30	1		T58	11		T66	1
values[74]	121	1			T30	1		T58	6		T66	1
values[75]	123	1			T30	1		T58	24		T66	1
values[76]	99	1			T30	1		T58	14		T66	1
values[77]	140	1			T30	1		T58	27		T66	1
values[78]	114	1			T30	1		T58	8		T66	1
values[79]	118	1			T30	1		T58	2		T66	1
values[80]	110	1			T30	1		T58	2		T66	1
values[81]	145	1			T30	1		T58	10		T66	1
values[82]	104	1			T30	2		T58	5		T66	1
values[83]	117	1			T30	1		T58	5		T66	1
values[84]	127	1			T30	1		T58	5		T66	1
values[85]	107	1			T30	1		T58	5		T66	1
values[86]	97	1			T30	1		T58	5		T66	1
values[87]	89	1			T30	2		T58	5		T66	1
values[88]	97	1			T30	4		T58	5		T66	1
values[89]	103	1			T30	1		T58	4		T66	1
values[90]	114	1			T30	4		T58	3		T66	1
values[91]	97	1			T30	9		T58	11		T66	1
values[92]	93	1			T30	5		T58	7		T66	1
values[93]	97	1			T30	3		T58	3		T66	1
values[94]	92	1			T30	2		T58	5		T66	1
values[95]	90	1			T30	2		T58	9		T66	1
values[96]	84	1			T30	2		T58	4		T66	1
values[97]	90	1			T30	2		T58	4		T66	1
values[98]	88	1			T30	1		T58	6		T66	1
values[99]	74	1			T30	1		T58	8		T66	1
values[100]	91	1			T30	4		T58	4		T66	1
values[101]	75	1			T30	5		T58	2		T66	1
values[102]	89	1			T30	2		T58	3		T66	1
values[103]	99	1			T30	4		T58	2		T66	1
values[104]	76	1			T30	5		T58	6		T66	1
values[105]	62	1			T30	2		T58	1		T66	1
values[106]	76	1			T30	9		T58	4		T66	1
values[107]	77	1			T30	4		T58	7		T66	1
values[108]	64	1			T30	1		T58	3		T66	1
values[109]	63	1			T30	3		T58	3		T66	1
values[110]	58	1			T30	1		T58	2		T66	1
values[111]	59	1			T30	1		T66	1		T95	1
values[112]	48	1			T30	2		T66	1		T95	2
values[113]	60	1			T30	1		T66	1		T95	2
values[114]	59	1			T30	1		T66	1		T95	1
values[115]	59	1			T30	1		T66	1		T95	1
values[116]	56	1			T30	3		T66	1		T95	1
values[117]	60	1			T30	4		T66	1		T95	1
values[118]	64	1			T30	1		T66	1		T95	6
values[119]	72	1			T30	4		T66	1		T95	2
values[120]	57	1			T30	3		T66	1		T95	1
values[121]	58	1			T30	1		T66	1		T95	4
values[122]	74	1			T30	3		T66	1		T95	1
values[123]	56	1			T30	1		T66	2		T95	1
values[124]	67	1			T30	1		T66	1		T95	1
values[125]	69	1			T30	2		T66	2		T95	2
values[126]	116	1			T30	1		T66	5		T95	3
values[127]	799	1			T30	19		T66	45		T95	31
values[128]	6797	1			T30	254		T66	349		T95	288