Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.hmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	166440	1			T11	178		T12	12		T13	16
values[2]	4046	1			T14	2		T28	17		T79	1
values[3]	1659	1			T28	14		T80	2		T64	11
values[4]	1173	1			T28	27		T64	5		T84	79
values[5]	940	1			T28	13		T84	38		T85	29
values[6]	737	1			T28	7		T84	12		T85	12
values[7]	588	1			T28	11		T84	2		T312	1
values[8]	515	1			T28	12		T312	1		T315	18
values[9]	409	1			T28	13		T312	1		T315	31
values[10]	365	1			T28	12		T312	1		T315	33
values[11]	265	1			T28	8		T312	1		T315	18
values[12]	272	1			T28	9		T312	1		T315	23
values[13]	247	1			T28	9		T312	1		T315	21
values[14]	260	1			T28	6		T312	1		T315	38
values[15]	268	1			T28	7		T312	1		T315	25
values[16]	240	1			T28	4		T312	1		T315	13
values[17]	264	1			T28	3		T312	1		T315	5
values[18]	226	1			T28	5		T312	1		T315	17
values[19]	139	1			T28	8		T312	1		T315	10
values[20]	137	1			T28	14		T312	1		T315	4
values[21]	126	1			T28	13		T312	1		T315	2
values[22]	151	1			T28	16		T312	1		T315	9
values[23]	132	1			T28	8		T312	1		T315	3
values[24]	139	1			T28	6		T312	1		T320	1
values[25]	112	1			T28	11		T312	1		T320	1
values[26]	99	1			T28	17		T312	1		T320	2
values[27]	98	1			T28	21		T312	1		T320	1
values[28]	94	1			T28	14		T312	1		T320	1
values[29]	89	1			T28	7		T312	1		T320	1
values[30]	100	1			T28	10		T312	1		T320	1
values[31]	114	1			T28	5		T312	1		T320	1
values[32]	98	1			T28	5		T312	1		T320	1
values[33]	97	1			T28	9		T312	1		T320	1
values[34]	79	1			T28	3		T312	1		T320	1
values[35]	83	1			T28	3		T312	1		T320	1
values[36]	91	1			T28	5		T312	1		T320	1
values[37]	86	1			T28	6		T312	1		T320	1
values[38]	87	1			T28	5		T312	1		T320	1
values[39]	63	1			T28	2		T312	1		T320	1
values[40]	59	1			T28	2		T312	1		T320	1
values[41]	60	1			T28	4		T312	1		T320	1
values[42]	73	1			T28	1		T312	1		T320	1
values[43]	67	1			T28	2		T312	1		T320	1
values[44]	55	1			T28	2		T312	1		T320	1
values[45]	67	1			T28	2		T312	1		T320	1
values[46]	57	1			T28	2		T312	1		T320	1
values[47]	49	1			T28	1		T312	1		T320	1
values[48]	44	1			T28	1		T312	1		T320	1
values[49]	50	1			T28	2		T312	1		T320	1
values[50]	55	1			T28	3		T312	1		T320	1
values[51]	42	1			T28	1		T312	1		T320	1
values[52]	54	1			T28	3		T312	1		T320	1
values[53]	50	1			T28	4		T312	1		T320	1
values[54]	44	1			T28	1		T312	1		T320	1
values[55]	45	1			T28	1		T312	1		T320	1
values[56]	53	1			T28	2		T312	1		T320	1
values[57]	43	1			T28	1		T312	1		T320	1
values[58]	53	1			T28	3		T312	1		T320	1
values[59]	47	1			T28	2		T312	1		T320	1
values[60]	60	1			T28	3		T312	1		T320	1
values[61]	48	1			T28	1		T312	1		T320	1
values[62]	52	1			T28	2		T312	1		T320	1
values[63]	55	1			T28	3		T312	1		T320	1
values[64]	48	1			T28	3		T312	1		T320	1
values[65]	40	1			T28	2		T312	1		T320	1
values[66]	47	1			T28	2		T312	1		T320	1
values[67]	50	1			T28	1		T312	1		T320	1
values[68]	46	1			T28	1		T312	1		T320	1
values[69]	47	1			T28	2		T312	2		T320	1
values[70]	44	1			T28	1		T312	1		T320	1
values[71]	48	1			T28	3		T312	1		T320	1
values[72]	45	1			T28	2		T312	1		T320	1
values[73]	61	1			T28	9		T312	1		T320	1
values[74]	60	1			T28	11		T312	1		T320	1
values[75]	50	1			T28	6		T312	1		T320	1
values[76]	58	1			T28	3		T312	1		T320	1
values[77]	59	1			T28	3		T312	1		T320	1
values[78]	62	1			T28	2		T312	1		T320	1
values[79]	70	1			T28	2		T312	1		T320	1
values[80]	83	1			T28	2		T312	1		T320	1
values[81]	79	1			T28	4		T312	1		T320	1
values[82]	76	1			T28	4		T312	1		T320	1
values[83]	91	1			T28	3		T312	1		T320	1
values[84]	75	1			T28	1		T312	1		T320	1
values[85]	67	1			T28	1		T312	1		T320	1
values[86]	72	1			T28	10		T312	3		T320	1
values[87]	69	1			T28	6		T312	3		T320	1
values[88]	58	1			T28	2		T312	2		T320	1
values[89]	60	1			T28	1		T312	1		T320	1
values[90]	63	1			T28	2		T312	2		T320	1
values[91]	57	1			T28	4		T312	2		T320	1
values[92]	73	1			T28	3		T312	1		T320	1
values[93]	68	1			T28	4		T312	4		T320	1
values[94]	75	1			T28	4		T312	5		T320	1
values[95]	93	1			T28	9		T312	2		T320	1
values[96]	77	1			T28	1		T312	1		T320	1
values[97]	72	1			T28	3		T312	1		T320	1
values[98]	81	1			T28	3		T312	6		T320	1
values[99]	89	1			T28	1		T312	2		T320	1
values[100]	83	1			T28	8		T312	2		T320	1
values[101]	75	1			T28	4		T312	3		T320	1
values[102]	82	1			T28	5		T312	1		T320	1
values[103]	78	1			T28	6		T312	1		T320	1
values[104]	89	1			T28	2		T312	1		T320	1
values[105]	97	1			T28	2		T312	3		T320	1
values[106]	79	1			T28	3		T312	1		T320	1
values[107]	83	1			T28	4		T312	1		T320	1
values[108]	88	1			T28	6		T312	5		T320	1
values[109]	94	1			T28	3		T312	7		T320	1
values[110]	90	1			T28	4		T312	3		T320	1
values[111]	85	1			T28	3		T312	1		T320	1
values[112]	90	1			T28	6		T312	3		T320	1
values[113]	72	1			T28	3		T312	1		T320	1
values[114]	83	1			T28	3		T312	1		T320	1
values[115]	95	1			T28	6		T312	3		T320	1
values[116]	83	1			T28	3		T312	2		T320	1
values[117]	82	1			T28	10		T312	1		T320	1
values[118]	95	1			T28	5		T312	2		T320	1
values[119]	101	1			T28	11		T312	2		T320	1
values[120]	95	1			T28	4		T312	4		T320	1
values[121]	89	1			T28	5		T312	2		T320	1
values[122]	108	1			T28	9		T312	3		T320	1
values[123]	120	1			T28	3		T312	1		T320	1
values[124]	199	1			T28	5		T312	1		T320	1
values[125]	411	1			T28	31		T312	1		T320	2
values[126]	787	1			T28	54		T312	11		T320	21
values[127]	2433	1			T28	29		T312	142		T320	114
values[128]	4386	1			T28	1		T312	216		T320	188