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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
86.00 88.32 85.80 68.85 86.50 87.80 98.71


Total test records in report: 1906
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T43 /workspace/coverage/cover_reg_top/0.chip_csr_rw.3015289252 Feb 25 03:23:39 PM PST 24 Feb 25 03:29:05 PM PST 24 4039358498 ps
T277 /workspace/coverage/cover_reg_top/49.xbar_random_large_delays.499237268 Feb 25 03:38:14 PM PST 24 Feb 25 03:58:20 PM PST 24 112623230089 ps
T444 /workspace/coverage/cover_reg_top/42.xbar_smoke.241362912 Feb 25 03:36:41 PM PST 24 Feb 25 03:36:47 PM PST 24 42851841 ps
T128 /workspace/coverage/cover_reg_top/77.xbar_unmapped_addr.808615290 Feb 25 03:44:06 PM PST 24 Feb 25 03:44:47 PM PST 24 308551290 ps
T116 /workspace/coverage/cover_reg_top/12.xbar_stress_all.1893162995 Feb 25 03:28:27 PM PST 24 Feb 25 03:33:04 PM PST 24 7138835980 ps
T445 /workspace/coverage/cover_reg_top/60.xbar_error_and_unmapped_addr.1252624990 Feb 25 03:40:39 PM PST 24 Feb 25 03:41:12 PM PST 24 318146130 ps
T213 /workspace/coverage/cover_reg_top/4.chip_tl_errors.3693257739 Feb 25 03:24:55 PM PST 24 Feb 25 03:27:27 PM PST 24 3188408344 ps
T51 /workspace/coverage/cover_reg_top/4.chip_same_csr_outstanding.4282043503 Feb 25 03:24:54 PM PST 24 Feb 25 03:53:44 PM PST 24 17521589990 ps
T446 /workspace/coverage/cover_reg_top/70.xbar_smoke_zero_delays.2788666476 Feb 25 03:42:25 PM PST 24 Feb 25 03:42:32 PM PST 24 43698542 ps
T447 /workspace/coverage/cover_reg_top/10.xbar_unmapped_addr.3525729628 Feb 25 03:27:40 PM PST 24 Feb 25 03:27:54 PM PST 24 262566473 ps
T448 /workspace/coverage/cover_reg_top/14.xbar_access_same_device.4200928347 Feb 25 03:29:01 PM PST 24 Feb 25 03:29:30 PM PST 24 433789570 ps
T449 /workspace/coverage/cover_reg_top/8.xbar_smoke.2674824875 Feb 25 03:26:32 PM PST 24 Feb 25 03:26:40 PM PST 24 137571473 ps
T450 /workspace/coverage/cover_reg_top/92.xbar_random_slow_rsp.3608376697 Feb 25 03:46:35 PM PST 24 Feb 25 03:47:41 PM PST 24 3746166753 ps
T451 /workspace/coverage/cover_reg_top/64.xbar_smoke_slow_rsp.3566175874 Feb 25 03:41:22 PM PST 24 Feb 25 03:42:35 PM PST 24 3983588862 ps
T317 /workspace/coverage/cover_reg_top/1.xbar_access_same_device_slow_rsp.3759712363 Feb 25 03:23:41 PM PST 24 Feb 25 03:34:11 PM PST 24 37030467332 ps
T285 /workspace/coverage/cover_reg_top/21.xbar_random_zero_delays.1751513575 Feb 25 03:31:11 PM PST 24 Feb 25 03:31:52 PM PST 24 445760136 ps
T144 /workspace/coverage/cover_reg_top/81.xbar_stress_all_with_rand_reset.3248333393 Feb 25 03:44:44 PM PST 24 Feb 25 03:48:22 PM PST 24 3318288949 ps
T121 /workspace/coverage/cover_reg_top/77.xbar_same_source.2684551424 Feb 25 03:44:01 PM PST 24 Feb 25 03:45:11 PM PST 24 2444403340 ps
T235 /workspace/coverage/cover_reg_top/10.xbar_same_source.2007495908 Feb 25 03:27:32 PM PST 24 Feb 25 03:28:01 PM PST 24 879856020 ps
T131 /workspace/coverage/cover_reg_top/93.xbar_random_zero_delays.4251874686 Feb 25 03:46:52 PM PST 24 Feb 25 03:47:18 PM PST 24 279377307 ps
T452 /workspace/coverage/cover_reg_top/1.xbar_random_large_delays.3490376115 Feb 25 03:23:41 PM PST 24 Feb 25 03:25:27 PM PST 24 9975270798 ps
T453 /workspace/coverage/cover_reg_top/43.xbar_error_random.3596213421 Feb 25 03:36:55 PM PST 24 Feb 25 03:37:43 PM PST 24 1254004246 ps
T454 /workspace/coverage/cover_reg_top/24.xbar_smoke_large_delays.3639577283 Feb 25 03:32:03 PM PST 24 Feb 25 03:33:53 PM PST 24 9434668705 ps
T455 /workspace/coverage/cover_reg_top/29.xbar_access_same_device.48318080 Feb 25 03:33:33 PM PST 24 Feb 25 03:33:45 PM PST 24 121079300 ps
T456 /workspace/coverage/cover_reg_top/6.chip_tl_errors.3196292966 Feb 25 03:25:38 PM PST 24 Feb 25 03:27:38 PM PST 24 3020756428 ps
T318 /workspace/coverage/cover_reg_top/65.xbar_access_same_device_slow_rsp.2194036966 Feb 25 03:41:37 PM PST 24 Feb 25 04:05:01 PM PST 24 80537141948 ps
T457 /workspace/coverage/cover_reg_top/20.xbar_smoke_zero_delays.1319351771 Feb 25 03:30:52 PM PST 24 Feb 25 03:30:58 PM PST 24 41164798 ps
T292 /workspace/coverage/cover_reg_top/34.xbar_random.2979429839 Feb 25 03:34:58 PM PST 24 Feb 25 03:36:19 PM PST 24 2214938723 ps
T458 /workspace/coverage/cover_reg_top/23.xbar_stress_all_with_error.1347474588 Feb 25 03:31:57 PM PST 24 Feb 25 03:33:07 PM PST 24 1548428876 ps
T459 /workspace/coverage/cover_reg_top/81.xbar_same_source.4206616378 Feb 25 03:44:42 PM PST 24 Feb 25 03:45:00 PM PST 24 498071312 ps
T460 /workspace/coverage/cover_reg_top/22.xbar_smoke_slow_rsp.650304601 Feb 25 03:31:40 PM PST 24 Feb 25 03:33:36 PM PST 24 6299440928 ps
T186 /workspace/coverage/cover_reg_top/91.xbar_stress_all_with_rand_reset.3167256371 Feb 25 03:46:35 PM PST 24 Feb 25 03:51:22 PM PST 24 1415855841 ps
T324 /workspace/coverage/cover_reg_top/29.xbar_access_same_device_slow_rsp.2750445832 Feb 25 03:33:35 PM PST 24 Feb 25 04:22:08 PM PST 24 157936109214 ps
T461 /workspace/coverage/cover_reg_top/8.xbar_smoke_large_delays.3408938040 Feb 25 03:26:32 PM PST 24 Feb 25 03:28:16 PM PST 24 9094999529 ps
T345 /workspace/coverage/cover_reg_top/43.xbar_access_same_device.3995474433 Feb 25 03:36:54 PM PST 24 Feb 25 03:37:12 PM PST 24 380309626 ps
T462 /workspace/coverage/cover_reg_top/41.xbar_access_same_device.1751561628 Feb 25 03:36:37 PM PST 24 Feb 25 03:38:02 PM PST 24 1005637948 ps
T463 /workspace/coverage/cover_reg_top/9.xbar_smoke.693496292 Feb 25 03:27:02 PM PST 24 Feb 25 03:27:10 PM PST 24 129792651 ps
T464 /workspace/coverage/cover_reg_top/29.xbar_smoke.1944563417 Feb 25 03:33:26 PM PST 24 Feb 25 03:33:35 PM PST 24 158891156 ps
T289 /workspace/coverage/cover_reg_top/42.xbar_random_large_delays.3494747822 Feb 25 03:36:38 PM PST 24 Feb 25 03:38:21 PM PST 24 9873918441 ps
T139 /workspace/coverage/cover_reg_top/45.xbar_stress_all_with_rand_reset.3300140608 Feb 25 03:37:27 PM PST 24 Feb 25 03:41:31 PM PST 24 2773825797 ps
T119 /workspace/coverage/cover_reg_top/88.xbar_stress_all.2355765233 Feb 25 03:45:59 PM PST 24 Feb 25 03:50:20 PM PST 24 2796907669 ps
T465 /workspace/coverage/cover_reg_top/92.xbar_error_random.1583482697 Feb 25 03:46:35 PM PST 24 Feb 25 03:47:18 PM PST 24 559906912 ps
T117 /workspace/coverage/cover_reg_top/61.xbar_stress_all.3438273391 Feb 25 03:40:54 PM PST 24 Feb 25 03:44:58 PM PST 24 5974037883 ps
T276 /workspace/coverage/cover_reg_top/73.xbar_stress_all.1824524730 Feb 25 03:43:25 PM PST 24 Feb 25 03:43:50 PM PST 24 666726801 ps
T466 /workspace/coverage/cover_reg_top/73.xbar_smoke.326807620 Feb 25 03:43:15 PM PST 24 Feb 25 03:43:23 PM PST 24 130555238 ps
T467 /workspace/coverage/cover_reg_top/79.xbar_stress_all_with_reset_error.4253541957 Feb 25 03:44:14 PM PST 24 Feb 25 03:45:05 PM PST 24 189590967 ps
T468 /workspace/coverage/cover_reg_top/77.xbar_error_random.131760922 Feb 25 03:44:07 PM PST 24 Feb 25 03:44:45 PM PST 24 1186764991 ps
T469 /workspace/coverage/cover_reg_top/34.xbar_random_large_delays.1644766600 Feb 25 03:34:52 PM PST 24 Feb 25 03:45:53 PM PST 24 56616690641 ps
T236 /workspace/coverage/cover_reg_top/9.xbar_random_slow_rsp.734849980 Feb 25 03:27:08 PM PST 24 Feb 25 03:37:02 PM PST 24 33601123629 ps
T33 /workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.1796483046 Feb 25 03:23:30 PM PST 24 Feb 25 03:33:38 PM PST 24 14390516159 ps
T470 /workspace/coverage/cover_reg_top/88.xbar_stress_all_with_reset_error.2310333220 Feb 25 03:45:52 PM PST 24 Feb 25 03:46:29 PM PST 24 124879010 ps
T471 /workspace/coverage/cover_reg_top/74.xbar_random_large_delays.2382115873 Feb 25 03:43:26 PM PST 24 Feb 25 03:54:42 PM PST 24 62095812524 ps
T367 /workspace/coverage/cover_reg_top/60.xbar_stress_all_with_reset_error.831174268 Feb 25 03:40:42 PM PST 24 Feb 25 03:46:05 PM PST 24 3401840710 ps
T330 /workspace/coverage/cover_reg_top/33.xbar_stress_all_with_reset_error.2413529397 Feb 25 03:34:51 PM PST 24 Feb 25 03:44:20 PM PST 24 10311840486 ps
T472 /workspace/coverage/cover_reg_top/89.xbar_error_and_unmapped_addr.3678875438 Feb 25 03:46:00 PM PST 24 Feb 25 03:46:32 PM PST 24 641503197 ps
T291 /workspace/coverage/cover_reg_top/64.xbar_random_large_delays.3953648270 Feb 25 03:41:20 PM PST 24 Feb 25 03:52:30 PM PST 24 61279553747 ps
T473 /workspace/coverage/cover_reg_top/42.xbar_error_random.2634962007 Feb 25 03:36:52 PM PST 24 Feb 25 03:37:45 PM PST 24 1766628665 ps
T474 /workspace/coverage/cover_reg_top/62.xbar_smoke_zero_delays.4203835646 Feb 25 03:40:58 PM PST 24 Feb 25 03:41:04 PM PST 24 46629319 ps
T475 /workspace/coverage/cover_reg_top/90.xbar_random_slow_rsp.128464559 Feb 25 03:46:14 PM PST 24 Feb 25 03:47:17 PM PST 24 3386292346 ps
T476 /workspace/coverage/cover_reg_top/48.xbar_random_slow_rsp.348221144 Feb 25 03:38:06 PM PST 24 Feb 25 03:49:36 PM PST 24 40664245081 ps
T210 /workspace/coverage/cover_reg_top/47.xbar_same_source.2177810036 Feb 25 03:38:03 PM PST 24 Feb 25 03:39:13 PM PST 24 2205319107 ps
T477 /workspace/coverage/cover_reg_top/57.xbar_smoke_large_delays.216969154 Feb 25 03:39:49 PM PST 24 Feb 25 03:40:55 PM PST 24 5935443078 ps
T214 /workspace/coverage/cover_reg_top/3.chip_tl_errors.162466104 Feb 25 03:24:19 PM PST 24 Feb 25 03:28:20 PM PST 24 3282133000 ps
T478 /workspace/coverage/cover_reg_top/59.xbar_smoke.1488217163 Feb 25 03:40:23 PM PST 24 Feb 25 03:40:30 PM PST 24 45014822 ps
T223 /workspace/coverage/cover_reg_top/96.xbar_same_source.3979430567 Feb 25 03:47:25 PM PST 24 Feb 25 03:48:20 PM PST 24 1712579093 ps
T479 /workspace/coverage/cover_reg_top/13.xbar_stress_all_with_reset_error.1454537519 Feb 25 03:28:41 PM PST 24 Feb 25 03:29:59 PM PST 24 1351818970 ps
T112 /workspace/coverage/cover_reg_top/5.xbar_stress_all.3508133671 Feb 25 03:25:39 PM PST 24 Feb 25 03:30:27 PM PST 24 8857771597 ps
T246 /workspace/coverage/cover_reg_top/75.xbar_stress_all.2729922590 Feb 25 03:43:40 PM PST 24 Feb 25 03:46:53 PM PST 24 4606482387 ps
T480 /workspace/coverage/cover_reg_top/27.xbar_error_and_unmapped_addr.605847607 Feb 25 03:33:16 PM PST 24 Feb 25 03:33:22 PM PST 24 76843034 ps
T481 /workspace/coverage/cover_reg_top/13.xbar_stress_all_with_error.1566790220 Feb 25 03:28:41 PM PST 24 Feb 25 03:33:31 PM PST 24 7374091826 ps
T482 /workspace/coverage/cover_reg_top/85.xbar_stress_all_with_error.4247459268 Feb 25 03:45:40 PM PST 24 Feb 25 03:48:20 PM PST 24 4138020462 ps
T483 /workspace/coverage/cover_reg_top/81.xbar_unmapped_addr.683947197 Feb 25 03:44:51 PM PST 24 Feb 25 03:45:48 PM PST 24 1550841148 ps
T484 /workspace/coverage/cover_reg_top/98.xbar_stress_all_with_error.2219416770 Feb 25 03:47:45 PM PST 24 Feb 25 03:50:28 PM PST 24 4329317833 ps
T485 /workspace/coverage/cover_reg_top/70.xbar_smoke_slow_rsp.2878527489 Feb 25 03:42:24 PM PST 24 Feb 25 03:43:33 PM PST 24 3875154517 ps
T486 /workspace/coverage/cover_reg_top/75.xbar_smoke_slow_rsp.634725068 Feb 25 03:43:33 PM PST 24 Feb 25 03:44:36 PM PST 24 3775505002 ps
T487 /workspace/coverage/cover_reg_top/42.xbar_error_and_unmapped_addr.224755705 Feb 25 03:36:43 PM PST 24 Feb 25 03:37:05 PM PST 24 434926090 ps
T356 /workspace/coverage/cover_reg_top/29.xbar_stress_all_with_rand_reset.743053364 Feb 25 03:33:33 PM PST 24 Feb 25 03:37:11 PM PST 24 2278602745 ps
T488 /workspace/coverage/cover_reg_top/58.xbar_error_random.1308802458 Feb 25 03:40:14 PM PST 24 Feb 25 03:40:44 PM PST 24 824809807 ps
T489 /workspace/coverage/cover_reg_top/66.xbar_same_source.596656008 Feb 25 03:41:56 PM PST 24 Feb 25 03:42:08 PM PST 24 122619175 ps
T490 /workspace/coverage/cover_reg_top/0.chip_csr_bit_bash.14297540 Feb 25 03:23:30 PM PST 24 Feb 25 03:38:10 PM PST 24 8625825200 ps
T491 /workspace/coverage/cover_reg_top/10.xbar_smoke.1854797468 Feb 25 03:27:25 PM PST 24 Feb 25 03:27:33 PM PST 24 55422984 ps
T231 /workspace/coverage/cover_reg_top/56.xbar_stress_all_with_rand_reset.799472222 Feb 25 03:39:49 PM PST 24 Feb 25 03:46:11 PM PST 24 2875080399 ps
T492 /workspace/coverage/cover_reg_top/95.xbar_stress_all_with_rand_reset.4068415874 Feb 25 03:47:14 PM PST 24 Feb 25 03:47:39 PM PST 24 77645501 ps
T34 /workspace/coverage/cover_reg_top/0.chip_prim_tl_access.2538030492 Feb 25 03:23:31 PM PST 24 Feb 25 03:26:55 PM PST 24 5091119896 ps
T141 /workspace/coverage/cover_reg_top/58.xbar_access_same_device.1185621775 Feb 25 03:39:59 PM PST 24 Feb 25 03:41:29 PM PST 24 2652996527 ps
T50 /workspace/coverage/cover_reg_top/9.chip_csr_rw.415802674 Feb 25 03:27:15 PM PST 24 Feb 25 03:37:59 PM PST 24 5775098408 ps
T493 /workspace/coverage/cover_reg_top/47.xbar_random_zero_delays.3616699281 Feb 25 03:38:00 PM PST 24 Feb 25 03:38:16 PM PST 24 158348349 ps
T494 /workspace/coverage/cover_reg_top/69.xbar_error_and_unmapped_addr.4167938963 Feb 25 03:42:19 PM PST 24 Feb 25 03:43:11 PM PST 24 1234573428 ps
T495 /workspace/coverage/cover_reg_top/93.xbar_smoke_slow_rsp.254057430 Feb 25 03:46:53 PM PST 24 Feb 25 03:48:19 PM PST 24 4919060437 ps
T180 /workspace/coverage/cover_reg_top/8.xbar_access_same_device_slow_rsp.631544784 Feb 25 03:26:40 PM PST 24 Feb 25 03:49:19 PM PST 24 79131476724 ps
T354 /workspace/coverage/cover_reg_top/5.xbar_stress_all_with_rand_reset.943896957 Feb 25 03:25:38 PM PST 24 Feb 25 03:26:53 PM PST 24 158298515 ps
T282 /workspace/coverage/cover_reg_top/89.xbar_random_slow_rsp.1039904664 Feb 25 03:46:01 PM PST 24 Feb 25 04:01:59 PM PST 24 56199634226 ps
T339 /workspace/coverage/cover_reg_top/20.xbar_access_same_device_slow_rsp.1676733250 Feb 25 03:31:01 PM PST 24 Feb 25 03:44:42 PM PST 24 48573161460 ps
T496 /workspace/coverage/cover_reg_top/41.xbar_smoke.683504999 Feb 25 03:36:37 PM PST 24 Feb 25 03:36:44 PM PST 24 45284661 ps
T497 /workspace/coverage/cover_reg_top/43.xbar_smoke_slow_rsp.2632652018 Feb 25 03:36:44 PM PST 24 Feb 25 03:38:14 PM PST 24 5378467947 ps
T242 /workspace/coverage/cover_reg_top/61.xbar_same_source.2158113372 Feb 25 03:40:53 PM PST 24 Feb 25 03:41:42 PM PST 24 1833472592 ps
T498 /workspace/coverage/cover_reg_top/57.xbar_smoke_zero_delays.3158054913 Feb 25 03:39:50 PM PST 24 Feb 25 03:39:57 PM PST 24 52173027 ps
T499 /workspace/coverage/cover_reg_top/14.xbar_stress_all_with_error.1845485276 Feb 25 03:29:11 PM PST 24 Feb 25 03:35:02 PM PST 24 8464238025 ps
T500 /workspace/coverage/cover_reg_top/38.xbar_smoke_zero_delays.2424640118 Feb 25 03:35:39 PM PST 24 Feb 25 03:35:46 PM PST 24 56408630 ps
T501 /workspace/coverage/cover_reg_top/56.xbar_access_same_device_slow_rsp.3355503285 Feb 25 03:39:45 PM PST 24 Feb 25 03:43:18 PM PST 24 12663957538 ps
T502 /workspace/coverage/cover_reg_top/44.xbar_smoke_slow_rsp.2251030596 Feb 25 03:37:04 PM PST 24 Feb 25 03:38:33 PM PST 24 4848920679 ps
T503 /workspace/coverage/cover_reg_top/15.xbar_smoke_slow_rsp.3137954573 Feb 25 03:29:15 PM PST 24 Feb 25 03:30:24 PM PST 24 3991950345 ps
T177 /workspace/coverage/cover_reg_top/85.xbar_stress_all.1124169852 Feb 25 03:45:34 PM PST 24 Feb 25 03:55:39 PM PST 24 15729511367 ps
T230 /workspace/coverage/cover_reg_top/60.xbar_same_source.2505544494 Feb 25 03:40:35 PM PST 24 Feb 25 03:41:11 PM PST 24 513170269 ps
T251 /workspace/coverage/cover_reg_top/20.xbar_random_large_delays.3562561773 Feb 25 03:30:51 PM PST 24 Feb 25 03:38:29 PM PST 24 37523198369 ps
T504 /workspace/coverage/cover_reg_top/32.xbar_random.4099139426 Feb 25 03:34:16 PM PST 24 Feb 25 03:35:02 PM PST 24 1250672355 ps
T505 /workspace/coverage/cover_reg_top/10.xbar_smoke_slow_rsp.353927875 Feb 25 03:27:25 PM PST 24 Feb 25 03:29:28 PM PST 24 7045928093 ps
T342 /workspace/coverage/cover_reg_top/47.xbar_stress_all_with_error.123437953 Feb 25 03:37:59 PM PST 24 Feb 25 03:42:29 PM PST 24 7278761181 ps
T506 /workspace/coverage/cover_reg_top/49.xbar_smoke_zero_delays.3824806319 Feb 25 03:38:11 PM PST 24 Feb 25 03:38:18 PM PST 24 53768425 ps
T237 /workspace/coverage/cover_reg_top/80.xbar_same_source.1934337371 Feb 25 03:44:22 PM PST 24 Feb 25 03:44:51 PM PST 24 414015792 ps
T507 /workspace/coverage/cover_reg_top/71.xbar_stress_all_with_reset_error.737263499 Feb 25 03:42:55 PM PST 24 Feb 25 03:45:35 PM PST 24 1801502766 ps
T508 /workspace/coverage/cover_reg_top/66.xbar_smoke_slow_rsp.3721988611 Feb 25 03:41:44 PM PST 24 Feb 25 03:43:28 PM PST 24 5675605234 ps
T509 /workspace/coverage/cover_reg_top/35.xbar_smoke_slow_rsp.881804214 Feb 25 03:35:01 PM PST 24 Feb 25 03:36:19 PM PST 24 4591430874 ps
T510 /workspace/coverage/cover_reg_top/92.xbar_stress_all_with_error.3242517915 Feb 25 03:46:43 PM PST 24 Feb 25 03:49:25 PM PST 24 2017715948 ps
T193 /workspace/coverage/cover_reg_top/66.xbar_random_large_delays.1526887879 Feb 25 03:41:50 PM PST 24 Feb 25 03:48:31 PM PST 24 39957670532 ps
T511 /workspace/coverage/cover_reg_top/35.xbar_random_large_delays.3889532058 Feb 25 03:34:57 PM PST 24 Feb 25 03:54:03 PM PST 24 97636565091 ps
T127 /workspace/coverage/cover_reg_top/49.xbar_random.4193411826 Feb 25 03:38:13 PM PST 24 Feb 25 03:38:44 PM PST 24 345816448 ps
T512 /workspace/coverage/cover_reg_top/10.xbar_access_same_device_slow_rsp.2757433488 Feb 25 03:27:34 PM PST 24 Feb 25 03:54:31 PM PST 24 86885610557 ps
T113 /workspace/coverage/cover_reg_top/99.xbar_stress_all_with_rand_reset.2711154319 Feb 25 03:48:02 PM PST 24 Feb 25 03:55:36 PM PST 24 2360510515 ps
T513 /workspace/coverage/cover_reg_top/37.xbar_smoke_slow_rsp.3182869765 Feb 25 03:35:20 PM PST 24 Feb 25 03:36:53 PM PST 24 5306346172 ps
T215 /workspace/coverage/cover_reg_top/27.chip_tl_errors.3505842733 Feb 25 03:32:58 PM PST 24 Feb 25 03:37:21 PM PST 24 3578498274 ps
T514 /workspace/coverage/cover_reg_top/51.xbar_smoke_zero_delays.1551081477 Feb 25 03:38:40 PM PST 24 Feb 25 03:38:47 PM PST 24 53481798 ps
T515 /workspace/coverage/cover_reg_top/58.xbar_unmapped_addr.254055768 Feb 25 03:40:13 PM PST 24 Feb 25 03:40:19 PM PST 24 80317053 ps
T346 /workspace/coverage/cover_reg_top/82.xbar_access_same_device.3934685667 Feb 25 03:44:56 PM PST 24 Feb 25 03:46:25 PM PST 24 2027881886 ps
T516 /workspace/coverage/cover_reg_top/88.xbar_random_large_delays.651572199 Feb 25 03:45:47 PM PST 24 Feb 25 04:03:52 PM PST 24 93677290162 ps
T517 /workspace/coverage/cover_reg_top/88.xbar_stress_all_with_rand_reset.3568700680 Feb 25 03:45:55 PM PST 24 Feb 25 03:46:20 PM PST 24 84489690 ps
T31 /workspace/coverage/cover_reg_top/2.chip_rv_dm_lc_disabled.3352446243 Feb 25 03:24:00 PM PST 24 Feb 25 03:33:01 PM PST 24 11804891998 ps
T518 /workspace/coverage/cover_reg_top/40.xbar_access_same_device.2724461547 Feb 25 03:36:15 PM PST 24 Feb 25 03:37:10 PM PST 24 482414741 ps
T171 /workspace/coverage/cover_reg_top/58.xbar_random_zero_delays.34691216 Feb 25 03:40:17 PM PST 24 Feb 25 03:40:52 PM PST 24 463040648 ps
T341 /workspace/coverage/cover_reg_top/80.xbar_access_same_device_slow_rsp.890106749 Feb 25 03:44:23 PM PST 24 Feb 25 03:59:24 PM PST 24 52191624148 ps
T519 /workspace/coverage/cover_reg_top/91.xbar_error_random.3803476632 Feb 25 03:46:29 PM PST 24 Feb 25 03:47:02 PM PST 24 794827223 ps
T287 /workspace/coverage/cover_reg_top/73.xbar_stress_all_with_rand_reset.3614871701 Feb 25 03:43:29 PM PST 24 Feb 25 03:49:14 PM PST 24 897816947 ps
T520 /workspace/coverage/cover_reg_top/17.xbar_smoke_zero_delays.793703928 Feb 25 03:30:02 PM PST 24 Feb 25 03:30:08 PM PST 24 37503859 ps
T184 /workspace/coverage/cover_reg_top/0.xbar_random.1845753717 Feb 25 03:23:29 PM PST 24 Feb 25 03:24:31 PM PST 24 1527025942 ps
T252 /workspace/coverage/cover_reg_top/82.xbar_stress_all.4127714269 Feb 25 03:44:51 PM PST 24 Feb 25 03:48:34 PM PST 24 6102945675 ps
T229 /workspace/coverage/cover_reg_top/82.xbar_smoke_slow_rsp.3590587314 Feb 25 03:44:41 PM PST 24 Feb 25 03:46:03 PM PST 24 4392647158 ps
T35 /workspace/coverage/cover_reg_top/19.chip_same_csr_outstanding.418963834 Feb 25 03:30:38 PM PST 24 Feb 25 04:17:37 PM PST 24 31233207690 ps
T521 /workspace/coverage/cover_reg_top/64.xbar_smoke_zero_delays.2035919971 Feb 25 03:41:12 PM PST 24 Feb 25 03:41:18 PM PST 24 38555382 ps
T522 /workspace/coverage/cover_reg_top/43.xbar_unmapped_addr.519076289 Feb 25 03:36:54 PM PST 24 Feb 25 03:37:35 PM PST 24 281123183 ps
T523 /workspace/coverage/cover_reg_top/5.xbar_error_random.3191195186 Feb 25 03:25:32 PM PST 24 Feb 25 03:26:11 PM PST 24 1365485895 ps
T190 /workspace/coverage/cover_reg_top/20.xbar_stress_all.4043867186 Feb 25 03:31:07 PM PST 24 Feb 25 03:34:03 PM PST 24 2015878413 ps
T368 /workspace/coverage/cover_reg_top/44.xbar_stress_all_with_rand_reset.1454257883 Feb 25 03:37:15 PM PST 24 Feb 25 03:38:44 PM PST 24 137578523 ps
T524 /workspace/coverage/cover_reg_top/5.xbar_random_zero_delays.1406708535 Feb 25 03:25:31 PM PST 24 Feb 25 03:26:02 PM PST 24 333845560 ps
T224 /workspace/coverage/cover_reg_top/31.xbar_random.3482821967 Feb 25 03:33:58 PM PST 24 Feb 25 03:35:24 PM PST 24 2122482269 ps
T165 /workspace/coverage/cover_reg_top/86.xbar_random_slow_rsp.771190280 Feb 25 03:45:49 PM PST 24 Feb 25 03:57:41 PM PST 24 40940546220 ps
T264 /workspace/coverage/cover_reg_top/24.xbar_random_large_delays.1478757203 Feb 25 03:32:17 PM PST 24 Feb 25 03:51:03 PM PST 24 98500730501 ps
T525 /workspace/coverage/cover_reg_top/86.xbar_smoke_slow_rsp.2496475759 Feb 25 03:45:45 PM PST 24 Feb 25 03:47:24 PM PST 24 6098350214 ps
T162 /workspace/coverage/cover_reg_top/96.xbar_random.3918632235 Feb 25 03:47:25 PM PST 24 Feb 25 03:48:05 PM PST 24 491038487 ps
T158 /workspace/coverage/cover_reg_top/23.xbar_stress_all_with_rand_reset.1329322484 Feb 25 03:31:55 PM PST 24 Feb 25 03:43:07 PM PST 24 11411618630 ps
T526 /workspace/coverage/cover_reg_top/30.xbar_stress_all_with_reset_error.1031660991 Feb 25 03:33:50 PM PST 24 Feb 25 03:34:07 PM PST 24 64773268 ps
T290 /workspace/coverage/cover_reg_top/43.xbar_stress_all.3284939776 Feb 25 03:36:56 PM PST 24 Feb 25 03:38:41 PM PST 24 1208318340 ps
T135 /workspace/coverage/cover_reg_top/42.xbar_stress_all.1882057430 Feb 25 03:36:42 PM PST 24 Feb 25 03:40:44 PM PST 24 3292752221 ps
T211 /workspace/coverage/cover_reg_top/23.xbar_random_large_delays.894342971 Feb 25 03:31:54 PM PST 24 Feb 25 03:51:12 PM PST 24 108474708524 ps
T527 /workspace/coverage/cover_reg_top/88.xbar_smoke_zero_delays.2152510755 Feb 25 03:45:45 PM PST 24 Feb 25 03:45:51 PM PST 24 38580579 ps
T528 /workspace/coverage/cover_reg_top/89.xbar_stress_all_with_rand_reset.2712491557 Feb 25 03:46:19 PM PST 24 Feb 25 03:50:48 PM PST 24 4008130094 ps
T529 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_reset_error.4255189014 Feb 25 03:29:27 PM PST 24 Feb 25 03:31:55 PM PST 24 467027159 ps
T212 /workspace/coverage/cover_reg_top/24.chip_tl_errors.1795318665 Feb 25 03:32:02 PM PST 24 Feb 25 03:37:32 PM PST 24 4256642761 ps
T530 /workspace/coverage/cover_reg_top/99.xbar_smoke_large_delays.1639233743 Feb 25 03:47:58 PM PST 24 Feb 25 03:49:00 PM PST 24 6262679341 ps
T531 /workspace/coverage/cover_reg_top/75.xbar_smoke_large_delays.320000734 Feb 25 03:43:28 PM PST 24 Feb 25 03:44:46 PM PST 24 7690206285 ps
T155 /workspace/coverage/cover_reg_top/52.xbar_stress_all.2592127383 Feb 25 03:39:07 PM PST 24 Feb 25 03:44:15 PM PST 24 8336154403 ps
T532 /workspace/coverage/cover_reg_top/16.xbar_random_large_delays.1708295155 Feb 25 03:29:50 PM PST 24 Feb 25 03:48:39 PM PST 24 96998950919 ps
T533 /workspace/coverage/cover_reg_top/39.xbar_random_zero_delays.497260571 Feb 25 03:35:55 PM PST 24 Feb 25 03:36:51 PM PST 24 586202095 ps
T534 /workspace/coverage/cover_reg_top/8.xbar_random_zero_delays.646931266 Feb 25 03:26:39 PM PST 24 Feb 25 03:27:06 PM PST 24 272521826 ps
T535 /workspace/coverage/cover_reg_top/49.xbar_stress_all_with_error.1690772633 Feb 25 03:38:20 PM PST 24 Feb 25 03:38:59 PM PST 24 389718619 ps
T536 /workspace/coverage/cover_reg_top/58.xbar_random_large_delays.2560536154 Feb 25 03:40:18 PM PST 24 Feb 25 03:43:15 PM PST 24 17407415621 ps
T336 /workspace/coverage/cover_reg_top/60.xbar_access_same_device.3813895390 Feb 25 03:40:39 PM PST 24 Feb 25 03:42:16 PM PST 24 2551287105 ps
T23 /workspace/coverage/cover_reg_top/2.chip_csr_hw_reset.3105351026 Feb 25 03:24:20 PM PST 24 Feb 25 03:28:20 PM PST 24 4661103522 ps
T537 /workspace/coverage/cover_reg_top/68.xbar_smoke.1835094076 Feb 25 03:42:01 PM PST 24 Feb 25 03:42:08 PM PST 24 52145213 ps
T538 /workspace/coverage/cover_reg_top/3.xbar_access_same_device_slow_rsp.2423450184 Feb 25 03:24:30 PM PST 24 Feb 25 03:31:08 PM PST 24 22466887241 ps
T539 /workspace/coverage/cover_reg_top/32.xbar_smoke.1923981624 Feb 25 03:34:10 PM PST 24 Feb 25 03:34:16 PM PST 24 42096407 ps
T540 /workspace/coverage/cover_reg_top/39.xbar_unmapped_addr.2005572632 Feb 25 03:36:02 PM PST 24 Feb 25 03:36:29 PM PST 24 220003877 ps
T541 /workspace/coverage/cover_reg_top/15.xbar_smoke_large_delays.2079249525 Feb 25 03:29:16 PM PST 24 Feb 25 03:30:27 PM PST 24 7074641574 ps
T233 /workspace/coverage/cover_reg_top/61.xbar_stress_all_with_rand_reset.1644655236 Feb 25 03:40:49 PM PST 24 Feb 25 03:45:14 PM PST 24 2709881066 ps
T542 /workspace/coverage/cover_reg_top/91.xbar_access_same_device.3387741933 Feb 25 03:46:22 PM PST 24 Feb 25 03:47:20 PM PST 24 1358337038 ps
T543 /workspace/coverage/cover_reg_top/23.xbar_random_slow_rsp.1417197855 Feb 25 03:31:55 PM PST 24 Feb 25 03:45:38 PM PST 24 47935686511 ps
T544 /workspace/coverage/cover_reg_top/66.xbar_error_random.2372737892 Feb 25 03:41:55 PM PST 24 Feb 25 03:42:15 PM PST 24 238074075 ps
T545 /workspace/coverage/cover_reg_top/79.xbar_smoke_large_delays.3280120676 Feb 25 03:44:18 PM PST 24 Feb 25 03:46:03 PM PST 24 10448241625 ps
T293 /workspace/coverage/cover_reg_top/36.xbar_random_zero_delays.2155494425 Feb 25 03:35:05 PM PST 24 Feb 25 03:35:28 PM PST 24 254966795 ps
T149 /workspace/coverage/cover_reg_top/1.xbar_stress_all_with_rand_reset.337926919 Feb 25 03:23:49 PM PST 24 Feb 25 03:35:09 PM PST 24 5644033607 ps
T546 /workspace/coverage/cover_reg_top/23.xbar_access_same_device.4195396788 Feb 25 03:31:56 PM PST 24 Feb 25 03:33:34 PM PST 24 2527215519 ps
T547 /workspace/coverage/cover_reg_top/68.xbar_random_large_delays.3458024452 Feb 25 03:42:01 PM PST 24 Feb 25 03:44:58 PM PST 24 15949170694 ps
T548 /workspace/coverage/cover_reg_top/99.xbar_error_random.1113129235 Feb 25 03:47:57 PM PST 24 Feb 25 03:48:21 PM PST 24 276393220 ps
T48 /workspace/coverage/cover_reg_top/2.chip_csr_rw.3068829253 Feb 25 03:24:20 PM PST 24 Feb 25 03:35:14 PM PST 24 5698459400 ps
T549 /workspace/coverage/cover_reg_top/71.xbar_error_random.821082253 Feb 25 03:42:47 PM PST 24 Feb 25 03:43:11 PM PST 24 319600014 ps
T550 /workspace/coverage/cover_reg_top/87.xbar_stress_all_with_reset_error.1028204582 Feb 25 03:45:49 PM PST 24 Feb 25 03:51:24 PM PST 24 6148153199 ps
T551 /workspace/coverage/cover_reg_top/39.xbar_smoke.10547983 Feb 25 03:35:54 PM PST 24 Feb 25 03:36:04 PM PST 24 226581950 ps
T234 /workspace/coverage/cover_reg_top/50.xbar_random_large_delays.1529515429 Feb 25 03:38:24 PM PST 24 Feb 25 03:56:46 PM PST 24 105600859242 ps
T552 /workspace/coverage/cover_reg_top/21.xbar_smoke_large_delays.445410599 Feb 25 03:31:07 PM PST 24 Feb 25 03:32:30 PM PST 24 7862135900 ps
T553 /workspace/coverage/cover_reg_top/4.xbar_smoke_large_delays.695393909 Feb 25 03:25:08 PM PST 24 Feb 25 03:26:07 PM PST 24 5821631070 ps
T554 /workspace/coverage/cover_reg_top/92.xbar_access_same_device.1873636821 Feb 25 03:46:35 PM PST 24 Feb 25 03:48:28 PM PST 24 2965186438 ps
T174 /workspace/coverage/cover_reg_top/70.xbar_access_same_device_slow_rsp.2589818597 Feb 25 03:42:39 PM PST 24 Feb 25 04:08:20 PM PST 24 91345612416 ps
T555 /workspace/coverage/cover_reg_top/28.xbar_random_large_delays.2532056495 Feb 25 03:33:12 PM PST 24 Feb 25 03:38:26 PM PST 24 28423050225 ps
T191 /workspace/coverage/cover_reg_top/19.xbar_stress_all.1715752628 Feb 25 03:30:53 PM PST 24 Feb 25 03:33:18 PM PST 24 1607141672 ps
T556 /workspace/coverage/cover_reg_top/99.xbar_access_same_device_slow_rsp.364530614 Feb 25 03:47:58 PM PST 24 Feb 25 04:16:27 PM PST 24 103585725670 ps
T243 /workspace/coverage/cover_reg_top/65.xbar_random_large_delays.2937125129 Feb 25 03:41:25 PM PST 24 Feb 25 03:50:01 PM PST 24 50287276560 ps
T557 /workspace/coverage/cover_reg_top/21.xbar_smoke.3218097970 Feb 25 03:31:07 PM PST 24 Feb 25 03:31:13 PM PST 24 47299647 ps
T558 /workspace/coverage/cover_reg_top/15.xbar_access_same_device_slow_rsp.1158621524 Feb 25 03:29:25 PM PST 24 Feb 25 04:17:20 PM PST 24 167213770470 ps
T152 /workspace/coverage/cover_reg_top/56.xbar_random_slow_rsp.377739381 Feb 25 03:39:45 PM PST 24 Feb 25 03:52:00 PM PST 24 47125800922 ps
T559 /workspace/coverage/cover_reg_top/58.xbar_error_and_unmapped_addr.235567501 Feb 25 03:40:15 PM PST 24 Feb 25 03:40:20 PM PST 24 46624567 ps
T560 /workspace/coverage/cover_reg_top/94.xbar_random.1766498961 Feb 25 03:47:01 PM PST 24 Feb 25 03:48:00 PM PST 24 1572790039 ps
T561 /workspace/coverage/cover_reg_top/70.xbar_random_slow_rsp.3232503885 Feb 25 03:42:43 PM PST 24 Feb 25 03:45:28 PM PST 24 10035414900 ps
T562 /workspace/coverage/cover_reg_top/64.xbar_stress_all.4487733 Feb 25 03:41:22 PM PST 24 Feb 25 03:44:59 PM PST 24 5460064451 ps
T250 /workspace/coverage/cover_reg_top/57.xbar_same_source.3390027254 Feb 25 03:39:57 PM PST 24 Feb 25 03:40:28 PM PST 24 400883340 ps
T563 /workspace/coverage/cover_reg_top/64.xbar_same_source.3036524935 Feb 25 03:41:17 PM PST 24 Feb 25 03:42:23 PM PST 24 2345486596 ps
T564 /workspace/coverage/cover_reg_top/39.xbar_random.3746138139 Feb 25 03:35:53 PM PST 24 Feb 25 03:36:46 PM PST 24 1421599542 ps
T187 /workspace/coverage/cover_reg_top/95.xbar_random.1389592502 Feb 25 03:47:08 PM PST 24 Feb 25 03:47:51 PM PST 24 545472694 ps
T19 /workspace/coverage/cover_reg_top/4.chip_csr_hw_reset.2555690458 Feb 25 03:25:20 PM PST 24 Feb 25 03:31:31 PM PST 24 5307204640 ps
T565 /workspace/coverage/cover_reg_top/10.xbar_smoke_large_delays.3222819895 Feb 25 03:27:23 PM PST 24 Feb 25 03:28:52 PM PST 24 7700003934 ps
T566 /workspace/coverage/cover_reg_top/68.xbar_smoke_zero_delays.2223610873 Feb 25 03:42:04 PM PST 24 Feb 25 03:42:11 PM PST 24 50560463 ps
T567 /workspace/coverage/cover_reg_top/86.xbar_random_zero_delays.3695993554 Feb 25 03:45:50 PM PST 24 Feb 25 03:46:50 PM PST 24 616230271 ps
T288 /workspace/coverage/cover_reg_top/91.xbar_same_source.2369272282 Feb 25 03:46:26 PM PST 24 Feb 25 03:47:29 PM PST 24 2395622829 ps
T568 /workspace/coverage/cover_reg_top/96.xbar_smoke_large_delays.3180953100 Feb 25 03:47:19 PM PST 24 Feb 25 03:48:50 PM PST 24 8699394767 ps
T77 /workspace/coverage/cover_reg_top/19.chip_csr_rw.1486273903 Feb 25 03:30:51 PM PST 24 Feb 25 03:39:11 PM PST 24 5263027014 ps
T569 /workspace/coverage/cover_reg_top/58.xbar_stress_all.1938598944 Feb 25 03:40:16 PM PST 24 Feb 25 03:43:12 PM PST 24 2132395167 ps
T570 /workspace/coverage/cover_reg_top/88.xbar_smoke_large_delays.1659283757 Feb 25 03:45:48 PM PST 24 Feb 25 03:47:13 PM PST 24 8645757915 ps
T571 /workspace/coverage/cover_reg_top/9.xbar_random_zero_delays.1546252170 Feb 25 03:27:03 PM PST 24 Feb 25 03:27:32 PM PST 24 257574266 ps
T178 /workspace/coverage/cover_reg_top/57.xbar_stress_all.2322731148 Feb 25 03:40:15 PM PST 24 Feb 25 03:46:28 PM PST 24 10400289203 ps
T281 /workspace/coverage/cover_reg_top/54.xbar_same_source.2659880338 Feb 25 03:39:22 PM PST 24 Feb 25 03:40:19 PM PST 24 1673495705 ps
T153 /workspace/coverage/cover_reg_top/66.xbar_stress_all.4186941353 Feb 25 03:41:54 PM PST 24 Feb 25 03:46:46 PM PST 24 3546829275 ps
T572 /workspace/coverage/cover_reg_top/57.xbar_smoke_slow_rsp.4030311768 Feb 25 03:39:49 PM PST 24 Feb 25 03:41:03 PM PST 24 4200224491 ps
T359 /workspace/coverage/cover_reg_top/1.xbar_stress_all_with_reset_error.3746834315 Feb 25 03:23:48 PM PST 24 Feb 25 03:29:56 PM PST 24 3564367079 ps
T573 /workspace/coverage/cover_reg_top/97.xbar_smoke.4177154327 Feb 25 03:47:27 PM PST 24 Feb 25 03:47:34 PM PST 24 47111084 ps
T360 /workspace/coverage/cover_reg_top/11.xbar_stress_all_with_rand_reset.4153415028 Feb 25 03:27:59 PM PST 24 Feb 25 03:29:25 PM PST 24 305602954 ps
T283 /workspace/coverage/cover_reg_top/50.xbar_stress_all.344905684 Feb 25 03:38:34 PM PST 24 Feb 25 03:46:13 PM PST 24 11983668469 ps
T574 /workspace/coverage/cover_reg_top/72.xbar_random_slow_rsp.1015687334 Feb 25 03:43:02 PM PST 24 Feb 25 03:47:19 PM PST 24 14082303974 ps
T575 /workspace/coverage/cover_reg_top/25.xbar_stress_all_with_error.3151670197 Feb 25 03:32:35 PM PST 24 Feb 25 03:39:39 PM PST 24 11221379831 ps
T576 /workspace/coverage/cover_reg_top/81.xbar_access_same_device_slow_rsp.2907844713 Feb 25 03:44:39 PM PST 24 Feb 25 04:08:29 PM PST 24 77946277320 ps
T161 /workspace/coverage/cover_reg_top/48.xbar_random_zero_delays.2845859713 Feb 25 03:38:15 PM PST 24 Feb 25 03:39:06 PM PST 24 615647372 ps
T577 /workspace/coverage/cover_reg_top/13.xbar_random_slow_rsp.2647768966 Feb 25 03:28:40 PM PST 24 Feb 25 03:33:23 PM PST 24 16784187047 ps
T578 /workspace/coverage/cover_reg_top/56.xbar_error_and_unmapped_addr.1771719793 Feb 25 03:39:51 PM PST 24 Feb 25 03:40:13 PM PST 24 191395900 ps
T219 /workspace/coverage/cover_reg_top/23.chip_tl_errors.2868455965 Feb 25 03:31:48 PM PST 24 Feb 25 03:34:42 PM PST 24 3547308969 ps
T579 /workspace/coverage/cover_reg_top/90.xbar_smoke_zero_delays.3901326795 Feb 25 03:46:18 PM PST 24 Feb 25 03:46:24 PM PST 24 42155028 ps
T580 /workspace/coverage/cover_reg_top/77.xbar_access_same_device_slow_rsp.3710253768 Feb 25 03:44:01 PM PST 24 Feb 25 03:59:18 PM PST 24 53728535082 ps
T581 /workspace/coverage/cover_reg_top/32.xbar_stress_all_with_error.2460826067 Feb 25 03:34:26 PM PST 24 Feb 25 03:41:38 PM PST 24 11397393112 ps
T582 /workspace/coverage/cover_reg_top/81.xbar_smoke.733181932 Feb 25 03:44:33 PM PST 24 Feb 25 03:44:39 PM PST 24 47238414 ps
T583 /workspace/coverage/cover_reg_top/59.xbar_random_slow_rsp.2048662931 Feb 25 03:40:20 PM PST 24 Feb 25 03:52:14 PM PST 24 38292921205 ps
T154 /workspace/coverage/cover_reg_top/11.xbar_stress_all.2060659282 Feb 25 03:28:08 PM PST 24 Feb 25 03:33:19 PM PST 24 3238158895 ps
T584 /workspace/coverage/cover_reg_top/95.xbar_random_slow_rsp.2280448626 Feb 25 03:47:20 PM PST 24 Feb 25 04:06:49 PM PST 24 66037078570 ps
T585 /workspace/coverage/cover_reg_top/5.xbar_stress_all_with_reset_error.300621629 Feb 25 03:25:43 PM PST 24 Feb 25 03:28:47 PM PST 24 872160390 ps
T586 /workspace/coverage/cover_reg_top/86.xbar_random_large_delays.1802795048 Feb 25 03:45:34 PM PST 24 Feb 25 03:52:25 PM PST 24 39957787309 ps
T587 /workspace/coverage/cover_reg_top/50.xbar_error_and_unmapped_addr.1219701176 Feb 25 03:38:37 PM PST 24 Feb 25 03:39:08 PM PST 24 300869197 ps
T232 /workspace/coverage/cover_reg_top/38.xbar_random.2713106128 Feb 25 03:35:37 PM PST 24 Feb 25 03:36:59 PM PST 24 2017380147 ps
T588 /workspace/coverage/cover_reg_top/61.xbar_random_slow_rsp.3197786856 Feb 25 03:40:57 PM PST 24 Feb 25 03:47:40 PM PST 24 25711275916 ps
T589 /workspace/coverage/cover_reg_top/2.xbar_smoke_large_delays.1020957998 Feb 25 03:24:03 PM PST 24 Feb 25 03:25:35 PM PST 24 8097823710 ps
T590 /workspace/coverage/cover_reg_top/58.xbar_smoke_large_delays.275802073 Feb 25 03:40:04 PM PST 24 Feb 25 03:41:42 PM PST 24 9011308275 ps
T591 /workspace/coverage/cover_reg_top/38.xbar_same_source.1036999084 Feb 25 03:35:55 PM PST 24 Feb 25 03:36:26 PM PST 24 373084560 ps
T592 /workspace/coverage/cover_reg_top/62.xbar_error_random.3753549021 Feb 25 03:40:56 PM PST 24 Feb 25 03:41:19 PM PST 24 647818606 ps
T593 /workspace/coverage/cover_reg_top/74.xbar_smoke_slow_rsp.591145569 Feb 25 03:43:29 PM PST 24 Feb 25 03:44:48 PM PST 24 4385791161 ps
T594 /workspace/coverage/cover_reg_top/22.xbar_smoke.760083187 Feb 25 03:31:37 PM PST 24 Feb 25 03:31:48 PM PST 24 218042083 ps
T175 /workspace/coverage/cover_reg_top/21.xbar_stress_all.484708920 Feb 25 03:31:22 PM PST 24 Feb 25 03:38:22 PM PST 24 5047746464 ps
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