Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.edn1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	156522	1			T5	16		T6	86		T7	55
values[2]	4360	1			T6	3		T7	2		T18	2
values[3]	2011	1			T336	1		T155	74		T248	1
values[4]	1466	1			T336	1		T155	36		T248	1
values[5]	1118	1			T336	1		T155	31		T248	1
values[6]	847	1			T336	1		T155	12		T248	1
values[7]	654	1			T336	1		T155	8		T248	1
values[8]	567	1			T336	1		T155	4		T248	1
values[9]	507	1			T336	1		T248	1		T349	8
values[10]	546	1			T336	1		T248	1		T349	11
values[11]	540	1			T336	1		T248	1		T349	9
values[12]	445	1			T336	1		T248	1		T349	5
values[13]	417	1			T336	1		T248	1		T349	5
values[14]	375	1			T336	1		T248	1		T349	1
values[15]	358	1			T336	1		T248	1		T349	1
values[16]	352	1			T336	1		T248	1		T349	6
values[17]	384	1			T336	1		T248	1		T349	8
values[18]	314	1			T336	1		T248	1		T349	2
values[19]	309	1			T336	1		T248	1		T349	3
values[20]	362	1			T336	1		T248	1		T349	19
values[21]	268	1			T336	1		T248	1		T349	20
values[22]	287	1			T336	1		T248	1		T349	14
values[23]	275	1			T336	1		T248	1		T349	7
values[24]	250	1			T336	1		T248	1		T349	10
values[25]	294	1			T336	1		T248	1		T349	12
values[26]	256	1			T336	1		T248	1		T349	3
values[27]	280	1			T336	1		T248	1		T72	1
values[28]	271	1			T336	1		T248	1		T72	1
values[29]	239	1			T336	1		T248	1		T72	1
values[30]	159	1			T336	1		T248	1		T72	1
values[31]	136	1			T336	1		T248	1		T72	1
values[32]	130	1			T336	1		T248	1		T72	1
values[33]	106	1			T336	1		T248	1		T72	1
values[34]	114	1			T336	1		T248	1		T72	1
values[35]	80	1			T336	1		T248	1		T72	1
values[36]	104	1			T336	1		T248	1		T72	1
values[37]	111	1			T336	1		T248	1		T72	1
values[38]	108	1			T336	1		T248	1		T72	1
values[39]	63	1			T336	1		T248	1		T72	1
values[40]	64	1			T336	1		T248	1		T72	1
values[41]	71	1			T336	1		T248	1		T72	1
values[42]	58	1			T336	1		T248	1		T72	1
values[43]	54	1			T336	1		T248	1		T72	1
values[44]	53	1			T336	1		T248	1		T72	1
values[45]	54	1			T336	1		T248	1		T72	1
values[46]	51	1			T336	1		T248	1		T72	1
values[47]	56	1			T336	1		T248	1		T72	1
values[48]	45	1			T336	1		T248	1		T72	1
values[49]	41	1			T336	1		T248	1		T72	1
values[50]	45	1			T336	1		T248	1		T72	1
values[51]	39	1			T336	1		T248	1		T72	1
values[52]	45	1			T336	1		T248	1		T72	1
values[53]	57	1			T336	1		T248	1		T72	1
values[54]	60	1			T336	1		T248	1		T72	1
values[55]	51	1			T336	1		T248	1		T72	1
values[56]	53	1			T336	1		T248	1		T72	1
values[57]	47	1			T336	1		T248	1		T72	1
values[58]	44	1			T336	1		T248	1		T72	1
values[59]	49	1			T336	1		T248	1		T72	1
values[60]	34	1			T336	1		T248	1		T72	1
values[61]	50	1			T336	1		T248	1		T72	1
values[62]	47	1			T336	1		T248	1		T72	1
values[63]	56	1			T336	1		T248	1		T72	1
values[64]	43	1			T336	1		T248	1		T72	1
values[65]	55	1			T336	1		T248	1		T72	1
values[66]	44	1			T336	1		T248	1		T72	1
values[67]	49	1			T336	1		T248	1		T72	1
values[68]	54	1			T336	1		T248	1		T72	1
values[69]	56	1			T336	1		T248	1		T72	1
values[70]	71	1			T336	1		T248	1		T72	1
values[71]	68	1			T336	1		T248	2		T72	1
values[72]	53	1			T336	1		T248	1		T72	1
values[73]	57	1			T336	1		T248	1		T72	2
values[74]	60	1			T336	1		T248	1		T72	1
values[75]	49	1			T336	1		T248	1		T72	1
values[76]	47	1			T336	1		T248	1		T72	1
values[77]	60	1			T336	1		T248	2		T72	1
values[78]	57	1			T336	1		T248	5		T72	1
values[79]	58	1			T336	1		T248	7		T72	1
values[80]	54	1			T336	1		T248	8		T72	1
values[81]	63	1			T336	1		T248	8		T72	1
values[82]	65	1			T336	2		T248	2		T72	1
values[83]	62	1			T336	6		T248	2		T72	1
values[84]	69	1			T336	9		T248	5		T72	1
values[85]	50	1			T336	2		T248	5		T72	1
values[86]	70	1			T336	2		T248	8		T72	1
values[87]	83	1			T336	4		T248	4		T72	1
values[88]	73	1			T336	3		T248	4		T72	1
values[89]	69	1			T336	3		T248	3		T72	1
values[90]	65	1			T336	2		T248	2		T72	1
values[91]	70	1			T336	2		T248	3		T72	1
values[92]	70	1			T336	1		T248	5		T72	1
values[93]	77	1			T336	2		T248	1		T72	1
values[94]	66	1			T336	2		T248	2		T72	1
values[95]	79	1			T336	1		T248	5		T72	1
values[96]	53	1			T336	2		T248	1		T72	1
values[97]	58	1			T336	3		T248	4		T72	1
values[98]	59	1			T336	2		T248	4		T72	1
values[99]	78	1			T336	3		T248	5		T72	1
values[100]	81	1			T336	1		T248	8		T72	1
values[101]	84	1			T336	2		T248	4		T72	1
values[102]	87	1			T336	4		T248	3		T72	1
values[103]	103	1			T336	4		T248	3		T72	1
values[104]	97	1			T336	5		T248	2		T72	1
values[105]	100	1			T336	2		T248	1		T72	1
values[106]	89	1			T336	1		T248	1		T72	1
values[107]	76	1			T336	1		T248	2		T72	1
values[108]	86	1			T336	1		T248	1		T72	1
values[109]	83	1			T336	2		T248	1		T72	1
values[110]	70	1			T336	1		T248	1		T72	1
values[111]	71	1			T336	1		T248	2		T72	1
values[112]	68	1			T336	2		T248	3		T72	1
values[113]	86	1			T336	4		T248	1		T72	1
values[114]	73	1			T336	2		T248	1		T72	1
values[115]	82	1			T336	1		T248	1		T72	1
values[116]	83	1			T336	2		T248	2		T72	1
values[117]	104	1			T336	1		T248	3		T72	1
values[118]	88	1			T336	4		T248	1		T72	1
values[119]	86	1			T336	1		T248	2		T72	5
values[120]	68	1			T336	1		T248	2		T72	1
values[121]	72	1			T336	2		T248	1		T72	1
values[122]	79	1			T336	1		T248	1		T72	1
values[123]	93	1			T336	1		T248	1		T72	3
values[124]	156	1			T336	2		T248	1		T72	2
values[125]	340	1			T336	6		T248	3		T72	2
values[126]	707	1			T336	10		T248	6		T72	20
values[127]	2342	1			T336	100		T248	83		T72	120
values[128]	4197	1			T336	187		T248	178		T72	237