Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__core_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	158245	1			T73	5		T75	5		T78	92
values[2]	3924	1			T78	3		T118	3		T393	5
values[3]	1655	1			T657	1		T680	1		T424	1
values[4]	1265	1			T657	1		T470	9		T804	4
values[5]	1075	1			T657	1		T804	4		T445	8
values[6]	974	1			T657	1		T804	3		T445	8
values[7]	968	1			T657	1		T804	1		T445	12
values[8]	1006	1			T657	1		T804	1		T445	9
values[9]	915	1			T657	1		T804	1		T445	4
values[10]	824	1			T657	1		T804	4		T445	5
values[11]	764	1			T657	1		T804	3		T445	1
values[12]	647	1			T657	1		T804	2		T445	5
values[13]	593	1			T657	1		T804	2		T445	15
values[14]	595	1			T657	1		T804	1		T445	14
values[15]	474	1			T657	1		T804	2		T445	12
values[16]	424	1			T657	1		T804	1		T445	14
values[17]	403	1			T657	2		T804	3		T445	3
values[18]	388	1			T657	1		T804	7		T445	4
values[19]	375	1			T657	1		T804	1		T445	1
values[20]	360	1			T657	1		T804	4		T445	3
values[21]	372	1			T657	1		T804	3		T445	3
values[22]	377	1			T657	1		T804	4		T445	2
values[23]	399	1			T657	1		T804	3		T445	7
values[24]	376	1			T657	1		T804	1		T445	9
values[25]	339	1			T657	1		T804	2		T445	12
values[26]	291	1			T657	1		T804	3		T445	37
values[27]	266	1			T657	1		T804	3		T445	34
values[28]	258	1			T657	1		T804	3		T445	11
values[29]	253	1			T657	1		T804	2		T445	5
values[30]	199	1			T657	1		T804	1		T445	9
values[31]	211	1			T657	1		T804	5		T445	7
values[32]	184	1			T657	1		T804	11		T445	3
values[33]	176	1			T657	1		T804	8		T445	6
values[34]	171	1			T657	1		T804	4		T445	3
values[35]	185	1			T657	1		T804	1		T445	21
values[36]	183	1			T657	1		T804	3		T445	19
values[37]	142	1			T657	1		T804	1		T445	19
values[38]	116	1			T657	1		T804	2		T445	16
values[39]	136	1			T657	1		T804	3		T445	11
values[40]	144	1			T657	1		T804	1		T445	20
values[41]	124	1			T657	1		T804	1		T445	23
values[42]	110	1			T657	1		T804	4		T445	20
values[43]	107	1			T657	1		T804	2		T445	4
values[44]	112	1			T657	1		T804	3		T445	12
values[45]	109	1			T657	1		T804	1		T445	8
values[46]	105	1			T657	1		T804	2		T445	12
values[47]	111	1			T657	1		T804	5		T445	13
values[48]	114	1			T657	1		T804	2		T445	4
values[49]	79	1			T657	1		T804	1		T445	4
values[50]	82	1			T657	1		T804	2		T445	6
values[51]	84	1			T657	1		T804	2		T445	2
values[52]	73	1			T657	1		T804	4		T794	1
values[53]	73	1			T657	1		T804	3		T794	1
values[54]	70	1			T657	1		T804	3		T794	1
values[55]	71	1			T657	1		T804	3		T794	1
values[56]	95	1			T657	1		T804	6		T794	1
values[57]	69	1			T657	1		T804	2		T794	1
values[58]	63	1			T657	1		T804	1		T794	1
values[59]	57	1			T657	1		T804	2		T794	1
values[60]	61	1			T657	1		T804	3		T794	1
values[61]	69	1			T657	1		T804	3		T794	1
values[62]	61	1			T657	1		T804	2		T794	1
values[63]	61	1			T657	1		T804	1		T794	1
values[64]	65	1			T657	1		T804	6		T794	1
values[65]	60	1			T657	1		T804	2		T794	1
values[66]	66	1			T657	1		T804	7		T794	1
values[67]	58	1			T657	1		T804	1		T794	1
values[68]	55	1			T657	1		T804	2		T794	1
values[69]	70	1			T657	1		T804	2		T794	1
values[70]	70	1			T657	1		T804	3		T794	1
values[71]	73	1			T657	1		T804	2		T794	1
values[72]	72	1			T657	1		T804	2		T794	1
values[73]	58	1			T657	1		T804	7		T794	1
values[74]	60	1			T657	1		T804	1		T794	1
values[75]	58	1			T657	1		T804	2		T794	1
values[76]	76	1			T657	1		T804	1		T794	1
values[77]	80	1			T657	1		T804	1		T794	1
values[78]	75	1			T657	1		T804	2		T794	1
values[79]	57	1			T657	1		T804	3		T794	1
values[80]	64	1			T657	1		T804	2		T794	1
values[81]	74	1			T657	1		T804	8		T794	2
values[82]	75	1			T657	1		T804	4		T794	1
values[83]	74	1			T657	1		T804	2		T794	1
values[84]	76	1			T657	1		T804	2		T794	1
values[85]	87	1			T657	1		T804	1		T794	1
values[86]	90	1			T657	1		T804	2		T794	1
values[87]	83	1			T657	1		T804	3		T794	1
values[88]	71	1			T657	1		T804	2		T794	1
values[89]	80	1			T657	1		T804	2		T794	1
values[90]	75	1			T657	1		T804	3		T794	1
values[91]	97	1			T657	1		T804	1		T794	1
values[92]	81	1			T657	1		T804	6		T794	1
values[93]	76	1			T657	1		T804	2		T794	1
values[94]	89	1			T657	1		T804	2		T794	1
values[95]	76	1			T657	1		T804	1		T794	1
values[96]	93	1			T657	1		T804	1		T794	1
values[97]	99	1			T657	1		T804	2		T794	1
values[98]	93	1			T657	1		T804	4		T794	1
values[99]	106	1			T657	1		T804	4		T794	1
values[100]	92	1			T657	1		T804	2		T794	1
values[101]	80	1			T657	1		T804	1		T794	1
values[102]	90	1			T657	1		T804	2		T794	1
values[103]	92	1			T657	1		T804	3		T794	1
values[104]	92	1			T657	1		T804	4		T794	1
values[105]	96	1			T657	1		T804	7		T794	1
values[106]	81	1			T657	1		T804	2		T794	1
values[107]	85	1			T657	1		T804	5		T794	1
values[108]	103	1			T657	1		T804	2		T794	3
values[109]	110	1			T657	3		T804	3		T794	2
values[110]	119	1			T657	1		T804	2		T794	5
values[111]	119	1			T657	2		T804	3		T794	4
values[112]	118	1			T657	4		T804	10		T794	6
values[113]	119	1			T657	1		T804	10		T794	4
values[114]	125	1			T657	2		T804	8		T794	2
values[115]	115	1			T657	4		T804	3		T794	2
values[116]	126	1			T657	1		T804	2		T794	4
values[117]	106	1			T657	1		T804	4		T794	1
values[118]	102	1			T657	2		T804	3		T794	2
values[119]	107	1			T657	1		T804	8		T794	1
values[120]	106	1			T657	1		T804	6		T794	1
values[121]	116	1			T657	2		T804	6		T794	1
values[122]	122	1			T657	1		T804	8		T794	1
values[123]	182	1			T657	3		T804	8		T794	2
values[124]	261	1			T657	3		T804	15		T794	6
values[125]	430	1			T657	1		T804	37		T794	3
values[126]	915	1			T657	10		T804	61		T794	22
values[127]	3207	1			T657	120		T804	23		T794	138
values[128]	5637	1			T657	275		T804	4		T794	191