Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	144560	1			T88	46		T89	51		T91	60
values[2]	9435	1			T88	1		T91	3		T250	4
values[3]	2900	1			T426	9		T501	69		T502	44
values[4]	1476	1			T426	7		T501	32		T502	23
values[5]	1012	1			T426	2		T501	21		T502	37
values[6]	806	1			T426	5		T501	11		T502	38
values[7]	597	1			T426	12		T502	16		T392	1
values[8]	523	1			T426	13		T502	5		T392	1
values[9]	457	1			T426	4		T502	1		T392	1
values[10]	353	1			T426	8		T392	1		T456	2
values[11]	357	1			T426	5		T392	1		T456	8
values[12]	335	1			T426	14		T392	1		T456	6
values[13]	290	1			T426	4		T392	1		T456	4
values[14]	320	1			T426	5		T392	2		T456	12
values[15]	284	1			T426	5		T392	1		T456	9
values[16]	266	1			T426	7		T392	2		T456	7
values[17]	265	1			T426	16		T392	1		T456	11
values[18]	305	1			T426	8		T392	1		T456	6
values[19]	261	1			T426	5		T392	1		T456	11
values[20]	229	1			T426	6		T392	1		T456	3
values[21]	229	1			T426	6		T392	1		T456	9
values[22]	240	1			T426	4		T392	1		T456	6
values[23]	263	1			T426	7		T392	1		T456	11
values[24]	257	1			T426	13		T392	1		T456	6
values[25]	274	1			T426	7		T392	1		T456	8
values[26]	236	1			T426	4		T392	1		T456	5
values[27]	252	1			T426	12		T392	1		T456	3
values[28]	255	1			T426	12		T392	1		T456	7
values[29]	240	1			T426	5		T392	1		T456	5
values[30]	261	1			T426	6		T392	1		T456	7
values[31]	227	1			T426	4		T392	1		T456	6
values[32]	242	1			T426	8		T392	1		T456	19
values[33]	279	1			T426	8		T392	1		T456	5
values[34]	224	1			T426	5		T392	1		T456	5
values[35]	225	1			T426	5		T392	1		T456	8
values[36]	225	1			T426	10		T392	1		T456	3
values[37]	266	1			T426	5		T392	1		T456	7
values[38]	237	1			T426	12		T392	1		T456	5
values[39]	258	1			T426	8		T392	1		T456	6
values[40]	270	1			T426	6		T392	1		T456	16
values[41]	266	1			T426	15		T392	1		T456	8
values[42]	244	1			T426	7		T392	1		T456	10
values[43]	241	1			T426	4		T392	1		T456	11
values[44]	243	1			T426	20		T392	1		T456	6
values[45]	242	1			T426	7		T392	1		T456	7
values[46]	186	1			T426	5		T392	1		T456	9
values[47]	233	1			T426	3		T392	1		T456	10
values[48]	210	1			T426	4		T392	1		T456	8
values[49]	266	1			T426	13		T392	1		T456	8
values[50]	241	1			T426	3		T392	1		T456	9
values[51]	228	1			T426	8		T392	1		T456	4
values[52]	225	1			T426	3		T392	1		T456	9
values[53]	196	1			T426	14		T392	1		T456	4
values[54]	237	1			T426	8		T392	1		T456	9
values[55]	190	1			T426	13		T392	1		T456	3
values[56]	191	1			T426	5		T392	1		T456	8
values[57]	183	1			T426	9		T392	1		T456	11
values[58]	187	1			T426	5		T392	1		T456	5
values[59]	176	1			T392	1		T456	4		T783	6
values[60]	187	1			T392	1		T456	11		T783	10
values[61]	155	1			T392	1		T456	6		T783	6
values[62]	162	1			T392	1		T456	5		T783	6
values[63]	193	1			T392	1		T456	7		T783	15
values[64]	160	1			T392	1		T456	20		T783	22
values[65]	127	1			T392	1		T456	3		T771	1
values[66]	100	1			T392	1		T771	1		T770	1
values[67]	85	1			T392	1		T771	1		T770	1
values[68]	77	1			T392	1		T771	1		T770	1
values[69]	75	1			T392	1		T771	1		T770	1
values[70]	89	1			T392	1		T771	1		T770	1
values[71]	57	1			T392	1		T771	1		T770	1
values[72]	58	1			T392	1		T771	1		T770	1
values[73]	55	1			T392	1		T771	1		T770	1
values[74]	53	1			T392	1		T771	1		T770	1
values[75]	58	1			T392	1		T771	1		T770	1
values[76]	62	1			T392	1		T771	1		T770	1
values[77]	54	1			T392	1		T771	1		T770	1
values[78]	39	1			T392	1		T771	1		T770	1
values[79]	45	1			T392	1		T771	1		T770	1
values[80]	49	1			T392	1		T771	1		T770	1
values[81]	56	1			T392	1		T771	1		T770	1
values[82]	57	1			T392	1		T771	2		T770	1
values[83]	66	1			T392	4		T771	8		T770	1
values[84]	79	1			T392	9		T771	2		T770	1
values[85]	55	1			T392	3		T771	1		T770	2
values[86]	60	1			T392	8		T771	1		T770	1
values[87]	66	1			T392	9		T771	6		T770	1
values[88]	58	1			T392	2		T771	1		T770	1
values[89]	56	1			T392	2		T771	1		T770	1
values[90]	49	1			T392	5		T771	1		T770	1
values[91]	57	1			T392	2		T771	4		T770	1
values[92]	70	1			T392	3		T771	3		T770	1
values[93]	65	1			T392	1		T771	4		T770	1
values[94]	69	1			T392	11		T771	1		T770	1
values[95]	78	1			T392	1		T771	7		T770	1
values[96]	71	1			T392	3		T771	1		T770	1
values[97]	79	1			T392	3		T771	8		T770	1
values[98]	55	1			T392	1		T771	2		T770	1
values[99]	62	1			T392	1		T771	1		T770	1
values[100]	58	1			T392	3		T771	2		T770	1
values[101]	59	1			T392	4		T771	4		T770	1
values[102]	64	1			T392	1		T771	1		T770	2
values[103]	56	1			T392	1		T771	3		T770	1
values[104]	57	1			T392	1		T771	2		T770	2
values[105]	71	1			T392	1		T771	4		T770	2
values[106]	74	1			T392	1		T771	3		T770	1
values[107]	71	1			T392	1		T771	1		T770	1
values[108]	67	1			T392	3		T771	1		T770	1
values[109]	64	1			T392	2		T771	3		T770	4
values[110]	56	1			T392	2		T771	1		T770	2
values[111]	59	1			T392	1		T771	1		T770	1
values[112]	53	1			T392	1		T771	3		T770	2
values[113]	66	1			T392	4		T771	3		T770	5
values[114]	55	1			T392	2		T771	4		T770	3
values[115]	67	1			T392	2		T771	1		T770	5
values[116]	64	1			T392	4		T771	1		T770	1
values[117]	48	1			T392	2		T771	2		T770	5
values[118]	50	1			T392	2		T771	1		T770	3
values[119]	50	1			T392	3		T771	3		T770	4
values[120]	50	1			T392	3		T771	1		T770	2
values[121]	56	1			T392	4		T771	1		T770	1
values[122]	56	1			T392	1		T771	1		T770	2
values[123]	57	1			T392	3		T771	1		T770	2
values[124]	57	1			T392	3		T771	1		T770	3
values[125]	64	1			T392	2		T771	1		T770	3
values[126]	81	1			T392	3		T771	2		T770	2
values[127]	720	1			T392	23		T771	27		T770	34
values[128]	6507	1			T392	277		T771	292		T770	329