Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138054	1			T88	49		T89	75		T91	70
values[2]	8870	1			T91	4		T249	1		T250	1
values[3]	3413	1			T500	9		T426	7		T421	1
values[4]	1859	1			T500	9		T426	10		T421	1
values[5]	1221	1			T500	8		T426	9		T421	1
values[6]	929	1			T500	7		T426	3		T421	1
values[7]	664	1			T500	3		T426	2		T421	1
values[8]	642	1			T500	8		T426	15		T421	1
values[9]	495	1			T500	11		T426	10		T421	1
values[10]	569	1			T500	5		T426	14		T421	1
values[11]	494	1			T500	8		T426	3		T421	1
values[12]	375	1			T500	4		T426	6		T421	1
values[13]	375	1			T500	6		T426	3		T421	1
values[14]	397	1			T500	9		T426	3		T421	1
values[15]	420	1			T500	13		T426	21		T421	1
values[16]	366	1			T500	5		T426	12		T421	1
values[17]	357	1			T500	8		T426	11		T421	1
values[18]	414	1			T500	8		T426	18		T421	1
values[19]	370	1			T500	13		T426	10		T421	1
values[20]	366	1			T500	6		T426	2		T421	1
values[21]	357	1			T500	3		T426	4		T421	1
values[22]	339	1			T500	5		T426	3		T421	1
values[23]	375	1			T500	3		T426	9		T421	1
values[24]	366	1			T500	7		T426	7		T421	2
values[25]	442	1			T500	11		T426	11		T421	1
values[26]	337	1			T500	10		T426	5		T421	1
values[27]	350	1			T500	4		T426	7		T421	1
values[28]	395	1			T500	6		T426	9		T421	1
values[29]	357	1			T500	5		T426	5		T421	1
values[30]	393	1			T500	11		T426	7		T421	1
values[31]	354	1			T500	14		T426	8		T421	1
values[32]	340	1			T500	8		T426	6		T421	1
values[33]	389	1			T500	7		T426	4		T421	1
values[34]	379	1			T500	3		T426	12		T421	1
values[35]	320	1			T500	4		T426	7		T421	1
values[36]	322	1			T500	4		T426	14		T421	1
values[37]	382	1			T500	9		T426	6		T421	1
values[38]	350	1			T500	4		T426	19		T421	1
values[39]	298	1			T500	5		T426	7		T421	1
values[40]	313	1			T500	5		T426	4		T421	1
values[41]	328	1			T500	13		T426	2		T421	1
values[42]	326	1			T500	5		T426	10		T421	1
values[43]	323	1			T500	7		T426	3		T421	1
values[44]	304	1			T500	5		T426	3		T421	1
values[45]	341	1			T500	2		T426	5		T421	1
values[46]	321	1			T500	7		T426	4		T421	1
values[47]	297	1			T500	4		T426	4		T421	1
values[48]	302	1			T500	12		T426	6		T421	1
values[49]	302	1			T500	3		T426	7		T421	1
values[50]	301	1			T500	14		T426	8		T421	1
values[51]	302	1			T500	19		T426	5		T421	1
values[52]	291	1			T500	11		T426	5		T421	1
values[53]	321	1			T500	11		T426	11		T421	1
values[54]	233	1			T500	15		T426	9		T421	1
values[55]	249	1			T500	3		T426	8		T421	1
values[56]	265	1			T500	10		T426	11		T421	1
values[57]	254	1			T500	3		T426	4		T421	1
values[58]	240	1			T500	5		T421	1		T564	14
values[59]	200	1			T500	9		T421	1		T564	18
values[60]	252	1			T500	16		T421	1		T564	10
values[61]	225	1			T500	9		T421	1		T564	14
values[62]	203	1			T500	5		T421	1		T564	13
values[63]	136	1			T500	6		T421	2		T564	12
values[64]	173	1			T500	16		T421	1		T564	7
values[65]	170	1			T500	12		T421	1		T564	4
values[66]	110	1			T421	1		T564	10		T456	5
values[67]	149	1			T421	1		T564	5		T456	3
values[68]	90	1			T421	1		T564	3		T456	8
values[69]	90	1			T421	1		T564	5		T456	9
values[70]	119	1			T421	1		T564	5		T456	11
values[71]	92	1			T421	1		T564	5		T456	11
values[72]	85	1			T421	1		T564	9		T456	6
values[73]	84	1			T421	1		T564	3		T456	3
values[74]	71	1			T421	1		T456	1		T765	1
values[75]	83	1			T421	1		T765	1		T766	1
values[76]	82	1			T421	1		T765	1		T766	1
values[77]	62	1			T421	1		T765	1		T766	1
values[78]	54	1			T421	1		T765	1		T766	1
values[79]	64	1			T421	1		T765	1		T766	1
values[80]	50	1			T421	1		T765	1		T766	1
values[81]	63	1			T421	1		T765	1		T766	1
values[82]	60	1			T421	1		T765	1		T766	1
values[83]	65	1			T421	1		T765	1		T766	1
values[84]	68	1			T421	1		T765	1		T766	1
values[85]	81	1			T421	1		T765	1		T766	1
values[86]	97	1			T421	1		T765	1		T766	1
values[87]	63	1			T421	1		T765	1		T766	1
values[88]	64	1			T421	1		T765	1		T766	1
values[89]	70	1			T421	1		T765	1		T766	1
values[90]	74	1			T421	1		T765	1		T766	1
values[91]	96	1			T421	1		T765	1		T766	1
values[92]	95	1			T421	1		T765	1		T766	1
values[93]	83	1			T421	1		T765	1		T766	1
values[94]	74	1			T421	1		T765	4		T766	1
values[95]	72	1			T421	1		T765	2		T766	1
values[96]	59	1			T421	1		T765	1		T766	1
values[97]	59	1			T421	1		T765	1		T766	1
values[98]	62	1			T421	1		T765	1		T766	1
values[99]	62	1			T421	1		T765	1		T766	1
values[100]	76	1			T421	1		T765	6		T766	1
values[101]	85	1			T421	1		T765	1		T766	1
values[102]	62	1			T421	1		T765	1		T766	1
values[103]	83	1			T421	1		T765	1		T766	1
values[104]	84	1			T421	1		T765	4		T766	1
values[105]	88	1			T421	1		T765	4		T766	1
values[106]	92	1			T421	1		T765	1		T766	1
values[107]	77	1			T421	1		T765	3		T766	1
values[108]	88	1			T421	1		T765	9		T766	1
values[109]	79	1			T421	1		T765	1		T766	1
values[110]	68	1			T421	1		T765	4		T766	1
values[111]	80	1			T421	1		T765	7		T766	1
values[112]	75	1			T421	1		T765	5		T766	1
values[113]	63	1			T421	1		T765	1		T766	1
values[114]	70	1			T421	1		T765	1		T766	1
values[115]	76	1			T421	1		T765	2		T766	2
values[116]	64	1			T421	1		T765	3		T766	2
values[117]	92	1			T421	1		T765	1		T766	13
values[118]	71	1			T421	1		T765	1		T766	5
values[119]	66	1			T421	1		T765	1		T766	1
values[120]	79	1			T421	2		T765	5		T766	4
values[121]	70	1			T421	1		T765	1		T766	2
values[122]	81	1			T421	1		T765	3		T766	1
values[123]	86	1			T421	4		T765	1		T766	1
values[124]	75	1			T421	1		T765	7		T766	2
values[125]	52	1			T421	1		T765	2		T766	2
values[126]	101	1			T421	5		T765	5		T766	2
values[127]	740	1			T421	46		T765	38		T766	29
values[128]	6474	1			T421	360		T765	317		T766	306