Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.edn0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	158285	1			T88	44		T89	68		T91	56
values[2]	4328	1			T91	2		T250	3		T507	1
values[3]	2148	1			T507	1		T501	11		T528	1
values[4]	1461	1			T501	1		T392	1		T617	28
values[5]	996	1			T501	3		T392	1		T617	45
values[6]	799	1			T501	1		T392	1		T617	76
values[7]	681	1			T392	1		T617	78		T772	53
values[8]	648	1			T392	1		T617	43		T772	56
values[9]	548	1			T392	1		T617	34		T772	31
values[10]	482	1			T392	1		T617	41		T772	27
values[11]	427	1			T392	1		T617	30		T772	26
values[12]	415	1			T392	1		T617	18		T772	29
values[13]	314	1			T392	1		T617	16		T772	27
values[14]	332	1			T392	1		T617	21		T772	19
values[15]	369	1			T392	1		T617	8		T772	19
values[16]	328	1			T392	1		T617	3		T772	6
values[17]	299	1			T392	1		T617	1		T776	16
values[18]	256	1			T392	1		T776	12		T762	3
values[19]	219	1			T392	1		T776	11		T762	4
values[20]	182	1			T392	1		T776	5		T762	3
values[21]	172	1			T392	1		T776	6		T762	8
values[22]	190	1			T392	1		T776	43		T762	4
values[23]	169	1			T392	1		T776	32		T762	4
values[24]	144	1			T392	1		T776	23		T762	4
values[25]	127	1			T392	1		T776	5		T762	2
values[26]	110	1			T392	1		T762	3		T777	1
values[27]	99	1			T392	1		T762	2		T777	1
values[28]	94	1			T392	1		T762	3		T777	2
values[29]	75	1			T392	1		T762	1		T777	4
values[30]	104	1			T392	1		T762	1		T777	8
values[31]	102	1			T392	1		T762	3		T777	8
values[32]	122	1			T392	1		T762	5		T777	6
values[33]	100	1			T392	1		T762	1		T777	2
values[34]	74	1			T392	1		T762	2		T777	2
values[35]	52	1			T392	1		T762	2		T777	2
values[36]	45	1			T392	1		T762	2		T777	1
values[37]	52	1			T392	1		T762	2		T777	3
values[38]	46	1			T392	1		T762	3		T777	3
values[39]	49	1			T392	1		T762	1		T777	4
values[40]	48	1			T392	1		T762	4		T777	2
values[41]	53	1			T392	1		T762	1		T777	2
values[42]	58	1			T392	1		T762	2		T777	1
values[43]	66	1			T392	1		T762	2		T777	2
values[44]	72	1			T392	1		T762	8		T777	3
values[45]	73	1			T392	1		T762	8		T777	5
values[46]	49	1			T392	1		T762	4		T777	4
values[47]	54	1			T392	1		T762	4		T777	3
values[48]	62	1			T392	1		T762	1		T777	2
values[49]	53	1			T392	1		T762	2		T777	1
values[50]	49	1			T392	1		T762	4		T777	3
values[51]	38	1			T392	1		T762	2		T777	1
values[52]	40	1			T392	1		T762	3		T777	2
values[53]	38	1			T392	1		T762	1		T777	3
values[54]	32	1			T392	1		T762	1		T777	1
values[55]	34	1			T392	1		T762	1		T777	1
values[56]	39	1			T392	1		T762	5		T777	3
values[57]	39	1			T392	1		T762	4		T777	2
values[58]	40	1			T392	1		T762	2		T777	3
values[59]	28	1			T392	1		T762	1		T777	1
values[60]	33	1			T392	1		T762	2		T777	1
values[61]	35	1			T392	1		T762	1		T777	3
values[62]	34	1			T392	1		T762	1		T777	1
values[63]	34	1			T392	1		T762	2		T777	2
values[64]	36	1			T392	1		T762	2		T777	3
values[65]	30	1			T392	1		T762	1		T777	2
values[66]	41	1			T392	1		T762	1		T777	2
values[67]	33	1			T392	1		T762	1		T777	2
values[68]	37	1			T392	1		T762	5		T777	1
values[69]	39	1			T392	1		T762	3		T777	3
values[70]	34	1			T392	1		T762	3		T777	1
values[71]	34	1			T392	1		T762	2		T777	1
values[72]	30	1			T392	1		T762	2		T777	1
values[73]	40	1			T392	1		T762	1		T777	7
values[74]	34	1			T392	1		T762	2		T777	5
values[75]	31	1			T392	1		T762	1		T777	1
values[76]	36	1			T392	1		T762	2		T777	2
values[77]	35	1			T392	1		T762	2		T777	2
values[78]	38	1			T392	1		T762	3		T777	7
values[79]	28	1			T392	1		T762	3		T777	1
values[80]	34	1			T392	1		T762	5		T777	2
values[81]	35	1			T392	1		T762	1		T777	2
values[82]	37	1			T392	1		T762	1		T777	3
values[83]	38	1			T392	1		T762	3		T777	2
values[84]	35	1			T392	1		T762	1		T777	3
values[85]	32	1			T392	1		T762	1		T777	1
values[86]	37	1			T392	1		T762	2		T777	2
values[87]	32	1			T392	1		T762	1		T777	1
values[88]	44	1			T392	1		T762	5		T777	3
values[89]	39	1			T392	1		T762	4		T777	1
values[90]	39	1			T392	1		T762	4		T777	2
values[91]	34	1			T392	1		T762	2		T777	1
values[92]	33	1			T392	1		T762	4		T777	2
values[93]	50	1			T392	1		T762	5		T777	4
values[94]	41	1			T392	1		T762	2		T777	4
values[95]	50	1			T392	1		T762	6		T777	1
values[96]	40	1			T392	1		T762	3		T777	6
values[97]	38	1			T392	1		T762	2		T777	2
values[98]	42	1			T392	1		T762	1		T777	3
values[99]	52	1			T392	1		T762	5		T777	3
values[100]	60	1			T392	1		T762	7		T777	7
values[101]	60	1			T392	1		T762	6		T777	5
values[102]	53	1			T392	2		T762	3		T777	2
values[103]	46	1			T392	1		T762	3		T777	1
values[104]	40	1			T392	1		T762	2		T777	2
values[105]	52	1			T392	1		T762	2		T777	4
values[106]	44	1			T392	1		T762	2		T777	1
values[107]	59	1			T392	1		T762	2		T777	1
values[108]	40	1			T392	1		T762	1		T777	2
values[109]	41	1			T392	1		T762	1		T777	2
values[110]	46	1			T392	1		T762	2		T777	3
values[111]	48	1			T392	1		T762	2		T777	1
values[112]	53	1			T392	1		T762	1		T777	2
values[113]	40	1			T392	1		T762	1		T777	1
values[114]	51	1			T392	1		T762	3		T777	2
values[115]	69	1			T392	1		T762	3		T777	2
values[116]	67	1			T392	1		T762	2		T777	1
values[117]	65	1			T392	1		T762	4		T777	2
values[118]	56	1			T392	1		T762	3		T777	2
values[119]	54	1			T392	1		T762	2		T777	1
values[120]	69	1			T392	2		T762	7		T777	6
values[121]	53	1			T392	1		T762	5		T777	4
values[122]	58	1			T392	1		T762	2		T777	6
values[123]	103	1			T392	2		T762	4		T777	2
values[124]	202	1			T392	1		T762	15		T777	13
values[125]	332	1			T392	2		T762	30		T777	42
values[126]	613	1			T392	5		T762	73		T777	40
values[127]	2185	1			T392	102		T762	33		T777	16
values[128]	3781	1			T392	215		T762	2		T486	276