Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	137685	1			T83	10		T84	116		T85	21
values[2]	11497	1			T84	4		T85	3		T543	7
values[3]	4622	1			T543	1		T505	6		T454	3
values[4]	2492	1			T505	7		T454	6		T590	14
values[5]	1627	1			T505	8		T454	10		T590	6
values[6]	1149	1			T505	4		T454	4		T484	29
values[7]	804	1			T505	7		T454	11		T484	11
values[8]	582	1			T505	3		T454	14		T484	12
values[9]	486	1			T505	5		T454	2		T484	7
values[10]	457	1			T505	8		T454	7		T484	20
values[11]	412	1			T505	6		T454	6		T484	20
values[12]	362	1			T505	18		T454	13		T484	6
values[13]	395	1			T505	8		T454	5		T484	10
values[14]	367	1			T505	3		T454	4		T484	8
values[15]	411	1			T505	11		T454	5		T484	30
values[16]	338	1			T505	8		T454	4		T484	11
values[17]	315	1			T505	8		T454	3		T484	13
values[18]	350	1			T505	6		T454	2		T484	17
values[19]	342	1			T505	7		T454	4		T484	13
values[20]	349	1			T505	8		T454	8		T484	9
values[21]	303	1			T505	4		T454	6		T484	13
values[22]	352	1			T505	14		T454	14		T484	20
values[23]	350	1			T505	8		T454	11		T484	21
values[24]	366	1			T505	10		T454	6		T484	14
values[25]	364	1			T505	7		T454	5		T484	19
values[26]	366	1			T505	14		T454	2		T484	18
values[27]	362	1			T505	5		T484	14		T666	16
values[28]	311	1			T505	12		T484	19		T666	17
values[29]	305	1			T505	4		T484	16		T666	6
values[30]	313	1			T505	3		T484	14		T666	12
values[31]	311	1			T505	5		T484	14		T666	36
values[32]	298	1			T505	7		T484	9		T666	22
values[33]	264	1			T505	6		T484	14		T666	2
values[34]	303	1			T505	5		T484	19		T666	12
values[35]	334	1			T505	12		T484	14		T666	10
values[36]	283	1			T505	7		T484	15		T666	4
values[37]	252	1			T505	12		T484	23		T666	3
values[38]	314	1			T505	5		T484	19		T666	4
values[39]	267	1			T505	4		T484	15		T666	12
values[40]	339	1			T505	4		T484	6		T666	4
values[41]	362	1			T505	3		T484	13		T666	7
values[42]	371	1			T505	9		T484	25		T666	14
values[43]	331	1			T505	9		T484	16		T666	2
values[44]	302	1			T505	8		T484	20		T666	8
values[45]	276	1			T505	6		T484	11		T666	5
values[46]	244	1			T505	3		T484	14		T666	8
values[47]	257	1			T505	14		T484	11		T666	4
values[48]	249	1			T505	3		T484	14		T666	7
values[49]	289	1			T505	4		T484	8		T666	11
values[50]	267	1			T505	6		T484	18		T666	7
values[51]	259	1			T505	5		T484	18		T666	10
values[52]	294	1			T505	6		T484	11		T666	9
values[53]	260	1			T484	16		T666	4		T909	1
values[54]	301	1			T484	32		T666	9		T909	1
values[55]	283	1			T484	11		T666	7		T909	1
values[56]	282	1			T484	28		T666	7		T909	1
values[57]	271	1			T484	8		T666	10		T909	1
values[58]	279	1			T484	9		T666	9		T909	1
values[59]	221	1			T484	8		T666	4		T909	1
values[60]	214	1			T484	7		T666	9		T909	1
values[61]	257	1			T484	3		T666	11		T909	1
values[62]	249	1			T666	8		T909	1		T629	2
values[63]	194	1			T666	6		T909	1		T629	3
values[64]	194	1			T666	5		T909	1		T629	2
values[65]	178	1			T666	4		T909	1		T629	1
values[66]	169	1			T666	5		T909	1		T629	1
values[67]	175	1			T666	8		T909	1		T629	4
values[68]	137	1			T666	3		T909	1		T629	2
values[69]	120	1			T909	1		T629	3		T461	1
values[70]	118	1			T909	1		T629	11		T461	2
values[71]	103	1			T909	1		T629	12		T461	1
values[72]	93	1			T909	1		T629	8		T461	5
values[73]	94	1			T909	1		T629	5		T461	3
values[74]	107	1			T909	1		T629	2		T461	7
values[75]	103	1			T909	1		T629	1		T461	12
values[76]	109	1			T909	1		T629	2		T461	4
values[77]	103	1			T909	1		T629	5		T461	9
values[78]	92	1			T909	1		T629	3		T461	4
values[79]	72	1			T909	1		T629	2		T461	4
values[80]	72	1			T909	1		T629	2		T461	3
values[81]	65	1			T909	1		T629	5		T461	2
values[82]	90	1			T909	1		T629	11		T461	4
values[83]	81	1			T909	1		T629	9		T461	3
values[84]	83	1			T909	1		T629	3		T461	7
values[85]	62	1			T909	1		T629	1		T461	2
values[86]	93	1			T909	1		T629	4		T461	3
values[87]	87	1			T909	1		T629	7		T461	1
values[88]	73	1			T909	1		T629	5		T461	3
values[89]	78	1			T909	1		T629	9		T461	1
values[90]	69	1			T909	3		T629	3		T461	4
values[91]	64	1			T909	1		T629	2		T461	3
values[92]	60	1			T909	4		T629	1		T461	8
values[93]	71	1			T909	5		T629	2		T461	7
values[94]	63	1			T909	1		T629	1		T461	9
values[95]	73	1			T909	3		T629	1		T461	6
values[96]	79	1			T909	6		T629	1		T461	3
values[97]	77	1			T909	1		T629	3		T461	8
values[98]	80	1			T909	5		T629	4		T461	6
values[99]	60	1			T909	2		T629	1		T461	3
values[100]	67	1			T909	1		T629	3		T461	2
values[101]	58	1			T909	1		T629	1		T461	3
values[102]	73	1			T909	3		T629	1		T461	2
values[103]	71	1			T909	2		T629	6		T461	5
values[104]	79	1			T909	2		T629	8		T461	2
values[105]	62	1			T909	1		T629	2		T461	4
values[106]	66	1			T909	3		T629	5		T461	1
values[107]	71	1			T909	2		T629	5		T461	6
values[108]	69	1			T909	1		T629	1		T461	7
values[109]	76	1			T909	1		T629	6		T461	11
values[110]	59	1			T909	1		T629	9		T461	3
values[111]	67	1			T909	2		T629	6		T461	1
values[112]	74	1			T909	6		T629	8		T461	2
values[113]	75	1			T909	1		T629	4		T461	2
values[114]	67	1			T909	1		T629	3		T461	4
values[115]	62	1			T909	4		T629	3		T461	3
values[116]	78	1			T909	1		T629	2		T461	1
values[117]	73	1			T909	1		T629	1		T461	10
values[118]	82	1			T909	1		T629	6		T461	15
values[119]	55	1			T909	1		T629	5		T461	3
values[120]	82	1			T909	2		T629	6		T461	7
values[121]	75	1			T909	1		T629	1		T461	7
values[122]	79	1			T909	2		T629	2		T461	8
values[123]	69	1			T909	1		T629	3		T461	6
values[124]	57	1			T909	1		T629	3		T461	3
values[125]	56	1			T909	2		T629	1		T462	4
values[126]	92	1			T909	1		T629	1		T462	12
values[127]	532	1			T909	27		T629	3		T462	21
values[128]	4554	1			T909	317		T462	9		T904	341