Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	135317	1			T83	6		T84	550		T85	17
values[2]	9292	1			T84	79		T537	4		T516	1
values[3]	3504	1			T492	7		T543	4		T540	17
values[4]	1933	1			T492	5		T540	2		T920	8
values[5]	1206	1			T492	10		T920	10		T923	23
values[6]	774	1			T492	5		T920	3		T923	23
values[7]	636	1			T492	5		T920	9		T923	17
values[8]	561	1			T492	5		T920	10		T923	15
values[9]	464	1			T492	8		T920	7		T923	3
values[10]	426	1			T492	16		T920	8		T894	6
values[11]	409	1			T492	20		T920	4		T894	4
values[12]	386	1			T492	17		T920	7		T894	7
values[13]	360	1			T492	7		T920	21		T894	3
values[14]	339	1			T492	9		T920	4		T894	14
values[15]	319	1			T492	9		T920	4		T894	8
values[16]	335	1			T492	9		T920	8		T894	5
values[17]	321	1			T492	17		T920	18		T894	11
values[18]	304	1			T492	15		T920	8		T894	10
values[19]	294	1			T492	11		T920	4		T894	5
values[20]	329	1			T492	3		T920	9		T894	6
values[21]	295	1			T492	9		T920	6		T894	5
values[22]	289	1			T492	7		T920	5		T894	8
values[23]	244	1			T492	15		T920	9		T894	7
values[24]	343	1			T492	12		T920	4		T894	6
values[25]	304	1			T492	9		T920	5		T894	6
values[26]	286	1			T492	6		T920	5		T894	17
values[27]	303	1			T492	4		T920	6		T894	6
values[28]	310	1			T492	8		T920	10		T894	10
values[29]	262	1			T492	8		T920	9		T894	7
values[30]	244	1			T492	11		T920	14		T894	4
values[31]	284	1			T492	12		T920	6		T894	12
values[32]	288	1			T492	7		T920	12		T894	7
values[33]	270	1			T492	6		T920	5		T894	5
values[34]	271	1			T492	3		T920	3		T894	6
values[35]	319	1			T492	6		T920	4		T894	13
values[36]	317	1			T492	9		T920	10		T894	7
values[37]	247	1			T492	8		T920	9		T894	6
values[38]	276	1			T492	12		T920	10		T894	7
values[39]	275	1			T492	15		T920	5		T894	8
values[40]	273	1			T492	7		T920	12		T894	8
values[41]	274	1			T492	7		T920	14		T894	4
values[42]	251	1			T492	15		T920	3		T894	19
values[43]	249	1			T492	16		T920	7		T894	4
values[44]	265	1			T492	8		T920	8		T894	10
values[45]	301	1			T492	9		T920	7		T894	8
values[46]	264	1			T492	5		T920	7		T894	9
values[47]	244	1			T492	9		T920	11		T894	8
values[48]	265	1			T492	6		T920	4		T894	2
values[49]	241	1			T492	8		T920	6		T894	6
values[50]	227	1			T492	6		T920	5		T894	4
values[51]	253	1			T492	5		T920	5		T894	3
values[52]	252	1			T492	8		T920	6		T894	11
values[53]	271	1			T492	8		T920	4		T894	8
values[54]	229	1			T492	11		T920	10		T894	4
values[55]	205	1			T492	17		T920	3		T898	1
values[56]	203	1			T492	7		T920	3		T898	1
values[57]	224	1			T492	8		T920	4		T898	1
values[58]	219	1			T492	8		T920	9		T898	1
values[59]	224	1			T492	6		T920	5		T898	1
values[60]	206	1			T492	14		T920	5		T898	1
values[61]	208	1			T492	7		T920	5		T898	1
values[62]	216	1			T492	13		T920	9		T898	1
values[63]	188	1			T492	17		T920	8		T898	1
values[64]	231	1			T492	10		T920	8		T898	1
values[65]	256	1			T492	26		T920	3		T898	1
values[66]	251	1			T492	27		T898	1		T895	1
values[67]	213	1			T492	28		T898	1		T895	1
values[68]	184	1			T492	28		T898	1		T895	1
values[69]	186	1			T492	14		T898	1		T895	1
values[70]	145	1			T492	24		T898	1		T895	1
values[71]	111	1			T492	15		T898	1		T895	1
values[72]	142	1			T492	23		T898	1		T895	1
values[73]	123	1			T492	20		T898	1		T895	1
values[74]	117	1			T492	20		T898	1		T895	1
values[75]	125	1			T492	12		T898	1		T895	1
values[76]	112	1			T492	18		T898	1		T895	1
values[77]	105	1			T492	15		T898	1		T895	1
values[78]	115	1			T492	26		T898	1		T895	1
values[79]	90	1			T492	21		T898	1		T895	1
values[80]	109	1			T492	25		T898	1		T895	1
values[81]	129	1			T492	20		T898	5		T895	1
values[82]	138	1			T492	30		T898	1		T895	1
values[83]	142	1			T492	32		T898	11		T895	1
values[84]	124	1			T492	29		T898	1		T895	1
values[85]	126	1			T492	37		T898	5		T895	1
values[86]	110	1			T492	35		T898	3		T895	1
values[87]	104	1			T492	36		T898	2		T895	1
values[88]	106	1			T492	20		T898	4		T895	1
values[89]	119	1			T492	26		T898	5		T895	1
values[90]	106	1			T492	27		T898	3		T895	1
values[91]	106	1			T492	21		T898	2		T895	1
values[92]	128	1			T492	31		T898	1		T895	1
values[93]	111	1			T492	29		T898	1		T895	1
values[94]	113	1			T492	22		T898	1		T895	1
values[95]	75	1			T492	14		T898	1		T895	1
values[96]	88	1			T492	15		T898	1		T895	1
values[97]	81	1			T492	9		T898	1		T895	1
values[98]	94	1			T492	6		T898	1		T895	1
values[99]	86	1			T492	2		T898	5		T895	1
values[100]	108	1			T492	4		T898	1		T895	1
values[101]	118	1			T492	8		T898	6		T895	1
values[102]	104	1			T492	3		T898	1		T895	1
values[103]	85	1			T492	4		T898	2		T895	1
values[104]	86	1			T492	4		T898	7		T895	1
values[105]	109	1			T492	2		T898	15		T895	1
values[106]	80	1			T492	6		T898	2		T895	1
values[107]	66	1			T492	5		T898	1		T895	1
values[108]	64	1			T492	5		T898	2		T895	1
values[109]	94	1			T492	9		T898	1		T895	1
values[110]	88	1			T492	1		T898	2		T895	1
values[111]	77	1			T492	5		T898	5		T895	1
values[112]	70	1			T492	5		T898	2		T895	1
values[113]	89	1			T492	3		T898	1		T895	1
values[114]	86	1			T492	7		T898	2		T895	1
values[115]	75	1			T492	7		T898	1		T895	1
values[116]	79	1			T492	19		T898	1		T895	1
values[117]	66	1			T492	9		T898	2		T895	1
values[118]	61	1			T492	6		T898	5		T895	2
values[119]	79	1			T492	2		T898	5		T895	1
values[120]	62	1			T492	5		T898	6		T895	3
values[121]	81	1			T492	5		T898	1		T895	1
values[122]	59	1			T492	5		T898	1		T895	1
values[123]	69	1			T492	3		T898	1		T895	2
values[124]	94	1			T898	4		T895	4		T522	5
values[125]	91	1			T898	1		T895	1		T522	1
values[126]	144	1			T898	1		T895	3		T522	3
values[127]	761	1			T898	29		T895	42		T522	27
values[128]	5888	1			T898	241		T895	303		T522	256