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LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[15].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[15].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[15].q == 2'h2) ? 1'b0 : mio_out[15])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[15].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[15].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[15].q == 2'h2) ? 1'b0 : mio_out[15]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[15].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[15].q == 2'h2) ? 1'b0 : mio_out[15])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[15].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[16].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[16].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[16].q == 2'h2) ? 1'b0 : mio_out[16])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[16].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[16].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[16].q == 2'h2) ? 1'b0 : mio_out[16]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[16].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[16].q == 2'h2) ? 1'b0 : mio_out[16])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[16].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[17].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[17].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[17].q == 2'h2) ? 1'b0 : mio_out[17])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8,T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[17].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8,T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[17].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[17].q == 2'h2) ? 1'b0 : mio_out[17]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[17].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[17].q == 2'h2) ? 1'b0 : mio_out[17])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[17].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[18].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[18].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[18].q == 2'h2) ? 1'b0 : mio_out[18])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[18].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[18].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[18].q == 2'h2) ? 1'b0 : mio_out[18]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T8,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[18].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T8,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[18].q == 2'h2) ? 1'b0 : mio_out[18])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[18].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[19].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_out[19])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[19].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_out[19]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_out[19])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[20].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_out[20])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[20].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_out[20]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_out[20])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[21].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_out[21])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T9 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T9 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[21].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_out[21]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_out[21])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[22].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_out[22])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[22].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_out[22]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_out[22])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[23].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_out[23])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[23].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_out[23]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T9,T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T9,T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_out[23])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T8 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T8 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[24].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_out[24])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[24].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_out[24]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_out[24])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[25].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_out[25])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[25].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_out[25]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_out[25])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[26].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_out[26])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[26].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_out[26]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_out[26])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[27].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_out[27])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T20,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T20,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[27].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_out[27]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_out[27])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[28].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_out[28])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T8,T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T8,T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[28].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_out[28]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_out[28])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[29].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_out[29])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T9 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T9 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[29].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_out[29]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_out[29])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[30].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_out[30])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[30].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_out[30]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T9 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T9 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_out[30])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T8 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T8 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[31].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_out[31])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[31].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_out[31]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_out[31])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[32].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_out[32])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[32].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_out[32]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_out[32])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T8 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T8 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[33].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_out[33])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[33].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_out[33]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_out[33])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[34].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_out[34])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T9,T20,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T9,T20,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[34].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_out[34]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_out[34])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[35].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_out[35])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T8 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T8 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[35].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_out[35]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T9 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T9 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_out[35])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[36].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_out[36])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[36].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_out[36]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_out[36])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[37].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'h2) ? 1'b0 : mio_out[37])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[37].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[37].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'h2) ? 1'b0 : mio_out[37]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[37].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[37].q == 2'h2) ? 1'b0 : mio_out[37])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[37].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[38].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[38].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_out[38])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[38].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_out[38]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_out[38])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[39].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_out[39])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[39].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_out[39]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_out[39])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[40].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_out[40])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T20,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T20,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[40].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_out[40]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_out[40])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[41].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'h2) ? 1'b0 : mio_out[41])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[41].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[41].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'h2) ? 1'b0 : mio_out[41]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[41].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[41].q == 2'h2) ? 1'b0 : mio_out[41])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[41].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[42].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[42].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[42].q == 2'h2) ? 1'b0 : mio_out[42])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[42].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[42].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[42].q == 2'h2) ? 1'b0 : mio_out[42]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[42].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[42].q == 2'h2) ? 1'b0 : mio_out[42])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[42].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[43].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[43].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[43].q == 2'h2) ? 1'b0 : mio_out[43])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T9,T20,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[43].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T9,T20,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[43].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[43].q == 2'h2) ? 1'b0 : mio_out[43]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[43].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[43].q == 2'h2) ? 1'b0 : mio_out[43])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[43].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[44].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[44].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[44].q == 2'h2) ? 1'b0 : mio_out[44])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[44].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[44].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[44].q == 2'h2) ? 1'b0 : mio_out[44]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T9,T20,T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[44].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T9,T20,T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[44].q == 2'h2) ? 1'b0 : mio_out[44])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T8 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[44].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T8 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[45].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[45].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[45].q == 2'h2) ? 1'b0 : mio_out[45])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[45].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T20 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[45].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[45].q == 2'h2) ? 1'b0 : mio_out[45]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[45].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[45].q == 2'h2) ? 1'b0 : mio_out[45])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[45].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[46].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[46].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[46].q == 2'h2) ? 1'b0 : mio_out[46])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T8 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[46].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T8 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[46].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[46].q == 2'h2) ? 1'b0 : mio_out[46]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[46].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T21 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[46].q == 2'h2) ? 1'b0 : mio_out[46])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[46].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[0].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[0].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[0].q == 2'h2) ? 1'b0 : mio_oe[0])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T11,T12,T13 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[0].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T11,T12,T13 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[0].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[0].q == 2'h2) ? 1'b0 : mio_oe[0]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T11,T12,T20 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[0].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T11,T12,T20 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[0].q == 2'h2) ? 1'b0 : mio_oe[0])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[0].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T9 |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[1].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[1].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[1].q == 2'h2) ? 1'b0 : mio_oe[1])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T8,T11 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[1].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T19,T8,T11 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[1].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[1].q == 2'h2) ? 1'b0 : mio_oe[1]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T11,T12,T9 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[1].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T11,T12,T9 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[1].q == 2'h2) ? 1'b0 : mio_oe[1])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[1].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[2].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[2].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[2].q == 2'h2) ? 1'b0 : mio_oe[2])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8,T11,T12 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[2].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8,T11,T12 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[2].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[2].q == 2'h2) ? 1'b0 : mio_oe[2]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T11,T12,T13 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[2].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T11,T12,T13 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[2].q == 2'h2) ? 1'b0 : mio_oe[2])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[2].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[3].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[3].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[3].q == 2'h2) ? 1'b0 : mio_oe[3])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T8,T11,T12 |