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LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20,T21 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[38].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_oe[38]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T8 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T8 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_oe[38])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[39].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_oe[39])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[39].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_oe[39]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_oe[39])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T9 |
1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T9 |
1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[40].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_oe[40])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[40].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_oe[40]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_oe[40])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[41].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'h2) ? 1'b0 : mio_oe[41])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20,T21 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[41].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20,T21 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[41].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'h2) ? 1'b0 : mio_oe[41]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T8 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[41].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T8 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[41].q == 2'h2) ? 1'b0 : mio_oe[41])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[41].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[42].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[42].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[42].q == 2'h2) ? 1'b0 : mio_oe[42])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[42].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[42].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[42].q == 2'h2) ? 1'b0 : mio_oe[42]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[42].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[42].q == 2'h2) ? 1'b0 : mio_oe[42])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[42].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[43].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[43].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[43].q == 2'h2) ? 1'b0 : mio_oe[43])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T9,T20,T21 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[43].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T9,T20,T21 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[43].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[43].q == 2'h2) ? 1'b0 : mio_oe[43]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[43].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[43].q == 2'h2) ? 1'b0 : mio_oe[43])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[43].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[44].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[44].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[44].q == 2'h2) ? 1'b0 : mio_oe[44])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[44].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[44].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[44].q == 2'h2) ? 1'b0 : mio_oe[44]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T9,T20,T21 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[44].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T9,T20,T21 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[44].q == 2'h2) ? 1'b0 : mio_oe[44])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T8 |
1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[44].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T8 |
1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[45].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[45].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[45].q == 2'h2) ? 1'b0 : mio_oe[45])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[45].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[45].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[45].q == 2'h2) ? 1'b0 : mio_oe[45]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T21 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[45].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T21 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[45].q == 2'h2) ? 1'b0 : mio_oe[45])
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T9 |
1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[45].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T9 |
1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[46].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[46].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[46].q == 2'h2) ? 1'b0 : mio_oe[46])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T8 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[46].q == 2'b0)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T8 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[46].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[46].q == 2'h2) ? 1'b0 : mio_oe[46]))
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T21 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[46].q == 2'b1)
--------------------1--------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T21 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[46].q == 2'h2) ? 1'b0 : mio_oe[46])
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[46].q == 2'h2)
--------------------1--------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[0].q & sleep_trig)
--------------1------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T11,T12 |
1 | 1 | Covered | T19,T11,T12 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[1].q & sleep_trig)
--------------1------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T11,T12 |
1 | 1 | Covered | T19,T11,T12 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[2].q & sleep_trig)
--------------1------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T11,T12 |
1 | 1 | Covered | T19,T11,T12 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[3].q & sleep_trig)
--------------1------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T11,T12 |
1 | 1 | Covered | T19,T11,T12 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[4].q & sleep_trig)
--------------1------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T11,T12 |
1 | 1 | Covered | T19,T11,T12 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[5].q & sleep_trig)
--------------1------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T11,T12 |
1 | 1 | Covered | T19,T11,T12 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[6].q & sleep_trig)
--------------1------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T11,T12 |
1 | 1 | Covered | T19,T11,T12 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[7].q & sleep_trig)
--------------1------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T11,T12 |
1 | 1 | Covered | T19,T11,T12 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[8].q & sleep_trig)
--------------1------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T20 |
1 | 1 | Covered | T19,T8,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[9].q & sleep_trig)
--------------1------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T9,T20 |
1 | 1 | Covered | T19,T9,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[10].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T20 |
1 | 1 | Covered | T19,T8,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[11].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[12].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T20 |
1 | 1 | Covered | T19,T8,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[13].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T9,T20 |
1 | 1 | Covered | T19,T9,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[14].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T20 |
1 | 1 | Covered | T19,T8,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[15].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[16].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T20 |
1 | 1 | Covered | T19,T8,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[17].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[18].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[19].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[20].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T9,T20 |
1 | 1 | Covered | T19,T9,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[21].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[22].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T20 |
1 | 1 | Covered | T19,T8,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[23].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[24].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T9,T20 |
1 | 1 | Covered | T19,T9,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[25].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T20 |
1 | 1 | Covered | T19,T8,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[26].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T9,T20 |
1 | 1 | Covered | T19,T9,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[27].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[28].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T9 |
1 | 1 | Covered | T19,T8,T9 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[29].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T9,T20 |
1 | 1 | Covered | T19,T9,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[30].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T9 |
1 | 1 | Covered | T19,T8,T9 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[31].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T20 |
1 | 1 | Covered | T19,T8,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[32].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[33].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T9,T20 |
1 | 1 | Covered | T19,T9,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[34].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[35].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[36].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[37].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[38].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T9,T20 |
1 | 1 | Covered | T19,T9,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[39].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[40].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[41].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[42].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T8,T20 |
1 | 1 | Covered | T19,T8,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[43].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T9,T20 |
1 | 1 | Covered | T19,T9,T20 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[44].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[45].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T20,T21 |
1 | 1 | Covered | T19,T20,T21 |
LINE 501
EXPRESSION (reg2hw.mio_pad_sleep_en[46].q & sleep_trig)
--------------1-------------- -----2----
-1- | -2- | Status | Tests |
0 | 1 | Covered | T4,T5,T6 |
1 | 0 | Covered | T19,T9,T20 |
1 | 1 | Covered | T19,T9,T20 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[0].q ? dio_out_retreg_q[0] : periph_to_dio_i[0])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[1].q ? dio_out_retreg_q[1] : periph_to_dio_i[1])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[2].q ? dio_out_retreg_q[2] : periph_to_dio_i[2])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[3].q ? dio_out_retreg_q[3] : periph_to_dio_i[3])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[4].q ? dio_out_retreg_q[4] : periph_to_dio_i[4])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[5].q ? dio_out_retreg_q[5] : periph_to_dio_i[5])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[6].q ? dio_out_retreg_q[6] : periph_to_dio_i[6])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[7].q ? dio_out_retreg_q[7] : periph_to_dio_i[7])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[8].q ? dio_out_retreg_q[8] : periph_to_dio_i[8])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[9].q ? dio_out_retreg_q[9] : periph_to_dio_i[9])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[10].q ? dio_out_retreg_q[10] : periph_to_dio_i[10])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[11].q ? dio_out_retreg_q[11] : periph_to_dio_i[11])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[12].q ? dio_out_retreg_q[12] : periph_to_dio_i[12])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[13].q ? dio_out_retreg_q[13] : periph_to_dio_i[13])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[14].q ? dio_out_retreg_q[14] : periph_to_dio_i[14])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 515
EXPRESSION (reg2hw.dio_pad_sleep_status[15].q ? dio_out_retreg_q[15] : periph_to_dio_i[15])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[0].q ? dio_oe_retreg_q[0] : periph_to_dio_oe_i[0])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[1].q ? dio_oe_retreg_q[1] : periph_to_dio_oe_i[1])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[2].q ? dio_oe_retreg_q[2] : periph_to_dio_oe_i[2])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[3].q ? dio_oe_retreg_q[3] : periph_to_dio_oe_i[3])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[4].q ? dio_oe_retreg_q[4] : periph_to_dio_oe_i[4])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[5].q ? dio_oe_retreg_q[5] : periph_to_dio_oe_i[5])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[6].q ? dio_oe_retreg_q[6] : periph_to_dio_oe_i[6])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[7].q ? dio_oe_retreg_q[7] : periph_to_dio_oe_i[7])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[8].q ? dio_oe_retreg_q[8] : periph_to_dio_oe_i[8])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[9].q ? dio_oe_retreg_q[9] : periph_to_dio_oe_i[9])
----------------1---------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[10].q ? dio_oe_retreg_q[10] : periph_to_dio_oe_i[10])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[11].q ? dio_oe_retreg_q[11] : periph_to_dio_oe_i[11])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[12].q ? dio_oe_retreg_q[12] : periph_to_dio_oe_i[12])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[13].q ? dio_oe_retreg_q[13] : periph_to_dio_oe_i[13])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[14].q ? dio_oe_retreg_q[14] : periph_to_dio_oe_i[14])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 519
EXPRESSION (reg2hw.dio_pad_sleep_status[15].q ? dio_oe_retreg_q[15] : periph_to_dio_oe_i[15])
----------------1----------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20,T21 |
LINE 528
EXPRESSION
Number Term
1 (reg2hw.dio_pad_sleep_mode[0].q == 2'b0) ? 1'b0 : ((reg2hw.dio_pad_sleep_mode[0].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[0].q == 2'h2) ? 1'b0 : dio_out[0])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20,T21 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[0].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20,T21 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[0].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[0].q == 2'h2) ? 1'b0 : dio_out[0]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[0].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[0].q == 2'h2) ? 1'b0 : dio_out[0])
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T8 |
1 | Covered | T4,T5,T6 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[0].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T8 |
1 | Covered | T4,T5,T6 |
LINE 528
EXPRESSION
Number Term
1 (reg2hw.dio_pad_sleep_mode[1].q == 2'b0) ? 1'b0 : ((reg2hw.dio_pad_sleep_mode[1].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[1].q == 2'h2) ? 1'b0 : dio_out[1])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[1].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[1].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[1].q == 2'h2) ? 1'b0 : dio_out[1]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[1].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[1].q == 2'h2) ? 1'b0 : dio_out[1])
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[1].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 528
EXPRESSION
Number Term
1 (reg2hw.dio_pad_sleep_mode[2].q == 2'b0) ? 1'b0 : ((reg2hw.dio_pad_sleep_mode[2].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[2].q == 2'h2) ? 1'b0 : dio_out[2])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T8 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[2].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T8 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[2].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[2].q == 2'h2) ? 1'b0 : dio_out[2]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20,T21 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[2].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20,T21 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[2].q == 2'h2) ? 1'b0 : dio_out[2])
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[2].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 528
EXPRESSION
Number Term
1 (reg2hw.dio_pad_sleep_mode[3].q == 2'b0) ? 1'b0 : ((reg2hw.dio_pad_sleep_mode[3].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[3].q == 2'h2) ? 1'b0 : dio_out[3])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[3].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T20 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[3].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[3].q == 2'h2) ? 1'b0 : dio_out[3]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T21 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[3].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T21 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[3].q == 2'h2) ? 1'b0 : dio_out[3])
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[3].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 528
EXPRESSION
Number Term
1 (reg2hw.dio_pad_sleep_mode[4].q == 2'b0) ? 1'b0 : ((reg2hw.dio_pad_sleep_mode[4].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[4].q == 2'h2) ? 1'b0 : dio_out[4])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[4].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[4].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[4].q == 2'h2) ? 1'b0 : dio_out[4]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T8 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[4].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T8 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[4].q == 2'h2) ? 1'b0 : dio_out[4])
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[4].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 528
EXPRESSION
Number Term
1 (reg2hw.dio_pad_sleep_mode[5].q == 2'b0) ? 1'b0 : ((reg2hw.dio_pad_sleep_mode[5].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[5].q == 2'h2) ? 1'b0 : dio_out[5])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[5].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[5].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[5].q == 2'h2) ? 1'b0 : dio_out[5]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[5].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[5].q == 2'h2) ? 1'b0 : dio_out[5])
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[5].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Covered | T4,T5,T6 |
LINE 528
EXPRESSION
Number Term
1 (reg2hw.dio_pad_sleep_mode[6].q == 2'b0) ? 1'b0 : ((reg2hw.dio_pad_sleep_mode[6].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[6].q == 2'h2) ? 1'b0 : dio_out[6])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[6].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Not Covered | |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[6].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[6].q == 2'h2) ? 1'b0 : dio_out[6]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[6].q == 2'b1)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19,T20 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[6].q == 2'h2) ? 1'b0 : dio_out[6])
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T8 |
1 | Covered | T4,T5,T6 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[6].q == 2'h2)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T8 |
1 | Covered | T4,T5,T6 |
LINE 528
EXPRESSION
Number Term
1 (reg2hw.dio_pad_sleep_mode[7].q == 2'b0) ? 1'b0 : ((reg2hw.dio_pad_sleep_mode[7].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[7].q == 2'h2) ? 1'b0 : dio_out[7])))
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 528
SUB-EXPRESSION (reg2hw.dio_pad_sleep_mode[7].q == 2'b0)
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T19 |
LINE 528
SUB-EXPRESSION ((reg2hw.dio_pad_sleep_mode[7].q == 2'b1) ? 1'b1 : ((reg2hw.dio_pad_sleep_mode[7].q == 2'h2) ? 1'b0 : dio_out[7]))
--------------------1-------------------
-1- | Status | Tests |
0 | Covered | T4,T5,T6 |
1 | Covered | T21 |