Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.ast_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138575	1			T75	211		T76	51		T77	421
values[2]	8107	1			T76	1		T456	1		T475	2
values[3]	3098	1			T599	101		T710	30		T463	45
values[4]	1873	1			T599	66		T710	22		T463	21
values[5]	1312	1			T599	10		T710	24		T463	12
values[6]	1036	1			T710	20		T463	6		T843	1
values[7]	827	1			T710	13		T843	1		T672	1
values[8]	660	1			T710	14		T843	1		T672	3
values[9]	595	1			T710	6		T843	1		T672	2
values[10]	446	1			T710	9		T843	1		T672	2
values[11]	440	1			T710	6		T843	1		T672	2
values[12]	365	1			T710	2		T843	1		T672	6
values[13]	324	1			T710	2		T843	1		T672	4
values[14]	301	1			T710	2		T843	1		T672	3
values[15]	318	1			T710	3		T843	1		T672	3
values[16]	303	1			T710	1		T843	1		T672	1
values[17]	353	1			T710	2		T843	1		T672	4
values[18]	302	1			T710	4		T843	1		T672	1
values[19]	290	1			T710	1		T843	1		T672	1
values[20]	277	1			T843	1		T672	1		T466	1
values[21]	285	1			T843	1		T672	2		T466	1
values[22]	318	1			T843	1		T672	1		T466	1
values[23]	314	1			T843	1		T672	2		T466	1
values[24]	287	1			T843	1		T672	1		T466	1
values[25]	256	1			T843	1		T672	9		T466	1
values[26]	281	1			T843	2		T672	9		T466	1
values[27]	278	1			T843	1		T672	3		T466	1
values[28]	307	1			T843	1		T672	1		T466	1
values[29]	327	1			T843	1		T672	4		T466	1
values[30]	291	1			T843	1		T672	7		T466	1
values[31]	256	1			T843	1		T672	5		T466	1
values[32]	260	1			T843	1		T672	1		T466	1
values[33]	288	1			T843	1		T672	3		T466	1
values[34]	232	1			T843	1		T672	2		T466	1
values[35]	241	1			T843	1		T672	2		T466	1
values[36]	256	1			T843	1		T672	3		T466	1
values[37]	265	1			T843	1		T672	4		T466	1
values[38]	242	1			T843	1		T672	2		T466	1
values[39]	228	1			T843	1		T672	2		T466	1
values[40]	274	1			T843	1		T672	1		T466	1
values[41]	218	1			T843	1		T672	1		T466	1
values[42]	249	1			T843	1		T672	2		T466	1
values[43]	251	1			T843	1		T672	1		T466	1
values[44]	241	1			T843	1		T672	3		T466	1
values[45]	224	1			T843	1		T672	2		T466	1
values[46]	227	1			T843	1		T672	1		T466	1
values[47]	232	1			T843	1		T672	3		T466	1
values[48]	235	1			T843	1		T672	4		T466	1
values[49]	230	1			T843	1		T672	5		T466	1
values[50]	254	1			T843	1		T672	7		T466	1
values[51]	240	1			T843	1		T672	2		T466	1
values[52]	256	1			T843	1		T672	6		T466	1
values[53]	267	1			T843	1		T672	12		T466	1
values[54]	247	1			T843	1		T672	3		T466	1
values[55]	247	1			T843	1		T672	2		T466	1
values[56]	215	1			T843	1		T672	3		T466	1
values[57]	259	1			T843	1		T672	6		T466	1
values[58]	207	1			T843	1		T672	6		T466	1
values[59]	195	1			T843	1		T672	4		T466	1
values[60]	165	1			T843	1		T672	1		T466	1
values[61]	160	1			T843	1		T672	1		T466	1
values[62]	153	1			T843	1		T672	3		T466	1
values[63]	166	1			T843	1		T672	5		T466	1
values[64]	156	1			T843	1		T672	4		T466	1
values[65]	156	1			T843	1		T672	9		T466	1
values[66]	180	1			T843	1		T672	5		T466	1
values[67]	147	1			T843	1		T672	5		T466	1
values[68]	133	1			T843	1		T672	3		T466	1
values[69]	125	1			T843	1		T672	2		T466	1
values[70]	114	1			T843	1		T672	3		T466	1
values[71]	94	1			T843	1		T672	2		T466	1
values[72]	103	1			T843	1		T672	3		T466	1
values[73]	85	1			T843	1		T672	1		T466	1
values[74]	100	1			T843	1		T672	2		T466	1
values[75]	88	1			T843	1		T672	2		T466	1
values[76]	95	1			T843	1		T672	1		T466	1
values[77]	121	1			T843	1		T672	7		T466	1
values[78]	119	1			T843	1		T672	2		T466	1
values[79]	72	1			T843	1		T672	1		T466	1
values[80]	108	1			T843	1		T672	1		T466	1
values[81]	74	1			T843	1		T672	6		T466	1
values[82]	76	1			T843	1		T672	6		T466	1
values[83]	78	1			T843	1		T672	8		T466	1
values[84]	84	1			T843	1		T672	2		T466	1
values[85]	69	1			T843	1		T672	5		T466	1
values[86]	69	1			T843	1		T672	7		T466	1
values[87]	92	1			T843	1		T672	10		T466	1
values[88]	70	1			T843	1		T672	11		T466	1
values[89]	92	1			T843	1		T672	8		T466	1
values[90]	80	1			T843	1		T672	7		T466	1
values[91]	71	1			T843	1		T672	8		T466	1
values[92]	74	1			T843	1		T672	6		T466	1
values[93]	89	1			T843	1		T672	11		T466	1
values[94]	104	1			T843	1		T672	4		T466	1
values[95]	74	1			T843	1		T672	2		T466	1
values[96]	74	1			T843	1		T672	2		T466	2
values[97]	82	1			T843	1		T672	5		T466	1
values[98]	82	1			T843	1		T672	3		T466	1
values[99]	78	1			T843	1		T672	4		T466	1
values[100]	95	1			T843	1		T672	5		T466	1
values[101]	93	1			T843	1		T672	2		T466	1
values[102]	78	1			T843	1		T672	3		T466	1
values[103]	103	1			T843	1		T672	7		T466	1
values[104]	76	1			T843	1		T672	10		T466	1
values[105]	74	1			T843	1		T672	7		T466	1
values[106]	76	1			T843	1		T672	1		T466	1
values[107]	82	1			T843	1		T672	1		T466	1
values[108]	90	1			T843	1		T672	3		T466	1
values[109]	104	1			T843	2		T672	5		T466	1
values[110]	97	1			T843	2		T672	13		T466	1
values[111]	79	1			T843	4		T672	6		T466	1
values[112]	59	1			T843	2		T672	2		T466	1
values[113]	82	1			T843	1		T672	2		T466	1
values[114]	83	1			T843	1		T672	7		T466	1
values[115]	79	1			T843	3		T672	6		T466	1
values[116]	60	1			T843	2		T672	1		T466	1
values[117]	77	1			T843	1		T672	4		T466	1
values[118]	76	1			T843	2		T672	2		T466	1
values[119]	72	1			T843	3		T672	2		T466	1
values[120]	81	1			T843	1		T672	1		T466	2
values[121]	82	1			T843	2		T672	6		T466	4
values[122]	98	1			T843	2		T672	8		T466	1
values[123]	63	1			T843	1		T672	8		T466	1
values[124]	81	1			T843	1		T672	7		T466	3
values[125]	82	1			T843	3		T672	4		T466	1
values[126]	138	1			T843	1		T672	2		T466	7
values[127]	884	1			T843	27		T672	6		T466	41
values[128]	7555	1			T843	333		T466	358		T491	353