Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart3_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	142727	1			T75	220		T76	46		T77	443
values[2]	9967	1			T75	2		T76	1		T77	2
values[3]	3794	1			T438	1		T841	9		T843	1
values[4]	2214	1			T841	1		T843	1		T672	1
values[5]	1567	1			T843	1		T672	4		T492	1
values[6]	1034	1			T843	1		T672	1		T852	23
values[7]	795	1			T843	1		T672	2		T852	20
values[8]	579	1			T843	1		T672	2		T852	8
values[9]	511	1			T843	1		T672	4		T852	14
values[10]	466	1			T843	1		T672	4		T852	12
values[11]	503	1			T843	1		T672	4		T852	14
values[12]	479	1			T843	1		T672	1		T852	18
values[13]	420	1			T843	1		T672	1		T852	17
values[14]	414	1			T843	1		T672	7		T852	6
values[15]	421	1			T843	1		T672	6		T852	12
values[16]	379	1			T843	1		T672	5		T852	23
values[17]	382	1			T843	1		T672	5		T852	24
values[18]	403	1			T843	1		T672	3		T852	18
values[19]	421	1			T843	1		T672	4		T852	8
values[20]	422	1			T843	1		T672	1		T852	23
values[21]	440	1			T843	1		T672	1		T852	25
values[22]	402	1			T843	1		T672	1		T852	4
values[23]	365	1			T843	1		T672	2		T852	17
values[24]	396	1			T843	1		T672	5		T852	7
values[25]	366	1			T843	1		T672	2		T852	7
values[26]	389	1			T843	1		T672	1		T852	15
values[27]	357	1			T843	1		T672	3		T852	22
values[28]	387	1			T843	1		T672	2		T852	23
values[29]	376	1			T843	1		T672	5		T852	16
values[30]	367	1			T843	1		T672	1		T852	11
values[31]	382	1			T843	1		T672	3		T852	19
values[32]	397	1			T843	1		T672	2		T852	11
values[33]	409	1			T843	1		T672	2		T852	19
values[34]	369	1			T843	1		T672	6		T852	11
values[35]	429	1			T843	1		T672	5		T852	15
values[36]	365	1			T843	1		T672	1		T852	14
values[37]	392	1			T843	1		T672	3		T852	21
values[38]	344	1			T843	1		T672	3		T852	7
values[39]	391	1			T843	1		T672	1		T852	20
values[40]	390	1			T843	1		T672	1		T852	14
values[41]	353	1			T843	1		T672	3		T852	11
values[42]	378	1			T843	1		T672	1		T852	8
values[43]	432	1			T843	1		T672	2		T852	11
values[44]	391	1			T843	1		T672	2		T852	4
values[45]	381	1			T843	1		T672	2		T852	6
values[46]	299	1			T843	1		T672	1		T852	3
values[47]	313	1			T843	1		T672	6		T852	6
values[48]	366	1			T843	1		T672	12		T852	19
values[49]	334	1			T843	1		T672	9		T852	5
values[50]	331	1			T843	1		T672	1		T852	4
values[51]	303	1			T843	1		T672	3		T852	9
values[52]	309	1			T843	1		T672	5		T852	16
values[53]	341	1			T843	1		T672	2		T852	10
values[54]	308	1			T843	1		T672	3		T852	2
values[55]	290	1			T843	1		T672	2		T852	3
values[56]	244	1			T843	1		T672	3		T852	4
values[57]	277	1			T843	1		T672	3		T852	8
values[58]	267	1			T843	1		T672	4		T852	18
values[59]	259	1			T843	1		T672	1		T852	8
values[60]	203	1			T843	1		T672	4		T852	2
values[61]	215	1			T843	1		T672	1		T852	14
values[62]	240	1			T843	1		T672	5		T852	19
values[63]	178	1			T843	1		T672	3		T852	4
values[64]	200	1			T843	1		T672	1		T852	10
values[65]	181	1			T843	1		T672	2		T852	5
values[66]	165	1			T843	1		T672	2		T852	4
values[67]	165	1			T843	1		T672	1		T852	2
values[68]	149	1			T843	1		T672	3		T852	3
values[69]	176	1			T843	1		T672	5		T852	11
values[70]	136	1			T843	1		T672	3		T852	3
values[71]	98	1			T843	1		T672	2		T656	13
values[72]	77	1			T843	1		T672	2		T656	9
values[73]	91	1			T843	1		T672	2		T656	17
values[74]	96	1			T843	1		T672	2		T656	12
values[75]	78	1			T843	1		T672	1		T656	11
values[76]	75	1			T843	1		T672	2		T656	3
values[77]	86	1			T843	1		T672	5		T656	3
values[78]	71	1			T843	1		T672	2		T656	3
values[79]	81	1			T843	1		T672	1		T656	7
values[80]	81	1			T843	1		T672	3		T656	9
values[81]	77	1			T843	1		T672	4		T656	14
values[82]	68	1			T843	1		T672	6		T656	9
values[83]	74	1			T843	1		T672	6		T656	14
values[84]	73	1			T843	1		T672	2		T656	6
values[85]	78	1			T843	1		T672	10		T656	12
values[86]	61	1			T843	1		T672	8		T656	13
values[87]	73	1			T843	1		T672	5		T656	14
values[88]	57	1			T843	1		T672	7		T656	7
values[89]	66	1			T843	1		T672	4		T656	9
values[90]	68	1			T843	1		T672	4		T656	7
values[91]	50	1			T843	1		T672	9		T656	9
values[92]	44	1			T843	1		T672	4		T656	7
values[93]	63	1			T843	1		T672	7		T656	11
values[94]	56	1			T843	1		T672	7		T656	7
values[95]	68	1			T843	1		T672	4		T656	14
values[96]	50	1			T843	1		T672	4		T656	7
values[97]	63	1			T843	1		T672	3		T656	6
values[98]	63	1			T843	1		T672	4		T656	4
values[99]	64	1			T843	1		T672	8		T656	3
values[100]	69	1			T843	1		T672	7		T656	5
values[101]	71	1			T843	1		T672	2		T656	7
values[102]	66	1			T843	1		T672	2		T656	6
values[103]	62	1			T843	1		T672	2		T656	1
values[104]	74	1			T843	1		T672	4		T656	5
values[105]	62	1			T843	1		T672	4		T656	4
values[106]	70	1			T843	1		T672	2		T656	2
values[107]	59	1			T843	1		T672	6		T656	1
values[108]	65	1			T843	1		T672	2		T656	3
values[109]	63	1			T843	1		T672	4		T656	3
values[110]	63	1			T843	1		T672	4		T656	2
values[111]	52	1			T843	1		T672	2		T656	5
values[112]	62	1			T843	1		T672	5		T656	11
values[113]	68	1			T843	1		T672	7		T656	7
values[114]	58	1			T843	1		T672	5		T656	5
values[115]	60	1			T843	7		T672	4		T656	5
values[116]	52	1			T843	1		T672	3		T875	2
values[117]	53	1			T843	1		T672	10		T875	3
values[118]	54	1			T843	2		T672	6		T875	2
values[119]	61	1			T843	1		T672	5		T875	4
values[120]	43	1			T843	1		T672	3		T875	5
values[121]	56	1			T843	8		T672	7		T875	6
values[122]	71	1			T843	1		T672	1		T875	7
values[123]	40	1			T843	1		T672	3		T875	2
values[124]	50	1			T843	2		T672	4		T875	8
values[125]	46	1			T843	1		T672	11		T875	4
values[126]	79	1			T843	3		T672	19		T875	9
values[127]	609	1			T843	26		T672	32		T875	21
values[128]	5123	1			T843	246		T672	15		T875	7