Unified Coverage Report :: Group Instance : uvm_test_top.env.rv_core_ibex__cored_agent.cov::addr_not_align_size

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

365272

1

T78

1

T82

226

T217

1716

rising

365352

1

T77

1

T78

1

T82

225

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1034292

1

T77

2

T78

2

T82

934

auto[1]

9251137

1

T77

348

T78

3190

T79

1310

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

323934

1

T82

251

T217

1314

T240

250

rising

324039

1

T77

1

T82

251

T217

1315

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1155721

1

T77

2

T82

1056

T217

3982

auto[1]

9988029

1

T77

212

T78

3052

T79

1722

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

654417

1

T77

1

T82

440

T217

2998

rising

654489

1

T77

2

T82

441

T217

2999

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1046676

1

T77

2

T82

896

T217

3728

auto[1]

9351067

1

T77

202

T78

3288

T79

1410

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

7539

1

T77

1

T404

2

T512

1

rising

7584

1

T77

1

T404

2

T512

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

167993

1

T77

7

T78

75

T82

13

auto[1]

14975

1

T77

1

T404

2

T512

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

7041

1

T507

203

T518

1

T510

2

rising

7078

1

T507

204

T518

1

T510

2

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

177329

1

T77

7

T78

61

T82

16

auto[1]

11444

1

T507

432

T518

1

T510

2

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

3225

1

T217

5

T514

1

T423

4

rising

3249

1

T217

5

T514

1

T423

4

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175761

1

T77

4

T78

59

T82

17

auto[1]

3498

1

T217

5

T514

1

T423

4

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

5734

1

T509

1

T510

1

T404

15

rising

5782

1

T509

1

T510

1

T404

15

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

156036

1

T77

4

T78

64

T82

18

auto[1]

15291

1

T509

1

T510

1

T404

17

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

4790

1

T77

1

T79

15

T217

9

rising

4820

1

T77

1

T79

15

T217

9

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

177246

1

T77

5

T78

64

T79

491

auto[1]

5529

1

T77

1

T79

15

T217

10

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

7004

1

T241

31

T509

1

T514

1

rising

7047

1

T241

31

T509

1

T514

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

166244

1

T77

5

T78

88

T82

24

auto[1]

13225

1

T241

34

T509

1

T514

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

5413

1

T240

1

T510

1

T404

1

rising

5451

1

T240

1

T510

1

T404

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

167785

1

T77

1

T78

69

T82

22

auto[1]

12319

1

T240

1

T510

1

T404

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

6559

1

T77

1

T507

115

T514

3

rising

6599

1

T77

1

T507

116

T514

3

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

178734

1

T77

5

T78

49

T82

20

auto[1]

14692

1

T77

1

T507

337

T514

3

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

6050

1

T240

1

T514

1

T404

1

rising

6099

1

T240

1

T514

1

T404

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174380

1

T77

6

T78

47

T82

25

auto[1]

13590

1

T240

1

T514

1

T404

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

5104

1

T240

1

T506

109

T507

115

rising

5149

1

T240

1

T506

110

T507

116

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

177774

1

T77

7

T78

60

T82

13

auto[1]

8120

1

T240

1

T506

175

T507

242

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

5350

1

T507

104

T514

2

T510

2

rising

5385

1

T507

104

T514

2

T510

2

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

185058

1

T77

5

T78

65

T82

15

auto[1]

6924

1

T507

153

T514

2

T510

3

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

15223

1

T77

1

T79

7

T240

1

rising

15250

1

T77

1

T79

7

T240

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1430521

1

T77

34

T78

447

T79

231

auto[1]

15917

1

T77

1

T79

7

T240

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

5545

1

T510

1

T404

34

T512

1

rising

5580

1

T510

1

T404

34

T512

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

175729

1

T77

5

T78

92

T82

23

auto[1]

11179

1

T510

1

T404

37

T512

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

5987

1

T79

90

T217

2

T240

1

rising

6028

1

T79

91

T217

2

T240

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

158121

1

T77

2

T78

46

T79

153

auto[1]

15703

1

T79

274

T217

2

T240

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

2746

1

T79

18

T507

35

T514

1

rising

2764

1

T79

18

T507

36

T514

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

192981

1

T77

3

T78

70

T79

408

auto[1]

2915

1

T79

19

T507

37

T514

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

7980

1

T217

1

T514

2

T510

2

rising

8026

1

T217

1

T517

1

T514

2

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

169788

1

T77

1

T78

59

T82

13

auto[1]

16050

1

T217

1

T517

1

T514

2

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

7783

1

T77

1

T78

1

T153

1

rising

7830

1

T77

1

T78

1

T153

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

163439

1

T77

4

T78

61

T82

18

auto[1]

17166

1

T77

1

T78

1

T153

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

7567

1

T77

1

T241

30

T507

114

rising

7609

1

T77

1

T241

30

T507

115

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

167274

1

T77

3

T78

70

T82

23

auto[1]

15218

1

T77

1

T241

33

T507

374

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

5351

1

T507

120

T518

1

T404

5

rising

5382

1

T507

121

T518

1

T404

5

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174644

1

T77

8

T78

74

T82

22

auto[1]

8070

1

T507

221

T518

1

T404

5

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

3105

1

T507

35

T514

1

T510

1

rising

3126

1

T507

35

T514

1

T510

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

194888

1

T77

7

T78

80

T82

15

auto[1]

3338

1

T507

36

T514

1

T510

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

7172

1

T77

1

T506

10

T514

1

rising

7202

1

T77

1

T506

10

T514

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

182413

1

T77

7

T78

58

T82

18

auto[1]

10345

1

T77

1

T506

10

T514

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

44500

1

T520

597

T519

3258

T365

1

rising

44509

1

T520

597

T519

3258

T365

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

99020

1

T520

1437

T519

6840

T365

3

auto[1]

86066

1

T520

1133

T519

6391

T365

4

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

26715

1

T520

389

T519

1848

T365

1

rising

26719

1

T520

389

T519

1848

T365

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

150986

1

T520

2076

T519

10952

T365

4

auto[1]

34100

1

T520

494

T519

2279

T365

3

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

26715

1

T520

389

T519

1848

T365

1

rising

26719

1

T520

389

T519

1848

T365

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

150986

1

T520

2076

T519

10952

T365

4

auto[1]

34100

1

T520

494

T519

2279

T365

3

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

5612

1

T520

114

T519

261

T365

1

rising

5599

1

T520

114

T519

260

T365

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

176773

1

T520

2404

T519

12874

T365

5

auto[1]

8313

1

T520

166

T519

357

T365

2

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

114299

1

T147

3

T519

8

T148

8238

rising

114319

1

T147

3

T519

8

T148

8239

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

38801350

1

T1

57740

T2

11218

T3

7108

auto[1]

602787

1

T147

3

T519

8

T148

39602

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

45387

1

T520

622

T519

3331

T365

1

rising

45381

1

T520

622

T519

3331

T521

1282

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

98648

1

T520

1425

T519

6946

T365

6

auto[1]

86438

1

T520

1145

T519

6285

T365

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

38881

1

T520

550

T519

2838

T365

1

rising

38884

1

T520

550

T519

2838

T365

2

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

129613

1

T520

1826

T519

9227

T365

2

auto[1]

55473

1

T520

744

T519

4004

T365

5

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

2257

1

T506

20

T510

2

T404

7

rising

2283

1

T506

21

T510

2

T404

7

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

185080

1

T77

6

T78

64

T82

20

auto[1]

2368

1

T506

23

T510

2

T404

7

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

3238

1

T77

1

T78

1

T507

39

rising

3266

1

T77

1

T78

1

T507

39

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

183213

1

T77

5

T78

59

T82

19

auto[1]

3484

1

T77

1

T78

1

T507

42

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

5399

1

T153

1

T514

1

T518

1

rising

5460

1

T153

1

T514

1

T518

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

157795

1

T77

3

T78

80

T82

20

auto[1]

19813

1

T153

1

T514

1

T518

2

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

7358

1

T514

1

T518

1

T404

1

rising

7413

1

T514

1

T518

1

T404

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

160294

1

T77

5

T78

72

T82

19

auto[1]

21449

1

T514

1

T518

1

T404

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

3078

1

T240

1

T514

1

T510

2

rising

3104

1

T240

1

T514

1

T510

2

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

184071

1

T77

6

T78

67

T82

20

auto[1]

3290

1

T240

1

T514

1

T510

2

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

8115

1

T153

1

T241

19

T510

1

rising

8158

1

T153

1

T241

19

T510

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

163908

1

T77

7

T78

59

T82

12

auto[1]

17544

1

T153

1

T241

19

T510

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

6580

1

T78

1

T217

2

T509

1

rising

6629

1

T78

1

T217

2

T509

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

162459

1

T77

5

T78

62

T82

14

auto[1]

13821

1

T78

1

T217

2

T509

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

5994

1

T510

2

T404

4

T516

1

rising

6037

1

T510

2

T404

4

T516

1

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

174460

1

T77

4

T78

79

T82

15

auto[1]

12255

1

T510

3

T404

4

T516

1

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

22223

1

T77

1

T78

6

T79

4

rising

22259

1

T77

1

T78

6

T79

4

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1416528

1

T77

36

T78

428

T79

223

auto[1]

23273

1

T77

2

T78

6

T79

4

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

7809

1

T82

1

T217

13

T510

32

rising

7840

1

T82

1

T217

13

T510

32

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

169928

1

T77

5

T78

55

T82

18

auto[1]

15257

1

T82

1

T217

13

T510

35

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

4858

1

T404

3

T516

2

T525

4

rising

4889

1

T404

3

T516

2

T525

4

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

182410

1

T77

6

T78

71

T82

16

auto[1]

7267

1

T404

3

T516

2

T525

4

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

196990

1

T217

1652

T240

67

T423

1286

rising

196990

1

T217

1653

T240

67

T423

1285

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1769885

1

T217

14922

T240

568

T423

12272

auto[1]

221721

1

T217

1873

T240

74

T423

1431

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

488069

1

T217

4097

T240

164

T423

3383

rising

488083

1

T217

4097

T240

164

T423

3383

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

883739

1

T217

7458

T240

294

T423

6196

auto[1]

1107867

1

T217

9337

T240

348

T423

7507

Summary for Variable cp_transitions

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_transitions

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

falling

488069

1

T217

4097

T240

164

T423

3383

rising

488083

1

T217

4097

T240

164

T423

3383

---

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

883739

1

T217

7458

T240

294

T423

6196

auto[1]

1107867

1

T217

9337

T240

348

T423

7507