Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_main__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	161172	1			T77	3		T78	48		T82	22
values[2]	4838	1			T514	4		T518	1		T510	3
values[3]	2546	1			T446	4		T552	1		T782	1
values[4]	1832	1			T446	2		T782	1		T797	16
values[5]	1381	1			T446	3		T782	1		T797	11
values[6]	1034	1			T446	1		T782	1		T797	1
values[7]	970	1			T446	1		T782	1		T797	11
values[8]	767	1			T446	2		T782	1		T797	6
values[9]	687	1			T446	3		T782	1		T797	17
values[10]	615	1			T446	1		T782	1		T797	18
values[11]	568	1			T446	3		T782	1		T797	20
values[12]	525	1			T446	1		T782	1		T797	11
values[13]	517	1			T446	4		T782	1		T797	8
values[14]	468	1			T446	3		T782	1		T797	15
values[15]	425	1			T446	2		T782	1		T797	6
values[16]	390	1			T446	1		T782	1		T797	9
values[17]	293	1			T446	9		T782	1		T797	7
values[18]	211	1			T446	5		T782	1		T797	3
values[19]	169	1			T446	3		T782	1		T797	7
values[20]	173	1			T446	3		T782	1		T797	10
values[21]	194	1			T446	2		T782	1		T797	7
values[22]	176	1			T446	5		T782	1		T797	6
values[23]	239	1			T446	1		T782	1		T797	6
values[24]	252	1			T446	4		T782	1		T797	23
values[25]	246	1			T446	2		T782	1		T797	24
values[26]	253	1			T446	3		T782	1		T797	39
values[27]	263	1			T446	2		T782	1		T797	30
values[28]	205	1			T446	1		T782	1		T797	25
values[29]	192	1			T446	1		T782	1		T797	35
values[30]	160	1			T446	3		T782	1		T797	23
values[31]	120	1			T446	2		T782	1		T797	17
values[32]	110	1			T446	3		T782	1		T797	3
values[33]	92	1			T446	1		T782	1		T787	1
values[34]	85	1			T446	1		T782	1		T787	1
values[35]	92	1			T446	3		T782	1		T787	1
values[36]	109	1			T446	2		T782	1		T787	1
values[37]	98	1			T446	4		T782	1		T787	1
values[38]	105	1			T446	11		T782	1		T787	1
values[39]	85	1			T446	9		T782	1		T787	1
values[40]	77	1			T446	5		T782	1		T787	1
values[41]	72	1			T446	1		T782	1		T787	1
values[42]	47	1			T782	1		T787	1		T460	1
values[43]	43	1			T782	1		T787	1		T460	1
values[44]	37	1			T782	1		T787	1		T460	1
values[45]	36	1			T782	1		T787	1		T460	1
values[46]	43	1			T782	1		T787	1		T460	1
values[47]	39	1			T782	1		T787	1		T460	1
values[48]	38	1			T782	1		T787	1		T460	2
values[49]	38	1			T782	1		T787	1		T460	1
values[50]	34	1			T782	1		T787	1		T460	2
values[51]	44	1			T782	1		T787	1		T460	1
values[52]	36	1			T782	1		T787	1		T460	1
values[53]	43	1			T782	1		T787	1		T460	1
values[54]	54	1			T782	1		T787	1		T460	1
values[55]	47	1			T782	1		T787	1		T460	1
values[56]	42	1			T782	1		T787	1		T460	1
values[57]	45	1			T782	1		T787	1		T460	1
values[58]	37	1			T782	1		T787	1		T460	1
values[59]	39	1			T782	1		T787	1		T460	1
values[60]	38	1			T782	2		T787	1		T460	1
values[61]	39	1			T782	1		T787	1		T460	1
values[62]	39	1			T782	1		T787	1		T460	1
values[63]	49	1			T782	1		T787	1		T460	1
values[64]	38	1			T782	1		T787	1		T460	1
values[65]	41	1			T782	1		T787	1		T460	1
values[66]	46	1			T782	1		T787	1		T460	1
values[67]	39	1			T782	1		T787	1		T460	1
values[68]	39	1			T782	1		T787	1		T460	1
values[69]	35	1			T782	1		T787	2		T460	1
values[70]	38	1			T782	1		T787	1		T460	1
values[71]	43	1			T782	1		T787	1		T460	1
values[72]	42	1			T782	1		T787	1		T460	1
values[73]	35	1			T782	1		T787	1		T460	1
values[74]	38	1			T782	1		T787	1		T460	1
values[75]	36	1			T782	1		T787	1		T460	1
values[76]	38	1			T782	1		T787	1		T460	1
values[77]	34	1			T782	1		T787	1		T460	1
values[78]	44	1			T782	1		T787	1		T460	1
values[79]	38	1			T782	1		T787	1		T460	1
values[80]	45	1			T782	1		T787	1		T460	1
values[81]	56	1			T782	2		T787	1		T460	1
values[82]	58	1			T782	5		T787	1		T460	1
values[83]	45	1			T782	5		T787	1		T460	1
values[84]	64	1			T782	15		T787	1		T460	1
values[85]	53	1			T782	3		T787	1		T460	1
values[86]	50	1			T782	4		T787	1		T460	1
values[87]	51	1			T782	4		T787	1		T460	1
values[88]	52	1			T782	1		T787	1		T460	1
values[89]	46	1			T782	2		T787	1		T460	1
values[90]	50	1			T782	2		T787	1		T460	1
values[91]	67	1			T782	2		T787	1		T460	1
values[92]	48	1			T782	2		T787	1		T460	1
values[93]	53	1			T782	2		T787	1		T460	1
values[94]	58	1			T782	4		T787	1		T460	1
values[95]	60	1			T782	1		T787	1		T460	1
values[96]	63	1			T782	4		T787	1		T460	1
values[97]	62	1			T782	2		T787	1		T460	1
values[98]	58	1			T782	3		T787	1		T460	1
values[99]	60	1			T782	3		T787	1		T460	1
values[100]	82	1			T782	3		T787	1		T460	1
values[101]	59	1			T782	3		T787	2		T460	1
values[102]	50	1			T782	1		T787	4		T460	1
values[103]	67	1			T782	1		T787	6		T460	1
values[104]	60	1			T782	1		T787	3		T460	1
values[105]	60	1			T782	3		T787	2		T460	1
values[106]	58	1			T782	3		T787	2		T460	1
values[107]	61	1			T782	1		T787	2		T460	1
values[108]	61	1			T782	2		T787	2		T460	1
values[109]	71	1			T782	3		T787	1		T460	1
values[110]	78	1			T782	4		T787	3		T460	1
values[111]	86	1			T782	4		T787	4		T460	1
values[112]	74	1			T782	2		T787	8		T460	1
values[113]	68	1			T782	1		T787	2		T460	1
values[114]	76	1			T782	3		T787	2		T460	1
values[115]	81	1			T782	1		T787	1		T460	1
values[116]	74	1			T782	4		T787	1		T460	1
values[117]	75	1			T782	4		T787	4		T460	1
values[118]	72	1			T782	4		T787	2		T460	1
values[119]	68	1			T782	1		T787	1		T460	2
values[120]	71	1			T782	1		T787	1		T460	3
values[121]	82	1			T782	1		T787	2		T460	2
values[122]	71	1			T782	3		T787	2		T460	1
values[123]	96	1			T782	2		T787	3		T460	1
values[124]	149	1			T782	3		T787	1		T460	1
values[125]	246	1			T782	1		T787	1		T460	1
values[126]	689	1			T782	11		T787	7		T460	9
values[127]	2931	1			T782	93		T787	98		T460	107
values[128]	5228	1			T782	196		T787	214		T460	240