Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	135896	1			T77	5		T78	64		T82	12
values[2]	9272	1			T77	1		T78	3		T217	20
values[3]	3468	1			T446	4		T588	13		T567	4
values[4]	2086	1			T588	3		T567	11		T430	1
values[5]	1369	1			T567	5		T430	1		T783	1
values[6]	923	1			T567	21		T430	4		T795	1
values[7]	618	1			T567	5		T430	2		T795	1
values[8]	529	1			T567	4		T430	3		T795	1
values[9]	463	1			T567	13		T430	1		T795	1
values[10]	382	1			T567	5		T430	1		T795	1
values[11]	335	1			T567	6		T430	3		T795	1
values[12]	407	1			T567	5		T430	11		T795	1
values[13]	380	1			T567	5		T430	9		T795	1
values[14]	320	1			T567	5		T430	6		T795	1
values[15]	293	1			T567	3		T430	6		T795	1
values[16]	324	1			T567	9		T430	14		T795	1
values[17]	350	1			T567	10		T430	3		T795	1
values[18]	257	1			T567	5		T430	1		T795	1
values[19]	306	1			T567	4		T430	1		T795	1
values[20]	264	1			T567	6		T430	2		T795	1
values[21]	345	1			T567	3		T430	2		T795	1
values[22]	278	1			T567	3		T430	7		T795	1
values[23]	259	1			T567	6		T430	5		T795	1
values[24]	313	1			T567	4		T430	3		T795	1
values[25]	263	1			T567	5		T430	2		T795	1
values[26]	333	1			T567	3		T430	1		T795	1
values[27]	318	1			T567	3		T430	1		T795	1
values[28]	292	1			T567	20		T430	3		T795	1
values[29]	330	1			T567	15		T430	3		T795	1
values[30]	285	1			T567	10		T430	3		T795	1
values[31]	312	1			T567	9		T430	1		T795	1
values[32]	350	1			T567	4		T430	4		T795	1
values[33]	291	1			T567	7		T430	2		T795	1
values[34]	287	1			T567	7		T430	2		T795	1
values[35]	277	1			T567	3		T430	1		T795	1
values[36]	292	1			T567	19		T430	2		T795	1
values[37]	293	1			T567	14		T430	4		T795	1
values[38]	281	1			T567	9		T430	8		T795	1
values[39]	327	1			T567	4		T430	15		T795	1
values[40]	302	1			T567	7		T430	7		T795	1
values[41]	310	1			T567	3		T430	4		T795	1
values[42]	328	1			T567	6		T430	6		T795	1
values[43]	298	1			T567	6		T430	6		T795	1
values[44]	236	1			T567	3		T430	5		T795	1
values[45]	264	1			T567	4		T430	2		T795	1
values[46]	299	1			T567	6		T430	2		T795	1
values[47]	299	1			T567	9		T430	3		T795	1
values[48]	248	1			T567	8		T430	2		T795	1
values[49]	279	1			T567	19		T430	2		T795	1
values[50]	270	1			T567	11		T430	2		T795	2
values[51]	255	1			T567	8		T430	1		T795	1
values[52]	275	1			T567	16		T430	4		T795	1
values[53]	256	1			T567	6		T430	6		T795	1
values[54]	231	1			T567	5		T430	6		T795	1
values[55]	186	1			T567	3		T430	5		T795	1
values[56]	185	1			T567	7		T430	4		T795	1
values[57]	231	1			T567	4		T430	2		T795	1
values[58]	214	1			T567	5		T430	4		T795	1
values[59]	216	1			T567	19		T430	3		T795	1
values[60]	209	1			T430	4		T795	1		T447	5
values[61]	194	1			T430	2		T795	1		T447	6
values[62]	215	1			T430	1		T795	1		T447	8
values[63]	181	1			T430	1		T795	1		T447	16
values[64]	138	1			T430	5		T795	1		T447	12
values[65]	185	1			T430	5		T795	1		T447	7
values[66]	156	1			T430	4		T795	1		T447	11
values[67]	132	1			T430	5		T795	1		T447	5
values[68]	137	1			T430	3		T795	1		T447	9
values[69]	143	1			T430	3		T795	1		T447	2
values[70]	123	1			T430	3		T795	1		T438	21
values[71]	97	1			T430	4		T795	1		T438	6
values[72]	85	1			T430	3		T795	1		T438	6
values[73]	82	1			T430	7		T795	1		T431	1
values[74]	69	1			T430	5		T795	1		T431	1
values[75]	75	1			T430	7		T795	1		T431	1
values[76]	78	1			T430	8		T795	1		T431	1
values[77]	81	1			T430	4		T795	1		T431	1
values[78]	67	1			T430	4		T795	1		T431	1
values[79]	91	1			T430	2		T795	1		T431	1
values[80]	94	1			T430	5		T795	1		T431	1
values[81]	95	1			T430	7		T795	1		T431	1
values[82]	108	1			T430	18		T795	1		T431	2
values[83]	96	1			T430	15		T795	1		T431	2
values[84]	80	1			T430	5		T795	1		T431	2
values[85]	76	1			T430	2		T795	1		T431	1
values[86]	100	1			T430	11		T795	1		T431	5
values[87]	91	1			T430	20		T795	1		T431	6
values[88]	71	1			T430	17		T795	1		T431	8
values[89]	85	1			T430	10		T795	1		T431	2
values[90]	80	1			T430	5		T795	1		T431	2
values[91]	97	1			T430	1		T795	1		T431	3
values[92]	72	1			T430	9		T795	1		T431	1
values[93]	79	1			T430	9		T795	1		T431	1
values[94]	70	1			T430	8		T795	1		T431	3
values[95]	68	1			T430	2		T795	1		T431	2
values[96]	78	1			T430	2		T795	1		T431	3
values[97]	71	1			T430	3		T795	2		T431	2
values[98]	75	1			T430	4		T795	5		T431	1
values[99]	77	1			T430	3		T795	1		T431	7
values[100]	66	1			T430	4		T795	1		T431	6
values[101]	64	1			T430	5		T795	1		T431	2
values[102]	75	1			T430	3		T795	5		T431	4
values[103]	86	1			T430	2		T795	5		T431	1
values[104]	70	1			T430	5		T795	5		T431	2
values[105]	69	1			T430	4		T795	3		T431	1
values[106]	80	1			T430	5		T795	1		T431	1
values[107]	70	1			T430	7		T795	1		T431	2
values[108]	77	1			T430	5		T795	1		T431	2
values[109]	55	1			T430	2		T795	1		T431	2
values[110]	58	1			T795	1		T431	1		T805	1
values[111]	67	1			T795	2		T431	1		T805	1
values[112]	63	1			T795	1		T431	7		T805	1
values[113]	54	1			T795	1		T431	1		T805	1
values[114]	82	1			T795	1		T431	6		T805	2
values[115]	68	1			T795	2		T431	1		T805	3
values[116]	53	1			T795	1		T431	2		T805	2
values[117]	67	1			T795	1		T431	1		T805	8
values[118]	47	1			T795	1		T431	1		T805	1
values[119]	78	1			T795	1		T431	5		T805	2
values[120]	71	1			T795	3		T431	6		T805	2
values[121]	48	1			T795	2		T431	2		T805	1
values[122]	70	1			T795	2		T431	3		T805	1
values[123]	55	1			T795	2		T431	1		T805	5
values[124]	51	1			T795	2		T431	4		T805	1
values[125]	78	1			T795	1		T431	2		T805	1
values[126]	110	1			T795	6		T431	2		T805	3
values[127]	790	1			T795	34		T431	19		T805	28
values[128]	6499	1			T795	361		T431	264		T805	261