Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	139736	1			T102	8		T103	6		T104	26
values[2]	9452	1			T459	3		T549	2		T538	1
values[3]	4276	1			T801	130		T802	25		T663	12
values[4]	2403	1			T801	41		T802	10		T663	7
values[5]	1499	1			T801	29		T802	8		T663	5
values[6]	1028	1			T801	32		T802	7		T663	20
values[7]	804	1			T801	14		T802	1		T663	9
values[8]	669	1			T663	11		T641	6		T622	1
values[9]	591	1			T663	5		T641	4		T622	3
values[10]	464	1			T663	4		T641	14		T622	1
values[11]	487	1			T663	19		T641	17		T622	2
values[12]	395	1			T663	13		T641	6		T622	6
values[13]	403	1			T663	13		T641	5		T622	5
values[14]	418	1			T663	7		T641	16		T622	7
values[15]	376	1			T663	6		T641	13		T622	6
values[16]	428	1			T663	4		T641	6		T622	2
values[17]	526	1			T641	9		T622	6		T796	1
values[18]	390	1			T641	9		T622	1		T796	3
values[19]	404	1			T641	7		T622	1		T796	3
values[20]	420	1			T641	12		T622	6		T796	6
values[21]	425	1			T641	6		T622	8		T796	5
values[22]	426	1			T641	10		T622	14		T796	9
values[23]	357	1			T641	9		T622	3		T796	3
values[24]	429	1			T641	9		T622	5		T796	5
values[25]	376	1			T641	10		T622	4		T796	11
values[26]	330	1			T641	10		T622	2		T796	1
values[27]	294	1			T641	12		T622	5		T796	2
values[28]	383	1			T641	22		T622	3		T796	1
values[29]	332	1			T641	12		T796	2		T490	2
values[30]	329	1			T641	3		T796	1		T490	1
values[31]	334	1			T641	7		T796	1		T490	1
values[32]	299	1			T641	4		T796	2		T490	2
values[33]	324	1			T641	9		T796	1		T490	5
values[34]	325	1			T641	5		T796	2		T490	14
values[35]	337	1			T641	22		T796	2		T490	14
values[36]	306	1			T641	5		T796	6		T490	8
values[37]	327	1			T641	12		T796	2		T490	5
values[38]	317	1			T641	10		T796	10		T490	1
values[39]	286	1			T641	6		T796	1		T824	5
values[40]	288	1			T641	10		T796	2		T824	6
values[41]	241	1			T641	11		T796	5		T824	6
values[42]	259	1			T641	10		T796	7		T824	3
values[43]	265	1			T641	9		T796	3		T824	5
values[44]	242	1			T796	2		T824	4		T826	5
values[45]	214	1			T796	2		T824	2		T826	3
values[46]	204	1			T796	2		T824	4		T826	5
values[47]	185	1			T796	1		T824	4		T826	5
values[48]	195	1			T796	2		T824	2		T826	10
values[49]	174	1			T796	1		T824	4		T826	6
values[50]	172	1			T796	3		T824	5		T826	8
values[51]	136	1			T796	11		T824	3		T826	6
values[52]	111	1			T796	5		T824	1		T826	5
values[53]	116	1			T796	2		T824	2		T826	8
values[54]	112	1			T796	4		T824	9		T826	9
values[55]	124	1			T796	5		T824	11		T826	5
values[56]	119	1			T796	3		T824	7		T826	4
values[57]	122	1			T796	2		T824	2		T826	4
values[58]	117	1			T796	6		T824	3		T826	3
values[59]	127	1			T796	6		T824	3		T826	5
values[60]	98	1			T796	2		T824	2		T826	8
values[61]	96	1			T796	6		T824	2		T826	4
values[62]	86	1			T796	6		T824	3		T826	8
values[63]	78	1			T796	5		T824	4		T826	4
values[64]	95	1			T796	8		T824	3		T826	6
values[65]	120	1			T796	17		T824	1		T826	7
values[66]	150	1			T796	19		T824	3		T826	9
values[67]	127	1			T796	17		T824	4		T826	7
values[68]	112	1			T796	10		T824	1		T826	18
values[69]	96	1			T796	8		T824	1		T826	18
values[70]	97	1			T796	4		T824	2		T826	17
values[71]	84	1			T796	8		T824	1		T826	9
values[72]	87	1			T796	5		T824	8		T826	16
values[73]	80	1			T796	8		T824	5		T826	14
values[74]	95	1			T796	19		T824	6		T826	14
values[75]	88	1			T796	13		T824	3		T826	23
values[76]	136	1			T796	6		T824	1		T826	39
values[77]	98	1			T796	4		T824	1		T826	12
values[78]	99	1			T796	5		T824	2		T826	29
values[79]	109	1			T796	5		T824	1		T826	20
values[80]	97	1			T796	6		T824	3		T826	15
values[81]	102	1			T796	10		T824	1		T826	21
values[82]	104	1			T796	12		T824	3		T826	15
values[83]	118	1			T796	21		T824	3		T826	10
values[84]	106	1			T796	13		T824	6		T826	14
values[85]	118	1			T796	1		T824	19		T826	26
values[86]	105	1			T824	8		T826	22		T804	1
values[87]	115	1			T824	4		T826	15		T804	1
values[88]	94	1			T824	6		T826	11		T804	1
values[89]	93	1			T824	11		T826	13		T804	1
values[90]	103	1			T824	11		T826	24		T804	1
values[91]	82	1			T824	5		T826	27		T804	1
values[92]	94	1			T824	7		T826	30		T804	1
values[93]	93	1			T824	7		T826	22		T804	1
values[94]	95	1			T824	11		T826	18		T804	1
values[95]	94	1			T824	12		T826	24		T804	1
values[96]	75	1			T824	13		T826	9		T804	1
values[97]	88	1			T824	10		T826	21		T804	1
values[98]	79	1			T824	4		T826	34		T804	1
values[99]	66	1			T826	20		T804	1		T511	3
values[100]	50	1			T826	3		T804	1		T511	2
values[101]	64	1			T804	1		T511	6		T792	1
values[102]	48	1			T804	1		T511	2		T792	1
values[103]	49	1			T804	1		T511	3		T792	1
values[104]	46	1			T804	1		T511	1		T792	1
values[105]	53	1			T804	1		T511	2		T792	1
values[106]	54	1			T804	1		T511	2		T792	1
values[107]	47	1			T804	1		T511	3		T792	1
values[108]	52	1			T804	1		T511	1		T792	1
values[109]	53	1			T804	1		T511	1		T792	1
values[110]	48	1			T804	1		T511	2		T792	2
values[111]	44	1			T804	1		T511	1		T792	2
values[112]	64	1			T804	5		T511	1		T792	4
values[113]	63	1			T804	3		T511	1		T792	1
values[114]	61	1			T804	2		T511	2		T792	1
values[115]	58	1			T804	5		T511	4		T792	2
values[116]	54	1			T804	3		T511	1		T792	1
values[117]	58	1			T804	3		T511	4		T792	4
values[118]	67	1			T804	2		T511	7		T792	3
values[119]	48	1			T804	1		T511	3		T792	6
values[120]	56	1			T804	2		T511	3		T792	1
values[121]	56	1			T804	2		T511	3		T792	3
values[122]	48	1			T804	2		T511	1		T792	5
values[123]	62	1			T804	1		T511	5		T792	4
values[124]	45	1			T804	1		T511	1		T792	1
values[125]	33	1			T804	1		T511	1		T792	1
values[126]	92	1			T804	7		T511	3		T792	1
values[127]	1175	1			T804	54		T511	50		T792	50
values[128]	5680	1			T804	274		T511	249		T792	304