LINE 36689
EXPRESSION (addr_hit[567] & reg_we & ((!reg_error)))
------1------ ---2-- -------3------
| -1- | -2- | -3- | Status | Tests |
|---|---|---|---|---|
| 0 | 1 | 1 | Covered | T1,T2,T3 |
| 1 | 0 | 1 | Covered | T1,T2,T3 |
| 1 | 1 | 0 | Covered | T554,T561,T568 |
| 1 | 1 | 1 | Covered | T7,T16,T68 |
LINE 40162
EXPRESSION (reg_busy_sel | shadow_busy)
------1----- -----2-----
| -1- | -2- | Status | Tests |
|---|---|---|---|
| 0 | 0 | Covered | T1,T2,T3 |
| 0 | 1 | Unreachable | |
| 1 | 0 | Covered | T27,T7,T16 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |