Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	136664	1			T94	3		T95	9		T96	39
values[2]	11074	1			T452	2		T548	4		T544	2
values[3]	4636	1			T600	1		T455	102		T498	18
values[4]	2570	1			T600	2		T455	80		T498	16
values[5]	1400	1			T600	1		T455	39		T498	11
values[6]	960	1			T600	2		T455	16		T498	8
values[7]	643	1			T600	2		T455	7		T498	13
values[8]	511	1			T600	1		T455	18		T498	8
values[9]	486	1			T600	5		T455	20		T498	25
values[10]	323	1			T600	6		T455	13		T498	9
values[11]	323	1			T600	5		T455	1		T498	13
values[12]	293	1			T600	10		T498	22		T511	1
values[13]	288	1			T600	9		T498	5		T511	1
values[14]	317	1			T600	8		T498	12		T511	1
values[15]	231	1			T600	5		T498	6		T511	1
values[16]	260	1			T600	5		T498	16		T511	1
values[17]	326	1			T600	2		T498	19		T511	1
values[18]	290	1			T600	5		T498	34		T511	1
values[19]	258	1			T600	4		T498	12		T511	1
values[20]	220	1			T600	4		T498	14		T511	1
values[21]	257	1			T600	3		T498	20		T511	1
values[22]	208	1			T600	4		T498	15		T511	1
values[23]	260	1			T600	4		T498	17		T511	1
values[24]	231	1			T600	5		T498	15		T511	1
values[25]	213	1			T600	2		T498	9		T511	1
values[26]	249	1			T600	1		T498	21		T511	1
values[27]	194	1			T600	2		T498	17		T511	1
values[28]	187	1			T600	1		T498	8		T511	1
values[29]	245	1			T600	4		T498	18		T511	1
values[30]	211	1			T600	9		T498	7		T511	1
values[31]	245	1			T600	11		T498	9		T511	1
values[32]	267	1			T600	9		T498	12		T511	1
values[33]	250	1			T600	5		T498	12		T511	1
values[34]	218	1			T600	3		T498	13		T511	1
values[35]	261	1			T600	1		T498	20		T511	1
values[36]	231	1			T600	2		T498	18		T511	1
values[37]	213	1			T600	3		T498	19		T511	1
values[38]	225	1			T600	2		T498	9		T511	1
values[39]	235	1			T600	3		T498	18		T511	1
values[40]	195	1			T600	5		T498	11		T511	1
values[41]	218	1			T600	10		T498	15		T511	1
values[42]	257	1			T600	20		T498	7		T511	1
values[43]	252	1			T600	9		T498	18		T511	1
values[44]	218	1			T600	6		T498	13		T511	1
values[45]	282	1			T600	3		T498	9		T511	1
values[46]	213	1			T600	5		T498	12		T511	1
values[47]	280	1			T600	2		T498	39		T511	1
values[48]	242	1			T600	3		T498	42		T511	1
values[49]	182	1			T600	3		T498	7		T511	1
values[50]	242	1			T600	5		T498	6		T511	1
values[51]	208	1			T600	3		T498	5		T511	1
values[52]	204	1			T498	4		T511	1		T513	10
values[53]	229	1			T498	5		T511	1		T513	13
values[54]	201	1			T498	5		T511	1		T513	6
values[55]	177	1			T498	2		T511	1		T513	8
values[56]	192	1			T498	7		T511	1		T513	6
values[57]	185	1			T498	3		T511	1		T513	3
values[58]	190	1			T498	4		T511	1		T513	18
values[59]	162	1			T498	3		T511	1		T513	6
values[60]	164	1			T498	6		T511	1		T513	6
values[61]	187	1			T498	10		T511	1		T513	8
values[62]	163	1			T498	6		T511	1		T513	14
values[63]	167	1			T498	14		T511	1		T513	5
values[64]	176	1			T498	8		T511	1		T513	18
values[65]	128	1			T498	9		T511	1		T513	13
values[66]	131	1			T498	3		T511	1		T513	3
values[67]	122	1			T511	1		T513	6		T534	1
values[68]	120	1			T511	1		T513	12		T534	1
values[69]	129	1			T511	1		T534	1		T467	1
values[70]	100	1			T511	1		T534	1		T467	1
values[71]	103	1			T511	1		T534	1		T467	1
values[72]	113	1			T511	1		T534	1		T467	1
values[73]	100	1			T511	1		T534	1		T467	1
values[74]	91	1			T511	1		T534	1		T467	1
values[75]	73	1			T511	1		T534	1		T467	1
values[76]	65	1			T511	1		T534	1		T467	1
values[77]	86	1			T511	1		T534	1		T467	1
values[78]	94	1			T511	1		T534	1		T467	1
values[79]	68	1			T511	1		T534	1		T467	1
values[80]	63	1			T511	1		T534	1		T467	2
values[81]	51	1			T511	1		T534	1		T467	1
values[82]	49	1			T511	1		T534	1		T467	1
values[83]	53	1			T511	1		T534	1		T467	1
values[84]	62	1			T511	1		T534	1		T467	1
values[85]	49	1			T511	1		T534	1		T467	1
values[86]	59	1			T511	1		T534	1		T467	1
values[87]	67	1			T511	1		T534	1		T467	1
values[88]	48	1			T511	1		T534	1		T467	1
values[89]	49	1			T511	1		T534	1		T467	1
values[90]	55	1			T511	1		T534	1		T467	1
values[91]	41	1			T511	1		T534	1		T467	1
values[92]	32	1			T511	1		T534	1		T467	1
values[93]	44	1			T511	1		T534	1		T467	1
values[94]	57	1			T511	1		T534	2		T467	1
values[95]	50	1			T511	1		T534	1		T467	1
values[96]	41	1			T511	1		T534	1		T467	1
values[97]	46	1			T511	1		T534	1		T467	3
values[98]	55	1			T511	1		T534	1		T467	4
values[99]	59	1			T511	1		T534	1		T467	9
values[100]	50	1			T511	1		T534	3		T467	3
values[101]	61	1			T511	1		T534	1		T467	3
values[102]	69	1			T511	2		T534	2		T467	4
values[103]	62	1			T511	4		T534	2		T467	3
values[104]	60	1			T511	1		T534	3		T467	4
values[105]	65	1			T511	3		T534	3		T467	12
values[106]	46	1			T511	3		T534	3		T467	2
values[107]	55	1			T511	2		T534	1		T467	5
values[108]	59	1			T511	2		T534	3		T467	1
values[109]	66	1			T511	4		T534	1		T467	2
values[110]	51	1			T511	1		T534	3		T467	1
values[111]	76	1			T511	3		T534	1		T467	2
values[112]	52	1			T511	1		T534	1		T467	1
values[113]	56	1			T511	1		T534	2		T467	3
values[114]	46	1			T511	1		T534	1		T467	2
values[115]	49	1			T511	5		T534	2		T467	2
values[116]	50	1			T511	1		T534	1		T467	2
values[117]	40	1			T511	5		T534	1		T467	2
values[118]	51	1			T511	1		T534	4		T467	2
values[119]	83	1			T511	1		T534	4		T467	2
values[120]	54	1			T511	1		T534	2		T467	3
values[121]	64	1			T511	4		T534	2		T467	3
values[122]	46	1			T511	2		T534	1		T467	3
values[123]	48	1			T511	2		T534	1		T467	2
values[124]	52	1			T511	2		T534	1		T467	1
values[125]	70	1			T511	1		T534	1		T467	2
values[126]	167	1			T511	2		T534	5		T467	3
values[127]	679	1			T511	28		T534	23		T467	27
values[128]	4302	1			T511	289		T534	339		T467	246