SENSOR_CTRL Lint Results

Thursday April 18 2024 19:02:27 UTC

GitHub Revision: d3942ca074

Branch: os_regression

Tool: ASCENTLINT

Build Mode Flow Infos Flow Warnings Flow Errors Lint Infos Lint Warnings Lint Errors
default 0 0 0 139 0 0

Messages for Build Mode 'default'

Lint Infos

I   FSM_DEFAULT_REQ:   prim_diff_decode.sv:158   Next state register 'gen_async.state_d' has no assignment in the default branch of the case statement for this finite state machine                 New                            

I   NESTED_SUBPROG:   tlul_pkg.sv:143   Function 'prim_mubi_pkg::mubi4_test_invalid' is called from within a function                 New                            

I   CASE_INC:   prim_alert_sender.sv:199   Case statement tag not specified for value 'b111                 New                            

I   CASE_INC:   prim_diff_decode.sv:115    Case statement tag not specified for value 'b11                  New                            

I   CASE_INC:   tlul_err.sv:62             Case statement tag not specified for value 'h3                   New                            

I   ONE_BIT_VEC:   prim_buf.sv:24              Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'sensor_ctrl.u_prim_recov_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf' of module 'prim_buf' (Width=1)                                                     New                            

I   ONE_BIT_VEC:   prim_buf.sv:25              Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'sensor_ctrl.u_prim_recov_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf' of module 'prim_buf' (Width=1)                                                    New                            

I   ONE_BIT_VEC:   prim_flop.sv:22             Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync.u_sync_1' of module 'prim_flop' (Width=1)                                                                            New                            

I   ONE_BIT_VEC:   prim_flop.sv:27             Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync.u_sync_1' of module 'prim_flop' (Width=1)                                                                                   New                            

I   ONE_BIT_VEC:   prim_flop.sv:28             Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync.u_sync_1' of module 'prim_flop' (Width=1)                                                                                   New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:44          Declaration range '[Width - 1:0]' ([0:0]) of 'event_intr_i' has a length of one, instance 'sensor_ctrl.u_io_intr' of module 'prim_intr_hw' (Width=1)                                                                                               New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:47          Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_enable_q_i' has a length of one, instance 'sensor_ctrl.u_io_intr' of module 'prim_intr_hw' (Width=1)                                                                                     New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:48          Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_test_q_i' has a length of one, instance 'sensor_ctrl.u_io_intr' of module 'prim_intr_hw' (Width=1)                                                                                       New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:50          Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_state_q_i' has a length of one, instance 'sensor_ctrl.u_io_intr' of module 'prim_intr_hw' (Width=1)                                                                                      New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:52          Declaration range '[Width - 1:0]' ([0:0]) of 'hw2reg_intr_state_d_o' has a length of one, instance 'sensor_ctrl.u_io_intr' of module 'prim_intr_hw' (Width=1)                                                                                      New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:55          Declaration range '[Width - 1:0]' ([0:0]) of 'intr_o' has a length of one, instance 'sensor_ctrl.u_io_intr' of module 'prim_intr_hw' (Width=1)                                                                                                     New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:58          Declaration range '[Width - 1:0]' ([0:0]) of 'status' has a length of one, instance 'sensor_ctrl.u_io_intr' of module 'prim_intr_hw' (Width=1)                                                                                                     New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:61          Declaration range '[Width - 1:0]' ([0:0]) of 'g_intr_event.new_event' has a length of one, instance 'sensor_ctrl.u_io_intr' of module 'prim_intr_hw' (Width=1)                                                                                     New                            

I   ONE_BIT_VEC:   prim_edge_detector.sv:10    Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'sensor_ctrl.u_init_chg' of module 'prim_edge_detector' (Width=1)                                                                                          New                            

I   ONE_BIT_VEC:   prim_edge_detector.sv:21    Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'sensor_ctrl.u_init_chg' of module 'prim_edge_detector' (Width=1)                                                                                                 New                            

I   ONE_BIT_VEC:   prim_edge_detector.sv:22    Declaration range '[Width - 1:0]' ([0:0]) of 'q_sync_o' has a length of one, instance 'sensor_ctrl.u_init_chg' of module 'prim_edge_detector' (Width=1)                                                                                            New                            

I   ONE_BIT_VEC:   prim_edge_detector.sv:24    Declaration range '[Width - 1:0]' ([0:0]) of 'q_posedge_pulse_o' has a length of one, instance 'sensor_ctrl.u_init_chg' of module 'prim_edge_detector' (Width=1)                                                                                   New                            

I   ONE_BIT_VEC:   prim_edge_detector.sv:25    Declaration range '[Width - 1:0]' ([0:0]) of 'q_negedge_pulse_o' has a length of one, instance 'sensor_ctrl.u_init_chg' of module 'prim_edge_detector' (Width=1)                                                                                   New                            

I   ONE_BIT_VEC:   prim_edge_detector.sv:28    Declaration range '[Width - 1:0]' ([0:0]) of 'q_sync_d' has a length of one, instance 'sensor_ctrl.u_init_chg' of module 'prim_edge_detector' (Width=1)                                                                                            New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:11       Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync' of module 'prim_flop_2sync' (Width=1)                                                                               New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:16       Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync' of module 'prim_flop_2sync' (Width=1)                                                                                      New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:17       Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync' of module 'prim_flop_2sync' (Width=1)                                                                                      New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:20       Declaration range '[Width - 1:0]' ([0:0]) of 'd_o' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync' of module 'prim_flop_2sync' (Width=1)                                                                                      New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:21       Declaration range '[Width - 1:0]' ([0:0]) of 'intq' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync' of module 'prim_flop_2sync' (Width=1)                                                                                     New                            

I   ONE_BIT_VEC:   prim_generic_buf.sv:10      Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'sensor_ctrl.u_prim_recov_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1)                  New                            

I   ONE_BIT_VEC:   prim_generic_buf.sv:11      Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'sensor_ctrl.u_prim_recov_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1)                 New                            

I   ONE_BIT_VEC:   prim_generic_buf.sv:14      Declaration range '[Width - 1:0]' ([0:0]) of 'inv' has a length of one, instance 'sensor_ctrl.u_prim_recov_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1)                   New                            

I   ONE_BIT_VEC:   prim_generic_flop.sv:9      Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1)                                         New                            

I   ONE_BIT_VEC:   prim_generic_flop.sv:13     Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1)                                                New                            

I   ONE_BIT_VEC:   prim_generic_flop.sv:14     Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'sensor_ctrl.u_init_chg.g_sync.u_sync.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1)                                                New                            

I   ONE_BIT_VEC:   prim_sec_anchor_buf.sv:10   Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'sensor_ctrl.u_prim_recov_alert_sender.u_prim_buf_in_req' of module 'prim_sec_anchor_buf' (Width=1)                                                              New                            

I   ONE_BIT_VEC:   prim_sec_anchor_buf.sv:11   Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'sensor_ctrl.u_prim_recov_alert_sender.u_prim_buf_in_req' of module 'prim_sec_anchor_buf' (Width=1)                                                             New                            

I   ONE_BIT_VEC:   prim_subreg.sv:12           Declaration range '[DW - 1:0]' ([0:0]) of 'RESVAL' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change' of module 'prim_subreg' (DW=1)                                                                                  New                            

I   ONE_BIT_VEC:   prim_subreg.sv:21           Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change' of module 'prim_subreg' (DW=1)                                                                                      New                            

I   ONE_BIT_VEC:   prim_subreg.sv:25           Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change' of module 'prim_subreg' (DW=1)                                                                                       New                            

I   ONE_BIT_VEC:   prim_subreg.sv:29           Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change' of module 'prim_subreg' (DW=1)                                                                                       New                            

I   ONE_BIT_VEC:   prim_subreg.sv:34           Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change' of module 'prim_subreg' (DW=1)                                                                                      New                            

I   ONE_BIT_VEC:   prim_subreg.sv:35           Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change' of module 'prim_subreg' (DW=1)                                                                                      New                            

I   ONE_BIT_VEC:   prim_subreg.sv:39           Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change' of module 'prim_subreg' (DW=1)                                                                                 New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:17       Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                   New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:21       Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                    New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:24       Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                    New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:28       Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_state_io_status_change.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                              New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:36       Declaration range '[DW - 1:0]' ([0:0]) of 'gen_w.unused_q' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_enable_io_status_change.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                      New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:47       Declaration range '[DW - 1:0]' ([0:0]) of 'gen_ro.unused_wd' has a length of one, instance 'sensor_ctrl.u_reg.u_fatal_alert_val_0.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                               New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:48       Declaration range '[DW - 1:0]' ([0:0]) of 'gen_ro.unused_q' has a length of one, instance 'sensor_ctrl.u_reg.u_fatal_alert_val_0.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:12       Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_test_io_status_change' of module 'prim_subreg_ext' (DW=1)                                                                                   New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:14       Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_test_io_status_change' of module 'prim_subreg_ext' (DW=1)                                                                                    New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:19       Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_test_io_status_change' of module 'prim_subreg_ext' (DW=1)                                                                                    New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:20       Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_test_io_status_change' of module 'prim_subreg_ext' (DW=1)                                                                                   New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:21       Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'sensor_ctrl.u_reg.u_intr_test_io_status_change' of module 'prim_subreg_ext' (DW=1)                                                                                   New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111             Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'd_sink' has a length of one                                                                                                                                                                New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111             Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl' has a length of one                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111             Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_d2h_t' has a length of one                                                                                                                                                              New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111             Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_i' has a length of one                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111             Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o' has a length of one                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111             Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o_pre' has a length of one                                                                                                                                                              New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111             Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_reg_d2h' has a length of one                                                                                                                                                            New                            

I   EXPLICIT_BITLEN:   prim_util_pkg.sv:85   Bit length not specified for constant '1'                   New                            

I   EXPLICIT_BITLEN:   tlul_err.sv:69        Bit length not specified for constant "'h1"                 New                            

I   EXPLICIT_BITLEN:   tlul_err.sv:77        Bit length not specified for constant "'h2"                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:80          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:80          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:85          Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:106         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:106         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:111         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:124         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:124         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:131         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:131         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:212         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:212         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:217         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:238         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:238         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:243         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:256         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:256         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:263         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:263         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:344         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:344         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:349         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:370         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:370         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:375         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:388         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:388         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:395         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:395         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:476         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:476         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:481         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:502         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:502         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:507         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:520         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:520         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:527         Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:527         Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg.sv:25            Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg.sv:29            Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_arb.sv:21        Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_arb.sv:24        Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_ext.sv:14        Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_ext.sv:19        Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ast_pkg.sv:116               Name 'p' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ast_pkg.sv:117               Name 'n' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl.sv:183           Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl.sv:241           Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl.sv:249           Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:24    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:27    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:33    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:36    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:42    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:46    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:53    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:57    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:63    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:67    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:71    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:75    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:79    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:84    Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:88    Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:94    Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:99    Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:105   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   sensor_ctrl_reg_pkg.sv:109   Name 'd' is shorter than minimum length 2                 New                            

I   CONST_OUTPUT:   sensor_ctrl.sv:350        Output 'cio_ast_debug_out_en_o' is driven by constant ones                                              New                            

I   CONST_OUTPUT:   tlul_adapter_reg.sv:91    Output 'addr_o[1:0]' is driven by constant zeros in module 'tlul_adapter_reg' (RegAw=7)                 New                            

I   CONST_OUTPUT:   tlul_adapter_reg.sv:195   Output 'intg_error_o' is driven by constant zero in module 'tlul_adapter_reg' (RegAw=7)                 New                            

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