Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 494 1 T1 3 T6 4 T33 2
all_values[1] 466 1 T1 1 T2 2 T6 3
all_values[2] 468 1 T1 3 T6 3 T12 1
all_values[3] 488 1 T6 8 T12 2 T13 1
all_values[4] 436 1 T6 5 T33 1 T12 1
all_values[5] 452 1 T1 2 T6 3 T14 5
all_values[6] 500 1 T1 1 T2 2 T6 4
all_values[7] 477 1 T6 3 T33 1 T12 1
all_values[8] 479 1 T1 3 T2 2 T6 1
all_values[9] 490 1 T1 4 T6 4 T14 5
all_values[10] 446 1 T1 1 T2 1 T6 3
all_values[11] 461 1 T1 3 T2 1 T6 2
all_values[12] 457 1 T2 1 T6 4 T33 1
all_values[13] 466 1 T1 1 T2 2 T6 2
all_values[14] 454 1 T6 3 T33 1 T14 5
all_values[15] 464 1 T33 1 T12 1 T14 2
all_values[16] 476 1 T2 2 T6 2 T12 3
all_values[17] 502 1 T1 2 T2 1 T6 2
all_values[18] 498 1 T1 1 T6 5 T12 1
all_values[19] 467 1 T1 1 T2 1 T6 5
all_values[20] 495 1 T1 7 T2 3 T12 1
all_values[21] 468 1 T6 2 T33 1 T14 7
all_values[22] 493 1 T1 2 T6 6 T14 3
all_values[23] 444 1 T1 1 T6 4 T12 1

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