Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 514 1 T6 8 T10 5 T13 1
all_values[1] 534 1 T6 6 T7 1 T10 4
all_values[2] 533 1 T6 7 T10 4 T16 11
all_values[3] 526 1 T6 5 T10 8 T16 13
all_values[4] 563 1 T6 11 T10 5 T16 9
all_values[5] 569 1 T6 7 T7 1 T10 8
all_values[6] 528 1 T3 1 T6 7 T10 4
all_values[7] 530 1 T3 1 T6 11 T7 1
all_values[8] 526 1 T3 1 T6 5 T10 3
all_values[9] 492 1 T6 11 T7 1 T10 8
all_values[10] 495 1 T6 6 T7 1 T10 5
all_values[11] 542 1 T6 8 T7 2 T10 5
all_values[12] 548 1 T6 7 T7 2 T10 9
all_values[13] 528 1 T3 3 T6 12 T10 2
all_values[14] 546 1 T6 9 T10 8 T13 1
all_values[15] 534 1 T3 1 T6 10 T10 7
all_values[16] 552 1 T6 8 T10 3 T16 10
all_values[17] 509 1 T3 2 T6 7 T7 1
all_values[18] 529 1 T3 1 T6 12 T7 2
all_values[19] 544 1 T6 5 T10 5 T16 7
all_values[20] 520 1 T6 11 T10 9 T16 7
all_values[21] 480 1 T3 1 T6 5 T7 2
all_values[22] 546 1 T6 8 T7 1 T10 3
all_values[23] 538 1 T3 1 T6 11 T7 3

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