Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 466 1 T4 2 T28 1 T14 5
all_values[1] 450 1 T4 2 T28 1 T14 4
all_values[2] 461 1 T4 5 T5 1 T28 2
all_values[3] 430 1 T4 2 T28 1 T14 2
all_values[4] 429 1 T4 2 T14 4 T72 1
all_values[5] 472 1 T4 2 T28 3 T14 7
all_values[6] 447 1 T4 2 T14 5 T189 1
all_values[7] 458 1 T4 6 T28 1 T14 6
all_values[8] 490 1 T4 5 T28 1 T14 6
all_values[9] 437 1 T4 1 T14 8 T29 1
all_values[10] 469 1 T4 1 T28 1 T14 6
all_values[11] 457 1 T4 1 T14 1 T41 1
all_values[12] 442 1 T4 3 T28 2 T14 5
all_values[13] 449 1 T4 2 T28 2 T14 7
all_values[14] 504 1 T4 1 T14 3 T41 1
all_values[15] 457 1 T4 2 T14 2 T16 1
all_values[16] 440 1 T4 3 T28 1 T14 2
all_values[17] 456 1 T4 3 T28 2 T14 4
all_values[18] 452 1 T4 2 T28 1 T14 6
all_values[19] 428 1 T3 1 T4 2 T14 4
all_values[20] 462 1 T4 3 T28 1 T14 3
all_values[21] 433 1 T14 3 T68 1 T25 1
all_values[22] 464 1 T4 2 T14 5 T16 3
all_values[23] 463 1 T4 4 T5 1 T14 7

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