Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 532 1 T4 1 T5 5 T7 3
all_values[1] 489 1 T3 1 T5 4 T9 1
all_values[2] 489 1 T1 2 T3 1 T4 2
all_values[3] 495 1 T4 1 T5 6 T11 17
all_values[4] 507 1 T1 2 T4 2 T5 7
all_values[5] 514 1 T3 3 T4 2 T5 3
all_values[6] 508 1 T4 1 T5 8 T11 6
all_values[7] 495 1 T5 4 T11 12 T13 4
all_values[8] 492 1 T3 1 T5 7 T11 7
all_values[9] 516 1 T3 1 T4 1 T5 3
all_values[10] 491 1 T4 1 T5 4 T7 1
all_values[11] 503 1 T3 1 T5 5 T7 1
all_values[12] 475 1 T4 2 T5 5 T11 9
all_values[13] 482 1 T4 2 T5 7 T11 15
all_values[14] 503 1 T3 2 T4 1 T5 5
all_values[15] 491 1 T1 1 T3 1 T4 1
all_values[16] 490 1 T3 1 T4 1 T5 6
all_values[17] 509 1 T4 1 T5 6 T11 6
all_values[18] 484 1 T4 1 T5 4 T7 2
all_values[19] 519 1 T3 2 T5 3 T7 1
all_values[20] 486 1 T3 1 T5 5 T7 1
all_values[21] 522 1 T1 1 T3 1 T5 4
all_values[22] 521 1 T3 1 T5 7 T7 2
all_values[23] 525 1 T1 1 T5 6 T7 2

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