Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 509 1 T11 4 T12 1 T23 3
all_values[1] 485 1 T11 1 T12 1 T13 1
all_values[2] 514 1 T11 2 T23 5 T17 1
all_values[3] 494 1 T11 1 T23 3 T18 2
all_values[4] 511 1 T13 1 T23 3 T19 3
all_values[5] 533 1 T11 3 T23 3 T18 2
all_values[6] 520 1 T11 1 T23 5 T19 7
all_values[7] 515 1 T11 1 T13 2 T23 3
all_values[8] 499 1 T11 1 T23 4 T44 1
all_values[9] 505 1 T11 3 T23 5 T19 7
all_values[10] 535 1 T11 3 T12 1 T23 2
all_values[11] 467 1 T11 1 T12 1 T23 1
all_values[12] 543 1 T11 4 T23 2 T18 1
all_values[13] 513 1 T11 3 T13 2 T23 5
all_values[14] 481 1 T11 2 T12 1 T23 3
all_values[15] 517 1 T11 1 T23 6 T18 1
all_values[16] 492 1 T11 2 T12 1 T23 2
all_values[17] 504 1 T11 4 T23 3 T17 1
all_values[18] 537 1 T11 1 T12 2 T13 1
all_values[19] 497 1 T11 3 T13 1 T23 1
all_values[20] 485 1 T11 2 T12 1 T13 1
all_values[21] 520 1 T11 1 T12 1 T23 5
all_values[22] 521 1 T11 1 T23 1 T18 2
all_values[23] 487 1 T11 1 T13 1 T23 3

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