Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 554 1 T2 2 T3 5 T6 1
all_values[1] 542 1 T2 1 T3 4 T7 2
all_values[2] 510 1 T3 2 T6 1 T9 1
all_values[3] 524 1 T2 1 T3 6 T6 2
all_values[4] 522 1 T3 4 T6 1 T13 1
all_values[5] 508 1 T3 4 T6 3 T7 3
all_values[6] 505 1 T3 5 T10 1 T15 2
all_values[7] 545 1 T2 1 T3 6 T9 1
all_values[8] 527 1 T7 1 T10 1 T15 2
all_values[9] 516 1 T3 2 T9 3 T15 3
all_values[10] 532 1 T2 2 T3 3 T10 1
all_values[11] 564 1 T2 1 T3 4 T6 2
all_values[12] 553 1 T2 1 T3 2 T13 1
all_values[13] 529 1 T3 1 T10 1 T13 2
all_values[14] 536 1 T3 3 T6 1 T7 2
all_values[15] 513 1 T3 4 T7 1 T9 1
all_values[16] 559 1 T3 4 T10 1 T13 1
all_values[17] 554 1 T2 1 T3 1 T6 1
all_values[18] 511 1 T2 2 T3 4 T6 3
all_values[19] 607 1 T2 1 T3 5 T7 2
all_values[20] 583 1 T2 2 T3 3 T6 1
all_values[21] 499 1 T2 1 T3 2 T7 1
all_values[22] 569 1 T7 1 T9 1 T15 4
all_values[23] 538 1 T3 7 T6 1 T7 1

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