Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 494 1 T8 1 T22 1 T16 3
all_values[1] 444 1 T12 1 T24 1 T20 1
all_values[2] 463 1 T3 1 T4 1 T8 1
all_values[3] 473 1 T22 2 T16 2 T24 1
all_values[4] 439 1 T4 1 T12 4 T16 2
all_values[5] 458 1 T8 1 T12 1 T16 3
all_values[6] 456 1 T16 2 T24 1 T45 1
all_values[7] 481 1 T12 3 T22 1 T16 1
all_values[8] 466 1 T3 1 T4 1 T8 1
all_values[9] 478 1 T8 1 T16 4 T24 1
all_values[10] 445 1 T3 1 T22 1 T16 2
all_values[11] 478 1 T4 2 T8 1 T22 2
all_values[12] 476 1 T4 3 T8 3 T12 1
all_values[13] 433 1 T3 1 T4 1 T8 2
all_values[14] 435 1 T3 1 T4 1 T22 1
all_values[15] 450 1 T22 2 T16 4 T24 1
all_values[16] 493 1 T4 1 T8 1 T22 2
all_values[17] 495 1 T16 3 T24 3 T20 2
all_values[18] 474 1 T4 2 T8 1 T22 1
all_values[19] 483 1 T3 1 T12 1 T16 3
all_values[20] 457 1 T22 2 T16 4 T45 1
all_values[21] 450 1 T3 1 T12 2 T22 1
all_values[22] 439 1 T4 1 T22 4 T16 2
all_values[23] 469 1 T8 2 T22 1 T16 3

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