Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 467 1 T2 1 T7 5 T9 1
all_values[1] 474 1 T7 9 T13 2 T15 1
all_values[2] 484 1 T2 1 T7 10 T9 1
all_values[3] 457 1 T2 2 T7 5 T66 3
all_values[4] 506 1 T2 1 T7 3 T15 1
all_values[5] 494 1 T5 1 T7 7 T9 2
all_values[6] 482 1 T2 1 T5 1 T7 2
all_values[7] 476 1 T2 2 T7 7 T13 1
all_values[8] 486 1 T7 4 T13 1 T66 5
all_values[9] 493 1 T7 6 T66 4 T18 3
all_values[10] 499 1 T7 7 T66 4 T18 1
all_values[11] 522 1 T2 2 T7 5 T9 2
all_values[12] 490 1 T7 5 T9 1 T13 1
all_values[13] 503 1 T7 10 T9 1 T66 4
all_values[14] 541 1 T7 2 T13 2 T66 6
all_values[15] 511 1 T2 1 T7 5 T9 1
all_values[16] 530 1 T2 1 T7 7 T9 1
all_values[17] 494 1 T7 9 T13 2 T66 4
all_values[18] 461 1 T7 3 T66 4 T18 2
all_values[19] 446 1 T2 1 T5 1 T7 9
all_values[20] 478 1 T7 6 T13 2 T66 5
all_values[21] 465 1 T2 1 T7 5 T13 1
all_values[22] 489 1 T2 2 T7 5 T13 1
all_values[23] 474 1 T2 1 T7 4 T9 1

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