Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 522 1 T6 1 T7 3 T14 12
all_values[1] 536 1 T6 1 T14 4 T17 10
all_values[2] 525 1 T7 3 T12 1 T14 5
all_values[3] 499 1 T7 6 T14 7 T17 3
all_values[4] 511 1 T6 1 T7 6 T14 11
all_values[5] 489 1 T7 2 T12 1 T14 5
all_values[6] 499 1 T7 8 T14 7 T17 3
all_values[7] 519 1 T7 7 T12 1 T14 5
all_values[8] 526 1 T6 1 T7 2 T12 1
all_values[9] 503 1 T7 3 T14 8 T17 3
all_values[10] 484 1 T6 1 T7 4 T14 5
all_values[11] 512 1 T6 1 T7 3 T14 8
all_values[12] 470 1 T7 4 T14 5 T17 5
all_values[13] 487 1 T7 8 T12 1 T14 8
all_values[14] 508 1 T7 6 T12 1 T14 5
all_values[15] 517 1 T6 2 T7 3 T14 11
all_values[16] 487 1 T7 7 T14 5 T17 5
all_values[17] 491 1 T7 2 T14 8 T17 3
all_values[18] 543 1 T7 6 T14 6 T17 7
all_values[19] 498 1 T7 5 T14 13 T17 5
all_values[20] 533 1 T7 7 T14 9 T17 3
all_values[21] 520 1 T7 3 T14 8 T17 5
all_values[22] 521 1 T6 1 T7 7 T12 1
all_values[23] 534 1 T7 7 T14 9 T17 6

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