Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 554 1 T1 1 T4 2 T6 5
all_values[1] 526 1 T4 2 T6 3 T40 1
all_values[2] 558 1 T1 1 T3 1 T4 3
all_values[3] 484 1 T1 1 T2 2 T4 2
all_values[4] 503 1 T1 1 T6 4 T40 2
all_values[5] 496 1 T1 2 T2 2 T3 1
all_values[6] 515 1 T4 1 T6 9 T172 2
all_values[7] 541 1 T1 2 T2 1 T4 2
all_values[8] 512 1 T4 2 T6 4 T66 1
all_values[9] 564 1 T2 1 T4 1 T6 3
all_values[10] 543 1 T1 1 T2 1 T4 1
all_values[11] 558 1 T1 1 T3 1 T4 3
all_values[12] 540 1 T1 2 T2 1 T6 4
all_values[13] 522 1 T4 1 T6 5 T10 1
all_values[14] 527 1 T2 3 T4 5 T6 8
all_values[15] 553 1 T2 1 T4 2 T6 2
all_values[16] 528 1 T2 1 T3 1 T6 4
all_values[17] 556 1 T1 1 T6 5 T7 1
all_values[18] 478 1 T4 2 T6 9 T8 1
all_values[19] 541 1 T1 1 T2 2 T4 1
all_values[20] 542 1 T1 1 T2 2 T4 1
all_values[21] 507 1 T1 2 T4 1 T6 3
all_values[22] 485 1 T4 2 T6 6 T172 1
all_values[23] 513 1 T2 1 T4 2 T6 2

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