Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 495 1 T1 1 T2 6 T4 10
all_values[1] 502 1 T2 4 T4 6 T7 1
all_values[2] 488 1 T2 2 T4 4 T5 2
all_values[3] 534 1 T1 1 T2 4 T4 6
all_values[4] 558 1 T1 1 T2 4 T4 6
all_values[5] 496 1 T1 1 T2 8 T4 4
all_values[6] 502 1 T2 8 T4 8 T5 1
all_values[7] 507 1 T2 7 T4 1 T7 6
all_values[8] 498 1 T1 1 T2 8 T4 3
all_values[9] 510 1 T1 1 T2 7 T4 7
all_values[10] 511 1 T1 2 T2 3 T4 3
all_values[11] 503 1 T1 2 T2 6 T4 4
all_values[12] 507 1 T1 2 T2 9 T4 5
all_values[13] 518 1 T1 1 T2 6 T4 8
all_values[14] 506 1 T2 10 T4 6 T7 6
all_values[15] 494 1 T1 1 T2 11 T4 6
all_values[16] 546 1 T1 1 T2 9 T4 6
all_values[17] 517 1 T2 5 T4 3 T7 4
all_values[18] 518 1 T2 5 T4 7 T5 1
all_values[19] 522 1 T2 5 T4 6 T7 1
all_values[20] 462 1 T2 1 T4 4 T5 1
all_values[21] 481 1 T2 6 T4 5 T5 1
all_values[22] 546 1 T1 1 T2 13 T4 5
all_values[23] 535 1 T1 2 T2 9 T4 6

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