Unified Coverage Report :: Group :: xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

Group : xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

---

Summary for Group xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	64	0	64	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	1948	1			T3	10		T23	5		T16	18
all_values[1]	1897	1			T3	5		T12	2		T23	2
all_values[2]	1986	1			T3	7		T12	3		T23	3
all_values[3]	2003	1			T3	3		T12	3		T23	5
all_values[4]	1984	1			T3	6		T12	5		T23	3
all_values[5]	1969	1			T3	3		T12	3		T23	6
all_values[6]	1930	1			T3	5		T12	2		T23	6
all_values[7]	1997	1			T3	3		T12	3		T23	9
all_values[8]	1897	1			T3	5		T12	3		T23	9
all_values[9]	1940	1			T3	4		T12	4		T23	5
all_values[10]	2013	1			T3	4		T12	2		T23	3
all_values[11]	1972	1			T3	5		T12	4		T23	2
all_values[12]	1972	1			T3	9		T23	5		T16	23
all_values[13]	1965	1			T3	9		T23	7		T16	18
all_values[14]	1869	1			T3	4		T12	2		T23	2
all_values[15]	1991	1			T3	1		T12	5		T23	10
all_values[16]	2003	1			T3	5		T12	2		T23	8
all_values[17]	1941	1			T3	6		T12	3		T23	11
all_values[18]	1963	1			T3	2		T12	5		T23	9
all_values[19]	2021	1			T3	4		T12	1		T23	8
all_values[20]	1979	1			T3	4		T12	1		T23	9
all_values[21]	1938	1			T3	7		T12	3		T23	2
all_values[22]	1924	1			T3	5		T12	4		T23	2
all_values[23]	1917	1			T3	8		T12	2		T23	6
all_values[24]	1986	1			T3	8		T12	2		T23	3
all_values[25]	1977	1			T3	6		T12	1		T23	4
all_values[26]	1950	1			T3	3		T12	2		T23	3
all_values[27]	1927	1			T3	4		T12	1		T23	3
all_values[28]	2040	1			T3	7		T12	3		T23	9
all_values[29]	2060	1			T3	7		T12	2		T23	5
all_values[30]	1987	1			T3	7		T12	5		T23	6
all_values[31]	1872	1			T3	2		T12	5		T23	4
all_values[32]	1964	1			T3	5		T12	2		T23	6
all_values[33]	2006	1			T3	5		T12	3		T23	7
all_values[34]	1921	1			T3	7		T12	4		T23	9
all_values[35]	1955	1			T3	2		T12	2		T23	10
all_values[36]	1975	1			T3	4		T12	3		T23	9
all_values[37]	1992	1			T3	6		T12	5		T23	6
all_values[38]	1958	1			T3	4		T12	2		T23	8
all_values[39]	1992	1			T3	4		T12	5		T23	10
all_values[40]	1869	1			T3	8		T12	2		T23	8
all_values[41]	1881	1			T3	10		T12	4		T23	6
all_values[42]	1940	1			T3	7		T12	2		T23	1
all_values[43]	1881	1			T3	4		T12	2		T23	9
all_values[44]	2016	1			T3	3		T12	2		T23	4
all_values[45]	1944	1			T3	3		T12	3		T23	6
all_values[46]	1942	1			T3	2		T12	1		T23	9
all_values[47]	2024	1			T3	10		T12	5		T23	6
all_values[48]	1949	1			T3	7		T12	1		T23	4
all_values[49]	1926	1			T3	5		T12	2		T23	5
all_values[50]	1940	1			T3	5		T12	1		T23	6
all_values[51]	1978	1			T3	7		T12	3		T23	6
all_values[52]	1933	1			T3	9		T12	2		T23	10
all_values[53]	2020	1			T3	6		T12	4		T23	2
all_values[54]	1919	1			T3	4		T12	2		T23	6
all_values[55]	1905	1			T3	5		T12	3		T23	7
all_values[56]	1974	1			T3	5		T12	4		T23	1
all_values[57]	1904	1			T3	4		T12	4		T23	6
all_values[58]	1958	1			T3	3		T12	1		T23	13
all_values[59]	1966	1			T3	5		T12	5		T23	6
all_values[60]	1934	1			T3	4		T12	4		T23	2
all_values[61]	1952	1			T3	5		T12	3		T23	9
all_values[62]	1967	1			T3	8		T12	1		T23	5
all_values[63]	2050	1			T3	6		T12	1		T23	5