Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 464 1 T1 3 T10 2 T18 4
all_values[1] 502 1 T1 2 T3 1 T10 3
all_values[2] 462 1 T1 5 T3 2 T10 7
all_values[3] 475 1 T1 2 T3 1 T10 4
all_values[4] 442 1 T1 1 T3 1 T10 1
all_values[5] 439 1 T1 4 T10 7 T18 5
all_values[6] 413 1 T1 5 T3 1 T10 3
all_values[7] 429 1 T1 2 T3 1 T10 7
all_values[8] 463 1 T1 1 T3 1 T18 7
all_values[9] 424 1 T1 3 T3 1 T10 2
all_values[10] 451 1 T1 3 T3 2 T10 3
all_values[11] 444 1 T1 4 T3 3 T10 3
all_values[12] 467 1 T1 2 T3 1 T10 4
all_values[13] 439 1 T1 3 T10 7 T18 3
all_values[14] 470 1 T1 7 T3 3 T10 4
all_values[15] 454 1 T1 2 T10 4 T18 2
all_values[16] 460 1 T1 1 T3 3 T10 8
all_values[17] 484 1 T1 5 T10 7 T17 2
all_values[18] 450 1 T1 6 T10 3 T17 1
all_values[19] 449 1 T1 1 T10 8 T18 4
all_values[20] 458 1 T1 3 T10 8 T18 2
all_values[21] 449 1 T3 2 T10 8 T18 6
all_values[22] 442 1 T1 4 T10 3 T18 5
all_values[23] 455 1 T1 2 T3 1 T10 3

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