Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 493 1 T9 1 T14 2 T15 1
all_values[1] 470 1 T9 1 T14 1 T15 6
all_values[2] 521 1 T15 2 T21 1 T30 3
all_values[3] 482 1 T15 4 T21 1 T31 1
all_values[4] 498 1 T15 4 T30 1 T31 1
all_values[5] 490 1 T9 1 T14 1 T15 7
all_values[6] 472 1 T15 7 T17 1 T30 1
all_values[7] 493 1 T9 1 T15 10 T17 1
all_values[8] 455 1 T9 1 T15 6 T17 1
all_values[9] 495 1 T9 1 T14 2 T15 5
all_values[10] 524 1 T15 2 T21 1 T31 3
all_values[11] 474 1 T14 4 T15 5 T17 1
all_values[12] 490 1 T14 3 T15 1 T21 2
all_values[13] 508 1 T14 1 T15 5 T17 2
all_values[14] 481 1 T15 8 T31 1 T71 3
all_values[15] 482 1 T15 4 T30 1 T36 3
all_values[16] 529 1 T15 7 T30 1 T71 1
all_values[17] 527 1 T9 1 T15 5 T30 3
all_values[18] 487 1 T9 1 T14 2 T15 2
all_values[19] 513 1 T14 1 T15 5 T65 1
all_values[20] 450 1 T15 5 T17 1 T21 1
all_values[21] 455 1 T9 2 T14 1 T15 6
all_values[22] 471 1 T9 3 T15 6 T17 1
all_values[23] 492 1 T15 6 T17 1 T30 1

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